Analyze the operation of power converters

Abstract

A method for analyzing an operating condition of a power converter (PC) comprises providing a sampling clock signal (SS) and repeatedly determining at least one operating parameter of a power semiconductor device (PS1), wherein the repetition is synchronized with the sampling clock signal (SS). Depending on the switching behavior of the power converter (PC) within a given repetition, at least one operating parameter is measured or at least one operating parameter is identified from a previous repetition. Depending on the at least one determined operating parameter, an operating condition of the power converter (PC) is determined.

Description

[0001] The present invention relates to a method and a circuit for analyzing the operating conditions of a power converter.

[0002] If the measurements in the power converter coincide with switching events of the power converter, it may interfere with the measurements in the power converter that are performed to analyze the operating conditions. The power converter usually includes a basic clock for deriving, for example, a pulse width modulation PWM switching pattern. This can be, for example, a carrier, in particular a triangular carrier, for generating a PWM square wave to control the switching of devices of the power converter.

[0003] Existing methods have assumed that the measurements are synchronized with a base clock. In particular, the peaks of the triangular carrier signal may provide a guaranteed period during which no switching occurs.

[0004] However, if the device for analyzing the operating conditions is not implemented within the power converter module, for example if the device is implemented as independent hardware, the carrier signal of the power converter is not accessible to the device and therefore cannot be used for synchronous measurement. PWM square waves are also not suitable for synchronous measurement because PWM square waves usually have irregular edges.

[0005] Furthermore, even if synchronization of the operation of the power converters is possible, such synchronization may be problematic because the power converters may operate at switching frequencies that are too low or too high for feasible condition analysis. For example, too low a frequency affects the achievable resolution of the analysis, while too high a frequency may result in unreasonable computational effort.

[0006] It is therefore an object of the present invention to provide an improved concept for analysing operating conditions of a power converter which is applicable to a wide variety of power converters.

[0007] This object is achieved by the subject matter of the independent claims. Further embodiments and examples are subject matter of the dependent claims.

[0008] The improved concept is based on the idea of ​​providing a dedicated sampling clock signal that is independent of the operation of the power converter and synchronizing the measurement of the operating parameters of the power converter to the sampling clock signal. Depending on the switching behavior within the measurement interval, the operating parameters are measured or obtained from a previous measurement interval. Then, the operating condition is determined depending on the measured operating parameters.

[0009] According to the improved concept, a method for analyzing the operating condition of a power converter is provided. The method comprises providing a sampling clock signal with a constant sampling frequency. The sampling clock signal is in particular asynchronous and independent of the operation of the power converter, in particular the operating frequency. At least one operating parameter of a power semiconductor device of the power converter is repeatedly determined, wherein the repetition is synchronized with the sampling clock signal. Depending on the switching behavior of the power converter within the given repetition, determining at least one operating parameter in a given repetition comprises measuring at least one operating parameter during the given repetition, or identifying the value of at least one operating parameter from a previous repetition, in particular from a repetition before the given repetition, in particular from a repetition immediately before the given repetition. The operating condition of the power converter is determined depending on the at least one determined operating parameter.

[0010] Depending on the switching behavior of the power converter within a further given repetition, at least one of the operating parameters may not be determined for the further given repetition.

[0011] Where the at least one operating parameter determined in a given iteration includes more than one parameter, one or more of the at least one operating parameter may be measured and one or more other of the at least one operating parameter may be identified or obtained from previous iterations.

[0012] Repeated synchronization with the sampling clock signal means that at least one of the operating parameters of the power semiconductor devices of the power converter is repeatedly determined during or at the end of each of a plurality of consecutive sampling intervals, wherein the consecutive sampling intervals have a duration defined by the frequency of the sampling clock signal, in particular by the inverse of the frequency of the sampling clock signal.

[0013] By means of the method according to the above-mentioned improved concept, the analysis of the operating conditions can be performed asynchronously with the operation of the power converter, in particular with the basic clock signal of the power converter or the PWM carrier signal of the converter. Therefore, the switching frequency of the power converter does not affect the applicability of the method, nor does it affect the specific hardware architecture of the power converter or the system for executing the method. Therefore, the analysis of the operating conditions of the power converter according to the improved method can be generally performed, which is not significantly limited for a wide variety of power converters, in particular for most power converters. In particular, the method allows the power converter to be modified by implementing the system that performs the method according to the improved concept as independent hardware that can be connected to the power converter via a standard port.

[0014] According to several embodiments of the method, determining the operating condition comprises determining at least one value of a power loss of the power semiconductor device in dependence on the at least one determined operating parameter.The operating condition is then determined in dependence on the at least one value of the power loss.

[0015] According to several embodiments, during each repetition, there are zero switching events corresponding to a static on or off state, or there is exactly one switching event as one on or off event, or there are exactly two switching events as one on and one off event, or there are more than two switching events. Determining the operating parameters depends on which of the listed situations exists in each repetition.

[0016] According to several embodiments, determining the operating condition includes determining a junction temperature of the power semiconductor device, in particular, the operating condition corresponds to the junction temperature.

[0017] According to several embodiments, the at least one value of the power losses includes conduction power losses and / or switching power losses of the power semiconductor device.

[0018] The conduction power loss for the sampling interval can be calculated, for example, according to the following expression

[0019] P c =V on *I on *t on / T s , (1)

[0020] Among them, P c is the conduction power loss, V on It is the on-state voltage of the power semiconductor device, that is, the forward voltage, I on is the on-state current of the power semiconductor device, t on is the total on-state duration of the power semiconductor device within the sampling interval considered, and T s is the duration of the sampling interval.

[0021] The switching power loss for a sampling interval can be calculated, for example, according to the following expression

[0022] P sw =(N on *E on +N off *E off ) / T s (2)

[0023] Among them, P sw is the switching power loss, N on is the total number of on events in the sampling interval, N off is the total number of shutdown events in the sampling interval, E on and E off The turn-on energy and turn-off energy depend on the on-state current I of the power semiconductor device. on , disconnect state voltage Voff and / or junction temperature. For example, the turn-on energy and the turn-off energy may be obtained from a lookup table. For example, the lookup table may be predetermined and retrieved from a previously estimated junction temperature.

[0024] According to several embodiments, determining an operating condition of the power semiconductor device includes feeding data dependent on at least one determined operating parameter to a thermal model of the power converter and simulating a junction temperature according to the thermal model.

[0025] According to several embodiments, determining the operating condition comprises feeding at least one value of the power losses as input to a thermal model of the power converter and determining the operating condition, in particular the junction temperature, depending on an output of the thermal model.

[0026] Therein, the thermal model may be fed with conduction power losses and / or switching power losses and / or the sum of conduction and switching power losses. The sum of conduction and switching power losses represents the self-heating power losses due to self-heating of the power semiconductor device.

[0027] According to several embodiments, cross-coupling power losses are determined and fed as further input to the thermal model.The cross-coupling power losses are due to another device or several other devices of the power converter, which may affect the junction temperature of the power semiconductor device.

[0028] According to several embodiments, at least one value of the power loss is determined during or at the end of each of a plurality of consecutive sampling intervals, except for such sampling intervals showing a static off state during the entire sampling interval.

[0029] According to several embodiments, the at least one operating parameter includes a total number of switch-on events within the corresponding sampling interval and / or a total number of switch-off events within the corresponding sampling interval and / or a total on-state duration within the corresponding sampling interval.

[0030] According to several embodiments, the at least one operating parameter comprises an on-state condition, in particular an on-state voltage or an on-state current, of the power semiconductor device during a corresponding sampling interval.

[0031] According to several embodiments, in a sampling interval having more than one on-state period, in which the on-state voltage or on-state current is measured, the on-state voltage or on-state current is measured only for one of the on-state periods. Alternatively, measurements may be made for more than one on-state period, and the corresponding average values ​​may be used for further analysis. Alternatively, another type of aggregate value, such as a median value, may be used instead of the average value.

[0032] According to several embodiments, the at least one operating parameter includes an off-state condition, in particular an off-state voltage, of the power semiconductor device during a respective sampling interval.

[0033] According to several embodiments, in a sampling interval having more than one off-state period in which the off-state is measured, the off-state voltage is measured for only one of the off-state periods. Alternatively, measurements may be made for more than one off-state period, and the corresponding average or other aggregated values ​​may be used for further analysis.

[0034] According to some embodiments, the sampling clock signal is asynchronous with respect to the operation of the converter, including the sampling clock signal being asynchronous with respect to a basic clock signal of the converter, in particular, the basic clock signal has a frequency different from the sampling clock signal, and / or the basic clock signal has a phase offset relative to the sampling clock signal.

[0035] According to several embodiments, the power converter is configured to utilize a switching scheme, in particular a PWM scheme, for power conversion. The sampling clock signal is asynchronous to the operation of the converter including the sampling clock signal being asynchronous to a characteristic signal of the switching scheme, in particular a carrier signal.

[0036] According to several embodiments, the carrier signal has a triangular waveform or a sawtooth waveform or a ramp waveform.

[0037] According to several embodiments, the period of the sample signal, which is the inverse of the frequency, is selected as a compromise between processing speed and the thermal time constant of the system.

[0038] According to some embodiments, the period of the sampling clock signal lies between 0.2 ms and 2 ms, in particular between 0.8 ms and 1.2 ms, for example with a frequency of 1 ms or 1.0 ms.

[0039] According to several embodiments, the power semiconductor device comprises a MOSFET or an IGBT. Determining at least one operating parameter comprises measuring a gate voltage of the MOSFET or IGBT, in particular a gate-emitter voltage of the IGBT, during a turn-off event of the MOSFET or IGBT. The gate voltage is in particular given by the gate voltage immediately before the turn-off event.

[0040] According to several embodiments, determining an operating condition of the power converter includes determining a junction temperature as a function of an on-state voltage and a gate voltage.

[0041] According to several embodiments, determining the operating condition of the power converter comprises determining a switching frequency of, in particular, the power semiconductor devices. The switching frequency may be determined, for example, depending on a total number of switch-on events and a total number of switch-off events.

[0042] According to several embodiments, determining the operating condition of the power converter comprises determining a duty cycle of, in particular, the power semiconductor device.The duty cycle may be determined, for example, from a total on-state duration and a duration of a sampling interval.

[0043] According to several embodiments, determining the operating condition of the power converter comprises determining a DC link or DC supply voltage of the power semiconductor device. The DC link or DC supply voltage may be determined from the off-state voltage, in particular equal to the off-state voltage.

[0044] According to several embodiments, determining the operating condition of the power converter includes determining characteristic AC quantities of the power semiconductor device, such as AC frequency, AC current, AC voltage and / or power factor. The power factor is given by the phase shift angle between the AC current and the AC voltage or the cosine of the phase shift angle. The AC voltage and AC current can be given, for example, by their respective root mean square values. The AC frequency can include a fundamental AC frequency and / or a higher order harmonic AC frequency.

[0045] According to several embodiments, determining the characteristic AC quantity comprises a Fast Fourier Transformation FFT.

[0046] According to the improved concept, a circuit for analyzing an operating condition of a power converter is also provided. In particular, the circuit is configured to perform a method according to the improved concept.

[0047] The circuit comprises a clock generator, a measuring unit and an evaluation unit. The clock generator is configured to provide a sampling clock signal having a constant sampling frequency, wherein the sampling clock signal is in particular asynchronous with respect to the operation of the power converter. The measuring unit is configured to repeatedly determine at least one operating parameter of a power semiconductor device of the power converter. The repetition is synchronized with the sampling clock signal. For a given repetition, determining at least one operating parameter comprises depending on a switching behavior of the power converter within the given repetition, measuring at least one operating parameter, or identifying a value of at least one operating parameter from a previous repetition. The evaluation unit is configured to determine an operating condition of the power converter based on at least one determined operating parameter.

[0048] According to some embodiments, the power semiconductor device comprises: a diode, in particular a PIN diode or a Schottky diode; or a thyristor or a field effect transistor, such as a MOSFET, a HEMT or a JFET; or a bipolar transistor, such as an IGBT or a BJT.

[0049] Further embodiments and examples of the circuit according to the improved concept can be easily derived from each of the various embodiments and examples of the method according to the improved concept, and vice versa.

[0050] Hereinafter, the present invention is explained in detail with respect to exemplary embodiments by referring to the accompanying drawings.

[0051] In the accompanying drawings,

[0052] Figure 1 A block diagram showing an exemplary embodiment of a power converter and circuit according to the improved concept; and

[0053] Figure 2 A diagram schematically depicting an exemplary embodiment of a method according to the improved concept is shown.

[0054] Figure 1 A block diagram of an exemplary embodiment of a power converter PC and a circuit C according to the improved concept is shown. Without any restrictions on the circuit C, the power converter may, for example, include a plurality of power semiconductor devices PS1, PS2, ..., PS6 (only six are shown as an exemplary number; the circuit symbol of the IGBT is only used as a placeholder for any power semiconductor device) and a drive and control unit DCU. Figure 1 In the example of , devices PS1, ..., PS6 are depicted as part of a six-switch three-phase two-level inverter for standard applications as a power converter. However, this is only for illustration, so this example is not limited because the improved concept does not rely on this structure. The power converter PC may also include a circuit system for generating a switching signal SS, such as a PWM signal. The PWM signal can be generated based on a PWM carrier signal. The carrier signal or switching signal SS can be generated based on a basic clock signal or a system clock signal, such as generated by a basic clock generator (not shown) of the power converter PC.

[0055] The circuit C is arranged, for example, outside the power converter PC and coupled to the power converter PC. The circuit C comprises an evaluation unit EU and a measuring unit MU. Furthermore, the circuit comprises a clock generator CG. Optionally, the circuit C may comprise a storage unit (not shown).

[0056] Compared to Figure 2 The operation of circuit C is explained by means of an exemplary embodiment of the method according to the improved concept depicted in FIG.

[0057] The clock generator CG provides a sampling clock signal SC with a constant sampling frequency. Figure 2 There are seven consecutive sampling intervals S1, S2, ..., S7 with equal duration, corresponding for example to the inverse sampling frequency. In particular, the sampling clock signal SC may be asynchronous or independent from the operation of the power converter PC, for example the basic clock signal or the switching signal SS.

[0058] The measuring unit MU is configured to determine an operating parameter of one of the power semiconductor devices PS1, ..., PS6 during each of the sampling intervals S1, ..., S7. In the example shown, the operating parameter comprises an on-state voltage V on , on-state current I on and the off-state voltage V off .

[0059] Additionally, the operating parameters may include the total number of switch-on events N within the sampling interval. on and the total number of shutdown events N off . A switch-on event is a switch-on event from a logic zero to a logic one of the switching signal SS, and a switch-off event is a switch-off event from a logic one to a logic zero of the switching signal SS. Therefore, in the example shown, there are two switch-on events during the sampling interval S7, and there is a corresponding switch-on event during each of the sampling intervals S3, S5, and S6. During the sampling intervals S1, S2, and S4, there are no switch-on events. In addition, there are two switch-off events in the sampling interval S6, and there is a corresponding switch-off event in each of the sampling intervals S1, S5, and S7. During the sampling intervals S2, S3, and S4, there are no switch-off events.

[0060] Depending on the switching behavior of the power converter PC, in particular on the switching signal SS, within a certain sampling interval S1, ..., S7, some of the operating parameters may be measured during or at the end of the sampling interval or may be obtained from a previous sampling interval. This is exemplarily described below with respect to Figure 2 describe.

[0061] In the first sampling interval S1, the switching signal SS starts in the on-state and has a turn-off event. Since the on-state current I on Stable, so during the interval S1, I is measured on Alternatively, the on-state current I may be obtained from a previous sampling interval (not shown). on Compared with the current, the on-state voltage V on A longer period of time is required after the turn-on event. Thus, for example, the on-state voltage V on Not measured during S1 but taken from the previous sampling interval. Note that the on-state voltage V can also be measured during S1 if the width of the corresponding on-state pulse is large enough. on During S1, for example, at or immediately after a turn-off event, the turn-off voltage V is measured. off However, this is not a limitation, and the off-state voltage V may also be measured at a later time in the interval S1. offBased on the parameters determined in this way, the evaluation unit EU can calculate the conducted energy E c =V on *I on *t on Thus, according to the above equation (1), the conduction power loss P is obtained c , that is, P c =E c / T s , where T s is the duration of each of the sampling intervals S1, ..., S7. Furthermore, the evaluation unit EU can calculate the switching energy E sw =N on *E on +N off* E off , where E on and E off It can be the on-state current I of the power semiconductor device PS1 on , disconnect state voltage V off and junction temperature. E on and E off The corresponding value of can be retrieved, for example, from a corresponding lookup table. Then, the switching power loss P is given by equation (2) above: sw , that is, P sw =E sw / T s .

[0062] In the second sampling interval S2, the switching signal SS starts in the off state and there is no turn-on event. Therefore, the switching and conduction energy E sw 、E c are both zero. By definition, it is not possible to determine the on-state current and voltage I for interval S2. on 、V on However, the off-state voltage V off .

[0063] In the third sampling interval S3, the switching signal SS starts in the off state and has one turn-on event. In this case, all three on-state currents and voltages I can be measured during S3. on 、V on And the off-state voltage V off Alternatively, the off-state voltage V may be obtained, for example, from interval S2 off The switching and conduction energy E can be determined as described above sw 、E c Alternatively, the on-state voltage V may be obtained, for example, from the interval S1. onThe on-state duration in S3 after the turn-on event in S3 is proportional to the on-state voltage V on It may be advantageous in situations where it is too short for stability.

[0064] In the fourth sampling interval S4, the switching signal SS starts in the on state and there is no turn-off event. Therefore, by definition, the off-state voltage V cannot be determined for the interval S4. off , and the switching energy E sw The on-state current and voltage I can be measured during S4 on 、V on and the conducted energy E can be determined as described above c .

[0065] In the fifth sampling interval S5, the switching signal SS starts in the on-state and has one turn-off event followed by one turn-on event. Therefore, all three on-state currents and voltages I can be measured during S5. on 、V on And the off-state voltage V off The switching and conduction energy E can be determined as described above sw 、E c Alternatively, the on-state voltage V may be obtained, for example, from interval S4. on The on-state duration in S5 after the second turn-on event in S5 is proportional to the on-state voltage V on It may be beneficial in situations where it is too short for stability.

[0066] In the sixth sampling interval S6, the switching signal SS starts in the on-state and has a turn-off event, followed by a turn-on event and another turn-off event. Therefore, all three on-state currents and voltages I can be measured during S6. on 、V on And the off-state voltage V off The switching and conduction energy E can be determined as described above sw 、E c Alternatively, the on-state voltage V may be obtained, for example, from interval S5. on The on-state duration in S5 after the second turn-on event in S5 is proportional to the on-state voltage V on It may be beneficial in situations where it is too short for stability.

[0067] In the seventh sampling interval S7, the switching signal SS starts in the off state and has a turn-on event, followed by a turn-off event and another turn-on event. Therefore, all three on-state currents and voltages I can be measured during S7. on 、V on And the off-state voltage Voff The switching and conduction energy E can be determined as described above sw 、E c Alternatively, the on-state voltage V may be obtained, for example, from interval S6. on The first on-state duration after the first on-event in S7 and the second on-state duration in S7 after the second on-event are related to the on-state voltage V on It may be beneficial in situations where both are too short for stability.

[0068] In this way, the conduction and switching power losses P can be determined for each of the sampling intervals S1, ..., S7 independently of the basic clock of the power converter PC. c , P sw .

[0069] The conduction and switching power losses P c , P sw Add together to obtain the self-heating power loss P of the power semiconductor device PS1 sh , self-heating power loss P sh It can be used as an input to the thermal model. The output of the thermal model can be used to determine the junction temperature of the power semiconductor device PS1.

[0070] Optionally, cross-coupling power losses may be determined, for example, by the evaluation unit EU and used as an additional input to the thermal model to improve accuracy.Cross-coupling power losses may be caused by other components of the power converter PC, for example other semiconductor devices PS2, ..., PS6, and they have an impact on the junction temperature of the power semiconductor device PS1.

[0071] By means of a method or circuit according to the improved concept, the operating conditions of a power converter, in particular the junction temperature of a power semiconductor device of the power converter, can be determined in a generic manner applicable to a wide variety of power converters. This includes stand-alone solutions as well as power converters comprising the circuit according to the improved concept itself. This is achieved by establishing a sampling clock that is fixed and selected for the purpose of operating condition analysis. Measurements are made according to the pattern of switching within a sampling interval defined by the sampling clock period, so that the power losses can be correctly calculated and the measurements can be appropriately made.

[0072] The improved concept is compatible with any switching scheme of the power converter, including: conventional PWM, such as sinusoidal PWM, third harmonic injection, space-vector PWM; discontinuous PWM, such as overmodulation, multi-level converters; irregular PWM, such as direct torque control, hysteresis control; line frequency switching, such as modular multi-level applications; high-speed motor drive operation or DC choppers, such as buck and boost DC-DC converters.

[0073] Furthermore, the improved concept is compatible with a wide range of switching frequencies of the power converter, for example hundreds of Hz to tens of kHz. Even low frequencies of the modulation frequency in the range of 50-200 Hz are possible.

[0074] By means of the improved concept, a common synchronization basis is provided for different hardware located separated by an isolation barrier from the circuit according to the improved concept itself.

[0075] The improved concept can be further enhanced by determining the same operating parameter twice or more frequently during a given sampling interval and calculating a corresponding average or other aggregate value for use in the power loss calculation. This can improve accuracy in the case of high frequency switching applications.

[0076] Implementations according to the improved concepts may involve junction temperature estimation of power semiconductor devices, which may enable several features in next generation "smart" power converters, including: dynamic rating control (intelligent over-rating / derating), optimized parallel inverter stack current sharing, condition monitoring (detection of wear and abnormal operation, enabling predictive maintenance), temperature cycle counting and remaining useful life estimation, improved effectiveness of inverter stack design during development and type testing, and improved over-temperature detection.

[0077] Reference numerals

[0078] PC Power Converters

[0079] DCU Drive and Control Unit

[0080] PS1, ..., PS6 Power semiconductor devices

[0081] C Circuit

[0082] EU Evaluation Unit

[0083] CG Sampling Clock Generator

[0084] MU Measurement Unit

[0085] S1, S2, S3, S4, S5, S6, S7 Sampling interval

[0086] SC Sampling clock signal

[0087] SS Switching Signal

[0088] T s Sampling interval duration

[0089] t on On-state duration

[0090] Ion On-state current

[0091] V on On-state voltage

[0092] V off Off state voltage

[0093] N on Number of connected events

[0094] N off Number of shutdown events

[0095] E c Conducting Energy

[0096] E sw Switching Energy

Claims

1. A method for analyzing an operating condition of a power converter (PC), wherein the method comprises -providing a sampling clock signal (SS), the clock signal (SS) being asynchronous with respect to the operation of the power converter (PC); - repeatedly determining at least one operating parameter of a power semiconductor device (PS1) of a power converter (PC); - wherein the repetition is synchronized with a sampling clock signal (SS); and - for a given repetition, depending on the switching behavior of the power converter (PC) within the given repetition, determining at least one operating parameter comprises measuring at least one operating parameter, or identifying a value of at least one operating parameter from a previous repetition; and - determining an operating condition of a power converter (PC) depending on at least one determined operating parameter; Determining the operating status includes - determining at least one value of a power loss of the power semiconductor device (PS1) depending on at least one determined operating parameter; - determining an operating condition based on at least one value of power loss; and wherein, The at least one operating parameter comprises at least one of the following: - the total number of switch-on events within the corresponding sampling interval (S1, ..., S7); - the total number of switch-off events within the corresponding sampling interval (S1, ..., S7); - The total on-state duration within the corresponding sampling interval (S1, ..., S7).

2. The method according to claim 1, wherein: The at least one value of the power loss includes conduction power loss and / or switching power loss.

3. The method according to claim 2, wherein: At least one value of the power loss is determined during or at the end of each of a plurality of consecutive sampling intervals (S1, ..., S7) defined by the frequency of the sampling clock signal (SS).

4. The method according to claim 1, wherein: The at least one operating parameter comprises at least one of the following: - The conduction state of the power semiconductor device (PS1); - Off state of the power semiconductor device (PS1).

5. The method according to claim 4, wherein the on-state condition of the power semiconductor device (PS1) is an on-state voltage or an on-state current of the power semiconductor device (PS1); and The off-state condition of the power semiconductor device (PS1) is an off-state voltage of the power semiconductor device (PS1).

6. The method according to claim 1, wherein: The sampling clock signal (SS) being asynchronous with respect to the operation of the converter includes the sampling clock signal (SS) being asynchronous with respect to a base clock signal of the power converter (PC).

7. The method according to claim 1, wherein: The power converter (PC) is configured to utilize a switching scheme for power conversion, and wherein the sampling clock signal (SS) is asynchronous with respect to operation of the power converter (PC) comprises the sampling clock signal (SS) being asynchronous with respect to a characteristic signal of the switching scheme. 8 . The method of claim 7 , wherein the sampling clock signal (SS) being asynchronous to the operation of the power converter (PC) comprises the sampling clock signal (SS) being asynchronous to a carrier signal of the switching scheme.

9. The method according to claim 1, wherein: The operating conditions include a junction temperature of the power semiconductor device (PS1).

10. The method of claim 9, wherein determining the junction temperature of the power semiconductor device (PS1) comprises feeding data dependent on at least one determined operating parameter to a thermal model of the power converter (PC) and simulating the junction temperature according to the thermal model.

11. The method according to claim 10, wherein: The data fed to the thermal model includes the self-heating power losses of the power semiconductor device (PS1).

12. The method according to claim 10 or 11, wherein: The data fed to the thermal model includes the cross-coupling power losses due to another device in the power converter (PC).

13. The method according to one of claims 1 to 3, wherein: The period of the sampling clock signal lies between 0.2 ms and 2 ms. The method of claim 13 , wherein the period of the sampling clock signal is between 0.8 ms and 1.2 ms. The method of claim 13 , wherein a period of the sampling clock signal is 1.0 ms.

16. A circuit for analyzing an operating condition of a power converter (PC), the circuit comprising: - a clock generator (SC) configured to provide a sampling clock signal (SS), the sampling clock signal (SS) being asynchronous to the operation of the power converter (PC); - a measuring unit (MU) configured to repeatedly determine at least one operating parameter of a power semiconductor device (PS1) of a power converter (PC), wherein -Repetitive synchronization with the sampling clock signal (SS); and - for a given repetition, depending on the switching behavior of the power converter (PC) within the given repetition, determining at least one operating parameter comprises measuring at least one operating parameter, or identifying a value of at least one operating parameter from a previous repetition; and - an evaluation unit (EU) configured to determine an operating condition of the power converter (PC) based on at least one determined operating parameter, wherein Determine the operating status including - determining at least one value of a power loss of the power semiconductor device (PS1) depending on at least one determined operating parameter; - determining an operating condition based on at least one value of power loss; and wherein, The at least one operating parameter comprises at least one of the following: - the total number of switch-on events within the corresponding sampling interval (S1, ..., S7); - the total number of switch-off events within the corresponding sampling interval (S1, ..., S7); - The total on-state duration within the corresponding sampling interval (S1, ..., S7).

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