Preform Diffusion Bonding
By using thin solder preforms and diffusion welding processes, high-metal phase welding joints with high melting points are formed without directly applying pressure, which solves the problems of high force and equipment requirements and low processing volume in the existing diffusion welding processes, and improves the attachment efficiency.
Patent Information
- Application Number
- CN202011229130.4
- Authority / Receiving Office
- CN · China
- Patent Type
- Patents(China)
- Current Assignee / Owner
- Priority Date
- 2019-11-11
- Filing Date
- 2020-11-06
- Publication Date
- 2025-03-11
- Estimated Expiration
- 2040-11-06
AI Technical Summary
The existing diffusion welding process requires greater force and specialized equipment during the die attachment process, and the welding temperature is high, which limits the processing volume and efficiency.
Thin solder preforms are used, with a maximum thickness of no more than 30 μm and a melting point lower than the metal area of the die and substrate. A welding joint is formed without direct pressure applied by diffusion welding process, and wettability is improved by formic acid to achieve a complete reaction.
It is realized that high melting point intermetallic welded joints are formed efficiently without direct pressure application, which improves the processing volume and efficiency of die attachment and reduces the requirements for equipment and processes.
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Figure CN112786468B_ABST
Abstract
Description
Background Art
[0001] Thermal and electrical properties play an increasingly larger role in the development of semiconductor technology. These factors, combined with miniaturization and increased performance, require high-performance die (chip) attach processes and materials. Diffusion bonding is one such die attach process.
[0002] Diffusion soldering involves sputtering a thin layer of solder material onto the back side of a semiconductor wafer. The deposition of solder material represents a large portion of the overall wafer cost. In addition, greater forces are used during the die attach process to achieve a form-fitting interconnection because the sputtered solder layer is thin and the lead frame to which the device is attached has a defined curvature.
[0003] The above-mentioned diffusion soldering process also requires specialized equipment, including a bonding force unit for applying large forces to the device to achieve form-fitting interconnections. In addition, mechanical pressure is applied to each die individually and must be maintained until most of the solder is isothermally solidified, which limits the throughput of the die attach process. In addition, the soldering temperature must be high to enable complete reaction and isothermal solidification in a short time.
[0004] Therefore, there is a need for an improved diffusion welding process. Summary of the invention
[0005] According to an embodiment of a method for bonding a semiconductor die to a substrate, the method includes: applying a solder preform to a metal region of the semiconductor die or a metal region of the substrate, the solder preform having a maximum thickness of 30 μm (e.g., a maximum thickness of 15 μm, such as a maximum thickness of 10 μm, or even 7 μm) and a melting point lower than both the metal region of the semiconductor die and the metal region of the substrate; forming a solder joint between the metal region of the semiconductor die and the metal region of the substrate via a diffusion soldering process and without directly applying pressure to the semiconductor die; and setting a soldering temperature of the diffusion soldering process so that the solder preform melts and completely reacts with the metal region of the semiconductor die and the metal region of the substrate to form one or more intermetallic phases in the entire solder joint, each of the one or more intermetallic phases having a melting point higher than the melting point of the solder preform and the soldering temperature.
[0006] The metal region of the semiconductor die and the metal region of the substrate may include the same metal or metal alloy, and a single intermetallic phase may be formed throughout the solder joint by a diffusion soldering process.
[0007] The solder preform may include Sn, Zn, In, Ga, Bi, Cd, or any alloys thereof, alone or in combination.
[0008] The solder preform may include Sn / Ag / Cu, Sn / Ag, Sn / Ag / Sb, Sn / Sb, Sn / Cu, or Au80 / Sn20, alone or in combination.
[0009] Either alone or in combination, the substrate may be a lead frame or a metal clip, and the metal region of the substrate may be a die attach region of the lead frame or the metal clip.
[0010] Either alone or in combination, the substrate may include a ceramic, and the metal region of the substrate may be a metal layer attached to the ceramic. The metal layer may include and / or be plated with Cu, Ni, Ag, Au, Pd, Pt, NiV, NiP, NiNiP, NiP / Pd, Ni / Au, NiP / Pd / Au, or NiP / Pd / AuAg.
[0011] The metal region of the semiconductor die can be a metal layer applied to the back side or the front side of the semiconductor die, either alone or in combination. The metal layer can include and / or be plated with Cu, Ni, Ag, Au, Pd, Pt, NiV, NiP, NiNiP, NiP / Pd, Ni / Au, NiP / Pd / Au, NiP / Pd / AuAg, NiV / Ag, NiV / Au, or NiSi / Ag.
[0012] Either alone or in combination, applying a solder preform to a metal region of a semiconductor die or a metal region of a substrate may include: applying a first liquid to the substrate; placing a solder preform on the substrate, wherein the first liquid maintains a position of the solder preform relative to the substrate by surface tension; applying a second liquid to the solder preform; and placing a semiconductor die on the solder preform, wherein the second liquid maintains a position of the semiconductor die relative to the solder preform by surface tension.
[0013] Either alone or in combination, the diffusion soldering process may include placing a semiconductor die arranged on a solder preform and a substrate in a vacuum furnace; introducing formic acid into the vacuum furnace; and raising the temperature of the vacuum furnace to a soldering temperature for a duration, during which the solder preform melts and completely reacts with the metal regions of the semiconductor die and the metal regions of the substrate to form one or more intermetallic phases throughout the solder joint without directly applying pressure to the semiconductor die.
[0014] Either alone or in combination, multiple semiconductor dies may be attached to respective substrates in parallel during the diffusion soldering process.
[0015] Either alone or in combination, prior to the diffusion soldering process, the solder preform may have a smaller width and / or a smaller length than the metal area of the semiconductor die, and during the diffusion soldering process, the solder preform may melt and spread over the entire metal area of the semiconductor die such that the resulting solder joint is thinner than the initial maximum thickness of the solder preform.
[0016] Alone or in combination, the method may further include introducing formic acid into the vacuum furnace containing the semiconductor die, solder preform, and substrate as part of the diffusion soldering process to improve wettability of the metal regions of the semiconductor die and the metal regions of the substrate.
[0017] Either alone or in combination, applying a solder preform to a metal region of a semiconductor die or a metal region of a substrate may include: applying the solder preform to a front side or a back side of a semiconductor wafer including a semiconductor die and a plurality of additional semiconductor dies; and singulating the semiconductor die and the plurality of additional semiconductor dies after applying the solder preform to the front side or the back side of the semiconductor wafer.
[0018] Applying the solder preform to the metal region of the semiconductor die or the metal region of the substrate may include, alone or in combination: heating the semiconductor die; applying the solder preform to the front side or back side of the semiconductor die; and stamping the solder preform with the semiconductor die.
[0019] According to an embodiment of a semiconductor device, the semiconductor device includes: a semiconductor die having a metal region; a substrate having a metal region; and a solder joint between the metal region of the semiconductor die and the metal region of the substrate. One or more intermetallic phases are present throughout the solder joint, each of the one or more intermetallic phases being formed by a solder preform diffused into the metal region of the semiconductor die and the metal region of the substrate. The solder joint has the same aspect ratio as the semiconductor die. The metal region of the semiconductor die and the metal region of the substrate may include the same metal or metal alloy, and a single intermetallic phase may be present throughout the solder joint.
[0020] Those skilled in the art will recognize additional features and advantages upon reading the following detailed description, and upon viewing the accompanying drawings. BRIEF DESCRIPTION OF THE DRAWINGS
[0021] The elements of the drawings are not necessarily to scale relative to each other. Similar reference numerals indicate corresponding similar parts. Unless mutually exclusive, the features of the various illustrated embodiments can be combined. The embodiments are illustrated in the drawings and described in detail in the following detailed description.
[0022] Figure 1A block diagram of an embodiment of a method of bonding a semiconductor die to a substrate using a thin solder preform is shown.
[0023] Figures 2A to 2D Shows Figure 1 1 and 2 are corresponding cross-sectional views of an embodiment of blocks 110 to 130 of the method shown in FIG.
[0024] Figure 3 Shows Figure 1 FIG. 5 is a cross-sectional view of another embodiment of block 130 of the method shown in FIG.
[0025] Figure 4A and Figure 4B Shows Figure 1 1 and 12. FIG. 1 is a corresponding cross-sectional view of another embodiment of blocks 110 to 130 of the method shown in FIG. DETAILED DESCRIPTION
[0026] Embodiments described herein provide a bonding technique that involves applying a thin solder preform to a metal region of a semiconductor die or a metal region of a substrate, and forming a solder joint between the metal region of the semiconductor die and the metal region of the substrate via a diffusion soldering process and without applying (mechanical) pressure directly to the semiconductor die. The solder preform is thin enough, for example, up to 30 μm thick, so that the soldering temperature of the diffusion soldering process can be set so that the solder preform melts and reacts completely with the metal region of the semiconductor die and the metal region of the substrate to form one or more intermetallic phases throughout the solder joint. Since no (mechanical) pressure is applied directly to the semiconductor die during the diffusion soldering process, multiple semiconductor dies can be processed simultaneously via batch processing.
[0027] Figure 1 An embodiment of a bonding technique for a semiconductor die is shown. According to this embodiment, standard front end (FE) processing (block 100) may be performed, such as etching, grinding, polishing, structuring, and / or metal deposition for source, gate, and drain contacts, and a thin solder preform may be cut and placed on a metal region of a semiconductor die or a metal region of a substrate (block 110). As part of the bonding technique, the thin solder preform may be stamped or cut from a roll of preformed solder material, or the thin solder preform may be a pre-cut preform, a pre-stamped preform, etc.
[0028] The thin solder preform may be applied during die assembly, or the thin solder preform may be pre-applied to a substrate or semiconductor wafer. In one embodiment, the thin solder preform is applied to the front or back side of a semiconductor wafer including a semiconductor die and a plurality of additional semiconductor dies. After the thin solder preform is applied to the semiconductor wafer, the semiconductor die is singulated, for example, by sawing, laser cutting, etching, etc. The thin solder preform may also be applied after the die singulation process. For example, the semiconductor die may be heated and the thin solder preform may be applied to the front or back side of the heated semiconductor die. The thin solder preform may be stamped with the semiconductor die. In the case where the thin solder preform is pre-applied to the substrate, the thin solder preform may be applied by roller coating, pre-melting, printing, recasting, etc. Typically, the bonding technique may be implemented without flux because the die attachment process may be performed in a vacuum environment with formic acid. This is also valid for printed thin solder preforms, where the solder paste can be free of flux since the surface can be cleaned with formic acid during the joining technique.
[0029] For batch processing of bonding more than one semiconductor die at the same time, multiple preforms are placed on the same or different die / substrates. In this way, all semiconductor dies to be bonded simultaneously can be bonded to the same substrate, to a single substrate, or to separate substrates in corresponding groups.
[0030] For serial or batch processing, the thin solder preforms may be cut by punching, laser cutting, etching, etc. In the case of batch processing, the thin solder preforms processed simultaneously may have the same or different thicknesses depending on the type of semiconductor die and substrate to be bonded.
[0031] For those semiconductor dies that are attached to the substrate using thin solder preforms via diffusion soldering, each thin solder preform is formed of a thin and very uniform solder, for example, a thin metal film or foil, and each thin solder preform has a maximum thickness of 30 μm (micrometers), for example, a maximum thickness of 15 μm, for example, a maximum thickness of 10 μm, or even as thin as 7 μm. In the case of batch processing, some semiconductor dies may be attached to the substrate using thicker solder preforms having a maximum thickness greater than 30 μm or using solder paste.
[0032] Generally, the term "thin solder preform" as used herein means a solder preform having a maximum thickness of 30 μm and a melting point lower than both the metal region of the semiconductor die and the metal region of the substrate to be joined by the thin solder preform. Such a thin solder preform reacts completely with the back side metal of the die and the substrate material during the diffusion soldering process, and the resulting solder joint (bond wire) formed between the semiconductor die and the substrate has a high melting point phase throughout the solder joint. At thicknesses above 30 μm and for soft solder paste, a high melting point phase cannot be produced throughout the solder joint within a reasonable amount of time, and therefore the middle portion of the resulting solder joint will not be converted into an intermetallic compound, but will remain at the original melting temperature. The term "high melting point phase" as used herein means an intermetallic phase having a melting point higher than the melting point of the solder preform and higher than the soldering temperature of the diffusion soldering process.
[0033] Figure 1 The bonding technique shown in also includes picking up and placing each semiconductor die to be processed on a corresponding substrate (block 120). As described above, in the case of batch processing, all semiconductor dies to be bonded simultaneously may be placed on the same substrate, on a single substrate, or on corresponding groups of separate substrates.
[0034] Figure 1 The bonding technique shown in also includes forming a solder joint between the metal region of each semiconductor die and the corresponding metal region of the substrate that are soldered simultaneously (block 130). For each semiconductor die to be bonded to the substrate by a thin solder preform, a corresponding solder joint is formed by diffusion soldering without applying (mechanical) pressure directly to the semiconductor die. By using a thin solder preform of up to 30 μm thick, the soldering temperature of the diffusion soldering process can be set so that the solder preform melts and reacts completely with the metal region of the semiconductor die and the metal region of the substrate to form one or more intermetallic phases throughout the solder joint. The melting point of each intermetallic phase is higher than the melting point of the solder preform and the soldering temperature.
[0035] As part of the diffusion soldering process, by not applying direct pressure to the semiconductor die, multiple dies can be soldered simultaneously without having to worry about the different thicknesses of the die, substrate, and / or die attach material. In this way, some semiconductor dies can be soldered using a thin solder preform, other semiconductor dies can be soldered using a thicker solder preform, and still other semiconductor dies can be soldered using solder paste. For each semiconductor die soldered using a thin solder preform, if the metal region of the semiconductor die and the metal region of the substrate include the same metal or metal alloy, a single intermetallic phase is formed throughout the solder joint by the diffusion soldering process.
[0036] Figure 1The bonding technique shown in can also include a standard front side (FS) contact formation process (block 140) and a standard back end (BE) process (block 150), wherein the standard front side contact formation process can include forming a conductive structure and a solderable front side metallization for source and gate contacts, and the standard back end process can include depositing a metal layer stack layer for electrically connecting the drain contact. The front side contact formation process and the standard back end process can be performed using the same or different equipment, lines and / or locations as the diffusion soldering process represented by blocks 110 to 130.
[0037] Figures 2A to 2D Shows Figure 1 110 to 130 of the method shown in FIG. Figures 2A to 2D A single semiconductor die 200 is shown bonded to a single substrate 202 by diffusion soldering using a thin solder preform 204, but as explained previously herein, more than one semiconductor die may be soldered simultaneously to the same substrate, to a single substrate, or to separate substrates in corresponding groups.
[0038] Figure 2A The first liquid 206 is shown applied to the substrate 202. In one embodiment, the first liquid 206 is a volatile non-reactive liquid that holds the thin solder preform 204 in place on the substrate 202 by surface tension. Any type of substrate to which a semiconductor die is typically bonded can be used. For example, in one embodiment, the substrate 202 is a lead frame or metal fixture having a metal region 208 to which the semiconductor die 200 is to be bonded. For example, the lead frame or metal fixture may include Cu, Ni, and / or Ag. In another embodiment, the substrate 202 includes a ceramic and a metal layer attached to the ceramic to which the semiconductor die 200 is to be bonded. In one embodiment, the metal layer includes and / or is plated with Cu, Ni, Ag, Au, Pd, Pt, NiV, NiP, NiNiP, NiP / Pd, Ni / Au, NiP / Pd / Au, or NiP / Pd / AuAg. Other types of metals / metal alloys and substrates may also be used.
[0039] Figure 2B A thin solder preform 204 is shown during placement on a substrate 202 with a first liquid 206. The first liquid 206 maintains the position of the thin solder preform 204 relative to the substrate 202 by surface tension.
[0040] In one embodiment, the thin solder preform 204 includes Sn, Zn, In, Ga, Bi, Cd, or any alloys thereof. For example, the thin solder preform 204 may include Sn / Ag / Cu, Sn / Ag, Sn / Ag / Sb, Sn / Sb, Sn / Cu, or Au80 / Sn20. Other types of thin solder preforms may also be used. Alternatively, the thin solder preform 204 may be applied to the semiconductor die 200 instead of the substrate 202. In this case, Figure 2B The substrate 202 in turn will be the semiconductor die 200 or a semiconductor wafer from which the die 200 is produced. For example, the thin solder preform 204 may be applied to the front side or back side of a semiconductor wafer including the semiconductor die 200 and a plurality of additional semiconductor dies, or the thin solder preform 204 may be applied to the front side or back side of the semiconductor die 200 after a die singulation process, both as previously described.
[0041] Figure 2C A second liquid 210 is shown being applied to the thin solder preform 204. In one embodiment, the second liquid 210 is a volatile, non-reactive liquid that holds the semiconductor die 200 in place on the thin solder preform 204 by surface tension. The first liquid 206 and the second liquid 210 may be the same or different types of liquids.
[0042] Figure 2D The semiconductor die 200 is shown during placement on the thin solder preform 204 with the second liquid 210. The second liquid 210 maintains the position of the semiconductor die 200 relative to the thin solder preform 204 by surface tension. The thin solder preform 204 may be handled using a clamping mechanism (not shown) to transport the assembly to a diffusion soldering furnace.
[0043] A solder joint is then formed between a metal region 212 of the semiconductor die 200 facing the substrate 202 and a metal region 208 of the substrate 202 via a diffusion soldering process and without applying (mechanical) pressure directly to the semiconductor die 200. The metal region 212 of the semiconductor die 200 may be a metal layer applied to the back side or the front side of the semiconductor die 200. In one embodiment, the metal region 212 of the semiconductor die 200 includes and / or is plated with Cu, Ni, Ag, Au, Pd, Pt, NiV, NiP, NiNiP, NiP / Pd, Ni / Au, NiP / Pd / Au, NiP / Pd / AuAg, NiV / Ag, NiV / Au, or NiSi / Ag. Metal region 212 can be a terminal of semiconductor die 200, for example, a load or control terminal in the case of a power transistor die, a control or I / O (input / output) terminal in the case of a logic die (for example, a gate driver, a microcontroller, a memory, etc.), and metal region 212 can be a terminal of a passive die (for example, an inductor or capacitor die, etc.).
[0044] The metal region 212 of the semiconductor die 200 and the metal region 208 of the substrate 202 to be joined together by a diffusion soldering process and a thin solder preform 204 may include the same or different metals / metal alloys. If the metal region 212 of the semiconductor die 200 and the metal region 208 of the substrate 202 include the same metal or metal alloy, then as described above, a single intermetallic phase is formed in the entire solder joint formed between the die 200 and the substrate 202. For example, if the metal region 212 of the semiconductor die 200 and the metal region 208 of the substrate 202 to be joined both include Cu or the same Cu-rich alloy, then during the diffusion soldering process, Cu will be dissolved through the liquefied preform material until a specific concentration is reached, at which point the joint solidifies. The resulting Cu-based intermetallic phase will not melt again at the soldering temperature of the diffusion soldering process. The same situation applies to other types of common die and substrate metallizations, such as Ni-rich and Ag-rich alloys.
[0045] If the metal region 212 of the semiconductor die 200 and the metal region 208 of the substrate 202 include different metals / metal alloys, multiple intermetallic phases are formed throughout the solder joint. In either case, the thin solder preform 204 completely reacts with the metal region 212 and the metal region 208 during the diffusion soldering process so that the solder joint formed between the die 200 and the substrate 202 has a high melting point phase throughout the solder joint.
[0046] Figure 3 Shown by Figure 1 Boxes 110 to 130 in FIG. 1 represent an embodiment of a diffusion welding process. Figure 3Multiple semiconductor dies 200 are shown bonded to a single substrate 202 by diffusion soldering using thin solder preforms 204. As previously described, batch or serial processing may be employed, and more than one semiconductor die may be soldered simultaneously to the same substrate, bonded to a single substrate, or bonded to separate substrates in corresponding groups.
[0047] Figure 3 The diffusion soldering process shown in includes placing at least one semiconductor die 200 arranged on a thin solder preform 204 and a corresponding substrate 202 in a vacuum furnace 300. Formic acid 302 is then introduced into the vacuum furnace 300. Formic acid 302 removes oxidation from the substrate 202, the metal region 212 and the thin solder preform 204, thereby improving the wettability of the metal region 212 and the metal region 208 and completely filling the space between the die 200 and the substrate 202. For example, under vacuum conditions, the temperature of the vacuum furnace is raised to the soldering temperature for a duration, during which each thin solder preform 204 melts and reacts completely with the metal region 212 and the metal region 208 to form one or more intermetallic phases throughout the solder joint. The diffusion soldering process is performed without applying (mechanical) pressure directly to the semiconductor die 200. In this way, standard diffusion soldering equipment can be used without redesign.
[0048] By using a thin solder preform 204 from Figure 3 Each semiconductor device produced by the diffusion soldering process shown in has: at least one semiconductor die 200 having a metal region 212, at least one substrate 202 having a metal region 208, and a solder joint between the metal region 212 and the metal region 208. There are one or more intermetallic phases throughout the solder joint, each of which is formed by a thin solder preform 204 diffused into the metal region 212 and the metal region 208.
[0049] During the diffusion soldering process, solder material will not be squeezed out from under the die 200 because no (mechanical) pressure is applied directly to the semiconductor die 200. If pressure is applied to the semiconductor die 200 as is typically done during diffusion soldering, bubbles of liquid solder material will be squeezed out from under the semiconductor die 200 due to the squeezing, thereby creating a shell-like structure along the periphery of the die 200. With the diffusion soldering process described herein, there may be some capillary effects along the edges of the semiconductor die 200, but the capillary effects will be uniformly defined and the same around the entire periphery of the die 200. This means that the solder joint does not exceed the lateral (length and width) dimensions of the semiconductor die 200 and has the same aspect ratio as the semiconductor die 200. Moreover, as previously described herein, the metal region 212 and the metal region 208 may include the same metal or metal alloy, so that a single intermetallic phase is present throughout the solder joint.
[0050] Figure 4A and Figure 4B Shows Figure 1 . According to this embodiment, before the diffusion soldering process, the thin solder preform 204 has a smaller width and / or a smaller length (W / L) than the metal region 212 of the semiconductor die 200, such as Figure 4A During the diffusion soldering process, the thin solder preform 204 melts and spreads over the entire metal region 212 of the semiconductor die 200, so that the thickness (T2) of the resulting solder joint 400 is less than the initial maximum thickness (T1) of the thin solder preform 204, as shown in FIG. Figure 4B In this way, a solder joint 400 that is thinner than the thinnest available thin solder preform 204 can be achieved.
[0051] Providing the thin solder preform 204 as a die attach material independently of the metal region 212 yields several advantages. The thin solder preform 204 may be selected to be smaller than the lateral dimensions of the semiconductor die 200 (e.g., Figure 4A and Figure 4B 200 to achieve narrow design rules / low clearances. In addition, using formic acid 302 as part of the diffusion soldering process provides excellent wetting of the thin solder preform 204 on the substrate 202, thereby completely filling the space between the semiconductor die 200 and the substrate 202. Also in this way, the type of solder preform / material can be easily changed without modifying the bonding / diffusion soldering process.
[0052] Terms such as "first", "second", etc. are used to describe various elements, regions, sections, etc. They are not intended to be limiting. Similar terms refer to similar elements throughout the specification.
[0053] As used herein, the terms "having", "including", "comprising", etc. are open terms, indicating the presence of stated elements or features, but not excluding additional elements or features. The articles "a", "an", and "the" are intended to include the plural as well as the singular, unless the context clearly indicates otherwise.
[0054] It is to be understood that the features of the various embodiments described herein may be combined with each other, unless specifically stated otherwise.
[0055] Although specific embodiments have been shown and described herein, those of ordinary skill in the art will recognize that a variety of alternative and / or equivalent embodiments may replace the specific embodiments shown and described without departing from the scope of the present invention. This application is intended to cover any modifications or variations of the specific embodiments described herein. Therefore, it is intended that the present invention be limited only by the claims and their equivalents.
Claims
1. A method of bonding a semiconductor die to a substrate, the method comprising: applying a solder preform to a metal region of the semiconductor die or a metal region of the substrate, the solder preform having a maximum thickness of 30 μm and a lower melting point than the metal region of the semiconductor die and the metal region of the substrate; forming a solder joint between the metal region of the semiconductor die and the metal region of the substrate via a diffusion soldering process and without applying pressure directly to the semiconductor die; as well as The soldering temperature of the diffusion soldering process is set so that the solder preform melts and completely reacts with the metal region of the semiconductor die and the metal region of the substrate to form one or more intermetallic phases throughout the solder joint, each of the one or more intermetallic phases having a melting point higher than the melting point of the solder preform and the soldering temperature.
2. The method according to claim 1, wherein: The solder preform had a maximum thickness of 15 μm.
3. The method according to claim 1, wherein: The solder preform had a maximum thickness of 7 μm.
4. The method according to claim 1, wherein: The metal region of the semiconductor die and the metal region of the substrate include a same metal or metal alloy, and wherein a single intermetallic phase is formed throughout the solder joint by the diffusion soldering process.
5. The method according to claim 1, wherein: The solder preform includes Sn, Zn, In, Ga, Bi, Cd or any alloys thereof.
6. The method according to claim 1, wherein: The solder preform includes Sn / Ag / Cu, Sn / Ag, Sn / Ag / Sb, Sn / Sb, Sn / Cu or Au80 / Sn20.
7. The method according to claim 1, wherein: The substrate is a lead frame or a metal clip, and wherein the metal region of the substrate is a die attach region of the lead frame or the metal clip.
8. The method according to claim 1, wherein: The substrate comprises a ceramic, and wherein the metal region of the substrate is a metal layer attached to the ceramic.
9. The method according to claim 8, wherein: The metal layer includes and / or is plated with Cu, Ni, Ag, Au, Pd, Pt, NiV, NiP, NiNiP, NiP / Pd, Ni / Au, NiP / Pd / Au or NiP / Pd / AuAg.
10. The method according to claim 1, wherein: The metal region of the semiconductor die is a metal layer applied to the back side or the front side of the semiconductor die.
11. The method according to claim 10, wherein: The metal layer includes and / or is plated with Cu, Ni, Ag, Au, Pd, Pt, NiV, NiP, NiNiP, NiP / Pd, Ni / Au, NiP / Pd / Au, NiP / Pd / AuAg, NiV / Ag, NiV / Au or NiSi / Ag.
12. The method according to claim 1, wherein: Applying the solder preform to the metal region of the semiconductor die or the metal region of the substrate comprises: applying a first liquid to the substrate; placing the solder preform on the substrate, wherein the first liquid maintains the position of the solder preform relative to the substrate by surface tension; applying a second liquid to the solder preform; and The semiconductor die is placed on the solder preform, wherein the second liquid maintains a position of the semiconductor die relative to the solder preform by surface tension.
13. The method according to claim 12, wherein: The diffusion welding process comprises: placing the semiconductor die disposed on the solder preform and the substrate in a vacuum furnace; introducing formic acid into the vacuum furnace; and The temperature of the vacuum furnace is raised to the soldering temperature for a duration during which the solder preform melts and fully reacts with the metal region of the semiconductor die and the metal region of the substrate to form the one or more intermetallic phases throughout the solder joint without directly applying pressure to the semiconductor die.
14. The method according to claim 1, wherein: During the diffusion soldering process, multiple semiconductor dies are attached to respective substrates in parallel.
15. The method according to claim 1, wherein: Prior to the diffusion soldering process, the solder preform has a smaller width and / or a smaller length than the metal region of the semiconductor die, and wherein, during the diffusion soldering process, the solder preform melts and spreads over the entire metal region of the semiconductor die such that the resulting solder joint is thinner than an initial maximum thickness of the solder preform.
16. The method according to claim 15, further comprising: As part of the diffusion soldering process, formic acid is introduced into a vacuum furnace containing the semiconductor die, the solder preform, and the substrate to enhance wettability of the metal regions of the semiconductor die and the metal regions of the substrate.
17. The method according to claim 1, wherein: Applying the solder preform to the metal region of the semiconductor die or the metal region of the substrate comprises: applying the solder preform to a front side or a back side of a semiconductor wafer including the semiconductor die and a plurality of additional semiconductor dies; and The semiconductor die and the plurality of additional semiconductor dies are singulated after applying the solder preform to the front side or the back side of the semiconductor wafer.
18. The method according to claim 1, wherein: Applying the solder preform to the metal region of the semiconductor die or the metal region of the substrate comprises: heating the semiconductor die; applying the solder preform to the front side or the back side of the semiconductor die; and The solder preform is punched with the semiconductor die.
19. A semiconductor device comprising: a semiconductor die having a metal region; a substrate having a metal region; as well as a solder joint between the metal region of the semiconductor die and the metal region of the substrate, wherein one or more intermetallic phases are present throughout the solder joint, each of the one or more intermetallic phases being formed by a solder preform diffused into the metal region of the semiconductor die and the metal region of the substrate, Wherein, the solder joint has the same aspect ratio as the semiconductor die.
20. The semiconductor device according to claim 19, wherein The metal region of the semiconductor die and the metal region of the substrate include the same metal or metal alloy, and wherein a single intermetallic phase is present throughout the solder joint.
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