Package instrumented substrate equipment for acquiring measurement parameters in high temperature process applications

Abstract

The present application embodiment is related to a packaged instrumented substrate device for obtaining measurement parameters in high temperature process applications. An apparatus includes: an instrumented substrate device; a substrate assembly, which includes a bottom substrate and a top substrate that are mechanically coupled; an electronic assembly; a nested enclosure assembly, which includes an outer enclosure and an inner enclosure, wherein the outer enclosure encloses the inner enclosure and the inner enclosure encloses the electronic assembly; an insulating medium, which is located between the inner enclosure and the outer enclosure; and a sensor assembly, which is communicatively coupled to the electronic assembly, the sensor assembly including one or more sensors disposed at one or more locations within the substrate assembly, wherein the electronic assembly is configured to receive one or more measurement parameters from the one or more sensors.

Description

[0001] Divisional Application Information

[0002] This application is a divisional application of the invention patent application with application date of June 14, 2017, application number 201780034833.1, and invention name “Packaged instrumented substrate device for obtaining measurement parameters in high temperature process applications”.

[0003] CROSS REFERENCE TO RELATED APPLICATIONS

[0004] This application claims priority under 35 U.S.C. §119(e) to U.S. Provisional Patent Application No. 62 / 350,688, filed on June 15, 2016, naming Mei Sun, Earl Jensen, Jing Zhou and Ran Liu as inventors and entitled WIRELESS SENSOR WAFER FOR HIGH TEMPERATURE EPIPROCESSES, the entire text of which is incorporated herein by reference. Technical Field

[0005] The present invention relates generally to monitoring wafers along a semiconductor process line, and in particular to a multi-stage containment assembly that allows operation at high temperatures. Background Art

[0006] As tolerances for process conditions in semiconductor device processing environments continue to narrow, the need for improved process monitoring systems continues to increase. Thermal uniformity within a processing system (e.g., an epitaxial chamber) is one such condition. Current methods are unable to monitor temperature under the extreme conditions (e.g., high temperatures) required by current processing techniques without contaminating the associated chamber. Therefore, it would be desirable to provide a system and method that allows high temperature measurements to be made using instrumented wafers to monitor conditions of semiconductor device processing lines. Summary of the invention

[0007] An apparatus for acquiring measurement parameters in high temperature process applications according to one or more embodiments of the present invention is disclosed. In one embodiment, the apparatus includes a substrate assembly, the substrate assembly including a bottom substrate and a top substrate. In another embodiment, the top substrate is mechanically coupled to the bottom substrate. In another embodiment, the apparatus includes an electronic assembly. In another embodiment, the apparatus includes a nested enclosure assembly, the nested enclosure assembly including an outer enclosure and an inner enclosure. In another embodiment, the outer enclosure encloses the inner enclosure. In another embodiment, the inner enclosure encloses at least the electronic assembly. In another embodiment, an insulating medium is disposed in a cavity between an outer surface of the inner enclosure and an inner surface of the outer enclosure. In another embodiment, the apparatus includes a sensor assembly, the sensor assembly being communicatively coupled to the electronic assembly. In another embodiment, the sensor assembly includes one or more sensors. In another embodiment, the one or more sensors are disposed within the substrate assembly at one or more locations across the substrate assembly. In another embodiment, the one or more sensors are configured to acquire one or more measurement parameters at the one or more locations across the substrate assembly. In another embodiment, the electronic assembly is configured to receive the one or more measurement parameters from the one or more sensors.

[0008] An apparatus for acquiring measurement parameters in high temperature process applications according to one or more embodiments of the present invention is disclosed. In one embodiment, the apparatus includes a substrate assembly, the substrate assembly including a bottom substrate and a top coating layer. In another embodiment, the apparatus includes an electronic assembly. In another embodiment, the apparatus includes a nested enclosure assembly, the nested enclosure assembly including an outer enclosure and an inner enclosure. In another embodiment, the outer enclosure encloses the inner enclosure, wherein the inner enclosure encloses at least the electronic assembly. In another embodiment, an insulating medium is disposed in a cavity between an outer surface of the inner enclosure and an inner surface of the outer enclosure. In another embodiment, a sensor assembly is communicatively coupled to the electronic assembly, wherein the sensor assembly includes one or more sensors. In another embodiment, the one or more sensors are disposed on the bottom substrate of the substrate assembly at one or more locations across the bottom substrate, wherein the top coating layer at least coats the one or more sensors disposed on the bottom substrate. In another embodiment, the one or more sensors are configured to acquire one or more measurement parameters at the one or more locations across the substrate assembly. In one embodiment, the electronics assembly is configured to receive the one or more measurement parameters from the one or more sensors.

[0009] A method for acquiring measurement parameters in a high temperature process application according to one or more embodiments of the present invention is disclosed. In one embodiment, the method includes acquiring a set of measurement parameters using one or more sensors distributed at one or more locations of a substrate assembly. In another embodiment, the method includes storing the set of measurement parameters in an electronics assembly disposed within a nested enclosure assembly. In another embodiment, the method includes calculating a value for each of the measurement parameters.

[0010] It should be understood that both the foregoing general description and the following detailed description are exemplary and explanatory only and do not necessarily limit the invention as claimed. The accompanying drawings, which are incorporated in and constitute a part of this specification, illustrate embodiments of the invention and together with the general description serve to explain the principles of the invention. BRIEF DESCRIPTION OF THE DRAWINGS

[0011] Those skilled in the art may better understand the numerous advantages of the present invention by referring to the accompanying drawings, in which:

[0012] Figure 1A is a top view of an instrumented substrate apparatus equipped with a nested enclosure assembly according to one or more embodiments of the present invention.

[0013] Figure 1B is a simplified cross-sectional view of a nested containment assembly and instrumented substrate apparatus according to one or more embodiments of the present invention.

[0014] Figure 1C is a simplified cross-sectional view of a nested containment assembly and instrumented substrate apparatus according to one or more embodiments of the present invention.

[0015] Figure 1D is a simplified cross-sectional view of a nested containment assembly and instrumented substrate apparatus according to one or more embodiments of the present invention.

[0016] Figure 1E is a simplified cross-sectional view of a nested containment assembly and instrumented substrate apparatus according to one or more embodiments of the present invention.

[0017] Figure 1F is a simplified cross-sectional view of a nested containment assembly and instrumented substrate apparatus according to one or more embodiments of the present invention.

[0018] Figure 1G is a simplified cross-sectional view of an instrumented substrate apparatus in accordance with one or more embodiments of the present invention.

[0019] Figure 1H is a simplified top view of an instrumented substrate apparatus configured with sensors in accordance with one or more embodiments of the present invention.

[0020] Fig. 1I is a simplified top view of an instrumented substrate apparatus configured with sensors in accordance with one or more embodiments of the present invention.

[0021] Figure 1J is a simplified top view of an instrumented substrate apparatus configured with sensors in accordance with one or more embodiments of the present invention.

[0022] Figure 1K is a top view of an instrumented substrate apparatus positioned to communicate with a remote data system in accordance with one or more embodiments of the present invention.

[0023] Figure 1L is a block diagram illustration of an electronic assembly housed within a nested enclosure assembly in accordance with one or more embodiments of the present invention.

[0024] Figure 2 is a block diagram of a process chamber including an instrumented substrate apparatus in accordance with one or more embodiments of the present invention.

[0025] Figure 3 is a flow chart illustrating a method for calculating the temperature across an instrumented substrate device in accordance with one or more embodiments of the present invention. DETAILED DESCRIPTION

[0026] Reference will now be made in detail to the disclosed subject matter illustrated in the accompanying drawings.

[0027] Generally speaking Figures 1A to 3 , describing a system and method for measuring temperature across an instrumented substrate in accordance with the present invention.

[0028] Embodiments of the present invention relate to an instrumented substrate apparatus capable of operating at high temperatures (e.g., 600° C. to 800° C.). Semiconductor processing chambers (e.g., epitaxial chambers) operating at high temperatures may utilize this instrumented substrate apparatus. In some embodiments, the instrumented substrate apparatus of the present invention includes a nested enclosure assembly containing first and second enclosures (e.g., thermal insulation boards) whereby an on-board electronic assembly (i.e., an electronic package) and / or other sensitive devices are housed within the nested enclosure assembly to maintain the temperature of the electronic assembly at or below approximately 150° C. even when the instrumented substrate apparatus is exposed to temperatures as high as 800° C. The use of instrumented substrates is described in U.S. Patent Application No. 15 / 277,753, filed on September 27, 2016, which is incorporated herein by reference in its entirety.

[0029] Figure 1A to 1B An instrumented substrate apparatus 100 for acquiring temperature across a substrate assembly 102 is illustrated in accordance with one or more embodiments of the present invention. Figure 1AA top view of an instrumented substrate apparatus 100 is shown with a nested enclosure assembly 104. Figure 1B A simplified cross-sectional view of the nested enclosure assembly 104 and the instrumented substrate apparatus 100 is illustrated.

[0030] In one embodiment, the instrumented substrate apparatus 100 includes a substrate assembly 102 , a sensor assembly 105 , and a nested enclosure assembly 104 .

[0031] In one embodiment, substrate assembly 102 includes a top substrate 107 and a bottom substrate 109. For example, Figure 1B , the top substrate 107 may be mechanically coupled to the bottom substrate 109. The top substrate 107 and / or the bottom substrate 109 of the substrate assembly 102 may include any substrate known in the art. In one embodiment, the top substrate 107 and / or the bottom substrate 109 of the substrate assembly 102 include a wafer. For example, the top substrate 107 and / or the bottom substrate 109 of the substrate assembly 102 may include, but are not limited to, a glass wafer (e.g., a fused silica glass wafer, a borosilicate glass wafer, and the like), a crystallized wafer (e.g., a crystallized quartz wafer or a silicon wafer), or a wafer formed of one or more compounds (e.g., silicon carbide, silicon nitride, and the like). For example, the substrate assembly 102 may include any substrate that causes negligible contamination in a semiconductor processing environment, such as, but not limited to, a wafer formed of one or more of silicon, silicon carbide, silicon nitride, or silicon dioxide (e.g., quartz).

[0032] In one embodiment, the lower substrate 109 is mechanically coupled to the upper substrate 107. For example, the lower substrate 109 may be soldered to the upper substrate 107. As another example, the lower substrate 109 may be bonded to the upper substrate 107. In another embodiment, the one or more sensor substrates 135 are disposed between the upper substrate 107 and the lower substrate 109 such that the one or more sensor substrates 135 are sealed (e.g., hermetically sealed) between the top substrate 107 and the bottom substrate 109. The one or more sensor substrates 135 may be formed of any material known in the art. For example, the one or more sensor substrates 135 may be formed of any suitable material, including but not limited to silicon, silicon carbide, silicon nitride, gallium nitride, gallium arsenide, germanium, or a compound of gallium and indium. For example, as Figure 1K107 and 109. The one or more sensor substrates 135 may include, but are not limited to, one or more silicon disks between the upper substrate 107 and the lower substrate 109. It should be noted herein that the one or more sensor substrates 135 may be utilized to assist in heat transfer and help replicate various material properties (e.g., heat transfer, thermal expansion, optical properties, and the like) of the type of substrate / wafer processed by a given process chamber during the process application under study. The cable 126 connection between the one or more sensors 124 and the nested enclosure assembly 104 may be sealed (e.g., hermetically sealed) within the substrate assembly 102. For example, the cable 126 connection between the one or more sensors 124 and the nested enclosure assembly 104 is covered by the upper substrate 107, which is mechanically coupled to the lower substrate 109.

[0033] In one embodiment, the nested enclosure assembly 104 includes an inner enclosure 114 and an outer enclosure 116. Figure 1B . For example, the inner enclosure 114 and the outer enclosure 116 may be composed of an inner insulation board and an outer insulation board, respectively. In another embodiment, the electronic assembly 125 (e.g., processor(s), memory, power supply, communication circuit, etc.) may be disposed within the inner enclosure 114, whereby the inner enclosure 114 is disposed within the outer enclosure 116 to form a nested enclosure structure.

[0034] In one embodiment, the inner enclosure 114 is formed of a material having a high heat capacity (e.g., by volume). For example, the inner enclosure 114 may be formed of one or more metal alloys, such as, but not limited to, an iron-nickel-cobalt alloy, a nickel-iron alloy, or an iron-carbon alloy. For example, the inner enclosure 114 may be formed of one or more of materials including KOVAR, INVAR, or stainless steel. In the case where the inner enclosure 114 is formed of KOVAR, the electronic assembly 125 (and components of the electronic assembly 125) of the inner enclosure 114 closely follows the temperature of the inner enclosure 114. As another example, the inner enclosure 114 may be formed of one or more crystalline materials, such as, but not limited to, sapphire or crystalline quartz.

[0035] In another embodiment, the outer shell 116 is formed of one or more materials, including but not limited to ceramics, composites, or glass. In another embodiment, the outer shell 116 is formed of a material that causes negligible contamination. For example, the outer shell 116 can be formed of one or more low-contamination materials, including but not limited to silicon, silicon carbide, silicon nitride, or silicon dioxide.

[0036] In one embodiment, the inner enclosure 114 includes a cover 113 and a base 115, whereby the cover 113 can be removed from the base 115 to allow access to the interior portion of the inner enclosure 114. In another embodiment, the outer enclosure 116 includes a cover 117 and a base 119, whereby the cover 117 is mechanically coupled to the base 119 to seal the outer enclosure 116. For example, a weld 121 can mechanically couple the cover 117 to the base 119 to seal (e.g., hermetically seal) the outer enclosure 116. As another example, the base 119 can be bonded to the cover 117 by an adhesive to seal (e.g., hermetically seal) the outer enclosure 116.

[0037] In another embodiment, the nested enclosure assembly 104 includes an insulating medium 120 disposed between the inner enclosure 114 and the outer enclosure 116. It should be noted that the implementation of the insulating medium 120 between the inner enclosure 114 and the outer enclosure 116 is used to reduce heat transfer from a high temperature environment (e.g., a semiconductor processing chamber) outside the outer enclosure 116 to a region within the inner enclosure 114. For example, the insulating medium 120 may be disposed within a cavity between an outer surface of the inner enclosure 114 and an inner surface of the outer enclosure 116. In another embodiment, the insulating medium 120 may include, but is not limited to, a porous solid material. For example, the insulating medium 120 may be one or more aerogel materials (e.g., a silica aerogel material). For example, the aerogel material may be formed with a porosity of up to about 98.5%. As another example, the insulating medium 120 may be a ceramic material (e.g., a porous ceramic material). It should be noted herein that during sintering of a ceramic-based insulating medium, the porosity may be controlled by using a pore former. It is further noted herein that the porosity of the ceramic material may be manufactured to have a porosity range of 50% to 99%. For example, the porosity of the ceramic material may be manufactured to have a porosity range of between 95% to 99%.

[0038] In another embodiment, the insulating medium 120 is opaque. For example, the insulating medium 120 may include, but is not limited to, a material that absorbs radiation that traverses the volume between the inner surface of the outer envelope 116 and the outer surface of the inner envelope 114. For example, the insulating medium 120 may include, but is not limited to, a carbon-doped aerogel material.

[0039] In another embodiment, the insulating medium 120 is a low pressure gas (i.e., a gas maintained at a vacuum pressure), whereby the gas is maintained at a pressure less than the ambient pressure (i.e., the pressure of the process chamber). In this regard, the volume between the outer surface of the inner enclosure 114 and the inner surface of the outer enclosure 116 can be maintained at a vacuum pressure to minimize heat conduction from the outer enclosure 116 and the inner enclosure 114. In another embodiment, the insulating medium 120 is a gas maintained at a pressure approximately equal to the ambient pressure but less than atmospheric pressure. In another embodiment, the insulating medium 120 is a gas maintained at a pressure above the ambient pressure but less than atmospheric pressure. For the purposes of the present invention, "vacuum pressure" is interpreted to mean any pressure below ambient pressure.

[0040] In one embodiment, the inner shell 114 is supported on the inner surface of the outer shell 116 by the insulating medium 120. For example, the inner shell 114 can be supported on the inner surface of the outer shell 116 by one or more aerogel materials. For example, the inner shell 114 can be supported on the inner surface of the outer shell 116 by a silica aerogel material.

[0041] In another embodiment, if Figure 1C , the inner envelope 114 is supported by a low thermal conductivity medium layer 120 disposed on the inner bottom surface of the outer envelope 116. For example, the low thermal conductivity medium layer 120 may include one or more porous materials. For example, the low thermal conductivity medium layer 120 may include an aerogel material (e.g., a silica aerogel material). For further example, the low thermal conductivity medium layer may be opaque (e.g., a porous ceramic material).

[0042] In another embodiment, the outer enclosure 116 is supported on the substrate assembly 102 by one or more support structures 123. In another embodiment, the one or more support structures 123 (i.e., a single support foot, multiple support feet, a platform) can be formed of a medium with a low thermal conductivity to limit heat transfer between the substrate assembly 102 and the outer enclosure 116. For example, the one or more support structures 123 can be formed of a low thermal conductivity medium, such as but not limited to ceramics, composites, crystalline materials, or glass. For example, the one or more support structures 123 can be formed of one or more materials, including but not limited to silicon, silicon carbide, silicon nitride, or silicon dioxide. In another embodiment, the support structure 123 is mechanically coupled to the outer enclosure 116 and the upper substrate 107. For example, the weld 121 can mechanically couple the support structure 123 to the outer enclosure 116 and the upper substrate 107. As another example, the support structure can be bonded to the outer enclosure 116 and the upper substrate 107. In another embodiment, one or more of the support structures 123 form one or more channels through which one or more cables 126 connect the sensor assembly 105 to the electronic assembly 125. For example, one or more of the support structures 123 may include, but are not limited to, one or more ring or tube structures (e.g., hollow leg structures) that form one or more channels through which one or more cables 126 connect the sensor assembly 105 to the electronic assembly 125. In addition, the support structure 123 may be a ring structure coupled to the outer enclosure 116 and the upper substrate 107. For example, the support structure 123 may be configured as a ring structure that is welded to the outer enclosure 116 and the upper substrate 107 to form a seal (e.g., a hermetic seal). As another example, the support structure 123 may be configured as a ring structure that is bonded to the outer enclosure 116 and the upper substrate 107 to form a seal (e.g., a hermetic seal).

[0043] In another embodiment, the outer shell 116 is mechanically coupled to the substrate assembly 102, such as Figure 1D . For example, the outer enclosure 116 is welded to the upper substrate 107 to form a seal (e.g., a hermetic seal). As another example, the outer enclosure 116 is bonded to the upper substrate 107 to form a seal (e.g., a hermetic seal). It should be noted herein that mechanically coupling the outer enclosure 116 to the upper substrate 107 reduces the surface area of ​​the outer enclosure 116 exposed to the process chamber.

[0044] In another embodiment, if Figure 1D, a low emissivity and / or high reflectivity layer 118a (e.g., a coating) is disposed on an outer surface of the inner enclosure 114. In another embodiment, a low emissivity and / or high reflectivity layer 118b (e.g., a coating) is disposed on an inner surface of the outer enclosure 116. In another embodiment, the low emissivity and / or high reflectivity layer 118a is disposed on an insulating medium 120 disposed proximate to the outer surface of the inner enclosure 114. In another embodiment, the low emissivity and / or high reflectivity layer 118b is disposed on an insulating medium 120 disposed proximate to the inner surface of the outer enclosure 116.

[0045] It is noted herein that in the case where the high reflectivity layer is disposed proximate to the inner surface of the outer envelope 116, the high reflectivity layer 118b serves to reflect the majority of thermal radiation that falls on the outer envelope 116 from the processing chamber walls or any radiation lamps that may be present in the processing chamber. Furthermore, the presence of the high reflectivity layer disposed proximate to the outer surface of the inner envelope 114 serves to reflect the majority of thermal radiation that falls on the inner envelope 114 from the inner surface of the outer envelope 116. Additionally, the utilization of a low emissivity material disposed proximate to the inner surface of the outer envelope 116 serves to reduce the amount of radiant thermal energy emitted by the outer envelope 116, thereby reducing the amount of available radiant thermal energy that may be absorbed by the inner envelope 114. Additionally, the utilization of a low emissivity material disposed proximate to the inner surface of the outer envelope 116 serves to reduce the amount of radiant thermal energy emitted by the inner envelope 114, thereby reducing the amount of available radiant thermal energy that may be absorbed and transferred to the electronic assembly 125 within the inner envelope 114.

[0046] In another embodiment, layers 118a and / or 118b are high reflectivity and low emissivity materials, such as but not limited to gold, silver, or aluminum. In another embodiment, layers 118a and / or 118b may be high reflectivity and low emissivity materials formed of stacked dielectric films. For example, layers 118a and / or 118b may be high reflectivity and low emissivity stacked dielectric films formed of materials including but not limited to oxides, carbides, or nitrides.

[0047] Reference again Figure 1AIn one embodiment, the electronic assembly 125 is coupled to the sensor assembly 105. In another embodiment, the sensor assembly 105 includes one or more sensors 124. In another embodiment, the sensors 124 may be disposed at one or more locations across the substrate assembly 102 and connected to the electronic assembly 125 via one or more cable connections 126. In this regard, the one or more electronic assemblies 125 may obtain one or more measurement parameters indicating values ​​(e.g., voltage from a thermocouple, resistance from a resistance temperature device, voltage (or other signal) from a pressure sensor, voltage (or other signal) from a radiation sensor, voltage (or other signal) from a chemical sensor, and the like) from the one or more sensors 124 positioned at one or more locations on the substrate assembly 102. In another embodiment, the electronic assembly 125 is communicatively coupled to the remote data system 103. In another embodiment, the electronic assembly 125 transmits the plurality of measurement parameters to the remote data system 103.

[0048] It should be noted that the one or more sensors 124 may include any measuring device known in the art. For example, the one or more sensors 124 may include, but are not limited to, thermal sensors, pressure sensors, radiation sensors, and / or chemical sensors. For example, in the case of temperature measurement, the one or more sensors 124 may include, but are not limited to, one or more thermocouple (TC) devices (e.g., thermoelectric junctions), or one or more resistance temperature devices (RTDs) (e.g., thin film RTDs). In another example, in the case of pressure measurement, the one or more sensors 124 may include, but are not limited to, piezoelectric sensors, capacitive sensors, optical sensors, potentiometric sensors, and the like. In another example, in the case of radiation measurement, the one or more sensors may include, but are not limited to, one or more photodetectors (e.g., photovoltaic cells, photoresistors, and the like) or other radiation detectors (e.g., solid-state detectors). In another example, in the case of chemical measurement, the one or more sensors 124 may include, but are not limited to, one or more chemical resistors, gas sensors, pH sensors, and the like.

[0049] In another embodiment, the instrumented substrate apparatus 100 includes a dummy shell assembly 108. For example, the dummy shell assembly 108 may be placed at a selected location on the substrate assembly 102 to serve as a counterweight to offset the weight of the nested shell assembly 104. For example, the dummy shell assembly 108 may be placed opposite the nested shell assembly 104 at the same distance from the center of the substrate assembly 102 as the nested shell assembly 104. It should be noted herein that placing the dummy shell assembly 108 at a location opposite the nested shell assembly 104 serves to maintain the center of mass of the instrumented substrate apparatus 100 at the center of the substrate assembly 102. In another embodiment (although not shown), the nested shell assembly 104 may be positioned at the center of the substrate assembly 102 to maintain the center of mass of the instrumented substrate apparatus 100 at the center of the substrate assembly 102.

[0050] Figure 1E 1 is a simplified cross-sectional view of the nested containment shell assembly 104 and the instrumented substrate apparatus 100. In one embodiment, the outer containment shell 116 is formed as one component (e.g., a cup structure). For example, the outer containment shell 116 can be formed from a single piece of fused silica glass. In one embodiment, the single piece outer containment shell 116 is mechanically coupled to the substrate assembly 102. For example, the single piece outer containment shell 116 can be welded or bonded to the upper substrate 107. It should be noted that the construction of the outer containment shell 116 as a single piece provides a reduced profile of the instrumented substrate apparatus 100.

[0051] Figure 1F 1 is a simplified cross-sectional view of the nested enclosure assembly 104 and the instrumented substrate apparatus 100. In one embodiment, a central portion of the upper substrate 107 is removed. In another embodiment, an additional insulating dielectric layer 140 may be disposed on the bottom substrate 109 and in the central portion of the upper substrate 107 to provide additional thermal insulation. Additionally, an additional high reflectivity material layer 142 may be disposed between the additional insulating dielectric material 140 and the bottom substrate 109, whereby the high reflectivity material 142 and the insulating material 140 fill the central portion region of the upper substrate 107.

[0052] Figure 1G 1 is a simplified cross-sectional view of a portion of an instrumented substrate apparatus 100 in accordance with one or more embodiments of the present invention. In one embodiment, one or more sensors 124 and a sensor substrate 135 are sealed between an upper substrate 107 and a lower substrate 109. For example, the sensor 124 and the sensor substrate 135 are sealed (e.g., hermetically sealed) inside the substrate assembly 102 to prevent exposure to a process chamber gas 136 (e.g., nitrogen, helium, and the like).

[0053] It should be noted that the sensor substrate 135 can be formed to have any shape and distributed across the base substrate 109 in any manner. Figures 1H to 1JVarious substrate sensor configurations according to one or more embodiments of the present invention are described. For simplicity purposes, Figures 1H to 1J The top substrate (107 in other figures) is not depicted. Figure 1H As shown in FIG. 1 , in one embodiment, a set of sensor substrates 135 are arranged in a selected geometric pattern (e.g., Figure 1H ) are distributed across the bottom substrate 109. In addition, one or more sensors 124 may be disposed on, in, or below each of the sensor substrates 135.

[0054] like Fig. 1I In another embodiment, one or more sensor substrates 135 are configured as a ring disposed between the lower substrate 109 and the upper substrate 107 (the upper substrate is not shown for clarity). Fig. 1I , the middle set of sensor substrates 135 may be configured as concentric rings of various sizes disposed on the bottom substrate 109. Furthermore, one or more sensors 124 may be disposed on, in, or below each of the ring-shaped sensor substrates 135.

[0055] like Figure 1J In another embodiment, a single sensor substrate 135 may be disposed on the bottom substrate 109, wherein one or more sensors 124 are disposed on the sensor substrate 135. For example, Figure 1J As shown in FIG. 1 , the sensor substrate 135 may be shaped as a disk with a center portion removed.

[0056] It should be noted that the arrangement and number of sensor substrates 135 and sensors 124 depicted above are not limited and are provided for illustration purposes only. Rather, it should be recognized herein that one or more sensor substrates 135 and / or one or more sensors 124 of the present invention may be configured in a variety of patterns, shapes, and quantities.

[0057] Furthermore, although much of the present invention has focused on an embodiment of an instrumented substrate apparatus 100 equipped with a top substrate, this configuration does not limit the scope of the present invention. Rather, the scope of the present invention may extend to multiple equivalent embodiments. For example, again referring to Figure 1A and 1B, the top substrate 107 of the substrate assembly 102 may be replaced by a top coating material. For example, one or more sensor substrates 135 and / or one or more sensors 124 may be disposed on the bottom substrate 109. After placing the one or more sensor substrates 135 and / or one or more sensors 124, a coating material may be applied to the bottom substrate 109, the one or more substrates 135 and / or the one or more sensors 124, thereby sealing at least the one or more sensors 124. For example, the coating material may form a high reflectivity and low emissivity film, such as, but not limited to, a silicon dioxide film, over the bottom substrate 109, the one or more substrates 135 and / or the one or more sensors 124.

[0058] Figure 1K An instrumented substrate assembly system 150 including an instrumented substrate apparatus 100 and a remote data system 103 is described. In one embodiment, one or more electronic assemblies 125 are wirelessly communicatively coupled to the remote data system 103. The one or more electronic assemblies 125 may be wirelessly communicatively coupled to the remote data system 103 in any suitable manner. For example, the instrumented substrate apparatus 100 may include a communication circuit 106. The communication circuit 106 may include any communication circuit and / or communication device known in the communication field. For example, the communication circuit 106 may include, but is not limited to, one or more communication antennas (e.g., communication coils). In one embodiment, the communication circuit 106 is configured to establish a communication link between the electronic assembly 125 and the remote data system 103 off-substrate. In addition, the communication circuit 106 is communicatively coupled to the electronic assembly 125 (e.g., coupled via an electrical interconnect 127). In this regard, the electronic assembly 125 may transmit one or more signals indicating measurement parameters acquired by the one or more sensors 124 to the communication circuit 106 via the one or more interconnects 127. In turn, the communication circuit 106 may relay one or more signals indicative of the measured parameters to the remote data system 103. In one embodiment, the remote data system 103 includes a communication circuit 132 adapted to establish a communication link between the on-substrate communication circuit 106 and the remote data system 103. For example, the communication circuit 132 may use a radio frequency (RF) signal to establish a communication link between the on-substrate communication circuit 106 and the remote data system 103. As further discussed herein, values ​​associated with the sensor measurements may be calculated by the electronics assembly 125 and / or the remote data system 103.

[0059] In one embodiment, the electronic assembly 125 calculates one or more values ​​based on one or more measurement parameters acquired by the one or more sensors 124. The electronic assembly 125 may then transmit the calculated values ​​to the remote data system 103. In another embodiment, the values ​​are calculated by the remote data system 103. In this regard, the electronic assembly 125 transmits the one or more measurement parameters to the remote data system 103. The remote data system 103 may then calculate one or more values ​​based on the one or more measurement parameters acquired by the sensor 124.

[0060] In another embodiment, the remote data system 103 maps one or more values ​​calculated by the electronic assembly 125 or the remote data system 103 to (or correlates the values ​​to) the acquisition locations on the substrate assembly 102 based on the one or more signals acquired by the sensor 124. In another embodiment, the remote data system 103 reports the mapped values ​​to a user interface. For example, the remote data system 103 may report the mapped values ​​to one or more of a desktop computer, a laptop computer, a tablet computer, a handheld device, a memory, or a server.

[0061] Figure 1L A block diagram illustrating an electronic assembly 125 housed within a nested enclosure assembly 104 in accordance with one or more embodiments of the present invention. In one embodiment, the electronic assembly 125 includes a power source 112 (e.g., one or more batteries). In another embodiment, the electronic assembly 125 includes one or more processors 129. In another embodiment, the electronic assembly 125 includes a communication circuit 128. In another embodiment, the electronic assembly 125 may include a storage medium 131 (e.g., memory) to store program instructions used to configure the one or more processors 129. In addition, measurement parameters acquired by the electronic assembly 125 enclosed within the nested enclosure assembly 104 may be stored in the memory 131 of the electronic assembly 125. For purposes of the present invention, the term 'processor' may be broadly defined to encompass any device having one or more processors (e.g., CPUs) or logic elements (e.g., ASICs) that execute instructions from the storage medium 131. In this sense, the one or more processors 129 of the electronic assembly 125 may include any microprocessor-type device or logic device configured to execute algorithms and / or instructions. It should be appreciated that the steps described throughout the present invention may be performed by a single processor or, alternatively, multiple processors.The storage medium 131 may include read-only memory, random access memory, solid state drive, flash memory, EPROM, EEPROM, and the like.

[0062] Figure 2A process chamber configured with an instrumented substrate apparatus 100 in accordance with one or more embodiments of the present invention is illustrated. In one embodiment, the instrumented substrate apparatus 100 is disposed on a rotatable platform 138. In another embodiment, a process chamber gas 136 flows over the substrate assembly 102. For example, as previously discussed, the instrumented substrate assembly 102 is sealed (e.g., hermetically sealed) so the process chamber gas 136 does not enter the substrate assembly 102. In another embodiment, one or more heating sources 134 are used to heat the process chamber. For example, heat lamps above and below the instrumented substrate apparatus 100 heat the process chamber.

[0063] Figure 3 A flow chart is illustrated depicting a method 300 of acquiring measurement parameters across a substrate in accordance with one or more embodiments of the present invention. It should be noted herein that Figure 3 The steps of the flow diagrams in should not be construed as limiting and are provided for illustration purposes only.

[0064] In one embodiment, the process begins at step 302. In step 304, the process includes measuring a set of measurement parameters (e.g., TC voltage, RTD resistance, and the like) at a set of sensors 124 disposed at a set of locations around the substrate assembly 102. Then, in step 306, after measuring the measurement parameters, the results are stored in a memory (e.g., memory 131 of the electronic assembly 125) enclosed in the nested enclosure 104. In step 308, the set of measurement parameters is transmitted to the remote data system 103. For example, the measurement data may be wirelessly transmitted from the electronic assembly 125 to the remote data system 103 via a communication circuit 106 (e.g., a communication antenna) by a radio frequency (RF) signal. In step 310, a value is calculated by the remote data system 103 for each of the measurement parameters acquired by each of the sensors 124 disposed at each of the locations of the substrate assembly 102. For example, in the case of temperature, a value associated with one of the sensors 124 may be calculated based on a parameter indicating the temperature measured at that sensor. It is noted herein that the results of each of the sensors 124 may then be mapped to the surface of the substrate assembly 102. For example, the remote data system 103 (or another data system) may correlate the values ​​measured by each sensor of the set of sensors 124. Then, based on the known position of each of the sensors 124, the remote data system 103 may form a database and / or map of values ​​at the top surface of the substrate assembly 102 as a function of position (e.g., XY position) in the plane of the top surface of the substrate assembly 102. In another embodiment, the database and / or map of values ​​is presented on a display of a user interface (not shown). In step 312, the process ends.

[0065] It should be appreciated that the steps of method 300 may be performed via system 150. However, it should be appreciated that system 150 should not be interpreted as limiting process 300 or methods of measuring values ​​across substrate assembly 102, as it is contemplated that system 150 may perform a variety of processes resulting in multiple process flows for acquiring measurements and determining values ​​at multiple locations on substrate assembly 102. For example, after measurement parameters have been acquired for all of one or more sensors 124, electronics assembly 125 may calculate a value for each measurement parameter acquired by one or more sensors 124.

[0066] The subject matter described herein sometimes illustrates different components housed in or connected to other components. It should be understood that such depicted architectures are merely exemplary, and in fact many other architectures that achieve the same functionality can be implemented. In a conceptual sense, any component arrangement used to achieve the same functionality is effectively "associated" so that the desired functionality is achieved. Therefore, any two components combined in this article to achieve a specific functionality can be considered to be "associated" with each other so that the desired functionality is achieved, regardless of the architecture or intermediate components. Similarly, any two components so associated can also be considered to be "connected" or "coupled" to each other to achieve the desired functionality, and any two components that can be so associated can also be considered to be "coupleable" to each other to achieve the desired functionality. Specific examples that can be coupled include, but are not limited to, physically interactive and / or physically interactive components, and / or wirelessly interactive and / or wirelessly interactive components, and / or logically interactive and / or logically interactive components.

[0067] It is believed that the present invention and its many attendant advantages will be appreciated from the foregoing description, and it will be appreciated that various changes may be made to the form, construction, and arrangement of components without departing from the disclosed subject matter or sacrificing all of its material advantages. The described form is illustrative only, and the appended claims are intended to cover and encompass such changes. Furthermore, it will be understood that the present invention is defined by the appended claims.

Claims

1. A semiconductor device, include: a substrate assembly comprising a bottom substrate and a top substrate, wherein the top substrate is mechanically coupled to the bottom substrate, wherein at least one of the bottom substrate or the top substrate is formed of at least one of silicon, silicon carbide, silicon nitride, or silicon dioxide; Electronic assemblies; a nested enclosure assembly comprising an outer enclosure and an inner enclosure, wherein the outer enclosure surrounds the inner enclosure, wherein the inner enclosure surrounds at least the electronic assembly; an insulating medium disposed within a cavity between an outer surface of the inner enclosure and an inner surface of the outer enclosure, wherein the inner enclosure, the outer enclosure, and the insulating medium are configured to maintain the electronic assembly at or below 150° C. when the nested enclosure assembly is exposed to a processing environment having a temperature of up to 800° C.; and a sensor assembly communicatively coupled to the electronics assembly; wherein the sensor assembly includes one or more sensors disposed within the substrate assembly at one or more locations across the substrate assembly, wherein the one or more sensors are configured to acquire one or more measurement parameters at the one or more locations across the substrate assembly, wherein the electronics assembly is configured to receive the one or more measurement parameters from the one or more sensors, Wherein the bottom substrate and the top substrate are sealed by at least one of welding or bonding.

2. The semiconductor device according to claim 1, wherein the one or more sensors include: One or more temperature sensors configured to acquire one or more parameters indicative of temperature.

3. The semiconductor device of claim 2, wherein the one or more thermal sensors include: One or more thermocouple devices.

4. The semiconductor device of claim 2, wherein the one or more thermal sensors include: One or more resistance temperature devices.

5. The semiconductor device of claim 1, wherein the one or more sensors include: One or more pressure sensors configured to acquire one or more parameters indicative of pressure.

6. The semiconductor device of claim 1, wherein the one or more sensors include: One or more chemical sensors configured to acquire one or more parameters indicative of the presence of a target chemical.

7. The semiconductor device of claim 1, wherein the one or more sensors include: One or more radiation sensors configured to acquire one or more parameters indicative of the presence of radiation. 8 . The semiconductor device of claim 1 , wherein at least one of the bottom substrate or the top substrate is formed of at least one of a ceramic, a cermet, a crystalline material, or a glass.

9. The semiconductor apparatus of claim 1, wherein the nested enclosure assembly is mechanically coupled to the substrate assembly.

10. The semiconductor device of claim 9, wherein the nested enclosure assembly is sealed to the substrate assembly by at least one of welding or bonding.

11. The semiconductor device according to claim 1, wherein the electronic assembly include: one or more processors; communications circuitry; memory; and a power source.

12. The semiconductor device according to claim 1, further comprising: include: A dummy enclosure assembly is provided, wherein the dummy enclosure assembly is disposed on the substrate assembly in a position to maintain a center of mass of the apparatus at a center of the substrate assembly.

13. The semiconductor apparatus of claim 1, wherein each of the one or more sensors is disposed on or within a sensor substrate, wherein the sensor substrate is disposed between the bottom substrate and the top substrate of the substrate assembly.

14. The semiconductor device according to claim 13, wherein the sensor substrate include: At least one of a silicon substrate, a silicon carbide substrate, a silicon nitride substrate, a gallium nitride substrate, a gallium arsenide substrate, a germanium substrate, or a gallium and indium substrate.

15. The semiconductor device according to claim 1, wherein the insulating medium include: Porous solid material. The semiconductor device of claim 15 , wherein the insulating medium is opaque.

17. The semiconductor device of claim 15, wherein the insulating medium is absorptive.

18. The semiconductor device according to claim 15, wherein the insulating medium include: Aerogel.

19. The semiconductor device according to claim 15, wherein the insulating medium include: Ceramic material.

20. The semiconductor device according to claim 1, wherein the insulating medium include: One or more gases.

21. The semiconductor device of claim 20, wherein the one or more gases are maintained at a vacuum pressure, wherein the vacuum pressure is a pressure below atmospheric pressure.

22. The semiconductor device according to claim 1, further comprising: include: One or more support structures support the inner enclosure on the inner surface of the outer enclosure.

23. The semiconductor device of claim 22, wherein the one or more support structures are formed of a thermally insulating material.

24. The semiconductor device according to claim 1, further comprising: include: One or more support structures for supporting the outer enclosure on the substrate assembly.

25. The semiconductor device according to claim 1, in, The inner envelope is formed of a material having a heat capacity above a selected value.

26. The semiconductor device of claim 1, wherein the inner enclosure is formed of at least one of a metal or a composite material.

27. The semiconductor device of claim 26, wherein the inner enclosure is formed of an alloy.

28. The semiconductor device of claim 27, wherein the inner enclosure is formed of at least one of an iron-nickel-cobalt alloy, an iron-nickel alloy, or an iron-carbon alloy.

29. The semiconductor device of claim 1, wherein the inner enclosure is formed of one or more crystalline materials.

30. The semiconductor device of claim 29, wherein the inner envelope is formed of at least one of sapphire or crystalline quartz.

31. The semiconductor device of claim 1, wherein the outer envelope is formed of at least one of a ceramic, a cermet, a crystalline material, or a glass.

32. The semiconductor device of claim 1, wherein the outer envelope is formed of at least one of silicon, silicon carbide, silicon nitride, or silicon dioxide.

33. The semiconductor apparatus of claim 1, wherein the electronic assembly is configured to calculate one or more values ​​from the one or more acquired measurement parameters.

34. The semiconductor device according to claim 1, further comprising: include: a remote data system communicatively coupled to the electronic assembly, wherein the electronic assembly is configured to send the one or more measurement parameters to the remote data system, wherein the remote data system is configured to calculate one or more values ​​from the one or more acquired measurement parameters acquired by the one or more sensors.

35. The semiconductor apparatus of claim 34, wherein the remote data system is configured to map the one or more values ​​to the one or more locations of the substrate.

36. The semiconductor device of claim 35, wherein the remote data system is configured to report the mapped one or more values ​​to a user interface.

37. A semiconductor device, include: a substrate assembly comprising a bottom substrate and a top substrate, wherein the top substrate is mechanically coupled to the bottom substrate, wherein at least one of the bottom substrate or the top substrate is formed of at least one of silicon, silicon carbide, silicon nitride, or silicon dioxide; Electronic assemblies; A nested enclosure assembly comprising an outer enclosure and an inner enclosure, wherein the outer enclosure surrounds the inner enclosure, wherein the inner enclosure surrounds at least the electronic assembly; an insulating medium disposed within a cavity between an outer surface of the inner enclosure and an inner surface of the outer enclosure, wherein the inner enclosure, the outer enclosure, and the insulating medium are configured to maintain the electronic assembly at or below 150°C when the nested enclosure assembly is exposed to a processing environment having a temperature of up to 800°C; and a sensor assembly communicatively connected to the electronics assembly; wherein the sensor assembly comprises one or more sensors, wherein the one or more sensors are configured to acquire one or more measurement parameters at one or more locations across the substrate assembly, wherein the electronics assembly is configured to receive the one or more measurement parameters from the one or more sensors, Wherein the bottom substrate and the top substrate are sealed by at least one of welding or bonding.

38. A method for semiconductors, the method include: acquiring a set of measurement parameters using one or more sensors distributed at one or more locations of a substrate assembly, wherein the substrate assembly includes a bottom substrate and a top substrate, wherein the top substrate is mechanically coupled to the bottom substrate, wherein at least one of the bottom substrate or the top substrate is formed of at least one of silicon, silicon carbide, silicon nitride, or silicon dioxide; storing the set of measurement parameters in an electronic assembly disposed within a nested enclosure assembly, wherein the nested enclosure assembly includes an outer enclosure and an inner enclosure, wherein the outer enclosure surrounds the inner enclosure, wherein the inner enclosure surrounds at least the electronic assembly, and an insulating medium is disposed within a cavity between an outer surface of the inner enclosure and an inner surface of the outer enclosure, wherein the inner enclosure, the outer enclosure, and the insulating medium are configured to maintain the electronic assembly at or below 150° C. when the nested enclosure assembly is exposed to a processing environment having a temperature of up to 800° C.; as well as Calculate the value of each measurement, Wherein the bottom substrate and the top substrate are sealed by at least one of welding or bonding.

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