Switching control circuit, semiconductor device

Abstract

This invention provides a stable switching control circuit. The switching control circuit controls the switching of a first switching element on the power supply side and a second switching element on the ground side that drives the load together with the first switching element. The switching control circuit includes: a signal output circuit that outputs a set signal for turning on the first switching element and a reset signal for turning off the first switching element based on an input signal; a level shifting circuit that shifts the levels of the set signal and the reset signal; a first driving circuit that drives the first switching element based on the output from the level shifting circuit; and a power supply circuit comprising a plurality of transistors connected in a Darlington configuration for generating the power supply voltage of the signal output circuit.

Description

Technical Field

[0001] This invention relates to a switch control circuit and a semiconductor device. Background Technology

[0002] There is a half-bridge circuit that includes a high-side switching element and a low-side switching element and serves as a driving load (e.g., Patent Document 1).

[0003] Existing technical documents

[0004] Patent documents

[0005] Patent Document 1: Japanese Patent Application Publication No. 2013-48390 Summary of the Invention

[0006] The technical problem that the invention aims to solve

[0007] However, when the low-side switching element is turned on, a negative voltage may sometimes be generated at the node connecting the high-side and low-side switching elements due to the influence of load, wiring, etc. When such a negative voltage is generated, the output of the power supply circuit that enables the various circuits of the switching control circuit to operate is greatly reduced, thus making the operation of the switching control circuit unstable.

[0008] The present invention was made in view of the above-mentioned existing problems, and its object is to provide a switch control circuit with stable operation.

[0009] Technical solutions adopted to solve technical problems

[0010] A first embodiment of the present invention that solves the above problems is a switch control circuit that controls the switching of a first switch element on a power supply side and a second switch element on a ground side that drives a load together with the first switch element. The switch control circuit includes: a signal output circuit that outputs a set signal for turning on the first switch element and a reset signal for turning off the first switch element based on an input signal; a level shifting circuit that shifts the levels of the set signal and the reset signal; a first driving circuit that drives the first switch element based on the output from the level shifting circuit; and a power supply circuit that includes a plurality of transistors connected in a Darlington configuration for generating a power supply voltage for the signal output circuit.

[0011] Furthermore, a second aspect of the present invention is a semiconductor device comprising a first switching element on a power supply side, a second switching element on a ground side that drives a load together with the first switching element, and a switch control circuit for controlling the switching of the first and second switching elements. The switch control circuit includes: a signal output circuit that outputs a set signal for turning on the first switching element and a reset signal for turning off the first switching element based on an input signal; a level shifting circuit that shifts the levels of the set signal and the reset signal; a first driving circuit that drives the first switching element based on the output from the level shifting circuit; and a power supply circuit comprising a plurality of transistors connected in a Darlington configuration for generating a power supply voltage for the signal output circuit.

[0012] Invention Effects

[0013] According to the present invention, a switch control circuit with stable operation can be provided. Attached Figure Description

[0014] Figure 1 This is a diagram showing an example of power module 10.

[0015] Figure 2 This is a diagram showing an example of the signal output circuit 42.

[0016] Figure 3 This is a diagram showing an example of the drive circuit 45.

[0017] Figure 4 This diagram illustrates the operation of the switch control IC 20.

[0018] Figure 5 This is a diagram showing an example of a semiconductor device 100 in which a switch control IC 20 is formed.

[0019] Figure 6 This is a diagram showing an example of a power supply circuit 40a.

[0020] Figure 7 This is a diagram showing an example of the power supply circuit 40b.

[0021] Figure 8 This is a diagram showing an example of the output of power supply circuits 40a and 40b when the IGBT31 is turned on.

[0022] Figure 9 This is a diagram showing an example of a power supply circuit 40c. Detailed Implementation

[0023] Based on the description in this specification and the accompanying drawings, at least the following are clear.

[0024] ======This implementation method======

[0025] Figure 1 This is a diagram illustrating the structure of a power module 10 according to one embodiment of the present invention. The power module 10 is a semiconductor device for driving a load 11 based on instructions from a microcomputer (not shown), and is configured to include a switch control IC (Integrated Circuit) 20, a half-bridge circuit 21, and a capacitor 22.

[0026] The switch control IC 20 is a high-voltage integrated circuit (HVIC: High Voltage IC) that controls the operation of the half-bridge circuit 21 based on the input signal Sin from a microcomputer (not shown). The switch control IC 20 will be described in detail later. The switch control IC 20 has terminals VCC, IN, GND, B, S, HO, and LO.

[0027] The half-bridge circuit 21 is, for example, a circuit for driving the motor coil of an air conditioner that serves as a load 11, and includes an IGBT (Insulated Gate Bipolar Transistor) 30 and an IGBT 31.

[0028] The IGBT30 is a high-side switching element, with its gate electrode connected to terminal HO and its emitter electrode connected to terminal S. Furthermore, a specified voltage Vdc (e.g., "400V") is applied to the collector electrode of the IGBT30.

[0029] The IGBT31 is a low-side switching device, with its gate electrode connected to terminal LO and its collector electrode connected to terminal S. Additionally, the emitter electrode of the IGBT31 is grounded.

[0030] In this embodiment, an IGBT is used as the switching element, but a MOS transistor or a bipolar transistor may also be used, for example. Furthermore, IGBT30 corresponds to the "first switching element on the power supply side," and IGBT31 corresponds to the "second switching element on the ground side."

[0031] One end of capacitor 22 is connected to terminal B, and the other end is connected to terminal S. Capacitor 22 is charged by applying a bootstrap voltage Vb from the charge pump circuit 41 (described later) to terminal B. As a result, a bootstrap voltage Vb is generated across capacitor 22. Furthermore, the bootstrap voltage Vb is the voltage used to turn on the high-side IGBT 30.

[0032] For example, when the voltage Vs at terminal S is "0V", the IGBT 30 turns on when the voltage at the gate electrode of the IGBT 30 becomes higher than the threshold voltage of the IGBT 30. However, when the IGBT 30 is turned on, the voltage Vs at terminal S is close to the voltage Vdc (e.g., "400V"). Therefore, in order for the IGBT 30 to continue to turn on, it is necessary to drive the IGBT 30 with reference to the voltage Vs at terminal S connected to the emitter electrode of the IGBT 30.

[0033] In this embodiment, a voltage higher than the bootstrap voltage Vb is generated at terminal B, based on the voltage Vs at terminal S. Therefore, details will be explained later, but the switch control IC 20 can turn on the IGBT 30 by using the bootstrap voltage Vb.

[0034] <<<Structure of Switch Control IC20>>>

[0035] The switch control IC20 is configured to include a power supply circuit 40, a charge pump circuit 41, a signal output circuit 42, a level shifting circuit 43, and drive circuits 44 and 45.

[0036] The power supply circuit 40 generates a power supply voltage Vreg used internally by the switch control IC 20 based on the power supply voltage Vcc (e.g., "20V") applied to the terminal VCC. Further details will be described later, but the power supply circuit 40 in this embodiment is configured to generate a stable power supply voltage Vreg even when the IGBT 31 is turned on.

[0037] The charge pump circuit 41 generates, for example, a bootstrap voltage Vb for charging capacitor 22 based on the power supply voltage Vcc.

[0038] The signal output circuit 42 outputs signals for controlling the switching of IGBTs 30 and 31 based on the logic level input signal Sin input via terminal IN. Specifically, the signal output circuit 42 outputs a set pulse signal S1 for turning on the high-side IGBT 30, a reset pulse signal S2 for turning off the IGBT 30, and a control signal S0 for controlling the switching of the low-side IGBT 31 based on the input signal Sin.

[0039] like Figure 2 As shown, the signal output circuit 42 includes an input detection circuit 50, a filter circuit 51, and a pulse generation circuit 52. Furthermore, the input detection circuit 50, the filter circuit 51, and the pulse generation circuit 52 operate based on the power supply voltage Vreg of the power supply circuit 40, using the ground voltage Vgnd as a reference. Therefore, the grounding nodes of each of the input detection circuit 50, the filter circuit 51, and the pulse generation circuit 52 are connected to the ground terminal GND.

[0040] The input detection circuit 50 detects the level of the input signal Sin and outputs a signal Sa with the same logic level as the input signal Sin. Specifically, if the input detection circuit 50 sets the input signal Sin to a high level (hereinafter referred to as "H" level), it outputs a signal Sa with an "H" level; if the input signal Sin is a low level (hereinafter referred to as "L" level), it outputs a signal Sa with an "L" level. Furthermore, the input detection circuit 50 may, for example, include a comparator (not shown).

[0041] The filter circuit 51 is a low-pass filter used to remove high-frequency noise from the signal Sa, and is configured to include, for example, an operational amplifier (not shown). In this embodiment, the filter circuit 51 outputs the noise-removed signal Sa as a control signal S0.

[0042] The pulse generation circuit 52 outputs a set pulse signal S1 and a reset pulse signal S2 based on the change point of the control signal S0. Specifically, if the control signal S0 changes from a "L" level to a "H" level, the pulse generation circuit 52 outputs a set pulse signal S1 at a "H" level; if the control signal S0 changes from a "H" level to a "L" level, the pulse generation circuit 52 outputs a reset pulse signal S2 at a "H" level. Furthermore, in this embodiment, the set pulse signal S1 and the reset pulse signal S2 are pulse signals whose amplitude level changes from 0V to the level of the power supply voltage Vreg (e.g., 5V).

[0043] The level shifting circuit 43 shifts the levels of the set pulse signal S1 and the reset pulse signal S2 to levels that enable the logic circuit (described later) of the drive circuit 45 to operate. Specifically, the level shifting circuit 43 shifts the level of the set pulse signal S1 and outputs a set pulse signal S3 with an amplitude level of, for example, a high-side reference potential, based on a voltage Vs. Furthermore, the level shifting circuit 43 shifts the level of the reset pulse signal S2 and outputs a reset pulse signal S4 with an amplitude level of, for example, tens of Vs, based on a voltage Vs.

[0044] The drive circuit 44 is a circuit that drives the low-side IGBT 31 based on the control signal S0. Specifically, the drive circuit 44 outputs an "H" level drive signal Vdr1 to the gate electrode of the IGBT 31 via the terminal LO based on the "L" level control signal S0. As a result, the IGBT 31 is turned on. On the other hand, the drive circuit 44 outputs an "L" level drive signal Vdr1 to the gate electrode of the IGBT 31 via the terminal LO based on the "H" level control signal S0. As a result, the IGBT 31 is turned off. In addition, the drive circuit 44 operates based on the power supply voltage Vcc.

[0045] The drive circuit 45 turns on the high-side IGBT 30 based on the set pulse signal S3 and turns off the IGBT 30 based on the reset pulse signal S4. Figure 3 This is a diagram showing an example of a drive circuit 45. The drive circuit 45 is configured to include logic circuit 60 and inverters 61 and 62.

[0046] When the set pulse signal S1 is input, the logic circuit 60 outputs a signal at the "H" level; when the reset pulse signal S2 is input, the logic circuit 60 outputs a signal at the "L" level. Furthermore, the logic circuit 60 may be configured to include, for example, a MOS transistor (not shown) and a latch circuit.

[0047] Inverter 61 is a circuit that inverts the logic level of the signal from logic circuit 60 and outputs it, and is configured to include NMOS transistor 70 and PMOS transistor 71.

[0048] Inverter 62 is a circuit used to invert the logic level of the signal from inverter 61 and output it as a drive signal Vdr2, and is configured to include NMOS transistor 72 and PMOS transistor 73.

[0049] Therefore, when the set pulse signal S1 is input, the drive circuit 45 outputs a "H" level drive signal Vdr2 to the gate electrode of the IGBT 30 via the terminal HO. On the other hand, when the reset pulse signal S2 is input, the drive circuit 45 outputs an "L" level drive signal Vdr2 to the gate electrode of the IGBT 30 via the terminal HO.

[0050] Here, the drive signal Vdr2 is a signal whose logic level is changed based on the voltage Vs at terminal S. Therefore, the IGBT 30 is turned on based on the "H" level drive signal Vdr2 and turned off based on the "L" level drive signal Vdr2. Furthermore, drive circuit 44 is equivalent to a "second drive circuit," and drive circuit 45 is equivalent to a "first drive circuit." Additionally, the set pulse signal S1 is equivalent to a "set signal," and the reset pulse signal S2 is equivalent to a "reset signal."

[0051] <<<Operation of Switch Control IC20>>>

[0052] Figure 4 This diagram illustrates the operation of the switch control IC20. Furthermore, the signal delay time in the signal output circuit 42 of this embodiment is designed to be sufficiently short.

[0053] First, when the input signal Sin changes to the "L" level at time t0, Figure 2The input detection circuit 50 also outputs a signal Sa at the "L" level. Then, the filter circuit 51 removes noise (not shown) from the signal Sa and outputs a control signal S0 with the same logic level as the signal Sa.

[0054] Furthermore, when the control signal S0 changes to the "L" level, the pulse generation circuit 52 outputs a reset pulse signal S2 at the "H" level. As a result, the level shifting circuit 43 outputs a reset pulse signal S4 at the "H" level after level shifting.

[0055] Then, the low-side drive circuit 44 sets the drive signal Vdr1 to the "H" level based on the "L" level control signal S0, and the high-side drive circuit 45 sets the drive signal Vdr2 to the "L" level based on the "H" level reset pulse signal S4.

[0056] As a result, IGBT 30 is turned off and IGBT 31 is turned on, thus the voltage Vs drops from voltage Vdc (e.g., "400V") to voltage Vgnd (here, "0V"). Additionally, as described above, the wiring for supplying power to load 11 is connected between terminal S and load 11. Furthermore, load 11 is, for example, a motor coil with a large inductance value. Therefore, when IGBT 31 is turned on, ringing occurs at voltage Vs, and voltage Vs becomes a negative voltage smaller than voltage Vgnd.

[0057] Furthermore, when the input signal Sin changes to an "H" level at time t1, the input detection circuit 50 also outputs an "H" level signal Sa. Then, the filter circuit 51 removes noise (not shown) from the signal Sa and outputs a control signal S0 with the same logic level as the signal Sa.

[0058] Furthermore, when the control signal S0 changes to the "H" level, the pulse generation circuit 52 outputs a reset pulse signal S1 at the "H" level. As a result, the level shifting circuit 43 outputs a reset pulse signal S3 at the "H" level after level shifting.

[0059] Then, the low-side drive circuit 44 sets the drive signal Vdr1 to the "L" level based on the "H" level control signal S0, and the high-side drive circuit 45 sets the drive signal Vdr2 to the "H" level based on the "H" level set pulse signal S3.

[0060] As a result, IGBT 30 turns on and IGBT 31 turns off, so the voltage Vs rises from voltage Vgnd (here, "0V") to voltage Vdv (e.g., "400V"). As described above, since load 11 is connected to terminal S via wiring, ringing occurs at voltage Vs when IGBT 30 turns on, and voltage Vs becomes a voltage greater than voltage Vdc. Furthermore, after time t2, the operation from time t0 to time t1 is repeated.

[0061] <<<About Semiconductor Substrates 100>>>

[0062] As described above, in this embodiment, when IGBT31 is turned on, the voltage Vs drops from voltage Vgnd to a negative voltage ("Vs" < "0V"). Then, when the voltage Vs becomes negative, the "leakage current" flows from the GND terminal through the semiconductor substrate on which the switch control IC20 is formed to the terminal S.

[0063] Figure 5 This is a diagram illustrating the semiconductor substrate 100 on which the switch control IC 20 is formed. Additionally, for convenience, Figure 5 Only the portion of the circuitry and terminals necessary to illustrate the "leakage current" of the switch control IC20 is shown in the diagram. Specifically, in Figure 5 The diagram shows the NMOS transistor 70 of terminals GND, S and high-side drive circuit 45.

[0064] The semiconductor substrate 100 is, for example, a p-type substrate formed of silicon, and has a gate electrode 110, a source electrode 111, a drain electrode 112, and a substrate electrode 113 of a NMOS transistor 70 with terminals GND, S, and NMOS formed on its front side.

[0065] Here, the terminals GND, S, and the electrodes of the NMOS transistor 70 are formed from conductive materials such as polysilicon or metal electrodes.

[0066] In addition, Figure 3 and Figure 5 For convenience, different labels have been added to the electrodes of the NMOS transistor 70. However, the gate electrode 110 of the NMOS transistor 70 is equivalent to "gate electrode Gx", the source electrode 111 is equivalent to "source electrode Sx", the drain electrode 112 is equivalent to "drain electrode Dx", and the substrate electrode 113 is equivalent to "substrate electrode Bx".

[0067] Inside the semiconductor substrate 100, a semiconductor region 120, a p-type well region 140, an n-type well region 130, p+ type contact regions 150, 160, and 161, an n+ type source region 170, and an n+ type drain region 171 are formed. Furthermore, when referred to as n+ type or p+ type below, this means that the doping concentration is higher than that of n-type or p-type.

[0068] A well region 130 and a contact region 150 are formed on the surface side within the semiconductor region 120. Then, a terminal GND is formed on the surface of the contact region 150.

[0069] The trap region 130 is a region containing n-type impurities such as phosphorus, and the p-type trap region 140 is formed on the surface side within the trap region 130.

[0070] The well region 140 is a region containing p-type impurities, and contact regions 160, 161, source region 170 and drain region 171 are formed on the surface side within the well region 140.

[0071] Terminal S is formed in contact region 160, and substrate electrode 113 (“Bx”) of NMOS transistor 70 is formed in contact region 161.

[0072] Furthermore, a source electrode 111 (“Sx”) is formed in the source region 170, and a drain electrode 112 (“Dx”) is formed in the drain region 171. A gate electrode 110 (“Gx”) is formed on the surface side of the well region 140 between the source region 170 and the drain region 171.

[0073] Furthermore, in this embodiment, terminal GND (equivalent to the first terminal) is electrically connected to semiconductor region 120 via contact region 150, terminal S (equivalent to the second terminal) is electrically connected to well region 140 via contact region 160, and substrate electrode 113 (“Bx”) is also electrically connected to well region 140 via contact region 161.

[0074] In such a semiconductor substrate 100, diode 190 is formed as a parasitic diode between p-type semiconductor region 120 and n-type well region 130. In addition, diode 191 is formed as a parasitic diode between p-type well region 140 and n+ type source region 170.

[0075] Therefore, for example, when IGBT 31 is turned on, as the voltage Vs drops from Vgnd (“0V”) to a negative voltage, the source electrode 111 (“Sx”) of the NMOS transistor 70 connected to terminal S also becomes negative. As a result, diodes 190 and 191 conduct, and “leakage current” flows through… Figure 5 The dotted line indicates the path from terminal GND to terminal S.

[0076] When such "leakage current" flows from terminal GND to terminal S, for example... Figure 1 As shown, the current flowing to the signal output circuit 42, which is connected to the terminal GND and uses voltage Vgnd as the ground voltage, also increases. As a result, the power supply voltage Vreg drops significantly, and the signal output circuit 42 sometimes fails to function properly.

[0077] Therefore, in this embodiment, a power supply circuit 40 is used so that the signal output circuit 42 should operate stably when the voltage Vs becomes a negative voltage.

[0078] Furthermore, in this embodiment, semiconductor region 120 corresponds to the "first region," and well region 130 corresponds to the "second region." Additionally, well region 140 corresponds to the "third region," and source region 170 corresponds to the "fourth region." Moreover, although the path of "leakage current" is illustrated here using NMOS transistor 70 as an example, other components of the drive circuit 45 (e.g., NMOS transistor 72) also generate "leakage current" in the same way.

[0079] <<<An Example of a Power Supply Circuit 40a>>>

[0080] Figure 6 This is a diagram showing one embodiment of a power supply circuit 40a as a power supply circuit 40. The power supply circuit 40a is a circuit that generates a temperature-compensated power supply voltage Vreg1 (e.g., "5V") based on the power supply voltage Vcc. The power supply circuit 40a is configured to include a bias circuit 200 and an output circuit 201.

[0081] The bias circuit 200 is a circuit that generates a bias voltage V3 for operating a Darlington-connected transistor (described later). The bias circuit 200 is configured to include voltage generation circuits 210 and 211.

[0082] The voltage generation circuit 210 is a circuit used to generate a voltage V1 of a specified level, and is configured to include a resistor 220, five diodes D1 to D5, and a Zener diode 221. Furthermore, the voltage generation circuit 210 is equivalent to a "first voltage generation circuit".

[0083] Resistor 220, diodes D1 to D5 and Zener diode 221 are connected in series. Therefore, when power supply Vcc is applied to one end of resistor 220, the voltage V1 at the node connecting the other end of resistor 220 and the anode of diode D1 is expressed by the following equation (1).

[0084] V1=Vz+5×Vf···(1)

[0085] Additionally, here, "Vz" is the breakdown voltage of Zener diode 221, and "Vf" is the forward voltage of diodes D1 to D5.

[0086] The voltage generation circuit 211 is used to generate a bias voltage V3 based on voltage V1, and is configured to include an NPN transistor 230, resistors 231 and 232, and three diodes D6 to D8. Furthermore, the voltage generation circuit 211 is equivalent to a "second voltage generation circuit".

[0087] In the NPN transistor 230, voltage V1 is applied to the base electrode, and diodes D6 to D8 are connected to the emitter electrode via resistors 231 and 232. Therefore, voltage V2, represented by equation (2), is output from the emitter electrode of the NPN transistor 230.

[0088] V2=V1-Vbe=Vz+5×Vf-Vbe···(2)

[0089] Additionally, here, "Vbe" is the base-emitter voltage of the NPN transistor 230. Furthermore, in the voltage generation circuit 211, the voltage difference between the forward voltage "3×Vf" of the three diodes D6 to D8 and the voltage V2 is divided by a voltage divider circuit composed of resistors 231 and 232. Therefore, the bias voltage V3 from the node connected to resistors 231 and 232 is represented by the following equation (3).

[0090] V3=3×Vf+(V2-3×Vf)×(R2 / (R1+R2))

[0091] =3×Vf+(Vz+2×Vf-Vbe)×(R2 / (R1+R2))···(3)

[0092] Additionally, here, "R1" is the resistance value of resistor 231, and "R2" is the resistance value of resistor 232.

[0093] The output circuit 201 is a circuit for outputting a specified power supply voltage Vreg1 based on the bias voltage V3, and is configured to include a withstand voltage circuit 240, NPN transistors 241 and 242 and a resistor 243.

[0094] The withstand voltage circuit 240 is a circuit used to protect NPN transistors 241 and 242 from overvoltage, and includes four diodes D9 to D12 connected in series.

[0095] The emitter electrode of NPN transistor 241 is connected to the base electrode of NPN transistor 242, and the collector electrode of NPN transistor 241 is connected to the collector electrode of NPN transistor 242. Therefore, NPN transistors 241 and 242 in this embodiment are connected in a Darlington configuration, thus enabling the driving of larger loads.

[0096] Furthermore, as described above, since voltage V3 is applied to the base electrode of the first-stage NPN transistor 241, the power supply voltage Vreg1 shown in equation (4) is output from the emitter electrode of the NPN transistor 242.

[0097] Vreg1 = V3 - 2 × Vbe

[0098] =(3×Vf+(Vz+2×Vf-Vbe)×(R2 / (R1+R2))-2×Vbe···(4)

[0099] Resistor 243 is a component used to generate the power supply voltage Vreg1 at a fixed location. Specifically, when resistor 243 is not set, and the load state of power supply circuit 40a becomes unloaded, the current flowing through NPN transistors 241 and 242 becomes zero. Therefore, the generation of power supply voltage Vreg1 stops.

[0100] Therefore, in this situation, when current flows through the load of power supply circuit 40a, it takes time until power supply circuit 40a generates power supply voltage Vreg1.

[0101] In this embodiment, even if the load state of the power supply circuit 40a is no-load, the current continues to flow through the resistor 243. Therefore, the power supply circuit 40a can generate a fixed power supply voltage Vreg1 regardless of the load state of the power supply circuit 40a.

[0102] Furthermore, the breakdown voltage "Vz" of Zener diode 221 has a positive temperature coefficient, while the forward voltage "Vf" of diodes D1 to D12 has a negative temperature coefficient. Additionally, the base-emitter voltage "Vbe" has a negative temperature coefficient.

[0103] Furthermore, in this embodiment, resistors 231 and 232 are of the same type and have the same temperature coefficient (e.g., polysilicon). Therefore, the temperature coefficient of the term “R2 / (R1+R2)” in equation (4) is almost negligible.

[0104] Furthermore, in this embodiment, for example, the number of diodes D1 to D12 is adjusted based on equation (4) so ​​that the power supply voltage Vreg1 is temperature-compensated. As a result, the level of the power supply voltage Vreg1 becomes constant and independent of temperature. Additionally, in this embodiment, the power supply voltage Vreg1 can be set to a desired level by changing the resistance ratio of resistors 231 and 232.

[0105] Thus, since the power supply circuit 40a includes NPN transistors 241 and 242 connected in a Darlington configuration, it has a high output current capacity. In addition, the power supply circuit 40a can output a regulated power supply voltage Vreg1 (e.g., "5V") after temperature compensation.

[0106] <<<An example of the power supply circuit 40b>>>

[0107] Figure 7 FIG. shows an example of the power supply circuit 40b which is another embodiment of the structure of the power supply circuit 40. Here, in the power supply circuit 40b, the output current capacity of the power supply circuit 40b is smaller than that of the power supply circuit 40a. The power supply circuit 40b is configured to include an NMOS transistor 410 and a current source 411.

[0108] Since the NMOS transistor 410 and the current source 411 form a source follower, a power supply voltage Vreg2 corresponding to the bias voltage Vbias applied to the gate electrode of the NMOS transistor 410 is output from the source electrode of the NMOS transistor 410.

[0109] <<<An example of the waveform when the IGBT 31 is on>>>

[0110] Figure 8 FIG. shows the comparison result when the power supply circuit 40a or the power supply circuit 40b is used in the switch control IC 20.

[0111] <<<Case of using the power supply circuit 40a>>>

[0112] First, the change in the power supply voltage Vreg1 when the switch control IC 20 uses the power supply circuit 40a will be described.

[0113] When the switch control IC 20 operates and, for example, the low-side IGBT 31 is turned on at time ta, as described above, the voltage Vs becomes a negative voltage. As a result, due to the "leakage current" flowing from Figure 1 the terminal GND to the terminal S, the current flowing through the signal output circuit 42 increases. Among them, as described above, the power supply circuit 40a includes NPN transistors 241 and 242 connected in a Darlington configuration. Therefore, the power supply circuit 40a can output a large current while generating the target-level power supply voltage Vreg1.

[0114] As a result, as shown by the solid line in Figure 8 , the power supply circuit 40a can prevent the power supply voltage Vreg1 from dropping significantly, and thus can stabilize the operation of the switch control IC 20.

[0115] <<<Case of using the power supply circuit 40b>>>

[0116] Next, the change in power supply voltage Vreg2 when the switch control IC20 uses the power supply circuit 40b will be explained. Here, the switch control IC20 using the power supply circuit 40b operates, and the low-side IGBT 31 is turned on at the aforementioned time ta.

[0117] If IGBT31 is turned on, the current flowing through the signal output circuit 42 increases because the leakage current flows from terminal GND to terminal S.

[0118] Compared to power supply circuit 40a, power supply circuit 40b has poorer output stability. Therefore, when the current flowing through signal output circuit 42 increases, such as... Figure 8 As shown by the dotted line, the power supply voltage Vreg2 of the power supply circuit 40b drops significantly. Then, based on the level of the power supply voltage Vreg2, the signal output circuit 42 malfunctions, for example, by outputting a set pulse signal S1 at an incorrect timing.

[0119] Therefore, in the switch control IC20 where the voltage Vs becomes negative and "leakage current" flows through the semiconductor region 120 to the terminal S, a power supply circuit 40a with excellent output stability is preferably used. Then, the operation of the switch control IC20 can be stabilized by using the power supply circuit 40a.

[0120] <<<An Example of Power Supply Circuit 40c>>>

[0121] Figure 9 This diagram shows a power supply circuit 40c, which is one embodiment of the structure of the power supply circuit 40. Similar to power supply circuit 40a, power supply circuit 40c is a circuit that generates a temperature-compensated power supply voltage Vreg3 (e.g., "5V") based on the power supply Vcc. Power supply circuit 40c is configured to include a bias circuit 500 and an output circuit 501. Furthermore, in Figure 6 and Figure 9 In this context, components with the same designation are identical.

[0122] The bias circuit 500 is a circuit that outputs a voltage to activate the output circuit 501, which includes NPN transistors 241 and 242 connected in a Darlington configuration. The bias circuit 500 is configured to include voltage generation circuits 510 and 511.

[0123] The voltage generation circuit 510 is used to generate voltages V10 and V11 at specified levels, and is configured to include resistors 520 and 521, four diodes D1 to D4, and a Zener diode 221. Furthermore, the voltage generation circuit 510 is equivalent to a "first voltage generation circuit".

[0124] Resistors 520 and 521, diodes D1 to D5, and Zener diode 221 are connected in series. Therefore, when power supply Vcc is applied to one end of resistor 520, the current I flowing through resistors 520 and 521 is represented by the following equation (5).

[0125] I=(Vcc-(Vz+4×Vf)) / (R10+R11)···(5)

[0126] In addition, here, "R10" is the resistance value of resistor 520 and "R11" is the resistance value of resistor 521. Therefore, the voltage V10 of the node connecting resistors 520 and 521 is represented by equation (6).

[0127] V10=Vcc-R10×I···(6)

[0128] Furthermore, the voltage V11 at the node connecting resistor 521 and diode D1 is represented by equation (7).

[0129] V11=Vz+4×Vf···(7)

[0130] However, although the voltage generation circuit 510 of this embodiment includes four diodes D1 to D4, the voltage level V11 exceeds the power supply Vcc level when the number of diodes is increased. Therefore, in the voltage generation circuit 510, it is necessary to adjust the number of diodes so that the voltage level V11 becomes less than the voltage level Vcc.

[0131] Voltage generation circuit 511 generates voltages V12 and V14 to operate output circuit 501. Voltage generation circuit 511 is configured to include NPN transistors 530 and 531, resistors 231 and 232, and three diodes D6 to D8. In addition, voltage generation circuit 511 is equivalent to a "second voltage generation circuit".

[0132] In NPN transistor 530, voltage V10 is applied to the base electrode, and NPN transistor 531 is connected to the emitter electrode. Therefore, NPN transistor 530 operates as an emitter follower. Therefore, voltage V12, represented by equation (8), is output from the emitter electrode of NPN transistor 530. Furthermore, the base-emitter voltage of NPN transistors 530 and 531 is hereinafter referred to as "Vbe".

[0133] V12 = V10 - Vbe···(8)

[0134] Furthermore, since voltage V11 is applied to the base electrode in NPN transistor 531, and diodes D6 to D8 are connected to the emitter electrode via resistors 231 and 232, NPN transistor 531 also functions as an emitter follower. Therefore, voltage V13 is output from the emitter electrode of NPN transistor 531 as expressed by equation (9).

[0135] V13=V11-Vbe=Vz+4×Vf-Vbe···(9)

[0136] Furthermore, in the voltage generation circuit 511, the voltage difference between the forward voltage "3×Vf" of the three diodes D6 to D8 and the voltage V13 is divided by a voltage divider circuit composed of resistors 231 and 232. Therefore, the bias voltage V14 from the node connected to resistors 231 and 232 is represented by the following equation (10).

[0137] V14=3×Vf+(V13-3×Vf)×(R2 / (R1+R2))

[0138] =3×Vf+(Vz+Vf-Vbe)×(R2 / (R1+R2))···(10)

[0139] In addition, NPN transistor 530 is equivalent to a "second transistor", and NPN transistor 531 is equivalent to a "third transistor".

[0140] In addition, although the voltage generation circuit 510 has four diodes, when the number of diodes decreases, the voltages V10 and V11 decrease. As a result, the collector-emitter voltage Vce1 of NPN transistor 530 and the collector-emitter voltage Vce2 of NPN transistor 531 increase.

[0141] In addition, the number (x) of diodes in the voltage generation circuit 510 must meet the following condition so that voltages Vce1 and Vce2 do not exceed their respective withstand voltages.

[0142] Vcc≦Vz+x×Vf+(Vce1m+Vce2m)-Vbe···(11)

[0143] Here, in equation (11), the voltages Vce1m and Vce2m represent the withstand voltages of voltages Vce1 and Vce2, respectively.

[0144] The output circuit 501 is a circuit for outputting a specified power supply voltage Vreg3 based on the bias voltage V14, and is configured to include a withstand voltage circuit 540, NPN transistors 241 and 242 and a resistor 243.

[0145] The withstand voltage circuit 540 is used to protect NPN transistors 241 and 242 from overvoltage and includes an NPN transistor 550 and two diodes D9 and D10 connected in series. In the NPN transistor 550, voltage V12 is applied to the base electrode, and diodes D9 and D10 are connected to the emitter electrode. Therefore, the NPN transistor 550 operates as an emitter follower. Additionally, the NPN transistor 550 is equivalent to the "first transistor".

[0146] The structure of NPN transistors 241, 242 and resistor 243 connected in a Darlington configuration is similar to Figure 6 Similarly, it can drive large loads. In addition, as mentioned above, since voltage V14 is applied to the base electrode of the first-stage NPN transistor 241, the power supply voltage Vreg3 shown in equation (12) is output from the emitter electrode of the NPN transistor 242.

[0147] Vreg3=V14-2×Vbe=(3×Vf+(Vz+Vf-Vbe)×(R2 / (R1+R2)))-2×Vbe···(12)

[0148] Furthermore, since resistor 243 is a component used to stably generate the power supply voltage Vreg3, power supply circuit 40c, like power supply circuit 40a, can consistently generate the specified power supply voltage Vreg3, regardless of the state of the load.

[0149] In this embodiment, for example, the number of diodes D1 to D4 and D6 to D8 is adjusted based on equation (12) so that the power supply voltage Vreg3 is temperature-compensated. As a result, the level of the power supply voltage Vreg3 becomes constant and independent of temperature. Furthermore, for example, by changing the resistance ratio of resistors 231 and 232, the power supply voltage Vreg3 can be set to a desired level.

[0150] Thus, since power supply circuit 40c, like power supply circuit 40a, contains NPN transistors 241 and 242 connected in a Darlington manner, it has a high output current capability and can output a temperature-compensated power supply voltage Vreg3 (e.g., "5V").

[0151] Furthermore, when the withstand voltage between the emitter and collector of the NPN transistor 550 is set to Vce3m, the withstand voltage between the emitter and collector of the NPN transistor 242 is set to Vce4m, and the number of diodes included in the withstand voltage circuit 540 is set to y, the following conditions need to be met in this embodiment.

[0152] Vcc≦Vf×y+Vce3m+Vce4m+Vreg3···(13)

[0153] Thus, in this embodiment, for example, by adjusting the number of diodes in the withstand voltage circuit 540, the NPN transistors 241 and 242 connected in a Darlington configuration can be properly protected even when the power supply Vcc level is high.

[0154] ===Summary===

[0155] The power module 10 of this embodiment has been described above. The power supply circuit 40a of the switch control IC 20 includes two NPN transistors 241 and 242 connected in a Darlington configuration. Therefore, the switch control IC 20 can operate stably even when the voltage Vs becomes negative.

[0156] Furthermore, the switch control IC20 is formed, for example, in Figure 5 On the semiconductor substrate 100 shown. Thus, in such a semiconductor substrate 100, when the voltage Vs becomes a negative voltage, diodes 190 and 191 conduct, thereby generating a "leakage current". However, since the power supply circuit 40a has high output stability, even when a "leakage current" is generated and the current of the signal output circuit 42 increases, the signal output circuit 42 can still operate stably.

[0157] In addition, for example, leakage current is generated by the NMOS transistor 70 of the high-side drive circuit 45.

[0158] Furthermore, since the current corresponding to the power supply voltage Vreg1 flows through the resistor 243, the power supply circuit 40a can generate a stable power supply voltage Vreg1, regardless of the state of the load on the power supply circuit 40a.

[0159] Furthermore, a withstand voltage circuit 240 is provided on the power supply side of the NPN transistors 241 and 242, which are connected in a Darlington configuration. Therefore, even when the power supply voltage Vcc is as high as, for example, "20V", low-voltage NPN transistors 241 and 242 can be used.

[0160] Furthermore, the withstand voltage circuit 240 includes n (here, n = 4) diodes D9 to D12. Thus, by using multiple diodes connected in series, the NPN transistors 241 and 242 can be properly protected from overvoltage.

[0161] In addition, the withstand voltage circuit 540 includes an NPN transistor 550 connected in series with two diodes D9 and D10. By using this circuit structure, the NPN transistors 241 and 242 can be properly protected from overvoltage.

[0162] Furthermore, the bias circuit 200 applies a bias voltage V3 to the base electrode of the NPN transistor 241 to compensate for temperature variations in the power supply voltage Vreg1. This improves the temperature characteristics of the power supply voltage Vreg1.

[0163] In addition, for temperature compensation of the power supply voltage Vreg1, the bias circuit 200 includes, for example, a Zener diode 221 with a positive temperature coefficient and m diodes D1 to D5 with negative temperature coefficients (here, m = 5).

[0164] Furthermore, since the voltage generation circuit 511 includes NPN transistors 530 and 531 connected in series, it can generate voltages V12 and V14 of different levels. Here, voltage V12 is used to operate the NPN transistor 550, which is used to protect the transistors connected in a Darlington configuration. Furthermore, voltage V14 is used to operate the first-stage NPN transistor 241 of the two-stage Darlington-connected transistors.

[0165] Furthermore, the voltage generation circuit 211 can shift the level of voltage V1 to the desired voltage V3 by using an NPN transistor 230, i diodes (here, i = 3) D6 to D8, and a voltage divider resistor circuit composed of resistors 231 and 232. Therefore, in this embodiment, the level of the power supply voltage Vreg1 can be easily adjusted.

[0166] Furthermore, even when using a circuit containing NPN transistors 530 and 531 connected in series, the voltage generation circuit 511 can adjust the level of voltage V14. Even when using such a circuit, the power supply circuit 40c can output the desired power supply voltage Vreg3.

[0167] In addition, in the switch control IC20, the low-side drive circuit 44 controls the switching of the IGBT31.

[0168] Furthermore, although each of the two stages of transistors connected in a Darlington configuration is designated as an NPN transistor 241, 242 in this embodiment, a PNP transistor could also be used, for example. Additionally, the power supply circuit 40a could achieve the same effect as this embodiment even if it included a structure with three or more stages of transistors connected in a Darlington configuration.

[0169] The above-described embodiments are provided for ease of understanding of the present invention and are not intended to limit or explain the present invention. Furthermore, the present invention can be modified or improved without departing from its spirit, and its equivalents are naturally included within the present invention.

[0170] Label Explanation

[0171] 10 Power Modules

[0172] 20 Switch Control ICs

[0173] 21 Half-bridge circuit

[0174] 22 Capacitors

[0175] 30, 31 IGBT

[0176] 40 and 400 power supply circuits

[0177] 41 Charge Pump Circuit

[0178] 42 Signal Output Circuit

[0179] 43 Level shifting circuit

[0180] 44, 45 drive circuits

[0181] 50 Input Detection Circuit

[0182] 51 Filter Circuit

[0183] 52 Pulse Generation Circuit

[0184] 60 Logic Circuits

[0185] Inverters 61 and 62

[0186] 70, 72, 410 NMOS transistors

[0187] 71, 73 PMOS transistors

[0188] 100 Semiconductor substrate

[0189] 110 Gate electrode

[0190] 111 Source Electrode

[0191] 112 Drain electrode

[0192] 113 Substrate Electrode

[0193] 120 Semiconductor Region

[0194] 130, 140 well regions

[0195] Contact areas 150, 160, and 161

[0196] 170 Source Region

[0197] 171 Drain Region

[0198] Diodes 190 and 191

[0199] 200, 500 bias circuits

[0200] 201, 501 output current

[0201] 210, 211, 510, 511 voltage generation circuits

[0202] 220, 231, 232, 243, 520, 521 resistors

[0203] 221 Zener diode

[0204] 230, 241, 242, 530, 531, 550 NPN transistors

[0205] 240V and 540V withstand voltage circuits

[0206] 411 Current Source

[0207] D1 to D12 are diodes.

Claims

1. A switch control circuit that controls the switching of a first switching element on a power supply side and a second switching element on a ground side that drives a load together with the first switching element, characterized in that it comprises: The terminal to which the power supply voltage of the switch control circuit is applied; A signal output circuit that outputs a set signal for turning on the first switching element and a reset signal for turning off the first switching element based on the input signal. A level shifting circuit that shifts the levels of the set signal and the reset signal respectively; A first driving circuit drives the first switching element based on the output from the level shifting circuit; as well as A power supply circuit includes a plurality of transistors connected in a Darlington configuration for generating the power supply voltage for the signal output circuit. The power supply circuit includes: A withstand voltage circuit, wherein the withstand voltage circuit is connected in series with the plurality of transistors between the terminals and the high-potential side of the plurality of transistors; and A bias circuit applies a second bias voltage, used to compensate for temperature variations in the power supply voltage of the signal output circuit, to the base electrode of the first-stage transistor among the plurality of transistors. The withstand voltage circuit includes n diodes connected in series with the terminal side as the anode, which protect the plurality of transistors from overvoltage, where n is a variable. The bias circuit includes: A first voltage generating circuit, comprising m diodes connected in series, generates a voltage of a predetermined level, where m is a variable; and A second voltage generation circuit, comprising i diodes connected in series, applies a second bias voltage to the base electrode of the first-stage transistor based on the predetermined voltage level, where i is a variable. The number of n diodes, the number of m diodes, and the number of i diodes are determined such that the power supply voltage of the signal output circuit is temperature compensated.

2. The switch control circuit as described in claim 1, characterized in that, The switch control circuit is an integrated circuit formed on a semiconductor substrate, the semiconductor substrate having at least a p-type first region, an n-type second region formed in the first region, a p-type third region formed in the second region, and an n-type fourth region formed in the third region. The first terminal, serving as the reference for the signal output circuit, is electrically connected to the first region. The second terminal, which is connected to the first switching element and the second switching element and serves as a reference for the first drive circuit, is electrically connected to the fourth region.

3. The switch control circuit as described in claim 2, characterized in that, The source electrode of the first driving circuit is electrically connected to the fourth region, and the first driving circuit includes an NMOS transistor formed in the third region.

4. The switch control circuit as described in any one of claims 1 to 3, characterized in that, The power supply circuit has a resistance between the node in the plurality of transistors that generates the power supply voltage of the signal output circuit and ground.

5. The switching control circuit as described in any one of claims 1 to 3, characterized in that, The withstand voltage circuit includes a first transistor, to which a first bias voltage is applied, and the first transistor is connected in series with the high-potential side of the n diodes.

6. The switch control circuit as described in any one of claims 1 to 3, characterized in that, The second voltage generation circuit includes a voltage divider resistor circuit, which is disposed between the node to which a voltage corresponding to the specified level voltage is applied and the i diodes, and generates a voltage corresponding to the difference between the specified level voltage and the forward voltage of the i diodes as the second bias voltage.

7. The switch control circuit as described in claim 1, characterized in that, The first voltage generation circuit includes a Zener diode connected in series with the m diodes.

8. The switch control circuit as described in claim 7, characterized in that, The withstand voltage circuit includes a first transistor, to which a first bias voltage is applied, and the first transistor is connected in series with the high-potential side of the n diodes. The second voltage generation circuit includes: A second transistor outputs a voltage to the base electrode of the first transistor to enable the first transistor to operate; and A third transistor is disposed on the ground side of the second transistor and outputs a voltage to the base electrode of the first-stage transistor to enable the first-stage transistor to operate.

9. The switch control circuit as described in claim 7, characterized in that, The second voltage generation circuit includes a voltage divider resistor circuit, which is disposed between the node to which a voltage corresponding to the specified level voltage is applied and the i diodes, and generates a voltage corresponding to the difference between the specified level voltage and the forward voltage of the i diodes as the second bias voltage.

10. The switching control circuit as described in any one of claims 1 to 3, characterized in that, The system includes a second driving circuit that drives the second switching element based on a control signal for controlling the switching of the second switching element. The signal output circuit outputs the control signal based on the input signal.

11. The switching control circuit as described in any one of claims 1 to 3, characterized in that, The plurality of transistors are NPN transistors.

12. A semiconductor device comprising a first switching element on a power supply side, a second switching element on a ground side that drives a load together with the first switching element, and a switch control circuit for controlling the switching of the first switching element and the second switching element, characterized in that... The switch control circuit includes: The terminal to which the power supply voltage of the switch control circuit is applied; A signal output circuit that outputs a set signal for turning on the first switching element and a reset signal for turning off the first switching element based on the input signal. A level shifting circuit that shifts the levels of the set signal and the reset signal respectively; A first driving circuit that drives the first switching element based on an output from the level shifting circuit; and A power supply circuit includes a plurality of transistors connected in a Darlington configuration for generating the power supply voltage for the signal output circuit. The power supply circuit includes: A withstand voltage circuit, wherein the withstand voltage circuit is connected in series with the plurality of transistors between the terminals and the high-potential side of the plurality of transistors; and A bias circuit applies a second bias voltage, used to compensate for temperature variations in the power supply voltage of the signal output circuit, to the base electrode of the first-stage transistor among the plurality of transistors. The withstand voltage circuit includes n diodes connected in series with the terminal side as the anode, which protect the plurality of transistors from overvoltage, where n is a variable. The bias circuit includes: A first voltage generating circuit, comprising m diodes connected in series, generates a voltage of a predetermined level, where m is a variable; and A second voltage generation circuit, comprising i diodes connected in series, applies a second bias voltage to the base electrode of the first-stage transistor based on the predetermined voltage level, where i is a variable. The number of n diodes, the number of m diodes, and the number of i diodes are determined such that the power supply voltage of the signal output circuit is temperature compensated.

13. The semiconductor device as claimed in claim 12, characterized in that, The withstand voltage circuit includes a first transistor, to which a first bias voltage is applied, and the first transistor is connected in series with the high-potential side of the n diodes.

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