Program running method and device

Abstract

The embodiments of the present application provide a program running method and device. The method can obtain the instruction block where the target instruction is located by calling relevant instructions, and load the instruction block where the target instruction is located into the instruction storage unit as the target instruction block to execute the target instruction, thereby realizing, at the software level, the ability to run a program larger than the storage space of the instruction storage unit.

Description

Technical Field

[0001] This application relates to the technical field of processors, and in particular, to a program running method and apparatus. Background Art

[0002] With the development of science and technology, the functions supported by terminal devices are becoming more and more powerful, and the programs processed by the processors in the terminal devices are also becoming more and more complex. However, the storage space of the existing instruction storage unit is limited. For example, a general instruction storage unit can store 1024 instructions, but for some functions with relatively high complexity, the storage space occupied by the instructions that need to be run is usually greater than the storage space of the instruction storage unit. Therefore, a mechanism is needed to ensure that a program larger than the size of the instruction storage unit can run normally on the instruction storage unit. Usually, the hardware provides some mechanisms to ensure the normal operation of the program, but when the hardware does not provide relevant mechanisms, a program larger than the storage space of the instruction storage unit cannot run.

[0003] Application Content

[0004] The embodiments of this application provide a program running method and apparatus, which can realize running a program larger than the storage space of the instruction storage unit on hardware without an instruction exchange mechanism.

[0005] In a first aspect, the embodiments of this application provide a program running method, and the method includes:

[0006] Obtain an instruction set from a memory, where the instruction set includes at least one instruction block, and the instruction block includes at least one instruction;

[0007] Load a target instruction block into an instruction storage unit to execute the target instruction block in the instruction storage unit;

[0008] If the target instruction to be executed is not in the target instruction block, call a relevant instruction to obtain the instruction block where the target instruction is located, and load the instruction block where the target instruction is located as the target instruction block into the instruction storage unit to execute the target instruction.

[0009] In a possible embodiment, the target instruction block further includes a parameter passing instruction, and the parameter passing instruction is the last instruction of the target instruction block;

[0010] The parameter passing instruction is used to transfer the target address of the target instruction to the relevant instruction.

[0011] In a possible embodiment, the target instruction block includes the relevant instruction, and the relevant instruction is placed at the end of the target instruction block.

[0012] In a possible embodiment, the instruction storage unit includes a first storage unit and a second storage unit, and the first storage unit is used to store the target instruction block;

[0013] When the target instruction to be executed is not in the target instruction block, the obtaining of the instruction block where the target instruction is located by calling the relevant instruction includes:

[0014] When the target instruction to be executed is not in the target instruction block, then call the relevant instruction from the second storage unit to obtain the instruction block where the target instruction is located, and load the instruction block where the target instruction is located into the first storage unit as the target instruction block.

[0015] In a possible embodiment, before loading the target instruction block into the instruction storage unit, when the instruction block contains a long jump instruction, the method further includes:

[0016] If there is a null instruction after the long jump instruction, replace the null instruction with the parameter passing instruction;

[0017] If there is no null instruction after the long jump instruction, insert the parameter passing instruction before or after the long jump instruction.

[0018] In a possible embodiment, the method further includes:

[0019] When a parameter passing instruction or a relevant instruction is inserted into the instruction set, update the instruction set and the PC values of the instructions in the instruction set;

[0020] Determine the number of instruction blocks according to the updated instruction set.

[0021] In a possible embodiment, the obtaining of the instruction block where the target instruction is located by calling the relevant instruction includes:

[0022] Call the relevant instruction to determine the target address of the target instruction;

[0023] Determine the instruction block where the target instruction is located according to the target address of the target instruction.

[0024] Further, the determining of the instruction block where the target instruction is located according to the target address of the target instruction further includes:

[0025] According to the target address of the target instruction, determine the start address of the instruction block where the target instruction is located and the instruction block where the target instruction block is located.

[0026] In a possible embodiment, the loading of the instruction block where the target instruction is located into the instruction storage unit to execute the target instruction includes:

[0027] Determine the current position of the target instruction in the target instruction block through the relevant instructions;

[0028] After loading the instruction block where the target instruction is located into the instruction storage unit as the target instruction block, execute the target instruction block starting from the current position of the target instruction.

[0029] In a second aspect, an embodiment of the present application provides a program running device, and the device includes:

[0030] An acquisition module, configured to acquire an instruction set from a memory, where the instruction set includes at least one instruction block, and the instruction block includes at least one instruction;

[0031] A loading module, configured to load a target instruction block into an instruction storage unit to execute the target instruction block in the instruction storage unit;

[0032] A calling module, configured to, when a target instruction to be executed is not in the target instruction block, call relevant instructions to obtain the instruction block where the target instruction is located, and load the instruction block where the target instruction is located into the instruction storage unit as the target instruction block to execute the target instruction.

[0033] In a possible embodiment, the target instruction block further includes a parameter passing instruction, and the parameter passing instruction is the last instruction of the target instruction block;

[0034] The parameter passing instruction is used to transfer the target address of the target instruction to the relevant instruction.

[0035] In a possible embodiment, the target instruction block includes the relevant instruction, and the relevant instruction is placed at the end of the target instruction block.

[0036] In a possible embodiment, the instruction storage unit includes a first storage unit and a second storage unit, and the first storage unit is used to store the target instruction block;

[0037] When a target instruction to be executed is not in the target instruction block, the calling relevant instructions to obtain the instruction block where the target instruction is located includes:

[0038] When a target instruction to be executed is not in the target instruction block, call relevant instructions from the second storage unit to obtain the instruction block where the target instruction is located, and load the instruction block where the target instruction is located into the first storage unit as the target instruction block.

[0039] In a possible embodiment, before loading the target instruction block into the instruction storage unit, when the instruction block contains a long jump instruction, the device further includes:

[0040] A replacement module, configured to replace the no-operation instruction with the parameter-passing instruction if there is a no-operation instruction after the long jump instruction;

[0041] An insertion module, configured to insert the parameter-passing instruction before or after the long jump instruction if there is no no-operation instruction after the long jump instruction.

[0042] In a possible embodiment, the program running device further includes:

[0043] An update module, configured to update the instruction set and the PC values of the instructions in the instruction set when a parameter-passing instruction or a related instruction is inserted into the instruction set;

[0044] A determination module, configured to determine the number of instruction blocks according to the updated instruction set.

[0045] In a possible embodiment, the calling module is further configured to execute:

[0046] Call the related instruction to obtain the target address of the target instruction;

[0047] Determine the instruction block where the target instruction is located according to the target address of the target instruction.

[0048] Further, the calling module is further configured to execute:

[0049] Determine the start address of the instruction block where the target instruction is located and the instruction block where the target instruction block is located according to the target address of the target instruction.

[0050] In a possible embodiment, the calling module is further configured to execute:

[0051] Determine the current position of the target instruction in the target instruction block through the related instruction;

[0052] After loading the instruction block where the target instruction is located into the instruction storage unit as the target instruction block, execute the target instruction block starting from the current position of the target instruction.

[0053] In a third aspect, an embodiment of the present application provides a computer device, which includes a memory and a processor. A computer program that can run on the processor is stored in the memory. When the processor executes the computer program, some or all of the steps described in the first aspect of the embodiment of the present application are implemented.

[0054] Fourthly, an embodiment of the present application provides a computer-readable storage medium, which includes a computer program stored for data exchange. When the computer program is executed by a processor, it implements some or all of the steps described in the first aspect of the embodiment of the present application.

[0055] Fifthly, an embodiment of the present application provides a computer program product. The computer program product includes a non-transitory computer-readable storage medium storing a computer program. The computer program is operable to cause a computer to execute some or all of the steps described in the first aspect of the embodiment of the present application. The computer program product may be a software installation package.

[0056] Implementing the embodiments of the present application has at least the following beneficial effects:

[0057] An embodiment of the present application provides a program running method and apparatus. By obtaining an instruction set from a memory, loading a target instruction block into an instruction storage unit, and when a target instruction to be executed is not in the target instruction block, calling a relevant instruction to obtain the instruction block where the target instruction is located, and loading the instruction block where the target instruction is located into the instruction storage unit as the target instruction block to execute the target instruction. This method can load the target instruction block into the instruction storage unit by calling relevant instructions to execute the target instruction, thereby realizing a program that can run larger than the storage space of the instruction storage unit at the software level. BRIEF DESCRIPTION OF THE DRAWINGS

[0058] In order to more clearly illustrate the technical solutions in the embodiments of the present application, the following will briefly introduce the drawings required in the embodiments. Obviously, the drawings in the following description are some embodiments of the present application. For those of ordinary skill in the art, other drawings can be obtained based on these drawings without creative efforts.

[0059] Figure 1 is a schematic structural diagram of a computer device provided by an embodiment of the present application;

[0060] Figure 2 is a schematic flowchart of a program running method provided by an embodiment of the present application;

[0061] Figure 3A is a schematic diagram of the storage space of an instruction storage unit provided by an embodiment of the present application;

[0062] Figure 3B is another schematic diagram of the storage space of an instruction storage unit provided by an embodiment of the present application;

[0063] Figure 4 is another schematic flowchart of a program running method provided by an embodiment of the present application;

[0064] Figure 5A It is a schematic diagram of comparing and updating jump instructions provided by an embodiment of the present application;

[0065] Figure 5B It is another schematic diagram of comparing and updating jump instructions provided by an embodiment of the present application;

[0066] Figure 6 It is a schematic flowchart of another program running method provided by an embodiment of the present application;

[0067] Figure 7 It is a schematic diagram of an original program provided by an embodiment of the present application;

[0068] Figure 8A It is a schematic diagram after the program is divided provided by an embodiment of the present application;

[0069] Figure 8B It is a schematic diagram after the program is updated provided by an embodiment of the present application;

[0070] Figure 8C It is a schematic diagram after the program is processed provided by an embodiment of the present application;

[0071] Figure 9A It is a block diagram of the functional units of a program running device provided by an embodiment of the present application;

[0072] Figure 9B It is a block diagram of the functional units of another program running device provided by an embodiment of the present application;

[0073] Figure 9C It is a block diagram of the functional units of another program running device provided by an embodiment of the present application. Detailed implementation manners

[0074] Next, the technical solutions in the embodiments of the present invention will be clearly and completely described in conjunction with the accompanying drawings in the embodiments of the present invention. Obviously, the described embodiments are some, but not all, of the embodiments of the present invention. All other embodiments obtained by those of ordinary skill in the art based on the embodiments of the present invention without creative efforts shall fall within the protection scope of the present invention.

[0075] Referring to "embodiment" herein means that a specific feature, structure, or characteristic described in connection with the embodiment can be included in at least one embodiment of the present invention. The phrase appearing in various places in the specification does not necessarily refer to the same embodiment, nor is it an independent or alternative embodiment mutually exclusive with other embodiments. Those skilled in the art will explicitly and implicitly understand that the embodiments described herein can be combined with other embodiments.

[0076] At present, the storage space of the existing instruction storage unit is limited. When the processor needs to run some functional programs with relatively high complexity, the storage space occupied by the program instructions for running the program may be greater than the storage space of the instruction storage unit. Therefore, a mechanism is needed to ensure that programs larger than the size of the instruction storage unit can run properly on the instruction storage unit. Usually, the hardware provides some mechanisms to ensure the normal operation of the program, but when the hardware does not provide relevant mechanisms, programs larger than the storage space of the instruction storage unit cannot run.

[0077] For this reason, the present application proposes a program running method. When the target instruction to be executed is not in the instruction storage unit, the instruction block of the target instruction can be loaded into the instruction storage unit by calling relevant instructions to execute the target instruction, so that the processor can run programs larger than the storage space of the instruction storage unit, thereby solving the problem that programs larger than the storage space of the instruction storage unit cannot run on hardware without an instruction exchange mechanism.

[0078] The following will describe the present application in detail with reference to specific embodiments.

[0079] Please refer to Figure 1 , Figure 1 , which is a schematic structural diagram of a computer device provided by an embodiment of the present application. As shown in Figure 1, the computer device includes a memory, an input device, an output device, and a processor. Among them, the computer device may further include a communication bus, and the processor, the input device, the output device, and the memory may be interconnected through the bus. Optionally, the above computer device may further include an instruction storage unit, and the instruction storage unit may be disposed adjacent to the processor. Further optionally, the instruction storage unit may be integrated with the processor, that is, the instruction storage unit may be an on-chip storage unit of the processor. In this way, when the processor needs to execute a program in the memory, the computer device first loads the program in the memory into the instruction storage unit, and then the processor can access the above instruction storage unit to execute the program in the instruction storage unit.

[0080] Among them, when the above processor is used to execute the program stored in the memory, the following steps are implemented:

[0081] Obtain an instruction set from the memory, where the instruction set includes at least one instruction block, and the instruction block includes at least one instruction; load the target instruction block into the instruction storage unit to execute the target instruction block in the instruction storage unit; if the target instruction to be executed is not in the target instruction block, call relevant instructions to obtain the instruction block where the target instruction is located, and use the instruction block where the target instruction is located as the target instruction block to be loaded into the instruction storage unit to execute the target instruction.

[0082] Further, the above-mentioned processor may be a Central Processing Unit (CPU), a Network Processor (NP), a Graphics Processing Unit (GPU), or an Image Processing Unit, and the present application does not make any limitation thereto. Depending on the type of the processor, the program running method provided by the embodiments of the present application can be applied to artificial intelligence application fields such as image recognition, deep learning, computer vision, intelligent robots, and natural language processing, and execute complex functional programs in the field of artificial intelligence.

[0083] Please refer to Figure 2 , Figure 2 which is a schematic flowchart of a program running method provided by an embodiment of the present application. This method is applied to a computer device as shown in Figure 1 . As shown in Figure 2 , the method includes the following steps:

[0084] S201. Obtain an instruction set from a memory. The instruction set includes at least one instruction block, and the instruction block includes at least one instruction.

[0085] In specific implementation, a program is composed of an instruction set including at least one instruction and data, and is stored in a memory. The instruction set can be divided into at least one instruction block according to the execution order of the program. After the division, the execution order of the instruction blocks is obtained, which is also called the instruction block execution trace. Among them, the instructions in the instruction set can be binary instructions or instructions written in a high-level language, etc., and no specific limitation is made here.

[0086] Generally, the storage space occupied by the instruction sequence in the instruction set is much larger than the storage space of the instruction storage unit. Therefore, when the storage space occupied by the instruction sequence in the instruction set is greater than the storage space of the instruction storage unit, the instruction sequence in the instruction set can be divided into multiple instruction blocks. Specifically, the instruction sequence in the instruction set can be divided into n instruction blocks according to a specified storage space less than or equal to the storage space of the instruction storage unit, or the instruction sequence in the instruction set can be divided into n instruction blocks according to a random storage space. Among them, the storage space occupied by each divided instruction block can be the same or different, and the embodiments of the present application do not make any limitation thereto.

[0087] Specifically, the execution order of the instruction blocks is executed according to the execution order of the program. The execution order of the divided instruction blocks is the same as the execution order of the program, that is, the execution trace of the instruction blocks is consistent with the execution order of the program. The execution order of the program refers to the execution order of the instructions in the program.

[0088] The number of instruction blocks divided by the instruction set in this application is at least one. That is to say, the instruction blocks can be divided into multiple instruction blocks, or the entire program can be regarded as one instruction block. For example, when the storage space required for the instruction set involved in the entire program is less than or equal to the storage space of the instruction storage unit, the entire program can be regarded as one instruction block. Each instruction block contains a certain number of instructions, and the number of instructions contained in each instruction block can be one or multiple. Generally, an instruction block contains at least one instruction, and at least one instruction is executed by the processor in a specific order.

[0089] S202. Load the target instruction block into the instruction storage unit to execute the target instruction block in the instruction storage unit.

[0090] Among them, the target instruction block is one of at least one instruction block. The instruction storage unit stores the target instruction block. The target instruction block can be an instruction block that is about to be executed after compilation. When the target instruction block is not in the instruction storage unit, the target instruction block is loaded into the instruction storage unit so that the processor can execute the instructions in the target instruction block.

[0091] Among them, the instruction storage unit is arranged close to the processor, and the memory is arranged farther from the processor relative to the instruction storage unit. Optionally, the instruction storage unit can be an on-chip storage unit integrated on the processor, and the memory can be an external storage unit connected to the processor. Optionally, the instruction storage unit (Instruction RAM, IRAM) can be an on-chip random access memory, an on-chip read-only memory, or a synchronous dynamic random access memory (Synchronous Dynamic Random Access Memory, SDRAM). The embodiments of this application do not limit this.

[0092] S203. When the target instruction to be executed is not in the target instruction block, call the relevant instructions to obtain the instruction block where the target instruction is located, and load the instruction block where the target instruction is located into the instruction storage unit as the target instruction block to execute the target instruction.

[0093] Among them, the relevant instructions can be instructions for loading the target instruction block into the instruction storage unit, and the relevant instructions can contain at least one instruction. Optionally, the input of the relevant instructions can be the target address of the target instruction passed through the register, and the target address of the target instruction can be sent to the register by adding or modifying the instructions in the instruction block. Furthermore, the relevant instructions can read the target address of the target instruction stored in the register, and determine the instruction block to which the target instruction belongs according to the target address of the target instruction, so as to load the instruction block to which the target instruction belongs into the instruction storage unit, so that the target instruction can be executed.

[0094] Optionally, the target instruction block may include a parameter passing instruction, which is the last instruction of the target instruction block; the parameter passing instruction is used to transfer the target address of the target instruction to the related instruction.

[0095] Wherein, the parameter passing instruction can be used to obtain the target address of the target instruction, the destination operand of the parameter passing instruction can be the input of the related instruction, and the source operand of the parameter passing instruction can be the target address of the target instruction. The related instruction can be an instruction for loading the target instruction block into the storage unit, the input of the related instruction can be the target address of the target instruction passed through a register, and the target address of the target instruction can be sent to the register by adding or modifying the instructions in the instruction block. Before the program runs, it needs to be compiled. When compiling, a parameter passing instruction can be inserted between two adjacent instruction blocks. It can be understood that, except for the last instruction block, a parameter passing instruction is added after the last instruction of each instruction block. In this way, after the execution of the current target instruction block is completed, the next instruction block of the current target instruction block can be switched to for execution through the parameter passing instruction and the related instruction.

[0096] Further, the destination operand of the parameter passing instruction can be a register, such as R1, R2, R3 or R4. The register can only be used by the parameter passing instruction during the program running process. The parameter passing instruction can include, but is not limited to, data transfer instructions such as MOV instruction, PUSH instruction, LEA instruction, etc.

[0097] In the embodiment of the present application, by setting the last instruction block of the target instruction block as the parameter passing instruction, after the execution of the current target instruction block is completed, the related instruction can be called through the parameter passing instruction to automatically load and execute the next instruction block, realizing the automatic switching execution between instruction blocks, thereby improving the execution efficiency of the program.

[0098] Optionally, the obtaining of the instruction block where the target instruction is located by calling the related instruction includes:

[0099] Calling the related instruction to obtain the target address of the target instruction;

[0100] Determining the instruction block where the target instruction is located according to the target address of the target instruction.

[0101] Specifically, the target address of the target instruction can be obtained by obtaining the input of the related instruction, the instruction block where the target instruction is located can be determined according to the target address of the target instruction, and the start address of the instruction block where the target instruction is located can be calculated and determined according to the target address of the target instruction.

[0102] Among them, the calculation method of the start address of the instruction block where the target instruction is located can be: the product of the floor value of the quotient of the target address of the target instruction and the storage space occupied by the instruction block where the target instruction is located, and the storage space occupied by the instruction block where the target instruction is located. The target address can be represented by a numerical value. For example, in the start address block_address of the instruction block where the target instruction is located = (R1 / S1) * S1, R1 represents the target address of the target instruction, and S1 represents the storage space occupied by the instruction block where the target instruction is located.

[0103] Optionally, loading the instruction block where the target instruction is located into the instruction storage unit as the target instruction block to execute the target instruction includes:

[0104] Determining the current position of the target instruction in the target instruction block through the relevant instruction;

[0105] After loading the instruction block where the target instruction is located into the instruction storage unit as the target instruction block, execute the target instruction block starting from the current position of the target instruction.

[0106] Specifically, according to the storage space occupied by the instruction block where the target instruction is located and the target address of the target instruction, calculate and determine the current position of the target instruction in the target instruction block, and set the program counter (PC) of the target instruction to the current position of the target instruction in the target instruction block. After loading the instruction block where the target instruction is located into the instruction storage unit as the target instruction block, execute the target instruction block starting from the current position of the target instruction according to the PC value.

[0107] Among them, the calculation method of the current position of the target instruction in the target instruction block can be expressed as: the remainder between the target address of the target instruction and the storage capacity occupied by the instruction block where the target instruction is located. The target address can be represented by a numerical value. For example, the current position target_address of the target instruction in the target instruction block = R1 % S1, R1 represents the target address of the target instruction, and S1 represents the storage space occupied by the instruction block where the target instruction is located.

[0108] In the program running method of the embodiments of the present application, when the target instruction to be executed is not in the target instruction block, such as when the instruction to be executed is the next instruction block of the current target instruction block, or when the instruction to be executed is the target instruction of a jump instruction, the position of the target instruction can be determined by calling the relevant instruction, so as to load the instruction block to which the target instruction belongs into the instruction storage unit, so that the target instruction can be executed. The method of the embodiments of the present application realizes the optimization of the program scheduling method at the software level.

[0109] In a possible embodiment, the instruction storage unit may include a first storage unit and a second storage unit. The first storage unit may be used to store a target instruction block, and the second storage unit may be used to store related instructions, where the related instructions may be a section of firmware code.

[0110] Optionally, when the target instruction to be executed is not in the instruction storage unit, invoking the related instructions to obtain the instruction block where the target instruction is located includes: when the target instruction to be executed is not in the first storage unit, invoking the related instructions from the second storage unit to obtain the instruction block where the target instruction is located, and loading the instruction block where the target instruction is located into the first storage unit as the target instruction block.

[0111] It can be understood that when the instruction storage unit includes the first storage unit, loading the instruction block where the target instruction is located into the instruction storage unit as the target instruction block may include: loading the instruction block where the target instruction is located into the first storage unit as the target instruction block.

[0112] Specifically, when dividing the instruction set into instruction blocks, the instruction blocks are divided according to the storage space size of the first storage unit, such that the storage space occupied by each instruction block after division is less than the storage space of the first storage unit, and it is required that the first storage unit can store a complete target instruction block. The following is an example to illustrate. For Figure 3A example, the IRAM includes IRAM_P1 and IRAM_P2, where the storage space occupied by IRAM_P1 is S1. The instruction set can be divided into multiple instruction blocks according to the size of S1, and the storage space occupied by each instruction block is less than or equal to S1. When the program is executed, the first instruction block is first loaded into IRAM_P1 for running. During the execution process, if the upcoming instruction I is not in IRAM_P1, then the related instructions in IRAM_P2 are invoked, the instruction block where instruction I is located is loaded into IRAM_P1 to replace the current instruction block, and the execution starts from instruction I, so that a program larger than the storage space of the instruction storage unit can be run.

[0113] In a possible embodiment, the instruction storage unit may store the target instruction block, where the target instruction block includes the related instructions, and the related instructions are placed at the end of the target instruction block.

[0114] Specifically, when dividing the instruction set into instruction blocks, the instruction blocks are divided according to the storage space size of the instruction storage unit, such that the storage space occupied by each instruction block after division is less than the storage space of the instruction storage unit, and it is required that the instruction storage unit can store a complete target instruction block. Wherein, the target instruction block includes the relevant instructions, and the relevant instructions are placed at the end of the target instruction block. That is to say, the instruction set can be divided into instruction blocks according to the difference between the storage space of the instruction storage unit and the storage space occupied by the relevant instructions being less than, as Figure 3B shown, the storage space of the IRAM is S, and the storage space occupied by the relevant instructions is S2. The instruction set can be divided into multiple instruction blocks according to the size of S - S2, and the storage space occupied by each instruction block is less than or equal to S - S2. When the program is executed, the first instruction block and the relevant instructions are first loaded into the IRAM for running. During the execution process, if the instruction I to be executed next is not in the IRAM, the relevant instructions in the IRAM are called, the instruction block where the instruction I is located is loaded into the IRAM to replace the current instruction block, and the execution starts from the instruction I, so that a program larger than the storage space of the instruction storage unit can be run.

[0115] Optionally, the embodiment of the present application further includes a process of modifying the instruction set of the original program. Specifically, the compiler of the embodiment of the present application can insert parameter passing instructions and / or relevant instructions into the instruction set before updating in Figure 5A or 5B to obtain an updated instruction set, and divide the updated instruction set into multiple instruction blocks. Specifically, the method further includes: when the parameter passing instructions or / and relevant instructions are inserted into the instruction set, updating the instruction set and the PC values of the instructions in the instruction set; determining the number of instruction blocks according to the updated instruction set.

[0116] Wherein, after dividing the instruction set into instruction blocks, except for the last instruction block, the parameter passing instructions or / and relevant instructions are inserted after the last instruction of each instruction block. Since the inserted parameter passing instructions or / and relevant instructions cause changes in the PC values and target addresses of the instructions in the instruction set, the PC values and target addresses of the instructions in the instruction set are updated according to the inserted parameter passing instructions or / and relevant instructions. Further, the storage space occupied by the updated instruction block can include the storage space occupied by the instruction block before update and the storage space occupied by the parameter passing instructions or / and relevant instructions.

[0117] Please refer to Figure 4 , Figure 4 which is a schematic flowchart of another program running method provided by the embodiment of the present application. This method is applied to a computer device as shown in Figure 1 shown. As shown in Figure 4 shown, the method includes the following steps:

[0118] S401. Obtain an instruction set from a memory. The instruction set includes at least one instruction block, and the instruction block includes at least one instruction.

[0119] Among them, the instruction set can be an instruction set including relevant instructions and / or parameter-passing instructions. Further, the computer device can divide the instruction set into at least one instruction block according to the storage space of the instruction storage unit. The specific division method of the instruction block can refer to the description above.

[0120] For the specific description in the above step S401, reference can be made to the Figure 2 specific implementation manner described in the above step S201, which will not be elaborated here.

[0121] Optionally, the computer device can divide the instruction set of the original program into multiple instruction blocks. After that, for the convenience of automatic switching between multiple instruction blocks, the compiler can insert parameter-passing instructions between the instruction blocks. In one embodiment, the compiler can also insert relevant instructions at the end of each instruction block, etc. The method further includes: when the parameter-passing instruction or / and relevant instruction or / and no-operation instruction is inserted into the instruction set, update the instruction set and the PC values of the instructions in the instruction set; determine the number of instruction blocks according to the updated instruction set.

[0122] Among them, during the compilation process, after inserting a parameter-passing instruction between two adjacent instruction blocks or inserting the parameter-passing instruction or / and no-operation instruction before or after a jump instruction. Since the inserted parameter-passing instruction or / and relevant instruction or / and no-operation instruction causes the PC values and target addresses of the instructions in the instruction set to change, it is necessary to update the PC values and target addresses of the instructions in the instruction set.

[0123] Further, the storage space occupied by the updated instruction block can include the storage space occupied by the instruction block before update and the storage space occupied by the parameter-passing instruction or / and relevant instruction or / and no-operation instruction. Re-divide the instruction block according to the storage space occupied by the updated instruction block to determine the number of instruction blocks. For example, the storage space occupied by the instruction set of the original program is T1. The instruction set is divided into 3 instruction blocks according to the storage space S1 of the instruction storage unit, and the storage space occupied by each instruction block is P1, where P1 < S1. After compilation, due to the insertion of the parameter-passing instruction or / and relevant instruction or / and no-operation instruction, the storage space occupied by the instruction set changes to T2, T2 > T1. The instruction set is re-divided into 3 instruction blocks according to the storage space S1 of the instruction storage unit, and the storage space occupied by each instruction block is P2, where P2 > P1 and P2 < S1.

[0124] S402. Load the target instruction block into the instruction storage unit to execute the target instruction block in the instruction storage unit. The target instruction block includes an argument passing instruction and related instructions.

[0125] Among them, the target instruction block is one of at least one instruction block. The instruction storage unit stores the target instruction block. The target instruction block can be an instruction block that is about to be executed after compilation. When the target instruction block is not in the instruction storage unit, load the target instruction block into the instruction storage unit so that the processor can execute the instructions in the target instruction block.

[0126] Among them, the instruction storage unit is arranged close to the processor, and the memory is arranged farther from the processor relative to the instruction storage unit. Optionally, the instruction storage unit can be an on-chip storage unit integrated on the processor, and the memory can be an external storage unit connected to the processor. Optionally, the instruction storage unit can be IRAM, IROM or SDRAM, and the embodiments of the present application do not limit this.

[0127] Optionally, the related instructions are placed at the end of the target instruction block, and the argument passing instruction is placed between the instruction block in the target instruction block and the related instructions. The argument passing instruction is used to transfer the target address of the target instruction to the related instructions. That is to say, in the same target instruction block, the PC value of the argument passing instruction is less than the PC value of the related instructions. During the execution of the instructions, the argument passing instruction is executed before the related instructions.

[0128] Among them, the related instructions can be instructions for loading the target instruction block into the instruction storage unit, and the related instructions can include at least one instruction. Optionally, the input of the related instructions can be the target address of the target instruction passed through a register, and the target address of the target instruction can be sent to the register by adding or modifying the instructions in the instruction block. Furthermore, the related instructions can read the target address of the target instruction stored in the register, and determine the instruction block to which the target instruction belongs according to the target address of the target instruction, so as to load the instruction block to which the target instruction belongs into the instruction storage unit, so that the target instruction can be executed.

[0129] Among them, the parameter-passing instruction can be used to obtain the target address of the target instruction. The destination operand of the parameter-passing instruction can be the input of the relevant instruction, and the source operand of the parameter-passing instruction can be the target address of the target instruction. The relevant instruction can be an instruction for loading the target instruction block into the storage unit. The input of the relevant instruction can be the target address of the target instruction passed through a register, and the target address of this target instruction can be sent to the register by adding or modifying the instructions in the instruction block. Before the program runs, it needs to be compiled. During compilation, a parameter-passing instruction and a relevant instruction can be inserted between instruction blocks. It can be understood that, except for the last instruction block, a parameter-passing instruction and a relevant instruction are added after the last instruction of each instruction block. In this way, by executing this parameter-passing instruction, this relevant instruction can be called to load the target instruction block of the target instruction into the instruction storage unit for execution.

[0130] Further, the destination operand of the parameter-passing instruction can include registers, such as R1, R2, R3, or R4. These registers can only be used by this parameter-passing instruction during the program running process. This parameter-passing instruction can include, but is not limited to, data transfer instructions such as MOV instruction, PUSH instruction, LEA instruction, etc.

[0131] Optionally, the instruction block can include jump instructions, and the jump instructions include long jump instructions and short jump instructions. Optionally, the type of the jump instruction can be determined by statically analyzing the jump instruction. When the target address of the jump instruction and the jump instruction are not in the same instruction block, the jump instruction is a long jump instruction; when the target address of the jump instruction and the jump instruction are in the same instruction block, the jump instruction is a short jump instruction. Further, the jump instruction can include, but is not limited to: program transfer instructions such as JUMP instruction, CALL instruction, RET instruction, etc.

[0132] Before loading the target instruction block into the instruction storage unit, the compiler can determine whether the target instruction block contains a jump instruction and further determine the type of the jump instruction, where the jump instruction can include a long jump instruction and a short jump instruction. Generally, a no-operation instruction is set after the jump instruction. In the embodiments of the present application, the no-operation instruction can be replaced with a parameter-passing instruction, so that the jump control of the instruction can be realized without changing the length of the instruction sequence.

[0133] When the instruction block contains a long jump instruction, if there is a null instruction after the long jump instruction, replace the null instruction with the parameter passing instruction. If there is no null instruction after the long jump instruction, insert the parameter passing instruction before or after the long jump instruction. Since the null instruction is executed before the jump instruction during program execution, when there is no null instruction after the long jump instruction in the original program's instruction set, the compiler can insert the parameter passing instruction before or after the long jump instruction. Optionally, the inserted parameter passing instruction is adjacent to the long jump instruction.

[0134] In specific implementation, generally two null instructions are set after the jump instruction to reduce the time consumed by the jump instruction. The null instruction can be executed before the jump instruction, and the null instruction can include the NOP instruction.

[0135] Specifically, when the instruction block contains a long jump instruction and there is a null instruction after the long jump instruction, replace the null instruction with the parameter passing instruction, and update the target address of the long jump instruction to the start address of the relevant instruction. The source operand of the parameter passing instruction is the target address of the long jump instruction. For example, when there is one null instruction after the long jump instruction, replace the null instruction with the parameter passing instruction. When there are two null instructions after the long jump instruction, the first or the second null instruction after the long jump instruction can be replaced with the parameter passing instruction. When the instruction block contains a short jump instruction and there is a null instruction after the short jump instruction, update the target address of the short jump instruction to the difference between the target address of the short jump instruction and the start address of the instruction block where the short jump instruction is located. As Figure 5A shown, for the long jump instruction JUMP EQ 1400 with a storage address DDR_ADDR of 300 in instruction block X0, since there are two NOP instructions after it, the first NOP instruction is modified to MOV R1 1400, and the target address of the long jump instruction is updated to the start address 1000 of instruction block X1. Similarly, for the long jump instruction JUMP EQ 2600 with a storage address of 1500 in instruction block X1, the first NOP instruction after it is modified to MOV R1 2600, and the target address of the long jump instruction is updated to 2000; for the short jump instruction with a storage address of 1200 in instruction block X1, since there are two NOP instructions after it, the target address of the short jump instruction is updated to the difference between the target address 1800 of the short jump instruction and the start address 1000 of instruction block X1, that is, the target address of the short jump instruction is updated to 800.

[0136] When the instruction block contains a long jump instruction and there is no NOP instruction after the long jump instruction, insert the parameter passing instruction in front of or behind the long jump instruction, and update the target address of the long jump instruction to the start address of the relevant instruction. The source operand of the parameter passing instruction is the target address of the long jump instruction. When the instruction block contains a short jump instruction and there is no NOP instruction after the short jump instruction, insert the NOP instruction in front of or behind the short jump instruction, and update the target address of the short jump instruction to the difference between the target address of the short jump instruction and the start address of the instruction block where the short jump instruction is located.

[0137] As Figure 5B shown, for the long jump instruction JUMP EQ1400 with a storage address of DDR_ADDR 300 in instruction block X0, since there is no NOP instruction after it, a parameter passing instruction MOV R1 1400 is inserted behind the long jump instruction, and the target address of the long jump instruction is updated to the start address 1000 of instruction block X1. Similarly, for the long jump instruction JUMP EQ 2600 with a storage address of 1500 in instruction block X1, a parameter passing instruction MOV R1 2600 is inserted behind it, and the target address of the long jump instruction is updated to 2000. For the short jump instruction with a storage address of 1200 in instruction block X1, since there is no NOP instruction after it, a NOP instruction is inserted behind the short jump instruction, and the target address of the short jump instruction is updated to the difference between the target address 1800 of this short jump instruction and the start address 1000 of instruction block X1, that is, the target address of the short jump instruction is updated to 800.

[0138] S403. If the target instruction to be executed is not in the target instruction block, call the relevant instruction to obtain the instruction block where the target instruction is located, and load the instruction block where the target instruction is located into the instruction storage unit to execute the target instruction.

[0139] Optionally, the calling the relevant instruction to obtain the instruction block where the target instruction is located includes:

[0140] Call the relevant instruction to obtain the target address of the target instruction;

[0141] Determine the instruction block where the target instruction is located according to the target address of the target instruction.

[0142] Specifically, the target address of the target instruction can be obtained by acquiring the input of the relevant instruction, the storage space occupied by the instruction block where the target instruction is located can be obtained according to the target address of the target instruction, and the start address of the instruction block where the target instruction is located can be calculated and determined according to the target address of the target instruction.

[0143] Among them, the calculation method of the starting address of the instruction block where the target instruction is located can be: the product of the floor value of the quotient of the target address of the target instruction and the storage space occupied by the instruction block where the target instruction is located, and the storage space occupied by the instruction block where the target instruction is located. The target address can be represented by a numerical value. For example, the starting address block_address of the instruction block where the target instruction is located = (R1 / S1) * S1, where R1 represents the target address of the target instruction and S1 represents the storage space occupied by the instruction block where the target instruction is located.

[0144] Optionally, the step of loading the instruction block where the target instruction is located into the instruction storage unit as the target instruction block to execute the target instruction includes:

[0145] Determining the current position of the target instruction in the target instruction block through the relevant instruction;

[0146] After loading the instruction block where the target instruction is located into the instruction storage unit as the target instruction block, execute the target instruction block starting from the current position of the target instruction.

[0147] Specifically, according to the storage space occupied by the instruction block where the target instruction is located and the target address of the target instruction, calculate and determine the current position of the target instruction in the target instruction block, and set the PC of the target instruction to the current position of the target instruction in the target instruction block. After loading the instruction block where the target instruction is located into the instruction storage unit as the target instruction block, execute the target instruction block starting from the current position of the target instruction according to the PC value.

[0148] Among them, the calculation method of the current position of the target instruction in the target instruction block can be expressed as: the remainder between the target address of the target instruction and the storage capacity occupied by the instruction block where the target instruction is located. The target address can be represented by a numerical value. For example, the current position target_address of the target instruction in the target instruction block = R1 % S1, where R1 represents the target address of the target instruction and S1 represents the storage space occupied by the instruction block where the target instruction is located.

[0149] In the program running method of the embodiment of the present application, when the target instruction to be executed is not in the target instruction block, such as when the instruction to be executed is the next instruction block of the current target instruction block, or when the instruction to be executed is the target instruction of a jump instruction, the position of the target instruction can be determined by calling the relevant instruction, so as to load the instruction block to which the target instruction belongs into the instruction storage unit, so that the target instruction can be executed. The method of the embodiment of the present application realizes the optimization of the program scheduling method at the software level.

[0150] Consistent with the above, see Figure 6 , Figure 6 A flowchart of another program running method provided in an embodiment of the present application is provided, and the method is applied to Figure 1 The computer device shown. Figure 6 As shown, the method comprises the following steps:

[0151] S601. Obtain an instruction set from a memory, where the instruction set includes at least one instruction block, and the instruction block includes at least one instruction.

[0152] Optionally, the method further includes: after inserting parameter passing instructions and / or empty instructions into the instruction set, updating the instruction set and PC values ​​of the instructions in the instruction set; and determining the number of instruction blocks based on the updated instruction set.

[0153] In the compilation process, a parameter passing instruction and related instructions are inserted between two adjacent instruction blocks, or the parameter passing instruction and / or the empty instruction are inserted before or after the jump instruction. Since the inserted parameter passing instruction and / or the related instruction and / or the empty instruction will cause the PC value and the target address of the instruction in the instruction set to change, the PC value and the target address of the instruction in the instruction set need to be updated.

[0154] The specific description of step S601 can refer to the above Figure 2 The specific implementation described in step S201 will not be repeated here.

[0155] S602: Load a target instruction block into an instruction storage unit to execute the target instruction block in the instruction storage unit, wherein the instruction storage unit includes a first storage unit and a second storage unit.

[0156] The first storage unit may be used to store a target instruction block, and the second storage unit may be used to store related instructions, and the related instructions may be a section of solidified code.

[0157] Optionally, if the target instruction to be executed is not in the instruction storage unit, calling relevant instructions to obtain the instruction block where the target instruction is located includes: if the target instruction to be executed is not in the first storage unit, calling relevant instructions from the second storage unit to obtain the instruction block where the target instruction is located, and loading the instruction block where the target instruction is located as the target instruction block into the first storage unit.

[0158] Specifically, when the instruction set is divided into instruction blocks, it is required that the storage space occupied by each instruction block after the division is smaller than the storage space of the first storage unit, and the first storage unit is required to be able to store a complete target instruction block.

[0159] Optionally, the instruction block may include jump instructions, which include long jump instructions and short jump instructions. Optionally, by statically analyzing the jump instructions, it can be determined whether the jump instruction is a long jump instruction or a short jump instruction. When the target address of the jump instruction is not in the same instruction block as the jump instruction, the jump instruction is a long jump instruction; when the target address of the jump instruction and the jump instruction are in the same instruction block, the jump instruction is a short jump instruction. Further, the jump instructions may include, but are not limited to, program transfer instructions such as JUMP instructions, CALL instructions, RET instructions, etc.

[0160] Before loading the target instruction block into the instruction storage unit, when the instruction block contains a long jump instruction, if there is a null instruction after the long jump instruction, replace the null instruction with the parameter passing instruction; if there is no null instruction after the long jump instruction, insert the parameter passing instruction before or after the long jump instruction.

[0161] In specific implementation, generally two null instructions are set after the jump instruction to reduce the time consumed by the jump instruction. The null instruction can be executed before the jump instruction, and the null instruction may include a NOP instruction.

[0162] Specifically, when the instruction block contains a long jump instruction and there is a null instruction after the long jump instruction, replace the null instruction with a parameter passing instruction, and update the target address of the long jump instruction to the start address of the relevant instruction. The source operand of the parameter passing instruction is the target address of the long jump instruction. For example, when there is one null instruction after the long jump instruction, replace that null instruction with the parameter passing instruction. When there are two null instructions after the long jump instruction, either the first null instruction or the second null instruction after the long jump instruction can be replaced with the parameter passing instruction. When the instruction block contains a short jump instruction and there is a null instruction after the short jump instruction, update the target address of the short jump instruction to the difference between the target address of the short jump instruction and the start address of the instruction block where the short jump instruction is located. As Figure 5AAs shown, for the long jump instruction JUMP EQ 1400 with the storage address DDR_ADDR of 300 in instruction block X0, since there are two NOP instructions following it, the first NOP instruction is modified to MOV R1 1400, and the target address of the long jump instruction is updated to the start address 1000 of instruction block X1. Similarly, for the long jump instruction JUMP EQ 2600 with the storage address of 1500 in instruction block X1, the first NOP instruction following it is modified to MOV R1 2600, and the target address of the long jump instruction is updated to 2000. For the short jump instruction with the storage address of 1200 in instruction block X1, since there are two NOP instructions following it, the target address of the short jump instruction is updated to the difference between the target address 1800 of the short jump instruction and the start address 1000 of instruction block X1, that is, the target address of the short jump instruction is updated to 800.

[0163] When the instruction block contains a long jump instruction and there is no null instruction after the long jump instruction, insert the parameter passing instruction in front of or after the long jump instruction, and update the target address of the long jump instruction to the start address of the relevant instruction. The source operand of the parameter passing instruction is the target address of the long jump instruction. When the instruction block contains a short jump instruction and there is no null instruction after the short jump instruction, insert the null instruction in front of or after the short jump instruction, and update the target address of the short jump instruction to the difference between the target address of the short jump instruction and the start address of the instruction block where the short jump instruction is located. As Figure 5B As shown, for the long jump instruction JUMP EQ 1400 with the storage address DDR_ADDR of 300 in instruction block X0, since there is no null instruction after it, insert the parameter passing instruction MOV R1 1400 after the long jump instruction, and update the target address of the long jump instruction to the start address 1000 of instruction block X1. Similarly, for the long jump instruction JUMP EQ 2600 with the storage address of 1500 in instruction block X1, insert a parameter passing instruction MOV R1 2600 after it, and update the target address of the long jump instruction to 2000. For the short jump instruction with the storage address of 1200 in instruction block X1, since there is no null instruction after it, insert a null instruction NOP after the short jump instruction, and update the target address of the short jump instruction to the difference between the target address 1800 of the short jump instruction and the start address 1000 of instruction block X1, that is, the target address of the short jump instruction is updated to 800.

[0164] S603. If the target instruction to be executed is not in the target instruction block, call the relevant instruction from the second storage unit to obtain the instruction block where the target instruction is located, and load the instruction block where the target instruction is located into the first instruction storage unit to execute the target instruction.

[0165] Optionally, the step of calling relevant instructions from the second storage unit to obtain the instruction block where the target instruction is located includes:

[0166] Calling the relevant instructions from the second storage unit to obtain the target address of the target instruction;

[0167] Determining the instruction block where the target instruction is located according to the target address of the target instruction.

[0168] Specifically, the target address of the target instruction can be obtained by acquiring the input of the relevant instruction, the storage space occupied by the instruction block where the target instruction is located can be obtained according to the target address of the target instruction, and the starting address of the instruction block where the target instruction is located can be calculated and determined according to the target address of the target instruction.

[0169] Among them, the calculation method of the starting address of the instruction block where the target instruction is located can be: the product of the floor value of the quotient of the target address of the target instruction and the storage space occupied by the instruction block where the target instruction is located and the storage space occupied by the instruction block where the target instruction is located, and the target address can be represented by a numerical value. For example, in the starting address of the instruction block where the target instruction is located, block_address = (R1 / S1) * S1, where R1 represents the target address of the target instruction and S1 represents the storage space occupied by the instruction block where the target instruction is located.

[0170] Optionally, the step of loading the instruction block where the target instruction is located into the first instruction storage unit as the target instruction block to execute the target instruction includes:

[0171] Determining the current position of the target instruction in the target instruction block through the relevant instruction;

[0172] After loading the instruction block where the target instruction is located into the first instruction storage unit as the target instruction block, executing the target instruction block starting from the current position of the target instruction.

[0173] Specifically, according to the storage space occupied by the instruction block where the target instruction is located and the target address of the target instruction, calculate and determine the current position of the target instruction in the target instruction block, and set the PC of the target instruction to the current position of the target instruction in the target instruction block. After loading the instruction block where the target instruction is located into the first instruction storage unit as the target instruction block, execute the target instruction block starting from the current position of the target instruction according to the PC value.

[0174] Among them, the calculation method of the current position of the target instruction in the target instruction block can be expressed as: the remainder of the target address of the target instruction and the storage capacity occupied by the instruction block where the target instruction is located, and the target address can be represented by a numerical value. For example, the current position target_address of the target instruction in the target instruction block = R1 % S1, where R1 represents the target address of the target instruction and S1 represents the storage space occupied by the instruction block where the target instruction is located.

[0175] Next, taking IRAM as the instruction storage unit as an example, the method of the embodiment of the present application will be described in detail.

[0176] As Figure 7 shown, Figure 7 FIG. 10 is a schematic diagram of an original program P provided by an embodiment of the present application. The storage space of IRAM can be 1024. As Figure 7 shown, this program P is stored in a Double Data Rate Synchronous Dynamic Random Access Memory (DDR SDRAM). Since the storage space occupied by the instruction set of this program P is 2800, which is greater than the storage space of IRAM, this program P cannot be directly run on IRAM and needs to be processed by the method described in the embodiment of the present application to run.

[0177] As Figure 3A shown, IRAM includes two parts, IRAM_P1 and IRAM_P2. Among them, IRAM_P1 is used to store instruction blocks, and IRAM_P2 is used to store related instructions. The storage space S1 of IRAM_P1 is 1001, and the starting address A2 of IRAM_P2 is 1002. When the instruction block in IRAM_P1 is being executed, if the instruction to be executed next is not in IRAM_P1, relevant instructions are called to replace the instruction block where the instruction to be executed is located into IRAM_P1, and the execution jumps to the corresponding target address to continue.

[0178] Specifically, the instruction set of the program is divided into instruction blocks, and the storage space occupied by each instruction block after division is smaller than the storage space of IRAM_P1. As Figure 8A shown, the program divides the instruction set into 3 instruction blocks, namely X0, X1, and X2 according to the size of S1 - 1.

[0179] Further, except for the last instruction block X2, add a parameter-passing instruction MOV R1 S1*(i + 1) after the last instruction in instruction blocks X0 and X1. At the same time, update the PC value of the instructions in the instruction set and the address of the DDR SDRAM (DDR_ADDR), and update the target addresses of all jump instructions in the instruction set. The updated program P1 is as Figure 8B shown.

[0180] As Figure 8C shown, re-divide program P1 into 3 instruction blocks, B0, B1, B2 according to S1. Analyze and process the jump instructions in the 3 instruction blocks. Since there are two NOP instructions after the jump instruction, therefore, modify the target address of the long jump instruction to the start address of IRAM_P2, and replace the first NOP instruction with a MOV instruction; modify the target address of the short jump instruction to the difference between the target address of the short jump instruction and the start address of the instruction block where the short jump instruction is located. As Figure 8C shown, modify the target address of the long jump instruction J1 in instruction block B0 to the start address 1001 of instruction block B1, and replace the NOP instruction at address 301 with MOV R1 1401; modify the target address of the long jump instruction J4 in instruction block B1 to the start address 2002 of instruction block B2, and replace the NOP instruction at address 1502 with MOV R1 2602; modify the target address of the short jump instruction J3 in instruction block B1 to 800.

[0181] Figure 8C The program in Figure 8C can be executed in IRAM after the above block processing, that is, the B0 instruction block can be loaded into IRAM_P1 to start execution. The figure gives the PC value (IRAM_PC) of each instruction block loaded onto IRAM_P1. It should be noted that

[0182] The following details the execution process of program P1.

[0183] When program P1 starts running, instruction block B0 is loaded into IRAM_P1. Among them, the instructions starting from IRAM_PC = 300 are as follows:

[0184] JUMP EQ 1001

[0185] MOV R1 1401

[0186] NOP

[0187] When the condition of JUMP EQ is satisfied, the instructions MOV R1 1401 and NOP after the instruction JUMP EQ 1001 are executed first. Then, the JUMP instruction calls the relevant instructions to execute, loads the instruction block B1 where the target address 1401 is located into IRAM_P1, and jumps to the location where IRAM_PC = 400 to start execution. When the instruction block B1 in IRAM_P1 finishes executing the instruction MOV R1 2002 at IRAM_PC = 2001, it sequentially executes to the relevant instructions, loads the instruction block B2 where the target address 2002 is located into IRAM_P1, and starts execution from IRAM_PC = 0. Then, the program P1 is executed according to this execution process.

[0188] It can be seen that in the program running method of the embodiment of the present application, when the target instruction to be executed is not in the target instruction block, such as the instruction to be executed is the next instruction block of the current target instruction block, or the instruction to be executed is the target instruction of the jump instruction, by calling the relevant instructions, the position of the target instruction can be determined, so as to load the instruction block to which the target instruction belongs into the instruction storage unit, and thus the target instruction can be executed. The method of the embodiment of the present application realizes the optimization of the program scheduling method at the software level.

[0189] The above mainly introduces the solution of the embodiment of the present application from the perspective of the execution process of the method side. It can be understood that in order for the electronic device to implement the above functions, it includes the corresponding hardware structure and / or software module for executing each function. Those skilled in the art should easily realize that, combining the units and algorithm steps of each example described in the embodiments provided in this article, the present application can be implemented in the form of hardware or a combination of hardware and computer software. Whether a certain function is executed in the way of hardware or computer software driving hardware depends on the specific application and design constraints of the technical solution. Professional technicians can use different methods to implement the described functions for each specific application, but such implementation should not be considered to exceed the scope of the present application.

[0190] The embodiment of the present application can divide the functional units of the electronic device according to the above method examples. For example, each functional unit can be divided corresponding to each function, or two or more functions can be integrated into one processing unit. The above integrated unit can be implemented in the form of hardware or in the form of a software functional unit. It should be noted that the division of units in the embodiment of the present application is illustrative, only a logical function division, and there may be other division methods in actual implementation.

[0191] Please refer to Figure 9A , Figure 9A which is the functional unit composition block diagram of a program running device 900 provided by the embodiment of the present application. As Figure 9AAs shown in the figure, the program running device 900 includes an acquisition module 910, a loading module 920, and a calling module 930. Among them,

[0192] The acquisition module 910 is configured to acquire an instruction set from a memory. Among them, the instruction set includes at least one instruction block, and the instruction block includes at least one instruction;

[0193] The loading module 920 is configured to load a target instruction block into an instruction storage unit to execute the target instruction block in the instruction storage unit;

[0194] The calling module 930 is configured to, when a target instruction to be executed is not in the target instruction block, call a relevant instruction to obtain the instruction block where the target instruction is located, and load the instruction block where the target instruction is located as the target instruction block into the instruction storage unit to execute the target instruction.

[0195] It can be seen that for the program running device according to the embodiment of the present application, when a target instruction to be executed is not in the target instruction block, such as when the instruction to be executed is the next instruction block of the current target instruction block, or when the instruction to be executed is the target instruction of a jump instruction, by calling relevant instructions, the position of the target instruction can be determined, so as to load the instruction block to which the target instruction belongs into the instruction storage unit, thereby the target instruction can be executed. The method according to the embodiment of the present application realizes the optimization of the program scheduling method at the software level.

[0196] In a possible example, in terms of the instruction storage unit including a first storage unit and a second storage unit, when a target instruction to be executed is not in the instruction storage unit, the calling module 930 is further configured to execute:

[0197] When the target instruction to be executed is not in the first storage unit, call relevant instructions from the second storage unit to obtain the instruction block where the target instruction is located, and load the instruction block where the target instruction is located as the target instruction block into the first storage unit.

[0198] Optionally, the target instruction block further includes a parameter passing instruction, and the parameter passing instruction is the last instruction of the target instruction block; the parameter passing instruction is used to transfer the target address of the target instruction to the relevant instruction.

[0199] In a possible embodiment, the target instruction block includes the relevant instruction, and the relevant instruction is placed at the end of the target instruction block.

[0200] In a possible embodiment, the instruction storage unit includes a first storage unit and a second storage unit, and the first storage unit is used to store the target instruction block;

[0201] When the target instruction to be executed is not in the target instruction block, the obtaining of the instruction block where the target instruction is located by calling the relevant instruction includes:

[0202] When the target instruction to be executed is not in the target instruction block, relevant instructions are called from the second storage unit to obtain the instruction block where the target instruction is located, and the instruction block where the target instruction is located is loaded into the first storage unit as the target instruction block.

[0203] In a possible embodiment, as Figure 9B shown, it is a functional unit composition block diagram of another program running device 900 provided by an embodiment of the present application. Before loading the target instruction block into the instruction storage unit, when the instruction block contains a long jump instruction, the above program running device 900 further includes:

[0204] A replacement module 950, configured to replace the null instruction with the parameter passing instruction during compilation if there is a null instruction after the long jump instruction;

[0205] An insertion module 940, further configured to insert the parameter passing instruction before or after the long jump instruction during compilation if there is no null instruction after the long jump instruction.

[0206] In a possible embodiment, as Figure 9C shown, it is a functional unit composition block diagram of another program running device 900 provided by an embodiment of the present application. The program running device 900 further includes:

[0207] An update module 960, configured to update the instruction set and the PC values of the instructions in the instruction set when a parameter passing instruction or relevant instructions are inserted into the instruction set;

[0208] A determination module 970, configured to determine the storage space occupied by the instruction block according to the updated instruction set.

[0209] In a possible embodiment, the calling module 930 is further configured to execute:

[0210] Call the relevant instruction to obtain the target address of the target instruction;

[0211] Determine the instruction block where the target instruction is located according to the target address of the target instruction.

[0212] Further, the calling module 930 is further configured to execute:

[0213] Determine the start address of the instruction block where the target instruction is located and the storage space occupied by the instruction block where the target instruction block is located according to the target address of the target instruction.

[0214] In a possible embodiment, the calling module 930 is further configured to execute:

[0215] Determine the current position of the target instruction in the target instruction block through the relevant instruction;

[0216] After loading the instruction block where the target instruction is located into the instruction storage unit as the target instruction block, execute the target instruction block starting from the current position of the target instruction.

[0217] It can be understood that the functions of the program modules of the program running device in the embodiments of the present application can be specifically implemented according to the methods in the above method embodiments. The specific implementation process can refer to the relevant descriptions in the above method embodiments and will not be elaborated here.

[0218] The embodiments of the present application further provide a computer storage medium. The computer storage medium stores a computer program for electronic data exchange, and the computer program enables a computer to execute some or all of the steps of any of the methods described in the above method embodiments.

[0219] The embodiments of the present application further provide a computer program product. The computer program product includes a non-transitory computer-readable storage medium storing a computer program. The computer program is operable to enable a computer to execute some or all of the steps of any of the methods described in the above method embodiments. The computer program product can be a software installation package.

[0220] It should be noted that for the foregoing method embodiments, for the sake of simple description, they are all expressed as a series of action combinations. However, those skilled in the art should know that the present application is not limited by the described action sequence, because according to the present application, certain steps can be performed in other sequences or simultaneously. Secondly, those skilled in the art should also know that the embodiments described in the specification are all preferred embodiments, and the actions and modules involved are not necessarily essential to the present application.

[0221] In the above embodiments, the descriptions of the various embodiments have their own emphases. For the parts not detailed in a certain embodiment, reference can be made to the relevant descriptions of other embodiments.

[0222] In several embodiments provided by this application, it should be understood that the disclosed device can be implemented in other ways. For example, the device embodiments described above are merely illustrative. For example, the above division of units is only a logical function division. In actual implementation, there may be other division methods. For example, multiple units or components can be combined or integrated into another system, or some features can be ignored or not executed. Another point is that the displayed or discussed coupling or direct coupling or communication connection between each other can be through some interfaces. The indirect coupling or communication connection of the device or unit can be in an electrical or other form.

[0223] The units described above as separate components may or may not be physically separated. The components displayed as units may or may not be physical units, that is, they can be located in one place or distributed to multiple network units. Some or all of the units can be selected according to actual needs to achieve the purpose of the solution of this embodiment.

[0224] In addition, each functional unit in various embodiments of this application can be integrated in a processing unit, or each unit can exist physically alone, or two or more units can be integrated in one unit. The above integrated units can be implemented in the form of hardware or in the form of software functional units.

[0225] If the above integrated unit is implemented in the form of a software functional unit and sold or used as an independent product, it can be stored in a computer-readable memory. Based on such an understanding, the technical solution of this application, in essence, or the part that contributes to the prior art, or all or part of this technical solution, can be embodied in the form of a software product. This computer software product is stored in a memory and includes several instructions for causing a computer device (which can be a personal computer, a terminal device, or a network device, etc.) to execute all or part of the steps of the above methods in various embodiments of this application. And the aforementioned memory includes: USB flash drives, read-only memories (ROM, Read-Only Memory), random access memories (RAM, Random Access Memory), mobile hard disks, magnetic disks, or optical disks and other media that can store program codes.

[0226] Those of ordinary skill in the art can understand that all or part of the steps in the various methods of the above embodiments can be completed by instructing relevant hardware through a program. This program can be stored in a computer-readable memory, and the memory can include: flash drives, ROM, RAM, magnetic disks, or optical disks, etc.

[0227] The above has introduced the embodiments of the present application in detail. Specific examples are used herein to elaborate on the principle and implementation manner of the present application. The description of the above embodiments is only used to help understand the method of the present application and its core idea; at the same time, for those of ordinary skill in the art, according to the idea of the present application, there will be changes in the specific implementation manner and application scope. In summary, the content of this specification should not be construed as a limitation on the present application.

Claims

1. A program running method, characterized in that, The method includes: Obtaining an instruction set from a memory, where the instruction set includes at least one instruction block, and the instruction block includes at least one instruction; Loading a target instruction block into an instruction storage unit to execute the target instruction block in the instruction storage unit; When the target instruction to be executed is not in the target instruction block, calling a relevant instruction to obtain the instruction block where the target instruction is located, and loading the instruction block where the target instruction is located into the instruction storage unit as the target instruction block to execute the target instruction; The loading the instruction block where the target instruction is located into the instruction storage unit as the target instruction block to execute the target instruction includes: Determining the current position of the target instruction in the target instruction block through the relevant instruction; After loading the instruction block where the target instruction is located into the instruction storage unit as the target instruction block, starting to execute the target instruction block from the current position of the target instruction.

2. The method according to claim 1, wherein The target instruction block includes a parameter passing instruction, and the parameter passing instruction is the last instruction of the target instruction block; The parameter passing instruction is used to transfer the target address of the target instruction to the relevant instruction.

3. The method according to claim 2, wherein The target instruction block further includes the relevant instruction, and the relevant instruction is placed at the end of the target instruction block.

4. The method according to claim 2, characterized in that The instruction storage unit includes a first storage unit and a second storage unit, and the first storage unit is used to store the target instruction block; When the target instruction to be executed is not in the target instruction block, the calling the relevant instruction to obtain the instruction block where the target instruction is located includes: When the target instruction to be executed is not in the target instruction block, calling a relevant instruction from the second storage unit to obtain the instruction block where the target instruction is located, and loading the instruction block where the target instruction is located into the first storage unit as the target instruction block.

5. The method according to claim 3 or 4, characterized in that, Before loading the target instruction block into the instruction storage unit, when the instruction block contains a long jump instruction, the method further includes: If there is a null instruction after the long jump instruction, replacing the null instruction with the parameter passing instruction; If there is no null instruction after the long jump instruction, inserting the parameter passing instruction before or after the long jump instruction.

6. The method according to claim 2 or 3, characterized in that The method further includes: When a parameter passing instruction or a relevant instruction is inserted into the instruction set, updating the instruction set and the PC value of the instructions in the instruction set; Determining the number of instruction blocks according to the updated instruction set.

7. The method according to claim 1, wherein The calling the relevant instruction to obtain the instruction block where the target instruction is located includes: Calling the relevant instruction to determine the target address of the target instruction; Determining the instruction block where the target instruction is located according to the target address of the target instruction.

8. The method according to claim 7, wherein The determining the instruction block where the target instruction is located according to the target address of the target instruction further includes: Determining the start address of the instruction block where the target instruction is located and the instruction block where the target instruction block is located according to the target address of the target instruction.

9. A program running device, characterized in that, The device includes: An obtaining module, configured to obtain an instruction set from a memory, where the instruction set includes at least one instruction block, and the instruction block includes at least one instruction; A loading module, configured to load a target instruction block into an instruction storage unit to execute the target instruction block in the instruction storage unit; A calling module, configured to, when a target instruction to be executed is not in the target instruction block, call a relevant instruction to obtain the instruction block where the target instruction is located, and load the instruction block where the target instruction is located as the target instruction block into the instruction storage unit to execute the target instruction; The calling module is further configured to execute: Determine the current position of the target instruction in the target instruction block through the relevant instruction; After loading the instruction block where the target instruction is located as the target instruction block into the instruction storage unit, execute the target instruction block starting from the current position of the target instruction.

10. A computer device, characterized in that, The computer device includes a memory and a processor. A computer program that can run on the processor is stored in the memory. When the processor executes the computer program, the method according to any one of claims 1 to 8 is implemented.

11. A computer-readable storage medium, characterized in that, The computer-readable storage medium includes a computer program stored for data exchange. When the computer program is executed by a processor, the method according to any one of claims 1 to 8 is implemented.

Images