Power module and method for manufacturing same

By setting the power semiconductor device on the upper and lower parts of the substrate and using a dielectric layer and an insulating layer, the problems of insufficient cooling performance and parasitic inductance of the existing power modules are solved, and a more efficient manufacturing process and cost-reducing effect is achieved.

CN112992845BActive Publication Date: 2025-07-22HYUNDAI MOTOR CO LTD +1
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Patent Information

Application Number
CN202010943528.8
Authority / Receiving Office
CN · China
Patent Type
Patents(China)
Current Assignee / Owner
Priority Date
2019-12-16
Filing Date
2020-09-09
Publication Date
2025-07-22
Estimated Expiration
2040-09-09

AI Technical Summary

Technical Problem

Existing power modules have shortcomings in cooling performance and parasitic inductance, and are highly reliable and cost-effective during manufacturing.

Method used

A substrate structure with a dielectric layer in the middle is adopted, and a power semiconductor device is arranged on the upper and lower parts of the substrate, and a parasitic inductance is reduced through the insulating layer to simplify the manufacturing process.

Benefits of technology

Reduces parasitic inductance, improves cooling performance, reduces manufacturing costs, and improves reliability.

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Abstract

The present application relates to a power module. The power module includes: a substrate having a dielectric layer; a first power semiconductor device disposed on the upper part of the substrate; and a second power semiconductor device disposed on the lower part of the substrate.
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Description

Technical Field

[0001] The present disclosure relates to a power module and a method of manufacturing the same, and more particularly, to a power module and a method of manufacturing the same, the power module having a structure in which a substrate provided with a dielectric layer is interposed therebetween and power semiconductor devices are provided on the upper and lower portions of the substrate, thereby being able to reduce the number of components, simplify the manufacturing process, and improve performance. Background Art

[0002] As one of the core components of hybrid vehicles and electric vehicles, a power converter (e.g., an inverter) is a main component of an eco-friendly vehicle, and many technologies of the power converter are being developed. A power module is a core component of the power converter and has the highest cost, and developing the power module is a key technology in the field of eco-friendly vehicles.

[0003] Generally, power modules are manufactured in various structures. In particular, according to a structure in which a heat sink or a heat dissipation channel is provided to easily discharge heat generated from the power module, the power module is manufactured in the form of a single-sided cooling power module and a double-sided cooling power module.

[0004] Since the single-sided cooling power module is manufactured in a form in which a cooling device is provided on one surface of a power semiconductor device such as an insulated-gate bipolar transistor (IGBT), its cooling performance is low, and since current flows through wire bonding, parasitic inductance increases.

[0005] To eliminate the disadvantages of the single-sided cooling power module, a double-sided cooling power module has been developed. The double-sided cooling power module has substrates provided on the upper and lower surfaces of the power semiconductor device, and current flows according to a circuit pattern formed on the substrate.

[0006] However, since the double-sided cooling power module needs to perform soldering or sintering two or more times during the manufacturing process for wire bonding, the reliability is reduced due to re-melting of the solder caused by multiple soldering. In addition, since current flows through the patterns of the substrates provided on the upper and lower sides of the double-sided cooling power module, the amount of parasitic inductance increases. In addition, since substrates need to be provided on the upper and lower sides of the power semiconductor device, bonding wires that electrically connect the signal terminals of the power semiconductor device to the two substrates may come into contact with the substrates, causing interference. To eliminate this interference, a sufficient distance needs to be maintained between the two substrates, and spacers are further provided at positions between at least one substrate and the power semiconductor device, thereby causing an increase in unit price.

[0007] The foregoing is only intended to assist in understanding the background of the present disclosure and is not intended to indicate that the present disclosure falls within the scope of the prior art known to those skilled in the art. Summary of the Invention

[0008] Accordingly, the present disclosure provides a power module having a structure in which a substrate provided with a dielectric layer is interposed therebetween, and power semiconductor devices are provided on the upper and lower portions of the substrate, thereby being able to eliminate key components of conventional power modules such as spacers, and reducing the number of weldings or sinterings performed and parasitic inductance.

[0009] As a means for solving the above technical problems, the present disclosure provides a power module including: a substrate having a dielectric layer; a first power semiconductor device provided on the upper portion of the substrate; and a second power semiconductor device provided on the lower portion of the substrate.

[0010] Exemplary embodiments of the present disclosure may further include: a first lead portion provided on the upper portion of the first power semiconductor device and electrically connected to the first power semiconductor device, and a second lead portion provided on the lower portion of the second power semiconductor device and electrically connected to the second power semiconductor device.

[0011] In an exemplary embodiment of the present disclosure, in order to receive a DC voltage, each of the first lead portion and the second lead portion may include a first power lead and a second power lead, the first power lead and the second power lead may overlap each other in a vertical direction, and an insulating layer may be interposed between the first power lead and the second power lead.

[0012] In an exemplary embodiment of the present disclosure, a part of the first lead portion and a part of the second lead portion may be connected to each other to achieve electrical connection between the first power semiconductor device and the second power semiconductor device.

[0013] In an exemplary embodiment of the present disclosure, the substrate may be provided with a dielectric layer, a first metal layer is provided on the upper surface of the dielectric layer, and a second metal layer is provided on the lower surface of the dielectric layer. A part between the first metal layer and the first power semiconductor device, a part between the first metal layer and the first lead portion, and a part between the first power semiconductor device and the first lead portion may be electrically connected to each other by welding, and a part between the second metal layer and the second power semiconductor device, a part between the second metal layer and the second lead portion, and a part between the second power semiconductor device and the second lead portion may be electrically connected to each other by welding.

[0014] In an exemplary embodiment of the present disclosure, the first lead portion may be provided with a first plane protruding upward, and the second lead portion may be provided with a second plane protruding downward.

[0015] In an exemplary embodiment of the present disclosure, the power module may further include a molding portion that integrally covers the substrate, the first power semiconductor device, the second power semiconductor device, a part of the first lead portion, and a part of the second lead portion, wherein the first plane and the second plane may be exposed outside the molding portion.

[0016] As another means of solving this technical problem, the present disclosure provides a method for manufacturing a power module, the method including the following steps: providing a substrate having an upper lead frame, a lower lead frame, a first power semiconductor device, a second power semiconductor device, and a dielectric layer; laminating and bonding the upper lead frame, the first power semiconductor device, the substrate, the second power semiconductor device, and the lower lead frame in sequence; performing wire bonding between a first signal connection lead of the upper lead frame and a signal terminal of the first power semiconductor device, and performing wire bonding between a second signal connection lead of the lower lead frame and a signal terminal of the second power semiconductor device; forming a molding portion to cover the laminated structure formed by bonding and the wire bonding portion formed by wire bonding; and separating and removing a predetermined area of the upper lead frame and the lower lead frame to complete the power module.

[0017] In an exemplary embodiment of the present disclosure, in the bonding step, a first power lead included in the upper lead frame and a second power lead included in the lower lead frame may overlap each other in a vertical direction, a DC voltage may be applied between the first power lead and the second power lead, and an insulating layer may be interposed between the first power lead and the second power lead.

[0018] In an exemplary embodiment of the present disclosure, in the bonding step, a part of the upper lead frame and a part of the lower lead frame may be welded to achieve electrical connection between the first power semiconductor device and the second power semiconductor device.

[0019] In an exemplary embodiment of the present disclosure, in the step of forming the molding portion, the molding portion may be formed in such a manner as to expose at least a part of the upper surface of the upper lead frame and at least a part of the lower surface of the lower lead frame.

[0020] According to the power module and its manufacturing method, the power semiconductor devices are disposed on the upper side and the lower side of the substrate provided with the dielectric layer. Therefore, when current flows through the metal layer of the substrate, the parasitic inductance can be reduced by the dielectric layer provided between the metal layers.

[0021] In addition, according to the power module and its manufacturing method, an insulating layer is interposed between two power leads to which direct current is applied to the power module, and the two power leads face each other. Therefore, the effect of reducing parasitic inductance can also be expected through the insulating layer.

[0022] In addition, according to the power module and its manufacturing method, power semiconductor devices are provided on the upper and lower sides of the substrate, so sufficient space can be ensured on the upper and lower sides of the power semiconductor devices. Therefore, compared with a conventional power module in which power semiconductor devices are provided between two substrates, interference generated between bonding wires and the substrate can be eliminated, and spacers for ensuring the distance between the two substrates can be removed.

[0023] In addition, in a conventional power module in which power semiconductor devices are provided between two substrates, after the processes of performing the first soldering and wire bonding are carried out, a second soldering needs to be performed, so there is a problem of reduced reliability due to re-melting of the solder. However, according to the power module and its manufacturing method of the present disclosure, the number of times of performing soldering is reduced to one, thereby the reliability reduction due to re-melting of the solder can be eliminated, and the process cost can be reduced.

[0024] The effects of the present disclosure are not limited to the above effects, and those skilled in the art can clearly understand other purposes not mentioned from the following description. BRIEF DESCRIPTION OF THE DRAWINGS

[0025] Figure 1 is a perspective view showing a power module according to an exemplary embodiment of the present disclosure.

[0026] Figure 2 is viewed from one direction Figure 1 a side view of the power module shown according to an exemplary embodiment of the present disclosure.

[0027] Figure 3 is viewed from another direction Figure 1 a side view of the power module shown according to an exemplary embodiment of the present disclosure.

[0028] Figure 4 、 Figure 5 and Figure 6 are a circuit diagram and a perspective view for explaining current flow in a power module according to an exemplary embodiment of the present disclosure.

[0029] Figure 7 、 Figure 8 、 Figure 9 、 Figure 10 and Figure 11 are perspective views showing steps of a manufacturing method of a power module according to an exemplary embodiment of the present disclosure. DETAILED DESCRIPTION

[0030] Hereinafter, the power module and its manufacturing method according to various exemplary embodiments of the present disclosure will be described in more detail with reference to the drawings.

[0031] Figure 1is a perspective view showing a power module according to an exemplary embodiment of the present disclosure. Additionally, Figure 2 is a side view of the power module according to an exemplary embodiment of the present disclosure as viewed from one direction (i.e., Figure 1 the D1 direction in Figure 1 ). Figure 3 is a side view of the power module according to an exemplary embodiment of the present disclosure as viewed from another direction (i.e., the D2 direction) Figure 1 ).

[0032] Referring to Figures 1 to 3 , the power module according to an exemplary embodiment of the present disclosure may include: a substrate 10 having a dielectric layer 11; a first power semiconductor device 21 disposed on an upper portion of the substrate 10; and a second power semiconductor device 22 disposed on a lower portion of the substrate 10.

[0033] The substrate 10 may use a double-bonded copper (DBC) substrate having a dielectric layer 11, a first metal layer 12 bonded to an upper surface of the dielectric layer 11, and a second metal layer 13 bonded to a lower surface of the dielectric layer 11.

[0034] The first power semiconductor device 21 may be soldered on the upper portion of the substrate 10, more specifically, on an upper surface of the first metal layer 12 of the substrate 10, and may be an insulated gate bipolar transistor (IGBT) or a metal oxide semiconductor field effect transistor (MOSFET) made of Si or SiC materials. The first metal layer 12 of the substrate 10 may be provided with a soldering pattern for electrical connection to a current input / output terminal provided on a bottom surface of the first power semiconductor device 21.

[0035] Similar to the first power semiconductor device 21, the second power semiconductor device 22 may be soldered on the lower portion of the substrate 10, more specifically, on a lower surface of the second metal layer 13 of the substrate 10, and may be an IGBT or a MOSFET made of Si or SiC materials. The second metal layer 13 of the substrate 10 may be provided with a soldering pattern for electrical connection to a current input / output terminal provided on an upper surface of the second power semiconductor device 22.

[0036] As described above, in the power module according to an exemplary embodiment of the present disclosure, the substrate 10 is placed in the middle, and the first power semiconductor device 21 and the second power semiconductor device 22 are respectively disposed on the upper surface and the lower surface of the substrate 10, so that the parasitic inductance can be reduced. In other words, in a conventional power module, parasitic inductance is generated due to the flow of current in the substrate, and it is difficult to find a suitable method to reduce the generated parasitic inductance. However, in various exemplary embodiments of the present disclosure, the dielectric layer 11 of the substrate 10 is interposed in the middle, and the power semiconductor devices 21 and 22 are disposed on the upper side and the lower side of the dielectric layer 11 of the substrate 10, and the current flows through the metal layers 12 and 13 on both sides of the dielectric layer 11. Therefore, the parasitic inductance is eliminated by the dielectric layer 11.

[0037] The power module according to an exemplary embodiment of the present disclosure may further include: a first lead portion 31 disposed on the upper portion of the first power semiconductor device 21 and electrically connected to the first power semiconductor device 21; and a second lead portion 32 disposed on the lower portion of the second power semiconductor device 22 and electrically connected to the second power semiconductor device 22.

[0038] The first lead portion 31 may be made of a conductive metal. A part of the first lead portion 31 and a current input / output terminal provided on the upper surface of the first power semiconductor device 21 may be joined by solder S to achieve electrical connection.

[0039] The second lead portion 32 may also be made of a conductive metal. A part of the second lead portion 32 and a current input / output terminal provided on the upper surface of the second power semiconductor device 22 may be joined by solder S to form an electrical connection.

[0040] The first lead portion 31 and the second lead portion 32 may be provided to receive direct current input from the outside of the power module and to output alternating current generated by the switching operation of the power semiconductor devices 21 and 22 in the power module to the outside of the power module.

[0041] For example, the first lead portion 31 and the second lead portion 32 may include a first power lead 311 and a second power lead 321 to which a DC voltage from the outside is applied. The first power lead 311 and the second power lead 321 may be used as a busbar for applying direct current from the outside therebetween. Preferably, the first power lead 311 and the second power lead 321 are provided to overlap each other vertically, and may be electrically insulated from each other by interposing an insulating layer 40 between the two power leads 311 and 321. In addition, the parasitic inductance can be reduced by the insulating layer 40.

[0042] In addition, the first lead portion 31 and the second lead portion 32 may include a third power lead 314 and a fourth power lead 324 for outputting alternating current generated by the switching operations of the power semiconductor devices 21 and 22 in the power module to the motor and for receiving alternating current input from the motor, where the third power lead 314 and the fourth power lead 324 may be electrically connected to each other. In Figure 1 and Figure 3 , the region denoted by A is the region where the third power lead 314 and the fourth power lead 324 are electrically connected to each other, and is the region corresponding to the connection node of the first power semiconductor device 21 and the second power semiconductor device 22. The first power semiconductor device 21 and the second power semiconductor device 22 correspond to two switching devices included in one leg of the inverter structure of the applied power module. The region denoted by A is the region where the third power lead 314 of the first lead portion 31 and the fourth power lead 324 of the second lead portion 32 are joined to each other by solder S, so that the first power semiconductor device 21 and the second power semiconductor device 22 are electrically connected to each other.

[0043] In addition, the first lead portion 31 and the second lead portion 32 may include signal connection leads 312 and 322 for providing control signals to the first power semiconductor device 21 and the second power semiconductor device 22, where electrical connection may be achieved between the signal connection leads 312 and 322 by soldering or sintering as needed. In Figures 1 to 3 's example, the first lead portion 31 is provided with a total of eight signal connection leads 312. Four of the eight signal connection leads are electrically connected to the signal connection leads 322 of the second lead portion 32 by soldering or sintering. The remaining four signal connection leads may be connected to the signal terminals of the first power semiconductor device 21 by wire bonding. In addition, one end of the signal connection lead 322 of the second lead portion 32 is connected to the signal connection lead 312 of the first lead portion 31 by soldering or sintering, and the other end may be connected to the signal terminal of the second power semiconductor device 22 by wire bonding. Figure 9 The wire bonding structure is shown in Figure 9 and

[0044] is for explaining a method of manufacturing a power module according to various exemplary embodiments of the present disclosure.

[0045] The mold part 50 is a structure formed around a part of the power semiconductor devices 21 and 22, the substrate 10, and the lead parts 31 and 32, and is made of an insulating material to protect the structure of the power module. The first plane 313 of the first lead part 31 and the second plane 323 of the second lead part 32 are exposed outside the mold part 50, thereby facilitating the heat generated by the power semiconductor devices 21 and 22 to be discharged outside the mold part 50. In addition, additional cooling channels can be provided above and below the power module in contact with the above-mentioned planes, thereby further improving the cooling effect of the power module.

[0046] Figures 4 to 6 It is a circuit diagram and a three-dimensional diagram for explaining the current flow in the power module according to an exemplary embodiment of the present disclosure.

[0047] The power module according to an exemplary embodiment of the present disclosure can provide a path for current to flow between the power module and Figure 4 the two switching devices S1 and S4 included in one arm of the inverter shown. Figure 4 The current flow path shown in Figure 5 and Figure 6 corresponds to the path on the power module shown in

[0048] Referring to Figures 4 to 6 , when the positive (+) terminal and the negative (-) terminal of the DC voltage (V DC ) applied from an external power source such as a battery are respectively connected to the second power lead 321 of the second lead part 32 and the first power lead 311 of the first lead part 31, as shown in path ①, the DC voltage from the power source is applied to the second power semiconductor device 22 corresponding to the switching device S1 through the second power lead 321. As shown in path ②, current flows through the second power semiconductor device 22, and as shown in path ③, current flows through the AC output region A formed by the connection of the third power lead 314 of the first lead part 31 and the fourth power lead 324 of the second lead part 32. The third power lead 314 and the fourth power lead 324 forming the AC output region A can be connected to a motor. As shown in path ③, the current flowing from the AC output region A formed by the connection of the third power lead 314 and the fourth power lead 324 to the switching device S2 is applied to the first power semiconductor device 21 corresponding to the switching device S4. As shown in path ④, current flows through the first power semiconductor device 21, and as shown in path ⑤, current flows through the first power lead 311 to the power source.

[0049] Figures 7 to 11 It is a three-dimensional diagram showing the steps of the manufacturing method of the power module according to an exemplary embodiment of the present disclosure.

[0050] As Figure 7As shown, the manufacturing method of a power module according to an exemplary embodiment of the present disclosure may start with the step of preparing a substrate 10 having an upper lead frame 310, a lower lead frame 320, a first power semiconductor device 21, a second power semiconductor device 22, and a dielectric layer. In this step, solder interposed between components to be electrically connected may also be provided between the substrate 10 and the power semiconductor devices 21 and 22, between the substrate 10 and the lead frames 310 and 320, or between the lead frames 310 and 320. An insulating layer 40 to be interposed between a first power lead and a second power lead may also be provided, with the first power lead disposed in the upper lead frame 310 and the second power lead disposed in the lower lead frame 320.

[0051] The upper lead frame 310 corresponds to Figures 1 to 3 the first lead portion 31 shown is disposed and fixed in a frame structure with a predetermined setting structure. The lower lead frame 320 corresponds to Figures 1 to 3 the second lead portion 32 shown is disposed and fixed in a frame structure with a predetermined setting structure.

[0052] Next, as Figure 8 shown, the upper lead frame 310, the first power semiconductor device 21, the substrate 10, the second power semiconductor device 22, and the lower lead frame 320 are sequentially laminated and welded to be joined, thereby forming an electrical connection between each component. In this case, the insulating layer 40 may be provided between the first power lead and the second power lead, such that the upper surface of the insulating layer 40 may contact the first power lead and the lower surface of the insulating layer 40 may contact the second power lead. When the upper lead frame 310 and the lower lead frame 320 are disposed at predetermined positions, the first power lead and the second power lead may be disposed to overlap each other in the vertical direction, and the insulating layer 40 may be inserted between the first power lead and the second power lead. Figure 8 Schematically shows the setting structure of the insulating layer 40. By referring to Figures 1 to 3 the setting structure of the insulating layer 40 shown in, the detailed structure of the insulating layer can be easily understood.

[0053] In addition, in Figure 8 the welding step shown, the first power semiconductor device 21 and the second power semiconductor device 22 may be electrically connected to each other by welding in the interconnecting region represented by Figures 1 to 3 A in.

[0054] Subsequently, as Figure 9 shown, bonding is performed between the first signal connection lead 312 of the upper lead frame 310 and the signal terminal of the first power semiconductor device by using a bonding wire 60. Moreover, wire bonding may be performed between the second signal connection lead 322 of the lower lead frame 320 and the signal terminal of the second power semiconductor device 22.

[0055] Subsequently, as Figure 10 shown, a mold part 50 can be formed to cover the laminated structure formed by Figure 8 welding and the wire bonding part formed by the wire bonding step of Figure 9 . In the step of forming the mold part as Figure 10 shown, molding techniques known in the art, such as transfer molding techniques, can be applied. In particular, in the step of forming the mold part, the mold part 50 can be formed such that a part of the upper surface of the upper lead frame and a part of the lower surface of the lower lead frame are exposed outside the mold part 50.

[0056] Subsequently, as Figure 11 shown, the power module can be completed by separating and removing a predetermined area of the upper lead frame 310 and the lower lead frame 320. The step of separating and removing the predetermined area is to remove the frame parts that are not required for the power module structure in the upper lead frame 310 and the lower lead frame 320, thereby completing the step of the final shape of the first lead part 31 and the second lead part 32 as Figures 1 to 3 shown.

[0057] As needed, a process of removing a part that is not required for the power module in the upper lead frame 310 and the lower lead frame 320 can be additionally performed before forming the mold part.

[0058] As described above, in the power module and its manufacturing method according to various exemplary embodiments of the present disclosure, by providing power semiconductor devices on the upper side and the lower side of the substrate provided with the dielectric layer, when current flows through the metal layer of the substrate, the parasitic inductance can be reduced by the dielectric layer provided at the position between the metal layers. In addition, an insulating layer is interposed between two power leads to which direct current is applied to the power module, and the two power leads are opposed to each other, so the effect of reducing parasitic inductance can be expected through the insulating layer.

[0059] In addition, since the power semiconductor devices are provided on the upper side and the lower side of the substrate, sufficient space can be ensured on the upper side and the lower side of the power semiconductor devices. Therefore, compared with a conventional power module in which the power semiconductor devices are provided between two substrates, interference generated between the bonding wires and the substrate can be eliminated, and spacers for ensuring the distance between the two substrates can be removed.

[0060] In addition, in a conventional power module in which a power semiconductor device is disposed between two substrates, a second soldering needs to be performed after the processes of performing the first soldering and wire bonding, and thus there is a problem of reduced reliability due to remelting of solder. However, in the power module and its manufacturing method according to various exemplary embodiments of the present disclosure, the number of times of performing soldering is reduced to one, so that the reliability reduction due to remelting can be eliminated, and the process cost can be reduced.

[0061] Although the preferred embodiments of the present disclosure have been described for illustrative purposes, those skilled in the art will understand that various modifications, additions, and substitutions can be made without departing from the technical scope and spirit of the present disclosure disclosed in the appended claims.

Claims

1. A power module, comprising: A substrate having a dielectric layer; A first power semiconductor device disposed on an upper portion of the substrate; A second power semiconductor device disposed on a lower portion of the substrate; A first lead portion disposed on an upper portion of the first power semiconductor device and electrically connected to the first power semiconductor device; And A second lead portion disposed on a lower portion of the second power semiconductor device and electrically connected to the second power semiconductor device, Wherein, in order to receive a DC voltage, each of the first lead portion and the second lead portion includes a first power lead and a second power lead, and the first power lead and the second power lead overlap each other in a vertical direction.

2. The power module according to claim 1, wherein, An insulating layer is interposed between the first power lead and the second power lead.

3. The power module according to claim 1, wherein, A part of the first lead portion and a part of the second lead portion are connected to each other to achieve electrical connection between the first power semiconductor device and the second power semiconductor device.

4. The power module according to claim 1, wherein, The substrate is provided with the dielectric layer, a first metal layer is disposed on an upper surface of the dielectric layer, and a second metal layer is disposed on a lower surface of the dielectric layer; A part between the first metal layer and the first power semiconductor device, a part between the first metal layer and the first lead portion, and a part between the first power semiconductor device and the first lead portion are electrically connected to each other by soldering; and A part between the second metal layer and the second power semiconductor device, a part between the second metal layer and the second lead portion, and a part between the second power semiconductor device and the second lead portion are electrically connected to each other by soldering.

5. The power module according to claim 1, wherein, The first lead portion is provided with a first plane protruding upward, and the second lead portion is provided with a second plane protruding downward.

6. The power module according to claim 5, further comprising: A mold portion integrally covering the substrate, the first power semiconductor device, the second power semiconductor device, a part of the first lead portion, and a part of the second lead portion, Wherein the first plane and the second plane are exposed outside the mold portion.

7. A method for manufacturing a power module, comprising the following steps: Providing a substrate having an upper lead frame, a lower lead frame, a first power semiconductor device, a second power semiconductor device, and a dielectric layer; Successively laminating and bonding the upper lead frame, the first power semiconductor device, the substrate, the second power semiconductor device, and the lower lead frame; Performing wire bonding between a first signal connection lead of the upper lead frame and a signal terminal of the first power semiconductor device, and performing wire bonding between a second signal connection lead of the lower lead frame and a signal terminal of the second power semiconductor device; Form a mold part to cover the laminated structure formed by the bonding and the wire bonding part formed by the wire bonding; And Separate and remove a predetermined area of the upper lead frame and the lower lead frame to complete the power module, Wherein, in the bonding step, a first power lead included in the upper lead frame and a second power lead included in the lower lead frame overlap each other in the vertical direction, and a DC voltage is applied between the first power lead and the second power lead.

8. The method according to claim 7, wherein, An insulating layer is inserted between the first power lead and the second power lead.

9. The method according to claim 7, wherein, In the bonding step, a part of the upper lead frame and a part of the lower lead frame are welded to achieve electrical connection between the first power semiconductor device and the second power semiconductor device.

10. The method according to claim 7, wherein, In the step of forming the mold part, the mold part is formed in such a way as to expose at least a part of the upper surface of the upper lead frame and at least a part of the lower surface of the lower lead frame.

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