Extreme ultraviolet light mask and method for manufacturing the same

Abstract

The present disclosure relates to an extreme ultraviolet light mask and a method for manufacturing the same. A reflective mask includes: a substrate; a reflective multilayer disposed on the substrate; a cap layer disposed on the reflective multilayer; and an absorber layer disposed on the cap layer. The absorber layer includes one or more alternating pairs of a first chromium matrix layer and a second chromium matrix layer, the second chromium matrix layer being different from the first chromium matrix layer.

Description

Technical Field

[0001] The present disclosure generally relates to extreme ultraviolet (EUV) photomasks and methods of making the same. Background Art

[0002] Photolithography is one of the key operations in the semiconductor manufacturing process. Photolithography technology includes ultraviolet lithography, deep ultraviolet lithography and extreme ultraviolet lithography (EUVL). Photomask is an important component in photolithography. It is crucial to manufacture EUV photomasks with high contrast between high reflectivity parts and high absorption parts. Summary of the invention

[0003] According to one embodiment of the present disclosure, a reflective mask is provided, comprising: a substrate; a reflective multilayer disposed on the substrate; a cap layer disposed on the reflective multilayer; and an absorber layer disposed on the cap layer, wherein the absorber layer comprises one or more alternating pairs of a first chromium matrix layer and a second chromium matrix layer, and the second chromium matrix layer is different from the first chromium matrix layer.

[0004] According to another embodiment of the present disclosure, a reflective mask is provided, comprising: a substrate; a reflective multilayer disposed on the substrate; a cap layer disposed on the reflective multilayer; and an absorber layer disposed on the cap layer, wherein: the absorber layer comprises alternatingly stacked chromium nitride (CrN) layers and chromium oxynitride (CrON) layers, and the thickness of each of the CrN layers is in the range of 1nm to 8nm, and the thickness of each of the CrON layers is in the range of 1nm to 8nm.

[0005] According to another embodiment of the present disclosure, a method for manufacturing a reflective mask is provided, the method comprising: forming a photoresist layer over a mask blank, the mask blank comprising a substrate, a reflective multilayer on the substrate, a cap layer on the reflective multilayer, an absorber layer on the cap layer, and a hard mask layer; patterning the photoresist layer; patterning the hard mask layer by using the patterned photoresist layer; and patterning the absorber layer by using the patterned hard mask layer, wherein the absorber layer comprises two or more pairs of a first chromium matrix layer and a second chromium matrix layer, the second chromium matrix layer being different from the first chromium matrix layer. BRIEF DESCRIPTION OF THE DRAWINGS

[0006] The present disclosure may be best understood from the following detailed description when read in conjunction with the accompanying drawings. It should be noted that, in accordance with standard practice in the industry, various features are not drawn to scale and are for illustration purposes only. In fact, the dimensions of various features may be arbitrarily increased or decreased for clarity of discussion.

[0007] Figure 1 An EUV photomask blank according to an embodiment of the present disclosure is shown.

[0008] Figure 2A , Figure 2B , Figure 2C , Figure 2D , Figure 2E , Figure 2F and Figure 2G A method for manufacturing an EUV photomask according to an embodiment of the present disclosure is schematically illustrated.

[0009] Figure 3A , Figure 3B , Figure 3C and Figure 3D A cross-sectional view of an EUV photomask according to an embodiment of the present disclosure is shown.

[0010] Figure 4A , Figure 4B , Figure 4C , Figure 4D , Figure 4E , Figure 4F and Figure 4G Sequential fabrication operations of an EUV photomask according to an embodiment of the present disclosure are shown.

[0011] Figure 5A , Figure 5B , Figure 5C , Figure 5D , Figure 5E , Fig. 5F and Figure 5G Sequential fabrication operations of an EUV photomask according to an embodiment of the present disclosure are shown.

[0012] Fig. 6A , Figure 6B and Figure 6C A cross-sectional view of a multilayer structure of an absorber layer according to another embodiment of the present disclosure is shown.

[0013] Figure 7 Simulation results of the reflectivity of various absorber structures are shown.

[0014] Fig. 8A A flowchart showing a method of manufacturing a semiconductor device, and Figure 8B , Figure 8C , Fig.8D and Fig. 8ESequential manufacturing operations of a method of manufacturing a semiconductor device according to an embodiment of the present disclosure are shown. DETAILED DESCRIPTION

[0015] It should be understood that the following disclosure provides many different embodiments or examples for realizing different features of the present invention. Specific embodiments or examples of components and arrangements are described below to simplify the present disclosure. Of course, these are merely examples and are not intended to be restrictive. For example, the size of the element is not limited to the disclosed range or value, but may depend on the process conditions and / or desired characteristics of the device. In addition, in the following description, forming a first feature above or on a second feature may include an embodiment in which the first feature and the second feature are formed in direct contact, and may also include an additional feature that may be formed between the first feature and the second feature so that the first feature and the second feature may not be in direct contact. For simplicity and clarity, various features may be arbitrarily drawn in different proportions.

[0016] In addition, spatially related terms (e.g., "below," "below," "below," "above," "upper," etc.) may be used herein to easily describe the relationship of an element or feature shown in the figure to another (one or more) element or (one or more) feature. These spatially related terms are intended to cover different orientations of the device in use or operation other than the orientation shown in the figure. The device may be oriented in other ways (rotated 90 degrees or in other orientations), and the spatially related descriptors used herein may also be interpreted accordingly. In addition, the term "made of" may mean "including" or "consisting of." In the present disclosure, the phrase "one of A, B, and C" means "A, B, and / or C" (A, B, C, A and B, A and C, B and C, or A, B and C), and does not mean an element from A, an element from B, and an element from C, unless otherwise stated.

[0017] Embodiments of the present disclosure provide a method for manufacturing an EUV photomask. More specifically, the present disclosure provides a technique for preventing or suppressing damage on a backside conductive layer of an EUV photomask.

[0018] EUV lithography (EUVL) employs a scanner that uses light in the extreme ultraviolet region, which has a wavelength of about 1 nm to about 100 nm, for example, 13.5 nm. The mask is a key component of the EUVL system. Since optical materials are not transparent to EUV radiation, the EUV photomask is a reflective mask. The circuit pattern is formed in an absorber layer disposed above the reflective structure. The absorber has a low EUV reflectivity, for example, less than 3-5%.

[0019] The present disclosure provides an EUV reflective photomask having a low reflective (high absorption) absorber structure.

[0020] Figure 1 An EUV reflective photomask blank according to an embodiment of the present disclosure is shown. In some embodiments, an EUV photomask having a circuit pattern is formed from an EUV photomask blank 5. The EUV photomask blank 5 includes a substrate 10, a multilayer Mo / Si stack 15 composed of a plurality of alternating layers of silicon (Si) and molybdenum (Mo), a cap layer 20, an absorber layer 25, and a hard mask layer 30. In addition, a back conductive layer 45 is formed on the back side of the substrate 10, such as Figure 1 shown.

[0021] In some embodiments, substrate 10 is formed of a low thermal expansion material. In some embodiments, the substrate is a low thermal expansion glass or quartz, for example, fused silica or fused quartz. In some embodiments, the low thermal expansion glass substrate transmits light of visible wavelengths, a portion of infrared wavelengths (near infrared) close to the visible spectrum, and a portion of ultraviolet wavelengths. In some embodiments, the low thermal expansion glass substrate absorbs extreme ultraviolet wavelengths and deep ultraviolet wavelengths close to the extreme ultraviolet. In some embodiments, the size of substrate 10 is 152 mm×152 mm, with a thickness of about 20 mm.

[0022] In some embodiments, the Mo / Si multilayer stack 15 includes about 30 alternating layers of silicon and molybdenum to about 60 alternating layers of silicon and molybdenum. In certain embodiments, about 40 to about 50 alternating layers of silicon and molybdenum are formed. In some embodiments, for the wavelength of interest (e.g., 13.5nm), the reflectivity is higher than about 70%. In some embodiments, the silicon and molybdenum layers are formed by chemical vapor deposition (chemical vapor deposition, CVD), plasma enhanced CVD (plasmaenhanced CVD, PECVD), atomic layer deposition (atomic layer deposition, ALD), physical vapor deposition (physical vapor deposition, PVD) (sputtering), or any other suitable film formation method. Each layer of silicon and molybdenum is about 2nm to about 10nm thick. In some embodiments, the layers of silicon and molybdenum have about the same thickness. In other embodiments, the layers of silicon and molybdenum have different thicknesses. In some embodiments, the thickness of each silicon layer is about 4nm, and the thickness of each molybdenum layer is about 3nm.

[0023] In other embodiments, the multilayer stack 15 includes alternating layers of molybdenum and beryllium (Be). In some embodiments, the number of layers in the multilayer stack 15 is in the range of about 20 to about 100, but any number of layers is allowed as long as sufficient reflectivity is maintained to image the target substrate. In some embodiments, the reflectivity is higher than about 70% for wavelengths of interest (e.g., 13.5 nm). In some embodiments, the multilayer stack 15 includes about 30 to about 60 alternating layers of Mo and Be. In other embodiments of the present disclosure, the multilayer stack 15 includes about 40 to about 50 alternating layers of Mo and Be, respectively.

[0024] In some embodiments, a capping layer 20 is provided over the Mo / Si multilayer 15 to prevent oxidation of the multilayer stack 15. In some embodiments, the capping layer 20 is made of ruthenium, a ruthenium alloy (e.g., RuB, RuSi, or RuNb) or ruthenium oxide (e.g., RuO2 or RuNbO) and has a thickness of about 2 nm to about 10 nm. In certain embodiments, the thickness of the capping layer 20 is about 2 nm to about 4 nm. In some embodiments, the capping layer 20 has a thickness of 3.5 nm ± 10%. In some embodiments, the capping layer 20 is formed by chemical vapor deposition, plasma enhanced chemical vapor deposition, atomic layer deposition, physical vapor deposition (e.g., sputtering), or any other suitable film formation method. In other embodiments, a Si layer is used as the capping layer 20.

[0025] An absorber layer 25 is disposed over the cap layer 20. In an embodiment of the present disclosure, the absorber layer 25 has a multilayer structure as described below. In other embodiments, the absorber layer 25 includes a layer of cobalt (Co), tellurium (Te), hafnium (Hf), and / or Ni, or an alloy thereof.

[0026] In some embodiments, an anti-reflective layer (not shown) is optionally disposed above the absorber layer 25. In some embodiments, the anti-reflective layer is made of silicon oxide and has a thickness of about 2 nm to about 10 nm. In other embodiments, a tantalum boron oxide (TaBO) layer having a thickness in the range of about 12 nm to about 18 nm is used as the anti-reflective layer. In some embodiments, the thickness of the anti-reflective layer is about 3 nm to about 6 nm. In some embodiments, the anti-reflective layer is formed by chemical vapor deposition, plasma enhanced chemical vapor deposition, atomic layer deposition, physical vapor deposition, or any other suitable film formation method.

[0027] In some embodiments, a hard mask layer 30 is disposed above the absorber layer 25. In some embodiments, the hard mask layer 30 is formed above the anti-reflective layer. In some embodiments, the hard mask layer 30 is made of a tantalum matrix material, for example, tantalum boride (TaB), TaO, TaBO, or tantalum boronitride (TaBN). In other embodiments, the hard mask layer 30 is made of silicon, a silicon-based compound (e.g., SiN or SiON), a ruthenium-based compound (Ru or RuB). The hard mask layer 30 has a thickness of about 4 nm to about 20 nm. In some embodiments, the hard mask layer 30 is formed by chemical vapor deposition, plasma enhanced chemical vapor deposition, atomic layer deposition, physical vapor deposition, or any other suitable film formation method.

[0028] In some embodiments, the back conductive layer 45 is disposed on a second main surface of the substrate 10, which is opposite to the first main surface of the substrate 10 on which the Mo / Si multilayer 15 is formed. In some embodiments, the back conductive layer 45 is made of TaB or other tantalum-based conductive materials. In some embodiments, tantalum boride is crystalline. Crystalline tantalum boride includes TaB, Ta5B6, Ta3B4, and TaB2. In other embodiments, tantalum boride is polycrystalline or amorphous. In other embodiments, the back conductive layer 45 is made of a chromium-based conductive material (CrN or CrON). In some embodiments, the sheet resistance of the back conductive layer 45 is equal to or less than 20Ω / □. In some embodiments, the sheet resistance of the back conductive layer 45 is equal to or greater than 0.1Ω / □. In some embodiments, the surface roughness Ra of the back conductive layer 45 is equal to or less than 0.25nm. In some embodiments, the surface roughness Ra of the back conductive layer 45 is equal to or greater than 0.05nm. In addition, in some embodiments, the flatness of the back conductive layer 45 is equal to or less than 50nm (within the EUV photomask). In some embodiments, the flatness of the back conductive layer 45 is greater than 1 nm. In some embodiments, the thickness of the back conductive layer 45 is in the range of about 50 nm to about 400 nm. In other embodiments, the back conductive layer 45 has a thickness of about 50 nm to about 100 nm. In certain embodiments, the thickness is in the range of about 65 nm to about 75 nm. In some embodiments, the back conductive layer 45 is formed by atmospheric chemical vapor deposition (CVD), low pressure CVD, plasma enhanced CVD, laser enhanced CVD, atomic layer deposition (ALD), molecular beam epitaxy (MBE), physical vapor deposition (including thermal deposition, pulsed laser deposition), electron beam evaporation, ion beam assisted evaporation and sputtering, or any other suitable film formation method. In some embodiments, in the case of CVD, the source gas includes TaCl5 and BCl3.

[0029] Figure 2A-2GThe method of manufacturing an EUV photomask 5 for extreme ultraviolet lithography is schematically shown. It should be understood that in Figure 2A-2G Additional operations are provided before, during, and after the processes shown, and some of the operations described below may be replaced or eliminated for additional embodiments of the method. The order of operations / processes may be interchanged.

[0030] In the manufacture of the EUV photomask 5, a first photoresist layer 35 is formed over the hard mask layer 30 of the EUV photomask blank, and the photoresist layer 35 is selectively exposed to actinic radiation. Before forming the first photoresist layer 35, the EUV photomask blank is inspected. The selectively exposed first photoresist layer 35 is developed to form a pattern 40 in the first photoresist layer 35. In some embodiments, the actinic radiation is an electron beam or an ion beam. In some embodiments, the pattern 40 corresponds to the pattern of semiconductor device features to be formed using the EUV photomask 5 in subsequent operations.

[0031] Next, the pattern 40 in the first photoresist layer 35 is extended into the hard mask layer 30, thereby forming a pattern 41 in the hard mask layer 30 of the portion of the absorber layer 25 that has been exposed, as shown in FIG. Figure 2B In some embodiments, the pattern 41 extending into the hard mask layer 30 is formed by etching using a suitable wet or dry etchant that is selective to the hard mask layer 30. After the pattern 41 of the hard mask layer 30 is formed, the first photoresist layer 35 is removed by a photoresist stripper to expose the upper surface of the hard mask layer 30, as shown in FIG. Figure 2C shown.

[0032] Then, the pattern 41 in the hard mask layer 30 extends into the absorber layer 25, forming a pattern 42 in the absorber layer 25, exposing a portion of the cap layer 20, such as Figure 2D In some embodiments, the pattern 42 extending into the absorber body layer 25 is formed by etching using a suitable wet or dry etchant that is selective to the absorber layer 25. In some embodiments, plasma dry etching is used.

[0033] like Figure 2EAs shown, a second photoresist layer 45 is formed over the absorber layer 25, filling the pattern 42 in the absorber layer 25. The second photoresist layer 45 is selectively exposed to actinic radiation, such as an electron beam or UV radiation. The selectively exposed second photoresist layer 45 is developed to form a pattern 50 in the second photoresist layer 45. The pattern 50 corresponds to a black border surrounding the circuit pattern. The black border is a frame-shaped area created by removing all the multiple layers on the EUV photomask in the area around the circuit pattern area. It is created to prevent adjacent domains from being exposed when the EUV photomask is printed on the wafer. In some embodiments, the width of the black border is in the range of about 1 mm to about 5 mm.

[0034] Next, the pattern 50 in the second photoresist layer 45 extends into the absorber layer 25, the cap layer 20 and the Mo / Si multilayer 15, forming a pattern 51 in the absorber layer 25, the cap layer 20 and the Mo / Si multilayer 15, exposing a portion of the substrate 10, such as Figure 2F In some embodiments, the pattern 51 is formed by etching using one or more suitable wet or dry etchants that are selective to each layer being etched. In some embodiments, plasma dry etching is used.

[0035] Then, the second photoresist layer 45 is removed by a suitable photoresist stripper to expose the upper surface of the absorber layer 25. In some embodiments of the present disclosure, the absorber layer 25, the cap layer 20, and the pattern 51 in the Mo / Si multilayer 15 define the black boundary of the photomask 5, such as Figure 2G After the second photoresist layer is removed, the photomask 5 is cleaned, inspected, and repaired as necessary to provide a completed photomask 5 .

[0036] Figure 3A , Figure 3B , Figure 3C and Figure 3D A cross-sectional view of an EUV photomask according to an embodiment of the present disclosure is shown.

[0037] In the present disclosure, the absorber layer 25 has a multilayer structure having a first layer 120 and a second layer 125 that are alternately stacked. In some embodiments, the absorber layer 25 includes one or more alternating pairs of a first chromium matrix layer (as the first layer 120) and a second chromium matrix layer (as the second layer 125). In some embodiments, the first chromium matrix layer is CrN, and the second chromium matrix layer is CrON. In some embodiments, the ratio of O to N in CrON is in the range of about 0.2:0.8 to about 0.8:0.2. In other embodiments, the ratio of O to N in CrON is in the range of about 0.4:0.6 to about 0.6:0.4. In some embodiments, the amount of O (atomic percentage) is equal to or greater than the amount of N, and in other embodiments, the amount of O is less than the amount of N. In some embodiments, the first chromium matrix layer is Cr x Ni 1-x N. In some embodiments, 0≤x<0.5, and in other embodiments, 0.5≤x≤1.0. In some embodiments, the CrN material is pure CrN or a mixture of Cr2N and CrN. Generally, Cr2N is harder than CrN and therefore has a lower etching rate than CrN. The composition of the CrN layer can be changed by changing one or more film formation conditions (e.g., nitrogen flow rate).

[0038] In some embodiments, the first layer is tantalum cobalt alloy (TaCo) and the second layer is tantalum cobalt oxide (TaCoO). In some embodiments, the first layer is Hf and the second layer is hafnium oxide.

[0039] In some embodiments, the first layer 120 and the second layer 125 are amorphous.

[0040] In some embodiments, the number of pairs of the first layer 120 and the second layer 125 is two to six. In other embodiments, the number of pairs is three, four, or five. In certain embodiments, the number is three. In some embodiments, the absorber layer 25 includes a bottom absorber layer 110 disposed between the cap layer 20 and the pair of the first layer 120 and the second layer 125. In some embodiments, the bottom absorber layer 110 is a tantalum matrix layer including TaB, TaO, TaBO and / or TaBN. In certain embodiments, the bottom absorber layer 110 is TaBO. In some embodiments, the thickness of the bottom absorber layer 110 is in a range of about 0.5 nm to about 5 nm, and in other embodiments, in a range of about 1 nm to about 3 nm. In some embodiments, the thickness of the bottom absorber layer 110 is 2 nm ± 10%.

[0041] like Figure 3A As shown, in some embodiments, in each pair (e.g., four pairs), the second layer 125 is disposed on the first layer 120. In other embodiments, as shown in FIG. Figure 3BAs shown, in each pair (e.g., four pairs), the first layer 120 is disposed on the second layer 125. Figure 3A and Figure 3B , the number of first layers 120 is equal to the number of second layers 125 .

[0042] In some embodiments, Figure 3C As shown, in each pair (e.g., three pairs), the second layer 125 is disposed on the first layer 120, and additional first layers 120 are further formed on the three pairs. Therefore, the number of pairs is 3.5. In other embodiments, as Figure 3D As shown, in each pair (e.g., three pairs), the first layer 120 is disposed on the second layer 125, and an additional second layer 125 is further formed on the three pairs. Therefore, the number of pairs is 3.5. Figure 3B and Figure 3C , the number of the first layer 120 is different from the number of the second layer 125, and the difference in number is one.

[0043] In some embodiments, the absorber layer 25 includes four CrN layers as the first layer 120 and three CrON layers as the second layer 125, such as Figure 3C In other embodiments, the absorber layer 25 includes three CrN layers as the first layer 120 and four CrON layers as the second layer 125. Figure 3D Alternate stacking as shown.

[0044] In some embodiments, the thickness of each of the first layer 120 and the second layer 125 is in the range of 1 nm to 8 nm. In some embodiments, the thickness of each of the first layer 120 and the second layer 125 is less than half the wavelength of EUV light. In some embodiments, the thicknesses of the first layer 120 and the second layer 125 are equal to each other. In other embodiments, the thickness of the first layer 120 is greater than or less than the thickness of the second layer 125. In some embodiments, the thickness of the first layer 120 and / or the second layer 120 is 1 nm ± 10%, 2 nm ± 10%, 3 nm ± 10%, 4 nm ± 10%, 5 nm ± 10%, 6 nm ± 10%, 7 nm ± 10%, or 8 nm ± 10%. In other embodiments, the thickness of the first layer 120 and / or the second layer 120 is 1 nm ± 5%, 2 nm ± 5%, 3 nm ± 5%, 4 nm ± 5%, 5 nm ± 5%, 6 nm ± 5%, 7 nm ± 5%, or 8 nm ± 5%. In some embodiments, the thickness of the first layer 120 in the absorber layer 25 varies by less than 10% of the average thickness of the first layer 120. In some embodiments, the thickness of the second layer 125 in the absorber layer 25 varies by less than 10% of the average thickness of the second layer 125. In some embodiments, the thickness of the first layer 120 and / or the second layer 125 increases with increasing distance from the substrate. In other embodiments, the thickness of the first layer 120 and / or the second layer 125 decreases with increasing distance from the substrate.

[0045] In some embodiments, the absorber layer 25 includes four CrN layers each having a thickness of 6 nm±10% as the first layer 120, and three CrON layers each having a thickness of 5 nm±10% as the second layer 125, such as Figure 3C In other embodiments, the absorber layer 25 includes three CrN layers with a thickness of 6 nm ± 10% as the first layer 120, and four CrON layers with a thickness of 5 nm ± 10% as the second layer 125, as shown in FIG. Figure 3D Alternate stacking as shown.

[0046] In some embodiments, the total thickness of absorber layer 25 including bottom absorber layer 110 and multiple layers of first layer 120 and second layer 125 is greater than about 30 nm and less than about 50 nm. In certain embodiments, the total thickness of absorber layer 25 is less than about 45 nm.

[0047] Figure 4A-4G and Figure 5A-5G The sequential operations of manufacturing an EUV reflective photomask according to an embodiment of the present disclosure are schematically shown. It should be understood that in Figure 4A-4G and Figure 5A-5GAdditional operations are provided before, during, and after the processes shown, and some operations described below may be replaced or eliminated for additional embodiments of the method. The order of operations / processes may be interchangeable. The materials, configurations, processes, and / or dimensions explained with respect to the previous embodiments may be used in the following embodiments, and their detailed descriptions may be omitted.

[0048] Figure 4A-4G The following schematically illustrates the sequential operations of manufacturing an EUV reflective photomask according to an embodiment of the present disclosure. In manufacturing an EUV photomask, a multilayer stack 15 is formed on a substrate 10, such as Figure 4A As shown. In some embodiments, the multilayer stack 15 includes a plurality of alternating layers of silicon and molybdenum. In some embodiments, the thickness of each silicon layer is about 4 nm, and the thickness of each molybdenum layer is about 3 nm. In some embodiments, the silicon and molybdenum layers are formed by CVD, plasma enhanced CVD, ALD, ion beam deposition, sputtering, or any other suitable film formation method.

[0049] Then, if Figure 4B As shown, a cap layer 20 and a bottom absorber layer 110 are formed over the multilayer stack 15. In some embodiments, the cap layer includes Ru or a Ru alloy and is formed by CVD, plasma enhanced CVD, ALD, ion beam deposition, sputtering, or any other suitable film formation method.

[0050] The bottom absorber layer 110 is a tantalum matrix layer formed by CVD, plasma enhanced CVD, ALD, ion beam deposition, sputtering, or any other suitable film formation method, including TaB, TaO, TaBO and / or TaBN. In some embodiments, the bottom absorber layer 110 is TaBO with a thickness of 2nm±10%. In some embodiments, the bottom absorber layer 110 is used as an etch stop layer.

[0051] In addition, if FIG. 4C to FIG. 4E As shown, the first layer 120 and the second layer 125 are alternately formed on the bottom absorbent layer 110. In some embodiments, the first layer 120 is formed on the bottom absorbent layer 110, and then the second layer 125 is formed on the first layer. In other embodiments, the second layer 125 is formed on the bottom absorbent layer 110, and then the first layer 120 is formed on the second layer. Figure 4E As shown, the formation of the first layer 120 and the second layer 125 is repeated to obtain the absorber layer 25 .

[0052] When the first layer 120 is made of CrN and the second layer 125 is made of CrON, the CrN layer is formed by sputtering using a Cr target and a nitrogen-containing gas (e.g., N2), and the CrON layer is formed by sputtering using a Cr target and a nitrogen- and oxygen-containing gas (e.g., a mixture of O2 and N2). By changing the flow ratio of O2 and N2, the ratio of O and N in the CrON layer can be controlled. The sputtering gas may further contain Ar, He and / or Ne. In some embodiments, by controlling the flow rate (on / off) of O2, a multilayer of CrN and CrON is formed.

[0053] Then, if Figure 4F As shown, a hard mask layer 30 is formed on the absorber layer 25. The hard mask layer 30 is a tantalum matrix layer formed by CVD, plasma enhanced CVD, ALD, ion beam deposition, sputtering, or any other suitable film formation method, including TaB, TaO, TaBO and / or TaBN. In some embodiments, the material of the hard mask layer 30 is the same or similar to the bottom absorber layer. In some embodiments, the thickness of the hard mask layer 30 is in the range of about 2nm to about 10nm. In some embodiments, the hard mask layer 30 is TaBO with a thickness of 6nm±10%.

[0054] Furthermore, if Figure 4G As shown, a back side conductive layer 45 is formed on the back side of the substrate 10 by CVD, plasma enhanced CVD, ALD, ion beam deposition, sputtering, or any other suitable film forming method, thereby obtaining a mask blank.

[0055] Figure 5A-5G The sequential operations of an EUV reflective photomask having a circuit pattern according to an embodiment of the present disclosure are schematically illustrated.

[0056] like Figure 5A As shown in FIG. 1 , a photoresist layer 35 is formed over the hard mask layer 30 of the EUV photomask blank. Then, as shown in FIG. Figure 5B As shown, the photoresist layer 35 is selectively exposed to actinic radiation 100, such as an electron beam or an ion beam. The selectively exposed photoresist layer 35 is developed to form a circuit pattern 40 in the photoresist layer 35, such as Figure 5C shown.

[0057] Next, the pattern 40 in the photoresist layer 35 extends into the hard mask layer 30 to form a pattern 41 in the hard mask layer 30, exposing a portion of the top layer (eg, the second layer 125 or the first layer 120) of the absorber layer 25, such as Figure 5DIn some embodiments, the pattern 41 extending into the hard mask layer 30 is formed by etching using a suitable wet or dry etchant that is selective to the hard mask layer 30. After the pattern 41 of the hard mask layer 30 is formed, the photoresist layer 35 is removed by a photoresist stripper to expose the upper surface of the hard mask layer 30, as shown in FIG. Figure 5E shown.

[0058] Then, the pattern 41 in the hard mask layer 30 extends into the absorber layer 25, forming a pattern 42 in the absorber layer 25, such as Fig. 5F Since the bottom absorber layer 110 is made of the same material as or a similar material to the hard mask layer 30, etching substantially stops at the surface of the bottom absorber layer 110, as shown in FIG. Fig. 5F shown.

[0059] In some embodiments, when the first layer 120 and the second layer 125 of the absorber layer 25 are made of a chromium matrix material (CrN, CrON), plasma dry etching using a Cl-containing gas is used. In some embodiments, the Cl-containing gas is a mixture of Cl2 and / or CCl4 and O2. In certain embodiments, a mixture of Cl2 and O2 is used.

[0060] When the first layer 120 is CrN and the second layer 125 is CrON, the plasma uses a mixture of Cl2 and O2, and the etching rate of CrON using the plasma using the mixture of Cl2 and O2 is higher than the etching rate of the CrN layer. Therefore, compared with the case where the absorber layer 25 includes a bulk CrN layer, etching is easier to control. For example, the profile of the vertical side of the pattern 42 is substantially perpendicular to the substrate 10. In other embodiments, a gas containing fluorine (e.g., CF3H and / or CF4) can be used together with the O2 gas.

[0061] Then, if Figure 5G As shown, the hard mask layer 30 and the exposed portion of the bottom absorber layer 110 are removed by using an appropriate etching operation. The "similar" materials of the hard mask layer 30 and the bottom absorber layer 110 mean that the hard mask layer 30 and the exposed portion of the bottom absorber layer 110 are removed together, and the bottom absorber layer 110 serves as an etch stop layer.

[0062] In such Figure 5G After forming the circuit pattern 43 as shown in FIG. Figure 2E-2G The explained operations form a black boundary, and a cleaning operation and an inspection operation are performed to provide a completed photomask.

[0063] Fig. 6A , Figure 6B and Figure 6CA cross-sectional view of a multilayer structure of an absorber layer according to another embodiment of the present disclosure is shown.

[0064] As described above, when the first layer 120 and the second layer 125 are made of different materials, the etching rate of the first layer is different from the etching rate of the second layer. In some embodiments, when the etching rate of the first layer is less than the etching rate of the second layer, the side profile of the etched absorber layer 25 has the following characteristics: Fig. 6A In some embodiments, the distance D1 between the lateral end of the first layer 120 and the lateral end of the second layer 125 is in the range of about 0.5 nm to about 2 nm. Since the thickness of each of the first layer 120 and the second layer 125 is sufficiently smaller than the wavelength of EUV light, such non-uniformity does not affect patterning in EUV lithography.

[0065] In some embodiments, when the etching rate of the first layer 120 is relatively low, the side profile of the first layer 120 has a shape as follows: Figure 6B In some embodiments, the taper angle TH is in the range of about 5 degrees to about 15 degrees. In other embodiments, the side profile of the second layer 125 also has a tapered shape, and its taper angle is in the range of about 1 degree to about 10 degrees, and in some embodiments, is smaller than the taper angle TH of the first layer 120.

[0066] Furthermore, in some embodiments, when the first layer 120 is CrN, the etched side surface of the first layer 120 is slightly oxidized to form an oxidized portion 122 (CrON portion), such as Figure 6C In some embodiments, the thickness D2 of the oxidized portion 122 is in a range from about 0.1 nm to about 2 nm.

[0067] Figure 7 Simulation results of the reflectivity of various absorber structures are shown.

[0068] Line L1 shows the reflectivity of an absorber layer having a TaBN layer formed on a 2 nm TaBO layer, line L2 shows the reflectivity of an absorber layer having a CrN layer formed on a 2 nm TaBO layer, and line L3 shows the reflectivity of an absorber layer having a CrON layer formed on a 2 nm TaBO layer. The triangular shape shows the reflectivity of an absorber layer having alternating layers of CrN and CrON formed on a 2 nm TaBO layer, wherein the CrN layer is in contact with the TaBO layer. The square shape shows the reflectivity of an absorber layer having alternating layers of CrN and CrON formed on a 2 nm TaBO layer, wherein the CrON layer is in contact with the TaBO layer. The thickness of each CrN layer is set to 6 nm, and the thickness of each CrON layer is set to 5 nm.

[0069] like Figure 7As shown, when the absorber layer has four CrN layers and three CrON layers on the TaBO layer (3.5 pairs, with a total thickness of 41 nm), the reflectivity is about 1.7%. When the absorber layer has three CrN layers and four CrON layers on the TaBO layer (3.5 pairs, with a total thickness of 40 nm), the reflectivity is about 2.0%. In order to obtain a reflectivity of less than 2%, in the case of line L1, a thickness of about 70 nm is required. The multilayer structure of CrN and CrON can achieve a low reflectivity of less than about 2.0%, while the total absorber thickness is less than about 45 nm.

[0070] Fig. 8A A flowchart showing a method of manufacturing a semiconductor device, and Figure 8B , Figure 8C , Fig.8D and Fig. 8E Sequential manufacturing operations of a method for manufacturing a semiconductor device according to an embodiment of the present disclosure are shown. A semiconductor substrate or other suitable substrate patterned to form an integrated circuit thereon is provided. In some embodiments, the semiconductor substrate includes silicon. Alternatively or additionally, the semiconductor substrate includes germanium, silicon germanium, or other suitable semiconductor material, for example, a III-V semiconductor material. Fig. 8A At S101, a target layer to be patterned is formed above a semiconductor substrate. In some embodiments, the target layer is a semiconductor substrate. In some embodiments, the target layer includes a conductive layer (e.g., a metal layer or a polysilicon layer), a dielectric layer (e.g., silicon oxide, silicon nitride, SiON, SiOC, SiOCN, SiCN, hafnium oxide, or aluminum oxide), or a semiconductor layer (e.g., an epitaxially formed semiconductor layer). In some embodiments, the target layer is formed above an underlying structure, such as an isolation structure, a transistor, or a wiring. Fig. 8A At S102, a photoresist layer is formed above the target layer, such as Figure 8B As shown. During the subsequent photolithography exposure process, the photoresist layer is sensitive to radiation from the exposure source. In this embodiment, the photoresist layer is sensitive to EUV light used in the photolithography exposure process. The photoresist layer can be formed over the target layer by spin coating or other suitable techniques. The applied photoresist layer can be further baked to drive off the solvent in the photoresist layer. Fig. 8A At S103, the photoresist layer is patterned using the EUV reflective mask as described above, such as Figure 8BAs shown. The patterning of the photoresist layer includes performing a lithography exposure process by an EUV exposure system using an EUV mask. During the exposure process, the integrated circuit (IC) design pattern defined on the EUV mask is imaged onto the photoresist layer to form a latent pattern thereon. The patterning of the photoresist layer further includes developing the exposed photoresist layer to form a patterned photoresist layer having one or more openings. In an embodiment in which the photoresist layer is a positive photoresist layer, the exposed portion of the photoresist layer is removed during the development process. The patterning of the photoresist layer may further include other process steps, for example, various baking steps at different stages. For example, a post-exposure bake (PEB) process may be implemented after the lithography exposure process and before the development process.

[0071] exist Fig. 8A At S104, the target layer is patterned using the patterned photoresist layer as an etching mask, such as Fig.8D In some embodiments, patterning the target layer includes applying an etching process to the target layer using the patterned photoresist layer as an etching mask. Portions of the target layer exposed within the openings of the patterned photoresist layer are etched, while the remaining portions are protected from etching. In addition, the patterned photoresist layer may be removed by wet stripping or plasma ashing, such as Fig. 8E shown.

[0072] In the present disclosure, by using a multilayer structure for the absorber layer, even if the absorber layer includes a material with a low etching rate (e.g., CrN), the etching rate can be improved and a substantially vertical side profile can be obtained at the patterned absorber layer. In addition, a thinner absorber layer with sufficiently low reflectivity (high absorptivity) can be obtained.

[0073] It will be understood that not all advantages are necessarily discussed herein, that a particular advantage is not required for all embodiments or examples, and that other embodiments or examples may provide different advantages.

[0074] According to one aspect of the present application, a reflective mask includes: a substrate; a reflective multilayer disposed on the substrate; a cap layer disposed on the reflective multilayer; and an absorber layer disposed on the cap layer. The absorber layer includes one or more alternating pairs of a first chromium matrix layer and a second chromium matrix layer, the second chromium matrix layer being different from the first chromium matrix layer. In one or more of the foregoing and following embodiments, the first chromium matrix layer is chromium nitride (CrN) or nickel chromium nitride (CrNiN), and the second chromium matrix layer is chromium oxynitride (CrON). In one or more of the foregoing and following embodiments, the number of pairs of the first chromium matrix layer and the second chromium matrix layer is three to six. In one or more of the foregoing and following embodiments, the absorber layer includes three pairs of the first chromium matrix layer and the second chromium matrix layer. In one or more of the foregoing and following embodiments, in each of the three pairs, the second chromium matrix layer is disposed on the first chromium matrix layer. In one or more of the foregoing and following embodiments, the absorber layer also includes a top chromium matrix layer disposed on the three pairs, and the top chromium matrix layer is made of the same material as the first chromium matrix layer. In one or more of the foregoing and following embodiments, in each of the three pairs, the first chromium matrix layer is disposed on the second chromium matrix layer. In one or more of the foregoing and following embodiments, the absorber layer further comprises a top chromium matrix layer disposed on the three pairs, and the top chromium matrix layer is made of the same material as the second chromium matrix layer. In one or more of the foregoing and following embodiments, the absorber layer further comprises a tantalum matrix layer disposed between the cap layer and one or more alternating pairs of the first chromium matrix layer and the second chromium matrix layer.

[0075] According to another aspect of the present disclosure, a reflective mask includes: a substrate; a reflective multilayer disposed on the substrate; a cap layer disposed on the reflective multilayer; and an absorber layer disposed on the cap layer. The absorber layer includes alternating stacked chromium nitride (CrN) layers and chromium oxynitride (CrON) layers, and the thickness of each CrN layer is in the range of 1nm to 8nm, and the thickness of each CrON layer is in the range of 1nm to 8nm. In one or more of the foregoing and following embodiments, the total thickness of the absorber layer is less than 45nm. In one or more of the foregoing and following embodiments, the thickness of each CrN layer is greater than the thickness of each CrON layer. In one or more of the foregoing and following embodiments, the thickness of each CrN layer is 6nm±10%, and the thickness of each CrON layer is 5nm±10%. In one or more of the foregoing and following embodiments, the number of CrN layers is four, and the number of CrON layers is three, and one of the CrN layers is in contact with the cap layer. In one or more of the foregoing and following embodiments, the number of CrN layers is equal to the number of CrON layers. In one or more of the foregoing and following embodiments, the difference between the number of CrN layers and the number of CrON layers is one.

[0076] According to another aspect of the present disclosure, a reflective mask includes: a substrate; a reflective multilayer disposed on the substrate; a cap layer disposed on the reflective multilayer; and an absorber layer disposed on the cap layer. The absorber layer includes two or more pairs of a first layer and a second layer, the second layer being different from the first layer. In one or more of the foregoing and following embodiments, the first layer is CrN or CrNiN, and the second layer is CrON. In one or more of the foregoing and following embodiments, the first layer is TaCo, and the second layer is TaCoO. In one or more of the foregoing and following embodiments, the first layer is Hf, and the second layer is hafnium oxide.

[0077] According to one aspect of the present disclosure, in a method of manufacturing a semiconductor device, a target layer is formed over a substrate, a photoresist layer is formed over the target layer, the photoresist layer is patterned by EUV lithography using a reflective photomask, and the target layer is patterned by using the patterned photoresist layer as an etching mask. The reflective photomask is a reflective mask among any of the reflective masks described above.

[0078] According to one aspect of the present disclosure, in a method for manufacturing a reflective mask, a photoresist layer is formed over a mask blank. The mask blank includes a substrate, a reflective multilayer on the substrate, a cap layer on the reflective multilayer, an absorber layer on the cap layer, and a hard mask layer. The photoresist layer is patterned. The hard mask layer is patterned by using the patterned photoresist layer. The absorber layer is patterned by using the patterned hard mask layer. The absorber layer includes two or more pairs of a first chromium matrix layer and a second chromium matrix layer, and the second chromium matrix layer is different from the first chromium matrix layer. In one or more of the foregoing and following embodiments, the absorber layer also includes a tantalum matrix layer, located between the cap layer and the two or more pairs of the first chromium matrix layer and the second chromium matrix layer, and the hard mask layer is made of a tantalum-based material. In one or more of the foregoing and following embodiments, after the hard mask layer is patterned, the patterned photoresist layer is removed. When patterning the absorber layer, the two or more pairs of the first chromium matrix layer and the second chromium matrix layer are patterned to form a space, and a portion of the tantalum matrix layer and the hard mask layer are removed in the space. In one or more of the foregoing and following embodiments, the first chromium matrix layer is CrN, and the second chromium matrix layer is CrON. In one or more of the foregoing and following embodiments, the number of pairs of the first chromium matrix layer and the second chromium matrix layer is three to six. In one or more of the foregoing and following embodiments, the absorber layer includes three pairs of the first chromium matrix layer and the second chromium matrix layer. In one or more of the foregoing and following embodiments, the absorber layer is patterned by plasma etching using a chlorine-containing gas. In one or more of the foregoing and following embodiments, the chlorine-containing gas is a mixture of Cl2 and O2. In one or more of the foregoing and following embodiments, the chlorine-containing gas is a mixture of CCl4 and O2.

[0079] According to another aspect of the present disclosure, in a method for manufacturing a reflective mask, a photoresist layer is formed over a mask blank. The mask blank includes a substrate, a reflective multilayer on the substrate, a cap layer on the reflective multilayer, an absorber layer on the cap layer, and a hard mask layer. The photoresist layer is patterned. The hard mask layer is patterned by using the patterned photoresist layer. The absorber layer is patterned by using the patterned hard mask layer. The absorber layer includes alternating stacked CrN layers and CrON layers. In one or more of the foregoing and following embodiments, the thickness of each CrN layer is in the range of 1nm to 8nm, and the thickness of each CrON layer is in the range of 1nm to 8nm. In one or more of the foregoing and following embodiments, the total thickness of the absorber layer is less than 45nm. In one or more of the foregoing and following embodiments, the thickness of each CrN layer is greater than the thickness of each CrON layer. In one or more of the foregoing and following embodiments, the thickness of each CrN layer is 6nm±5%, and the thickness of each CrON layer is 5nm±5%. In one or more of the foregoing and following embodiments, the number of CrN layers is four and the number of CrON layers is three, and one of the CrN layers is in contact with the cap layer. In one or more of the foregoing and following embodiments, the number of CrN layers is equal to the number of CrON layers. In one or more of the foregoing and following embodiments, the difference between the number of CrN layers and the number of CrON layers is one.

[0080] According to another aspect of the present disclosure, in a method for manufacturing a reflective mask, a photoresist layer is formed over a mask blank. The mask blank includes a substrate, a reflective multilayer on the substrate, a cap layer on the reflective multilayer, an absorber layer on the cap layer, and a hard mask layer. The photoresist layer is patterned. The hard mask layer is patterned by using the patterned photoresist layer. The absorber layer is patterned by using the patterned hard mask layer. The absorber layer includes two or more pairs of a first layer and a second layer, the second layer being different from the first layer. In one or more of the foregoing and following embodiments, the first layer is CrN or CrNiN, and the second layer is CrON. In one or more of the foregoing and following embodiments, the first layer is TaCo, and the second layer is TaCoO.

[0081] The features of several embodiments and examples are summarized above so that those skilled in the art can better understand the various aspects of the present disclosure. Those skilled in the art should understand that they can easily use the present disclosure as a basis for designing or modifying other processes and structures to achieve the same purpose of the embodiments and examples introduced herein and / or achieve the same advantages of the embodiments and examples introduced herein. Those skilled in the art should also recognize that such equivalent constructions do not depart from the spirit and scope of the present disclosure, and they can make various changes, substitutions and modifications herein without departing from the spirit and scope of the present disclosure.

[0082] Example 1 is a reflective mask comprising: a substrate; a reflective multilayer disposed on the substrate; a cap layer disposed on the reflective multilayer; and an absorber layer disposed on the cap layer, wherein the absorber layer comprises one or more alternating pairs of a first chromium matrix layer and a second chromium matrix layer, the second chromium matrix layer being different from the first chromium matrix layer.

[0083] Example 2 is the reflective mask of Example 1, wherein the first chromium matrix layer is chromium nitride or nickel chromium nitride, and the second chromium matrix layer is chromium oxynitride.

[0084] Example 3 is the reflective mask of Example 2, wherein the number of pairs of the first chromium matrix layer and the second chromium matrix layer is three to six.

[0085] Example 4 is the reflective mask of Example 2, wherein the absorber layer includes three pairs of the first chromium matrix layer and the second chromium matrix layer.

[0086] Example 5 is the reflective mask of Example 4, wherein in each of the three pairs, the second chromium matrix layer is disposed on the first chromium matrix layer.

[0087] Example 6 is the reflective mask of Example 5, wherein the absorber layer further comprises a top chromium matrix layer disposed on the three pairs, and the top chromium matrix layer is made of the same material as the first chromium matrix layer.

[0088] Example 7 is the reflective mask of Example 4, wherein in each of the three pairs, the first chromium matrix layer is disposed on the second chromium matrix layer.

[0089] Example 8 is the reflective mask of Example 7, wherein the absorber layer further comprises a top chromium matrix layer disposed on the three pairs, and the top chromium matrix layer is made of the same material as the second chromium matrix layer.

[0090] Example 9 is the reflective mask of Example 2, wherein the absorber layer further comprises a tantalum matrix layer located between the cap layer and the one or more alternating pairs of the first chromium matrix layer and the second chromium matrix layer.

[0091] Example 10 is a reflective mask comprising: a substrate; a reflective multilayer disposed on the substrate; a cap layer disposed on the reflective multilayer; and an absorber layer disposed on the cap layer, wherein: the absorber layer comprises alternatingly stacked chromium nitride layers and chromium oxynitride layers, and the thickness of each of the chromium nitride layers is in the range of 1nm to 8nm, and the thickness of each of the chromium oxynitride layers is in the range of 1nm to 8nm.

[0092] Example 11 is the reflective mask of Example 10, wherein the total thickness of the absorber layer is less than 45 nm.

[0093] Example 12 is the reflective mask of Example 10, wherein the thickness of each of the chromium nitride layers is greater than the thickness of each of the chromium oxynitride layers.

[0094] Example 13 is the reflective mask of Example 10, wherein the thickness of each of the chromium nitride layers is 6 nm±10%, and the thickness of each of the chromium oxynitride layers is 5 nm±10%.

[0095] Example 14 is the reflective mask of Example 13, wherein the number of the chromium nitride layers is four, the number of the chromium oxynitride layers is three, and one of the chromium nitride layers is in contact with the cap layer.

[0096] Example 15 is the reflective mask of Example 10, wherein the number of the chromium nitride layers is equal to the number of the chromium oxynitride layers.

[0097] Example 16 is the reflective mask of Example 10, wherein the difference between the number of the chromium nitride layers and the number of the chromium oxynitride layers is one.

[0098] Example 17 is a method for manufacturing a reflective mask, the method comprising: forming a photoresist layer over a mask blank, the mask blank comprising a substrate, a reflective multilayer on the substrate, a cap layer on the reflective multilayer, an absorber layer on the cap layer, and a hard mask layer; patterning the photoresist layer; patterning the hard mask layer by using the patterned photoresist layer; and patterning the absorber layer by using the patterned hard mask layer, wherein the absorber layer comprises two or more pairs of a first chromium matrix layer and a second chromium matrix layer, the second chromium matrix layer being different from the first chromium matrix layer.

[0099] Example 18 is the method of Example 17, wherein the absorber layer further comprises a tantalum matrix layer between the cap layer and the two or more pairs of first chromium matrix layers and second chromium matrix layers, and the hard mask layer is made of a tantalum matrix material.

[0100] Example 19 is the method described in Example 18, wherein: after the hard mask layer is patterned, the patterned photoresist layer is removed, and patterning the absorber layer includes: patterning the two or more pairs of the first chromium matrix layer and the second chromium matrix layer to form a space; and removing the portion of the tantalum matrix layer located in the space and the hard mask layer.

[0101] Example 20 is the method of Example 17, wherein the first chromium matrix layer is chromium nitride and the second chromium matrix layer is chromium oxynitride.

Claims

1. A reflective mask, comprising: substrate; a reflective multilayer disposed on the substrate; A cap layer, disposed on the reflective multilayer; as well as an absorbent layer, disposed on the cap layer, Wherein, the absorber layer comprises one or more alternating pairs of a first chromium matrix layer and a second chromium matrix layer, the second chromium matrix layer being different from the first chromium matrix layer, wherein the first chromium matrix layer is chromium nitride or nickel chromium nitride, and the second chromium matrix layer is chromium oxynitride.

2. The reflective mask according to claim 1, wherein: The number of pairs of the first chromium matrix layer and the second chromium matrix layer is three to six.

3. The reflective mask according to claim 1, wherein: The absorber layer includes three pairs of the first chromium matrix layer and the second chromium matrix layer.

4. The reflective mask according to claim 3, wherein: In each of the three pairs, the second chromium matrix layer is disposed on the first chromium matrix layer.

5. The reflective mask according to claim 4, wherein: The absorber layer further includes a top chromium matrix layer disposed on the three pairs, and the top chromium matrix layer is made of the same material as the first chromium matrix layer.

6. The reflective mask according to claim 3, wherein: In each of the three pairs, the first chromium matrix layer is disposed on the second chromium matrix layer.

7. The reflective mask according to claim 6, wherein: The absorber layer further includes a top chromium matrix layer disposed on the three pairs, and the top chromium matrix layer is made of the same material as the second chromium matrix layer.

8. The reflective mask according to claim 1, wherein: The absorber layer also includes a tantalum matrix layer between the cap layer and the one or more alternating pairs of the first chromium matrix layer and the second chromium matrix layer.

9. A reflective mask comprising: substrate; a reflective multilayer disposed on the substrate; A cap layer, disposed on the reflective multilayer; as well as An absorber layer is disposed on the cap layer, wherein: The absorber layer includes chromium nitride layers and chromium oxynitride layers stacked alternately, and The thickness of each of the chromium nitride layers is in the range of 1 nm to 8 nm, and the thickness of each of the chromium oxynitride layers is in the range of 1 nm to 8 nm.

10. The reflective mask according to claim 9, wherein: The total thickness of the absorber layer is less than 45 nm.

11. The reflective mask according to claim 9, wherein: The thickness of each of the chromium nitride layers is greater than the thickness of each of the chromium oxynitride layers.

12. The reflective mask according to claim 9, wherein: The thickness of each of the chromium nitride layers is 6 nm±10%, and the thickness of each of the chromium oxynitride layers is 5 nm±10%.

13. The reflective mask according to claim 12, wherein: The number of the chromium nitride layers is four, the number of the chromium oxynitride layers is three, and one of the chromium nitride layers is in contact with the cap layer.

14. The reflective mask according to claim 9, wherein: The number of the chromium nitride layers is equal to the number of the chromium oxynitride layers.

15. The reflective mask according to claim 9, wherein: The difference between the number of the chromium nitride layers and the number of the chromium oxynitride layers is one.

16. A method for manufacturing a reflective mask, the method comprising: forming a photoresist layer over a mask blank, the mask blank comprising a substrate, a reflective multilayer on the substrate, a capping layer on the reflective multilayer, an absorber layer on the capping layer, and a hard mask layer; patterning the photoresist layer; patterning the hard mask layer by using a patterned photoresist layer; as well as patterning the absorber layer by using a patterned hard mask layer, wherein the absorber layer comprises two or more pairs of a first chromium matrix layer and a second chromium matrix layer, wherein the second chromium matrix layer is different from the first chromium matrix layer, The absorber layer further comprises a tantalum matrix layer located between the cap layer and the two or more pairs of the first chromium matrix layer and the second chromium matrix layer, and The hard mask layer is made of a tantalum matrix material.

17. The method of claim 16, wherein: After the hard mask layer is patterned, removing the patterned photoresist layer, and Patterning the absorber layer includes: patterning the two or more pairs of the first chromium matrix layer and the second chromium matrix layer to form a space; A portion of the tantalum base layer located in the space and the hard mask layer are removed.

18. The method according to claim 16, wherein: The first chromium matrix layer is chromium nitride and the second chromium matrix layer is chromium oxynitride.

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