Light detection device and method for manufacturing light detection device

By forming APD and temperature compensation diodes on the semiconductor substrate of the photodetection device, and absorbing carriers using the peripheral carrier absorbing part, the problem of difficulty in improving detection accuracy in suppressing manufacturing costs is solved in the prior art, and the problem of realizing the problem of High-precision temperature compensation and cost reduction.

CN113167642BActive Publication Date: 2025-01-17HAMAMATSU PHOTONICS KK
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Patent Information

Application Number
CN201980081954.0
Authority / Receiving Office
CN · China
Patent Type
Patents(China)
Current Assignee / Owner
Priority Date
2018-12-12
Filing Date
2019-11-29
Publication Date
2025-01-17
Estimated Expiration
2039-11-29

AI Technical Summary

Technical Problem

现有光检测装置在实现温度补偿时,难以在抑制制造成本的同时提高检测精度,且需要对APD的放大率与偏置电压的关系进行复杂的检查和组合。

Method used

By forming APD and temperature compensation diodes on the semiconductor substrate, and absorbing carriers emitted by the temperature compensation diodes using the peripheral carrier absorber, high-precision temperature compensation for APD is achieved, reducing the diodes for APD and temperature compensation complex combination requirements.

Benefits of technology

It is realized that the detection accuracy of the light detection device is improved while suppressing the manufacturing cost, simplifying the combination process of APD and the diode for temperature compensation is used, and reducing the manufacturing cost.

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Abstract

The light detection device (1) includes a semiconductor substrate (10). In the semiconductor substrate (10), an APD (11) and a temperature compensation diode (12) are formed to be spaced apart from each other when viewed from a direction perpendicular to a main surface (10a). The semiconductor substrate (10) has a peripheral carrier absorption portion (13) for absorbing carriers located in the periphery between the APD (11) and the temperature compensation diode (12) when viewed from a direction perpendicular to the main surface (10a). On a line segment connecting the APD (11) and the temperature compensation diode (12) at the shortest distance when viewed from a direction perpendicular to the main surface (10a), the shortest distance between the APD (11) and the peripheral carrier absorption portion (13) is smaller than the shortest distance between a portion (13c) of an edge (13a, 13b) of the peripheral carrier absorption portion (13) closest to the APD (11) and the temperature compensation diode (12) .
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Description

Technical Field

[0001] The present invention relates to a light detection device and a method for manufacturing the light detection device. Background Art

[0002] In order to perform stable light detection for temperature, a configuration for controlling the bias voltage applied to an avalanche photodiode is known (for example, Patent Document 1). In Patent Document 1, a voltage corresponding to the breakdown voltage of a temperature compensation diode is applied to the avalanche photodiode as a bias voltage. Hereinafter, in this specification, an "avalanche photodiode" is referred to as an "APD".

[0003] Prior art literature

[0004] Patent Literature

[0005] Patent Document 1: Japanese Patent Application Laid-Open No. 07-27607 Summary of the invention

[0006] Problems to be solved by the invention

[0007] In Patent Document 1, in order to achieve temperature compensation for the multiplication rate of the APD for signal detection, an APD having the same temperature characteristics as the APD for signal detection is used as the temperature compensation diode. The closer the temperature characteristics of the APD for signal detection and the APD for temperature compensation are, the higher the accuracy of temperature compensation of the light detection device can be. However, in order to obtain the required temperature compensation accuracy, it is necessary to conduct an inspection for selecting and combining APDs having the required temperature characteristics in terms of the relationship between the amplification factor and the bias voltage. Therefore, it is difficult to reduce the manufacturing cost of a light detection device including two APDs having the required temperature characteristics.

[0008] An object of one embodiment of the present invention is to provide a light detection device that can improve detection accuracy while suppressing manufacturing costs. Another object of the present invention is to provide a light detection device that can improve detection accuracy while suppressing manufacturing costs. Another object of the present invention is to provide a method for manufacturing a light detection device that can improve detection accuracy while suppressing manufacturing costs.

[0009] Technical solutions to solve problems

[0010] In a light detection device of one embodiment of the present invention, temperature compensation of the multiplication rate of the APD is performed by applying a voltage corresponding to a breakdown voltage applied to a temperature compensation diode to the APD as a bias voltage. The light detection device includes a semiconductor substrate. The semiconductor substrate has a first main surface and a second main surface opposite to each other. On the semiconductor substrate, an APD and a temperature compensation diode are formed at intervals from each other when viewed from a direction orthogonal to the first main surface. The semiconductor substrate has a peripheral carrier absorption portion between the APD and the temperature compensation diode when viewed from a direction orthogonal to the first main surface. The peripheral carrier absorption portion absorbs carriers located in the periphery. When viewed from a direction orthogonal to the first main surface, on a line segment connecting the APD and the temperature compensation diode at the shortest distance, the shortest distance between the APD and the peripheral carrier absorption portion is smaller than the shortest distance between the portion of the edge of the peripheral carrier absorption portion closest to the APD and the temperature compensation diode.

[0011] In one of the above schemes, the APD and the temperature compensation diode are formed on the same semiconductor substrate. In this case, it is easier to form the temperature compensation diode and the APD with the same temperature characteristics with respect to the amplification factor and the bias voltage with high precision than in the case where the temperature compensation diode and the APD are formed on different semiconductor substrates. Therefore, it is possible to achieve temperature compensation for the multiplication factor while suppressing the manufacturing cost.

[0012] When a breakdown voltage is applied to the temperature compensation diode, there is a concern that the temperature compensation diode may emit light. When the temperature compensation diode emits light, carriers are generated in the semiconductor substrate due to the light emitted by the temperature compensation diode. Therefore, when the temperature compensation diode and the APD are formed on the same semiconductor substrate, there is a concern that the carriers may affect the detection results of the APD.

[0013] In one of the above schemes, the peripheral carrier absorption section is located between the APD and the temperature compensation diode. When observed from a direction orthogonal to the first main surface, on the line segment connecting the APD and the temperature compensation diode at the shortest distance, the shortest distance between the APD and the peripheral carrier absorption section is smaller than the shortest distance between the portion of the edge of the peripheral carrier absorption section closest to the APD and the temperature compensation diode. Therefore, the carriers generated by the light emission of the temperature compensation diode are absorbed by the peripheral carrier absorption section before reaching the APD. As a result, the carriers generated by the temperature compensation diode can be suppressed from reaching the APD, thereby improving the detection accuracy.

[0014] Therefore, in the above-mentioned light detection device, it is possible to achieve temperature compensation for the multiplication factor and improve the detection accuracy while suppressing the manufacturing cost.

[0015] In one of the above schemes, the light detection device may also include a first electrode, a second electrode, and a third electrode. The first electrode can be connected to the APD and output a signal from the APD. The second electrode can be connected to a temperature compensation diode. The third electrode can be connected to a peripheral carrier absorption unit. In this case, the required potential can be applied to the APD, the temperature compensation diode, and the peripheral carrier absorption unit, respectively. When a voltage is applied to the peripheral carrier absorption unit, the carriers generated by the temperature compensation diode can be further absorbed.

[0016] In one of the above schemes, a fourth electrode may also be included. The APD, the temperature compensation diode, and the peripheral carrier absorption unit may be connected in parallel to the fourth electrode. The APD and the temperature compensation diode are connected in parallel, so a potential corresponding to the breakdown voltage of the temperature compensation diode can be applied to the APD. The peripheral carrier absorption unit is also connected in parallel with the APD and the temperature compensation diode, so a potential can be applied to the peripheral carrier absorption unit without setting up a power supply separately. When a voltage is applied to the peripheral carrier absorption unit, carriers generated by the temperature compensation diode can be further absorbed.

[0017] In one of the above schemes, the semiconductor substrate may also contain a semiconductor region of the first conductivity type. The APD and the temperature compensation diode may contain a first semiconductor layer and a second semiconductor layer, respectively. The first semiconductor layer may be a second conductivity type different from the first conductivity type. The second semiconductor layer may be a first conductivity type with a higher impurity concentration than the semiconductor region. The second semiconductor layer may be located between the semiconductor region and the first semiconductor layer. In this case, the temperature compensation diode has the same structure as the APD. Therefore, it is possible to easily form a temperature compensation diode that is similar to the APD in terms of temperature characteristics of amplification and bias voltage.

[0018] In the above embodiment, the peripheral carrier absorption portion may include a third semiconductor layer of the second conductivity type. In this case, the peripheral carrier absorption portion can further absorb carriers generated by the temperature compensation diode.

[0019] In the above embodiment, the peripheral carrier absorption portion may include a third semiconductor layer of the first conductivity type. In this case, the peripheral carrier absorption portion can further absorb carriers generated by the temperature compensation diode.

[0020] In the above-mentioned scheme, when observed from a direction orthogonal to the first main surface, on a line segment connecting the APD and the temperature compensation diode at the shortest distance, the shortest distance between the first semiconductor layer of the APD and the peripheral carrier absorption portion can be smaller than the shortest distance between a portion of the peripheral carrier absorption portion and the first semiconductor layer of the temperature compensation diode.

[0021] In the above-mentioned scheme, when observed from a direction orthogonal to the first main surface, on the line segment connecting the APD and the temperature compensation diode at the shortest distance, the shortest distance between the second semiconductor layer of the APD and the peripheral carrier absorption portion can be smaller than the shortest distance between a portion of the peripheral carrier absorption portion and the second semiconductor layer of the temperature compensation diode.

[0022] In the above embodiment, the impurity concentration in the second semiconductor layer of the temperature compensation diode may be higher than the impurity concentration in the second semiconductor layer of the APD. In this case, temperature compensation for the multiplication factor of the APD operating in the linear mode can be achieved.

[0023] In the above embodiment, the impurity concentration in the second semiconductor layer of the temperature compensation diode may be lower than the impurity concentration in the second semiconductor layer of the APD. In this case, temperature compensation for the multiplication factor of the APD operating in the Geiger mode can be achieved.

[0024] In one of the above schemes, an APD array including an APD can be formed on the first main surface side of the semiconductor substrate. When viewed from a direction orthogonal to the first main surface, the peripheral carrier absorption portion can be located between the APD array and the temperature compensation diode. In this case, even if a plurality of APDs are formed on the semiconductor substrate, carriers from the temperature compensation diode can be suppressed from reaching the plurality of APDs, thereby improving detection accuracy.

[0025] The light detection device of another embodiment of the present invention includes a semiconductor substrate. The semiconductor substrate has a first main surface and a second main surface opposite to each other. The semiconductor substrate has a first APD, a second APD, and a peripheral carrier absorption portion. The first APD has a light incident surface on the first main surface side. The second APD is spaced apart from the first APD and shielded from light when viewed from a direction orthogonal to the first main surface. The peripheral carrier absorption portion is formed between the first and second APDs when viewed from a direction orthogonal to the first main surface. The peripheral carrier absorption portion absorbs carriers located in the periphery. When viewed from a direction orthogonal to the first main surface, on a line segment connecting the first APD and the second APD at the shortest distance, the shortest distance between the first APD and the peripheral carrier absorption portion is smaller than the shortest distance between the portion of the edge of the peripheral carrier absorption portion closest to the first APD and the second APD.

[0026] In the above-mentioned other schemes, two APDs are formed on the same semiconductor substrate. In this case, compared with the case where two APDs are formed on different semiconductor substrates, two APDs having desired temperature characteristics can be easily formed with high precision. Therefore, a light detection device including two APDs having desired temperature characteristics can be realized while suppressing manufacturing costs.

[0027] When a breakdown voltage is applied to the second APD, there is a concern that the second APD may emit light. When two APDs are formed on the same semiconductor substrate and one APD emits light, carriers are generated in the semiconductor substrate due to the light emitted from the one APD. Therefore, there is a concern that the carriers generated by the second APD may affect the detection result of the first APD.

[0028] In the above-mentioned other schemes, the peripheral carrier absorption section is located between the first APD and the second APD. When observed from a direction orthogonal to the first main surface, on the line segment connecting the first APD and the second APD at the shortest distance, the shortest distance between the first APD and the peripheral carrier absorption section is smaller than the shortest distance between the portion of the edge of the peripheral carrier absorption section closest to the first APD and the second APD. Therefore, the carriers generated by the light emission of the second APD are absorbed by the peripheral carrier absorption section before reaching the first APD. As a result, the carriers generated by the second APD can be suppressed from reaching the first APD, and the detection accuracy can be improved.

[0029] Therefore, in the above-mentioned light detection device, it is possible to improve the detection accuracy while suppressing the manufacturing cost.

[0030] A method for manufacturing a light detection device according to another embodiment of the present invention comprises: a step of preparing a semiconductor wafer; and a step of forming a semiconductor substrate by implanting impurity ions into the semiconductor wafer. The semiconductor wafer has a first main surface and contains a semiconductor region of a first conductivity type. The semiconductor substrate has a first main surface and a second main surface opposite to the first main surface, and an avalanche photodiode and a temperature compensation diode are formed at intervals from each other when viewed from a direction perpendicular to the first main surface. The light detection device includes a semiconductor substrate, and temperature compensation for the multiplication rate of the avalanche photodiode is performed by applying a voltage corresponding to the breakdown voltage applied to the temperature compensation diode as a bias voltage to the avalanche photodiode. The step of forming the semiconductor substrate includes a first ion implantation step and a second ion implantation step. In the first ion implantation step, ions are implanted into a first portion and a second portion of the semiconductor wafer at intervals from each other when viewed from a direction perpendicular to the first main surface, thereby forming a first semiconductor layer and a second semiconductor layer at the first portion and the second portion, respectively. The first semiconductor layer has a second conductivity type different from the first conductivity type. The second semiconductor layer is located between the semiconductor region and the first semiconductor layer. The second semiconductor layer has a higher impurity concentration than the semiconductor region of the first conductivity type. In the second ion implantation step, ions are further implanted into the second semiconductor layer at the first site.

[0031] In the above-mentioned other scheme, the APD and the temperature compensation diode are formed on the same semiconductor substrate. In this case, compared with the case where the temperature compensation diode and the APD are formed on different semiconductor substrates, the temperature compensation diode and the APD having the same temperature characteristics with respect to the amplification factor and the bias voltage can be easily manufactured with high precision. In other words, temperature compensation for the multiplication factor can be achieved while suppressing the manufacturing cost.

[0032] In the above-mentioned other scheme, there are a first ion implantation process and a second ion implantation process. In the first ion implantation process, ions are implanted into the first part and the second part to form a first semiconductor layer and a second semiconductor layer at the first part and the second part, respectively. Then, in the second ion implantation process, ions are further implanted into the second semiconductor layer at the first part. In this case, it is possible to easily manufacture a temperature compensation diode and an APD that are set to the desired breakdown voltage and have the same temperature characteristics with respect to amplification and bias voltage. When the temperature compensation diode and the APD are set to the desired breakdown voltage, respectively, the detection accuracy can be improved.

[0033] Therefore, in the above-mentioned manufacturing method, it is possible to achieve temperature compensation for the multiplication factor and improve the detection accuracy while suppressing the manufacturing cost.

[0034] In the above-mentioned other scheme, in the first ion implantation process, there may also be a process of forming a first semiconductor layer in the first part and the second part respectively, and forming a third semiconductor layer of the second conductivity type in the third part by a single ion implantation process; and a process of forming a second semiconductor layer in the first part and the second part respectively. The third part may be spaced apart from the first part and the second part when viewed from a direction orthogonal to the first main surface. The first semiconductor layer and the third semiconductor layer may be formed by implanting impurity ions of the second conductivity type into the first part and the second part and the third part. The second semiconductor layer may also be formed by implanting impurity ions of the first conductivity type into the first part and the second part. In this case, the peripheral carrier absorption part may be formed without adding the ion implantation process. Thus, the manufacturing cost can be reduced.

[0035] Effects of the Invention

[0036] One embodiment of the present invention can provide a light detection device that can improve detection accuracy while suppressing manufacturing costs. Another embodiment of the present invention can provide a light detection device that can improve detection accuracy while suppressing manufacturing costs. Another embodiment of the present invention can provide a method for manufacturing a light detection device that can improve detection accuracy while suppressing manufacturing costs. BRIEF DESCRIPTION OF THE DRAWINGS

[0037] Figure 1 It is a schematic cross-sectional view of the photodetection device according to this embodiment.

[0038] Figure 2 is a top view of the light detection device.

[0039] Figure 3 This is a schematic top view of a semiconductor substrate.

[0040] Figure 4 It is a diagram for explaining the circuit configuration of a photodetection device.

[0041] Figure 5 It is a schematic cross-sectional view of a photodetection device according to a modified example of the present embodiment.

[0042] Figure 6 It is a schematic plan view of a semiconductor substrate according to a modification of the present embodiment.

[0043] Figure 7 It is a schematic plan view of a semiconductor substrate according to a modification of the present embodiment.

[0044] Figure 8 It is a schematic cross-sectional view of a photodetection device according to a modified example of the present embodiment.

[0045] Fig. 9 It is a diagram for explaining the circuit configuration of a photodetection device according to a modified example of the present embodiment.

[0046] Fig.10 This is a flowchart for explaining a method for manufacturing a semiconductor substrate. DETAILED DESCRIPTION

[0047] Hereinafter, embodiments of the present invention will be described in detail with reference to the accompanying drawings. In the description, the same reference numerals are used for the same elements or elements having the same functions, and repeated descriptions are omitted.

[0048] First, refer to Figures 1 to 3 A light detection device according to the present embodiment will be described. The light detection device 1 includes a semiconductor substrate 10 . Figure 1 It is a schematic cross-sectional view of a light detection device. Figure 2 is a top view of the light detection device. Figure 3 This is a schematic top view of a semiconductor substrate included in a photodetection device.

[0049] The semiconductor substrate 10 has an APD 11 and a temperature compensation diode 12. The APD 11 and the temperature compensation diode 12 have the same temperature characteristics in terms of the relationship between the gain and the bias voltage. In the present embodiment, the breakdown voltage of the APD 11 is different from the breakdown voltage of the temperature compensation diode 12. In the present embodiment, the breakdown voltage of the APD 11 is higher than the breakdown voltage of the temperature compensation diode 12.

[0050] In the light detection device 1, a breakdown voltage is applied to the temperature compensation diode 12, and a voltage corresponding to the breakdown voltage is applied to the APD 11 as a bias voltage. In the present embodiment, the breakdown voltage of the temperature compensation diode 12 is applied to the APD 11 as a bias voltage. The APD 11 and the temperature compensation diode 12 have the same temperature characteristics in terms of the relationship between the gain and the bias voltage. In this case, when the ambient temperature changes, the breakdown voltage applied to the temperature compensation diode 12 changes. Due to this change in the breakdown voltage applied to the temperature compensation diode 12, the bias voltage applied to the APD 11 also changes in accordance with the ambient temperature in such a way that the gain of the APD 11 is maintained. That is, in the light detection device 1, the temperature compensation of the gain of the APD 11 is performed using the temperature compensation diode 12.

[0051] like Figure 1 As shown, the semiconductor substrate 10 has main surfaces 10a and 10b facing each other. When viewed from a direction perpendicular to the main surface 10a, the APD 11 and the temperature compensation diode 12 are formed on the semiconductor substrate 10 at intervals from each other. The APD 11 has a light incident surface 11a on the main surface 10a side. The temperature compensation diode 12 is a light-shielded APD.

[0052] The semiconductor substrate 10 has a peripheral carrier absorption portion 13 in addition to the APD 11 and the temperature compensation diode 12. When viewed from a direction perpendicular to the main surface 10a, a portion of the peripheral carrier absorption portion 13 is located between the APD 11 and the temperature compensation diode 12. The peripheral carrier absorption portion 13 surrounds the APD 11. The peripheral carrier absorption portion 13 is a region that absorbs carriers located in the periphery.

[0053] Next, refer to Figure 1 The configuration of the photodetection device of this embodiment will be described in more detail. The semiconductor substrate 10 includes a semiconductor region 21 and semiconductor layers 31, 32, 33, 34, and 35. The APD 11 and the temperature compensation diode 12 include a semiconductor region 21 and semiconductor layers 31, 32, and 35, respectively.

[0054] The peripheral carrier absorption section 13 includes a semiconductor region 21 and semiconductor layers 33 and 35. The peripheral carrier absorption section 13 absorbs carriers located in the periphery in the semiconductor layer 33. That is, the semiconductor layer 33 functions as a peripheral carrier absorption layer that absorbs peripheral carriers. In the present embodiment, the peripheral carrier absorption section 13 is a portion surrounded by edges 13a and 13b of the peripheral carrier absorption layer in the semiconductor substrate 10 when viewed from a direction orthogonal to the main surface 10a. In the present embodiment, the edges 13a and 13b are edges of the semiconductor layer 33. The edge 13b is located closer to the APD 11 side than the edge 13a.

[0055] The semiconductor region 21 and the semiconductor layers 32, 34, and 35 are of the first conductivity type, and the semiconductor layers 31 and 33 are of the second conductivity type. The semiconductor impurities are added by, for example, diffusion or ion implantation. In this embodiment, the first conductivity type is P type, and the second conductivity type is N type. When the semiconductor substrate 10 uses Si as the matrix, a 13th group element such as B is used as a P type impurity, and a 15th group element such as N, P or As is used as an N type impurity.

[0056] The semiconductor region 21 is located on the main surface 10a side of the semiconductor substrate 10. The semiconductor region 21 constitutes a part of the main surface 10a. The semiconductor region 21 is, for example, P - type.

[0057] The semiconductor layer 31 constitutes a part of the main surface 10a. The semiconductor layer 31 is in contact with the semiconductor region 21 when viewed from a direction perpendicular to the main surface 10a, and is surrounded by the semiconductor region 21. The semiconductor layer 31 is, for example, N + In this embodiment, the semiconductor layer 31 forms a cathode in each of the APD 11 and the temperature compensation diode 12 .

[0058] The semiconductor layer 32 is located between the semiconductor region 21 and the semiconductor layer 31. In other words, the semiconductor layer 32 is in contact with the semiconductor layer 31 on the main surface 10a side, and is in contact with the semiconductor region 21 on the main surface 10b side. The semiconductor layer 32 has a higher impurity concentration than the semiconductor region 21. The semiconductor layer 32 is, for example, a P-type. In the present embodiment, the impurity concentration of the semiconductor layer 32 of the temperature compensation diode 12 is higher than the impurity concentration of the semiconductor layer 32 of the APD 11. The semiconductor layer 32 constitutes an avalanche region in each of the APD 11 and the temperature compensation diode 12.

[0059] The semiconductor layer 33 constitutes a part of the main surface 10a. The semiconductor layer 33 is in contact with the semiconductor region 21 when viewed from a direction perpendicular to the main surface 10a, and is surrounded by the semiconductor region 21. In the present embodiment, the peripheral carrier absorption portion 13 is constituted by the semiconductor layer 33, and is only in contact with the semiconductor region 21 in the semiconductor substrate 10. The peripheral carrier absorption portion 13 includes a layer corresponding to the avalanche region. In the present embodiment, the semiconductor layer 33 has the same impurity concentration as the semiconductor layer 31. The semiconductor layer 33 is, for example, N + type.

[0060] The semiconductor layer 34 constitutes a part of the main surface 10a. The semiconductor layer 34 is in contact with the semiconductor region 21 when viewed from a direction perpendicular to the main surface 10a, and is surrounded by the semiconductor region 21. In this embodiment, the semiconductor layer 34 has a higher impurity concentration than the semiconductor region 21 and the semiconductor layer 32. The semiconductor layer 34 is, for example, P +The semiconductor layer 34 is connected to the semiconductor layer 35 at a portion not shown. The semiconductor layer 34 constitutes the anode of the light detection device 1. The semiconductor layer 34 constitutes the anode of the APD 11, the temperature compensation diode 12, and the peripheral carrier absorption section 13, for example.

[0061] The semiconductor layer 35 is located closer to the main surface 10b of the semiconductor substrate 10 than the semiconductor region 21. The semiconductor layer 35 constitutes the entire main surface 10b. The semiconductor layer 35 is in contact with the semiconductor region 21 on the main surface 10a side. In this embodiment, the semiconductor layer 35 has a higher impurity concentration than the semiconductor region 21 and the semiconductor layer 32. The semiconductor layer 35 is, for example, P + The semiconductor layer 35 constitutes the anode of the light detection device 1. The semiconductor layer 35 constitutes the anode of the APD 11, the temperature compensation diode 12, and the peripheral carrier absorption section 13, for example.

[0062] The light detection device 1 further includes an insulating film 41, electrodes 42, 43, 44, 45, a passivation film 46, and an anti-reflection film 47, which are provided on the main surface 10a of the semiconductor substrate 10. The insulating film 41 is stacked on the main surface 10a of the semiconductor substrate 10. The insulating film 41 is, for example, a silicon oxide film. The electrodes 42, 43, 44, 45 are respectively arranged on the insulating film 41. The passivation film 46 is stacked on the insulating film 41 and the electrodes 42, 43, 44, 45. The anti-reflection film 47 is stacked on the main surface 10a of the semiconductor substrate 10.

[0063] The electrode 42 penetrates the insulating film 41 and is connected to the semiconductor layer 31 of the APD 11. A portion of the electrode 42 is exposed from the passivation film 46 and constitutes a pad electrode 52 of the APD 11. The electrode 42 outputs a signal from the APD 11 to the pad electrode 52. The electrode 43 penetrates the insulating film 41 and is connected to the semiconductor layer 31 of the temperature compensation diode 12. A portion of the electrode 43 is exposed from the passivation film 46 and constitutes, for example, a pad electrode 53 of the temperature compensation diode 12.

[0064] The electrode 44 penetrates the insulating film 41 and is connected to the semiconductor layer 33 of the peripheral carrier absorption section 13. A portion of the electrode 44 is exposed from the passivation film 46, for example, constituting a pad electrode 54 of the peripheral carrier absorption section 13. The electrode 45 penetrates the insulating film 41 and is connected to the semiconductor layer 34. That is, the electrode 45 is connected to the APD 11, the temperature compensation diode 12, and the peripheral carrier absorption section 13. In other words, the APD 11, the temperature compensation diode 12, and the peripheral carrier absorption section 13 are connected in parallel with each other with respect to the electrode 45. A portion of the electrode 45 is exposed from the passivation film 46, for example, constituting a pad electrode 55.

[0065] In this embodiment, when the light detection device 1 is viewed from a direction perpendicular to the main surface 10a, the pad electrodes 52, 53, 54, and 55 are as shown in FIG. Figure 2 As shown, the pad electrode 52 is arranged around the APD 11. In the present embodiment, the pad electrode 52 is a pad electrode for the cathode of the APD 11. The pad electrode 53 is a pad electrode for the cathode of the temperature compensation diode 12. The pad electrode 54 is a pad electrode for the cathode of the peripheral carrier absorption section 13. The pad electrode 55 is a pad electrode for the anode of the APD 11, the temperature compensation diode 12 and the peripheral carrier absorption section 13.

[0066] The APD 11, the temperature compensation diode 12, and the peripheral carrier absorption section 13 are connected in parallel to the pad electrode 55. When a reverse bias is applied to the APD 11, the temperature compensation diode 12, and the peripheral carrier absorption section 13, a positive voltage is applied to the cathode pad electrode, and a negative voltage is applied to the anode pad electrode.

[0067] The anti-reflection film 47 is stacked on the semiconductor layer 31 of the APD 11. A portion of the anti-reflection film 47 is exposed from the passivation film 46. Therefore, light that has passed through the anti-reflection film 47 can enter the semiconductor layer 31 of the APD 11. The semiconductor layer 31 of the temperature compensation diode 12 and the semiconductor layer 33 of the peripheral carrier absorption section 13 are covered by the insulating film 41 to block light. Therefore, when the light detection device 1 is observed from the main surface 10a side in a direction perpendicular to the main surface 10a, as shown in FIG. Figure 2 As shown, the semiconductor layer 31 of the APD 11 can be visually confirmed. The semiconductor layer 31 of the temperature compensation diode 12 and the semiconductor layer 33 of the peripheral carrier absorption section 13 cannot be visually confirmed.

[0068] Figure 3 1 is a schematic top view of the semiconductor substrate 10 viewed from the main surface 10a side in a direction perpendicular to the main surface 10a. Figure 3 As shown, the semiconductor layer 31 of APD11 and the semiconductor layer 31 of the temperature compensation diode 12 are circular when viewed from a direction perpendicular to the main surface 10a. The semiconductor layer 33 of the peripheral carrier absorption section 13 is annular when viewed from a direction perpendicular to the main surface 10a, and surrounds the semiconductor layer 31 of APD11 at a distance therefrom. When viewed from a direction perpendicular to the main surface 10a, a portion of the semiconductor layer 33 is located between the semiconductor layer 31 of APD11 and the semiconductor layer 31 of the temperature compensation diode 12. In other words, when viewed from a direction perpendicular to the main surface 10a, the peripheral carrier absorption section 13 is located between APD11 and the temperature compensation diode 12.

[0069] When viewed from a direction perpendicular to the main surface 10a, the shortest distance between the APD 11 and the peripheral carrier absorption section 13 on a line segment connecting the APD 11 and the temperature compensation diode 12 at the shortest distance is smaller than the shortest distance between a portion 13c of the peripheral carrier absorption section 13 and the temperature compensation diode 12. The portion 13c is the portion of the edges 13a and 13b of the peripheral carrier absorption section 13 that is closest to the APD 11 on the line segment connecting the APD 11 and the temperature compensation diode 12 at the shortest distance. In other words, the portion 13c is the portion of the edge 13b of the peripheral carrier absorption section 13 that is closest to the temperature compensation diode 12 when viewed from a direction perpendicular to the main surface 10a.

[0070] More specifically, when viewed from a direction perpendicular to the main surface 10a, on a line segment connecting the semiconductor layer 31 of the APD 11 and the semiconductor layer 31 of the temperature compensation diode 12 at the shortest distance, the distance L1 is smaller than the distance L2. Figure 1 and Figure 3 As shown, the distance L1 is the shortest distance between the semiconductor layer 31 of the APD 11 and the peripheral carrier absorption section 13 when viewed from a direction perpendicular to the main surface 10a. The distance L2 is the shortest distance between the portion 13c of the peripheral carrier absorption section 13 and the semiconductor layer 31 of the temperature compensation diode 12 when viewed from a direction perpendicular to the main surface 10a. L2 / L1 is, for example, greater than 1 and less than 50. L2 / L1 may also be greater than 20 and less than 50.

[0071] like Figure 1 As shown, when viewed from a direction perpendicular to the main surface 10a, on a line segment connecting the semiconductor layer 32 of the APD 11 and the semiconductor layer 32 of the temperature compensation diode 12 at the shortest distance, the distance L3 is smaller than the distance L4. The distance L3 is the shortest distance between the semiconductor layer 32 of the APD 11 and the peripheral carrier absorption section 13 when viewed from a direction perpendicular to the main surface 10a. The distance L4 is the shortest distance between the portion 13c of the peripheral carrier absorption section 13 and the semiconductor layer 32 of the temperature compensation diode 12 when viewed from a direction perpendicular to the main surface 10a.

[0072] Next, refer to Figure 4 The operation of the photodetection device of this embodiment will be described. The photodetection device 1 is used in a state where the power supply 61 and the current limiting circuit 62 are connected to the pad electrode 55. The positive side of the power supply 61 is connected to the ground line 63, and the negative side is connected to the pad electrode 55 via the current limiting circuit 62. The pad electrodes 53 and 54 are connected to the ground lines 64 and 65, respectively. The ground lines 64 and 65 may also be connected to each other. The pad electrode 52 is connected to a signal readout circuit (not shown).

[0073] In this embodiment, the pad electrode 55 and the P+ The semiconductor layer 34 is connected to the P + The type semiconductor layer 35 is connected. Therefore, the anodes of the APD 11, the temperature compensation diode 12, and the peripheral carrier absorption section 13 are connected in parallel to each other with respect to the pad electrode 55. As a result, a negative potential is applied to the anodes of the APD 11, the temperature compensation diode 12, and the peripheral carrier absorption section 13 by the power supply 61.

[0074] The difference between the potential applied to the pad electrode 53 and the potential applied to the pad electrode 55 is the breakdown voltage of the temperature compensation diode 12. Therefore, a potential corresponding to the breakdown voltage applied to the temperature compensation diode 12 is applied to the anode of the APD 11. As a result, a voltage corresponding to the breakdown voltage applied to the temperature compensation diode 12 is applied to the APD 11 as a bias voltage. Similarly, a voltage corresponding to the breakdown voltage applied to the temperature compensation diode 12 is applied to the anode of the peripheral carrier absorption portion 13 as a bias voltage.

[0075] In the present embodiment, the power supply 61 and the current limiting circuit 62 are connected to the pad electrode 55, and the breakdown voltage of the temperature compensating diode 12 is applied to the pad electrode 55. Therefore, the breakdown voltage of the temperature compensating diode 12 is applied to the APD11 and the peripheral carrier absorption part 13 as a bias voltage. In the present embodiment, the output voltage of the power supply 61 is greater than the operating voltage of the APD11. In other words, the output voltage of the power supply 61 is greater than the upper limit of the temperature variation of the breakdown voltage of the temperature compensating diode 12. For example, the output voltage of the power supply 61 is greater than 300V. The current limiting circuit 62 is composed of, for example, a current mirror circuit or a resistor. In this case, for example, the multiplication factor of the APD11 can be arbitrarily set according to the breakdown voltage difference between the temperature compensating diode 12 and the APD11. By setting the amplification factor of the APD11 to the optimal multiplication factor Mopt with a relatively high S / N ratio, the detection accuracy can be improved.

[0076] In the present embodiment, the APD 11, the temperature compensation diode 12, and the anode of the peripheral carrier absorption section 13 are integrally formed in the semiconductor layer 35. For example, at an ambient temperature of 25°C, when the potential applied to the pad electrode 53 is 0V and the breakdown voltage of the temperature compensation diode 12 is 130V, a potential of -130V is applied to the anode of the APD 11 and the anode of the peripheral carrier absorption section 13. Therefore, when the breakdown voltage of the APD 11 is 150V at an ambient temperature of 25°C, the APD 11 operates in a state where the potential difference between the anode and the cathode is 20V lower than the breakdown voltage.

[0077] The APD 11 and the temperature compensation diode 12 have the same temperature characteristics in terms of the relationship between the gain and the bias voltage. Therefore, as long as the temperature compensation diode 12 is in a breakdown state, the APD 11 operates while maintaining the gain at a bias voltage set to 20V lower than the breakdown voltage at an ambient temperature of 25°C. In other words, in the photodetection device 1, by applying a voltage to the temperature compensation diode 12 that causes the temperature compensation diode 12 to be in a breakdown state, temperature compensation for the gain of the APD 11 is achieved.

[0078] In this embodiment, a configuration in which the so-called through-type APD 11 operates in a linear mode is described. The light detection device 1 may also adopt a configuration in which the through-type APD 11 operates in a Geiger mode. In the configuration in which the APD 11 operates in a Geiger mode, the APD 11 is connected to a quenching resistor. The semiconductor substrate 10 is configured such that the impurity concentration of the semiconductor layer 32 of the temperature compensation diode 12 is lower than the impurity concentration of the semiconductor layer 32 of the APD 11.

[0079] Next, refer to Figure 5 and Figure 6 A photodetection device according to a modified example of the present embodiment will be described. Figure 5 It is a schematic cross-sectional view of the photodetection device according to this modification. Figure 6 yes Figure 5 Schematic top view of the semiconductor substrate shown. This modification is roughly similar to or the same as the above-mentioned embodiment. This modification is different from the above-mentioned embodiment in that the semiconductor layer 31 of the temperature compensation diode 12 and the semiconductor layer 33 of the peripheral carrier absorption part 13 are connected to the semiconductor layer of the same conductivity type as the semiconductor layers 31 and 33. The following mainly describes the differences between the above-mentioned embodiment and the modification.

[0080] The semiconductor substrate 10A has a semiconductor layer 71 that connects the semiconductor layer 31 of the temperature compensation diode 12 and the semiconductor layer 33 of the peripheral carrier absorption portion 13. The semiconductor layer 71 has the same conductivity type as the semiconductor layers 31 and 33. In this modification, the semiconductor layer 71 is the same second conductivity type as the semiconductor layers 31 and 33, and is located at the same height as the semiconductor layers 31 and 33 in the thickness direction of the semiconductor substrate 10. The semiconductor layer 71 is, for example, N + type.

[0081] In this modification, the semiconductor layer 31 of APD11 and the semiconductor layer 31 of the temperature compensation diode 12 are also circular when viewed from a direction perpendicular to the main surface 10a. The semiconductor layer 33 of the peripheral carrier absorption section 13 is annular when viewed from a direction perpendicular to the main surface 10a, and surrounds the semiconductor layer 31 of APD11 at a distance therefrom. A portion of the semiconductor layer 33 is located between the semiconductor layer 31 of APD11 and the semiconductor layer 31 of the temperature compensation diode 12 when viewed from a direction perpendicular to the main surface 10a. In other words, the peripheral carrier absorption section 13 is located between APD11 and the temperature compensation diode 12 when viewed from a direction perpendicular to the main surface 10a.

[0082] When viewed from a direction orthogonal to the main surface 10a, the semiconductor layer 71 connects the edge 13a of the peripheral carrier absorption section 13 and the semiconductor layer 33 of the temperature compensation diode 12 between the semiconductor layer 31 of the APD 11 and the semiconductor layer 31 of the temperature compensation diode 12. In the actual semiconductor substrate 10A, the semiconductor layer 71 and the semiconductor layer 31 of the temperature compensation diode 12 are integrated to the extent that the boundary cannot be visually confirmed. Similarly, the semiconductor layer 71 and the semiconductor layer 33 of the peripheral carrier absorption section 13 are also integrated to the extent that the boundary cannot be visually confirmed.

[0083] Next, refer to Figure 7 A photodetection device according to another modified example of the present embodiment will be described. Figure 7 1 is a schematic top view of a semiconductor substrate of a light detection device of this variant. This variant is roughly similar to or the same as the above-mentioned embodiment. This variant is different from the above-mentioned embodiment in that the light detection device has a semiconductor substrate on which an APD array including a plurality of APDs is formed. The following mainly describes the differences between the above-mentioned embodiment and the variant.

[0084] Figure 7 The semiconductor substrate 10B shown has an APD array 80 including a plurality of APDs 81, a temperature compensation diode 82, and a peripheral carrier absorption portion 83 on the main surface 10a side. When viewed from a direction perpendicular to the main surface 10a, the APD array 80 is formed on the semiconductor substrate 10B at intervals from the temperature compensation diode 82 and the peripheral carrier absorption portion 83. When viewed from a direction perpendicular to the main surface 10a, the APDs 81 are formed on the semiconductor substrate 10B at intervals from each other.

[0085] On the semiconductor substrate 10B, a plurality of APDs 81 and temperature compensation diodes 82 are arranged in a row in one direction in rectangular shapes of equal size. On the semiconductor substrate 10B, a plurality of APDs 81 are arranged at equal intervals. The temperature compensation diodes 82 are located at the ends of the arrangement of the plurality of APDs 81 and temperature compensation diodes 82.

[0086] When viewed from a direction perpendicular to the main surface 10a, the peripheral carrier absorption portion 83 surrounds the plurality of APDs 81. When viewed from a direction perpendicular to the main surface 10a, a portion of the peripheral carrier absorption portion 83 is located between the APD array 80 and the temperature compensation diode 82. Specifically, when viewed from a direction perpendicular to the main surface 10a, a portion of the peripheral carrier absorption portion 83 is located between the temperature compensation diode 82 and the APD 81a closest to the temperature compensation diode 82 among the plurality of APDs 81.

[0087] Each APD81 and the temperature compensation diode 82 includes a semiconductor region 21 and semiconductor layers 31, 32, and 35, similarly to the APD11 and the temperature compensation diode 12 in the above-mentioned embodiment. The peripheral carrier absorption portion 83 includes a semiconductor region 21 and semiconductor layers 33 and 35. The semiconductor layer 33 of the peripheral carrier absorption portion 83 is annular when viewed from a direction perpendicular to the main surface 10a. The peripheral carrier absorption portion 83 absorbs carriers located in the periphery in the semiconductor layer 33. That is, the semiconductor layer 33 functions as a peripheral carrier absorption layer that absorbs peripheral carriers. The peripheral carrier absorption portion 83 refers to a portion surrounded by edges 83a and 83b of the peripheral carrier absorption layer on the semiconductor substrate 10B when viewed from a direction perpendicular to the main surface 10a. In this modified example, the edges 83a and 83b are edges of the semiconductor layer 33. The edge 83b is located closer to the APD81 side than the edge 83a.

[0088] When viewed from a direction perpendicular to the main surface 10a, the shortest distance between the APD81a and the peripheral carrier absorbing portion 83 on a line segment connecting the APD81a and the temperature compensation diode 82 at the shortest distance is smaller than the shortest distance between a portion 83c of the peripheral carrier absorbing portion 83 and the temperature compensation diode 82. The portion 83c is the portion closest to the APD81a among the edges 83a and 83b of the peripheral carrier absorbing portion 83 on the line segment connecting the APD81a and the temperature compensation diode 82 at the shortest distance. In other words, the portion 83c is the portion closest to the temperature compensation diode 82 among the edges 83b of the peripheral carrier absorbing portion 83 when viewed from a direction perpendicular to the main surface 10a.

[0089] In more detail, similarly to the semiconductor substrate 10, when viewed from a direction perpendicular to the main surface 10a, on a line segment connecting the semiconductor layer 31 of the APD 81a and the semiconductor layer 31 of the temperature compensation diode 82 at the shortest distance, the distance L1 is smaller than the distance L2. In the semiconductor substrate 10B, the distance L1 is the shortest distance between the semiconductor layer 31 of the APD 81a and the peripheral carrier absorption portion 83 when viewed from a direction perpendicular to the main surface 10a. The distance L2 is the shortest distance between the portion 83c of the peripheral carrier absorption portion 83 and the semiconductor layer 31 of the temperature compensation diode 82 when viewed from a direction perpendicular to the main surface 10a. L2 / L1 is, for example, greater than 1 and less than 50. L2 / L1 may also be greater than 20 and less than 50.

[0090] As in the semiconductor substrate 10, when viewed from a direction perpendicular to the main surface 10a, the distance L3 is smaller than the distance L4 on the line segment connecting the semiconductor layer 32 of the APD 81a and the semiconductor layer 32 of the temperature compensation diode 82 at the shortest distance. In the semiconductor substrate 10B, the distance L3 is the shortest distance between the semiconductor layer 32 of the APD 81a and the peripheral carrier absorption portion 83 when viewed from a direction perpendicular to the main surface 10a. The distance L4 is the shortest distance between the portion 83c of the peripheral carrier absorption portion 83 and the semiconductor layer 32 of the temperature compensation diode 82 when viewed from a direction perpendicular to the main surface 10a.

[0091] Next, refer to Figure 8 A photodetection device according to another modified example of the present embodiment will be described. Figure 8 1 is a schematic cross-sectional view of the light detection device of this variant. This variant is roughly similar to or the same as the above-mentioned embodiment. This variant is different from the above-mentioned embodiment in that a so-called inverted APD is formed on the semiconductor substrate of the light detection device and the APD of the semiconductor substrate operates in Geiger mode. Figure 1 The semiconductor substrate 10 shown has a so-called through-type APD, and the APD operates in a linear mode. In contrast, the semiconductor substrate 10C of the light detection device 1C of this modified example has a so-called inverted APD, and the APD operates in a Geiger mode. The following mainly describes the differences between the above-mentioned embodiment and the modified example.

[0092] The semiconductor substrate 10C includes an APD 91, a temperature compensation diode 92, and a peripheral carrier absorption portion 93 corresponding to the APD 11, the temperature compensation diode 12, and the peripheral carrier absorption portion 13 of the semiconductor substrate 10, respectively. The APD 91 includes a light incident surface 91a corresponding to the light incident surface 11a of the APD 11 on the main surface 10a side. The semiconductor substrate 10C includes a semiconductor region 21 and semiconductor layers 31, 33, 34, 35, and 36. The semiconductor substrate 10C is different from the semiconductor substrate 10 in that it includes a semiconductor layer 36 instead of the semiconductor layer 32. The APD 91 and the temperature compensation diode 92 include a semiconductor region 21 and semiconductor layers 31, 35, and 36, respectively. Figure 8 As shown, the semiconductor layer 34 is in contact with the semiconductor layer 35 .

[0093] The peripheral carrier absorption section 93 includes a semiconductor region 21 and semiconductor layers 33 and 35. The peripheral carrier absorption section 93 absorbs carriers located in the periphery in the semiconductor layer 33. That is, the semiconductor layer 33 functions as a peripheral carrier absorption layer that absorbs peripheral carriers. In this modification, the peripheral carrier absorption section 93 is a portion surrounded by edges 93a and 93b of the peripheral carrier absorption layer in the semiconductor substrate 10C when viewed from a direction orthogonal to the main surface 10a. In the present embodiment, the edges 93a and 93b are the edges of the semiconductor layer 33. The edge 93b is located closer to the APD 91 side than the edge 93a.

[0094] In the semiconductor substrate 10C, the semiconductor layer 36 is located between the semiconductor region 21 and the semiconductor layer 35. In other words, the semiconductor layer 36 is in contact with the semiconductor region 21 on the main surface 10a side, and is in contact with the semiconductor layer 35 on the main surface 10b side. In this modification, the impurity concentration of the semiconductor layer 36 of the temperature compensation diode 92 is lower than the impurity concentration of the semiconductor layer 36 of the APD 91.

[0095] In the semiconductor substrate 10C, the semiconductor region 21 and the semiconductor layers 31, 33, and 36 are of the first conductivity type, and the semiconductor layers 34 and 35 are of the second conductivity type. In this modification, the first conductivity type is also the P type, and the second conductivity type is also the N type. When the semiconductor substrate 10C uses Si as a matrix, a Group 13 element such as B is used as a P-type impurity, and a Group 15 element such as N, P, or As is used as an N-type impurity.

[0096] In the semiconductor substrate 10C, the semiconductor layers 31 and 33 have a higher impurity concentration than the semiconductor region 21. The semiconductor layer 36 has a higher impurity concentration than the semiconductor region 21, but a lower impurity concentration than the semiconductor layers 31 and 33. Specifically, the semiconductor region 21 is, for example, P - Type, semiconductor layers 31, 33 are, for example, P +The semiconductor layer 36 is of P type, for example. In this modification, the semiconductor layer 31 forms an anode in each of the APD 91 and the temperature compensation diode 92 .

[0097] In the semiconductor substrate 10C, the semiconductor layer 34 and the semiconductor layer 35 have the same impurity concentration. The semiconductor layers 34 and 35 are, for example, N + The semiconductor layers 34 and 35 constitute the cathode of the light detection device 1C. The semiconductor layers 34 and 35 constitute the cathode of the APD 91, the temperature compensation diode 92, and the peripheral carrier absorption section 93, for example.

[0098] In this modification, a quenching resistor 95 is provided at a part of the electrode 42. The quenching resistor 95 and the P in the APD 91 + The quenching resistor 95 is electrically connected to the pad electrode 52 on the opposite side to the semiconductor layer 31. In this modification, the pad electrode 52 is a pad electrode for the anode of the APD 91. The pad electrode 53 is a pad electrode for the anode of the temperature compensation diode 92. The pad electrode 54 is a pad electrode for the anode of the peripheral carrier absorption section 93. The pad electrode 55 is a pad electrode for the cathode of the APD 91, the temperature compensation diode 92 and the peripheral carrier absorption section 93.

[0099] The APD 91, the temperature compensation diode 92, and the peripheral carrier absorption section 93 are connected in parallel to each other to the pad electrode 55. When a reverse bias is applied to the APD 91, the temperature compensation diode 92, and the peripheral carrier absorption section 93, a positive voltage is applied to the anode pad electrode, and a negative voltage is applied to the cathode pad electrode.

[0100] When viewed from a direction perpendicular to the main surface 10a, the shortest distance between the APD 91 and the peripheral carrier absorption section 93 on a line segment connecting the APD 91 and the temperature compensation diode 92 at the shortest distance is smaller than the shortest distance between a portion 93c of the peripheral carrier absorption section 93 and the temperature compensation diode 92. The portion 93c is a portion of the edges 93a and 93b of the peripheral carrier absorption section 93 that is closest to the APD 91 on a line segment connecting the APD 91 and the temperature compensation diode 92 at the shortest distance. In other words, the portion 93c is a portion of the edge 93b of the peripheral carrier absorption section 93 that is closest to the temperature compensation diode 92 when viewed from a direction perpendicular to the main surface 10a.

[0101] In more detail, when viewed from a direction perpendicular to the main surface 10a, on a line segment connecting the semiconductor layer 31 of the APD 91 and the semiconductor layer 31 of the temperature compensation diode 92 at the shortest distance, the distance L1 is smaller than the distance L2. The distance L1 is the shortest distance between the semiconductor layer 31 of the APD 91 and the peripheral carrier absorption section 93 when viewed from a direction perpendicular to the main surface 10a. The distance L2 is the shortest distance between the portion 93c of the peripheral carrier absorption section 93 and the semiconductor layer 31 of the temperature compensation diode 92 when viewed from a direction perpendicular to the main surface 10a. L2 / L1 is, for example, greater than 1 and less than 50. L2 / L1 may also be greater than 20 and less than 50.

[0102] like Figure 8 As shown, when viewed from a direction perpendicular to the main surface 10a, on a line segment connecting the semiconductor layer 36 of the APD 91 and the semiconductor layer 36 of the temperature compensation diode 92 at the shortest distance, the distance L3 is smaller than the distance L4. The distance L3 is the shortest distance between the semiconductor layer 36 of the APD 91 and the peripheral carrier absorption portion 93 when viewed from a direction perpendicular to the main surface 10a. The distance L4 is the shortest distance between the portion 93c of the peripheral carrier absorption portion 93 and the semiconductor layer 36 of the temperature compensation diode 92 when viewed from a direction perpendicular to the main surface 10a.

[0103] Next, refer to Fig. 9 The operation of the photodetection device including the semiconductor substrate 10C will be described. The photodetection device 1C is used in a state where the power supply 61 and the current limiting circuit 62 are connected to the pad electrode 55, similarly to the photodetection device 1. In the photodetection device 1C, the negative side of the power supply 61 is connected to the ground line 63, and the positive side is connected to the pad electrode 55 via the current limiting circuit 62. The pad electrodes 53 and 54 are connected to the ground lines 64 and 65, respectively. The ground lines 64 and 65 may be connected to each other. The pad electrode 52 is connected to a signal readout circuit (not shown).

[0104] In this modification, the pad electrode 55 and the N + The semiconductor layer 34 is connected to the N + The type semiconductor layer 35 is connected. Therefore, the cathodes of the APD 91, the temperature compensation diode 92, and the peripheral carrier absorption section 93 are connected in parallel with respect to the pad electrode 55. As a result, a positive potential is applied to the cathodes of the APD 91, the temperature compensation diode 92, and the peripheral carrier absorption section 93 by the power supply 61.

[0105] The difference between the potential applied to the pad electrode 53 and the potential applied to the pad electrode 55 is the breakdown voltage of the temperature compensation diode 92. Therefore, a potential corresponding to the breakdown voltage applied to the temperature compensation diode 92 is applied to the cathode of the APD 91. As a result, a voltage corresponding to the breakdown voltage applied to the temperature compensation diode 92 is applied to the APD 91 as a bias voltage. Similarly, a voltage corresponding to the breakdown voltage applied to the temperature compensation diode 92 is also applied to the cathode of the peripheral carrier absorption portion 93 as a bias voltage.

[0106] In this variant, the power supply 61 and the current limiting circuit 62 are connected to the pad electrode 55, and the breakdown voltage of the temperature compensating diode 92 is applied to the pad electrode 55. Therefore, the breakdown voltage of the temperature compensating diode 92 is applied to the APD91 and the peripheral carrier absorption part 93 as a bias voltage. In this variant, the output voltage of the power supply 61 is greater than the operating voltage of the APD91. In other words, the output voltage of the power supply 61 is greater than the upper limit of the temperature variation of the breakdown voltage of the temperature compensating diode 92. For example, the output voltage of the power supply 61 is greater than 300V. The current limiting circuit 62 is composed of, for example, a current mirror circuit or a resistor. In this case, for example, the multiplication factor of the APD91 can be arbitrarily set according to the breakdown voltage difference between the temperature compensating diode 92 and the APD91. By setting the amplification factor of the APD91 to the optimal multiplication factor Mopt with a relatively high S / N ratio, the detection accuracy can be improved.

[0107] In this modification, the APD 91, the temperature compensation diode 92, and the cathode of the peripheral carrier absorption section 93 are integrally formed in the semiconductor layer 35. For example, at an ambient temperature of 25°C, when the potential applied to the pad electrode 53 is 0V and the breakdown voltage of the temperature compensation diode 12 is 50V, a potential of +50V is applied to the cathode of the APD 91 and the cathode of the peripheral carrier absorption section 13. When the breakdown voltage of the APD 91 is 48V at an ambient temperature of 25°C, the APD 91 operates in a state where the potential difference between the anode and the cathode is 2V higher than the breakdown voltage.

[0108] The APD 91 and the temperature compensation diode 92 have the same temperature characteristics in terms of the relationship between the gain and the bias voltage. Therefore, as long as the temperature compensation diode 92 is in a breakdown state, the APD 91 operates while maintaining the gain when the bias voltage is set to be 2V higher than the breakdown voltage at an ambient temperature of 25°C. In other words, in the light detection device 1C, by applying a voltage to the temperature compensation diode 92 that causes the temperature compensation diode 92 to be in a breakdown state, temperature compensation for the gain of the APD 91 can be achieved.

[0109] In this modification, a configuration in which the so-called inverse APD 91 operates in the Geiger mode is described. The light detection device 1C may also adopt a configuration in which the inverse APD 91 operates in the linear mode. In the configuration in which the APD 91 operates in the linear mode, the quenching resistor 95 is not required. The semiconductor substrate 10C is configured such that the impurity concentration of the semiconductor layer 36 of the temperature compensation diode 92 is higher than the impurity concentration of the semiconductor layer 36 of the APD 91.

[0110] Next, the effects of the photodetection device in the above-mentioned embodiment and the modified example are described. In the past, when manufacturing a photodetection device including an APD and a temperature compensation diode having mutually equivalent temperature characteristics, it was necessary to perform an inspection for selecting and combining the APD having the required temperature characteristics in terms of the relationship between the amplification factor and the bias voltage. Therefore, it was difficult to reduce costs. In this regard, in the photodetection devices 1 and 1C, the APDs 11, 81, 91 and the temperature compensation diodes 12, 82, 92 are formed on the same semiconductor substrates 10, 10A, 10B, 10C, respectively. In this case, compared with the case where the temperature compensation diodes 12, 82, 92 and the APDs 11, 81, 91 are formed on different semiconductor substrates, it is easy to form the temperature compensation diodes 12, 82, 92 and the APDs 11, 81, 91 having mutually equivalent temperature characteristics in terms of the amplification factor and the bias voltage over a wide temperature range with high precision. Therefore, it is possible to achieve temperature compensation for the multiplication factor while suppressing the manufacturing cost.

[0111] When a breakdown voltage is applied to the temperature compensating diode 12, 82, 92, there is a concern that the temperature compensating diode 12, 82, 92 may emit light. When the temperature compensating diode 12, 82, 92 emits light, carriers are generated in the semiconductor substrate due to the light emitted by the temperature compensating diode 12, 82, 92. Therefore, when the temperature compensating diode 12, 82, 92 and the APD 11, 81, 91 are formed on the same semiconductor substrate, there is a concern that the carriers may affect the detection results of the APD 11, 81, 91.

[0112] In the above-mentioned photodetection devices 1 and 1C, the peripheral carrier absorption portion 13, 83, and 93 is located between the APD 11, 81, and 91 and the temperature compensation diode 12, 82, and 92. When viewed from a direction perpendicular to the main surface 10a, on a line segment connecting the APD 11, 81, and 91 and the temperature compensation diode 12, 82, and 92 with the shortest distance, the shortest distance between the APD 11, 81, and 91 and the peripheral carrier absorption portion 13, 83, and 93 is smaller than the shortest distance between the portion 13c, 83c, and 93c of the peripheral carrier absorption portion 13, 83, and 93 and the temperature compensation diode 12, 82, and 92.

[0113] More specifically, when observed from a direction orthogonal to the main surface 10a, on the line segment connecting APD11, 81, 91 and the temperature compensation diodes 12, 82, 92 at the shortest distance, the distance L1 between the semiconductor layer 31 of APD11, 81, 91 and the peripheral carrier absorption portion 13, 83, 93 is smaller than the distance L2 between the parts 13c, 83c, 93c of the peripheral carrier absorption portion 13, 83, 93 and the semiconductor layer 31 of the temperature compensation diodes 12, 82, 92. In the photodetection device 1, when viewed from a direction perpendicular to the main surface 10a, on a line segment connecting the APDs 11 and 81 with the temperature compensation diodes 12 and 82 at the shortest distance, a distance L3 between the semiconductor layer 32 of the APDs 11 and 81 and the peripheral carrier absorption portion 13 and 83 is smaller than a distance L4 between the portions 13c and 83c of the peripheral carrier absorption portion 13 and 83 and the semiconductor layer 32 of the temperature compensation diodes 12 and 82. In the photodetection device 1C, when viewed from a direction perpendicular to the main surface 10a, on a line segment connecting the APDs 91 and the temperature compensation diodes 92 at the shortest distance, a distance L3 between the semiconductor layer 36 of the APDs 91 and the peripheral carrier absorption portion 93 is smaller than a distance L4 between the portion 93c of the peripheral carrier absorption portion 93 and the semiconductor layer 36 of the temperature compensation diode 92.

[0114] In the above-mentioned structure, the carriers generated by the light emitted by the temperature compensation diodes 12, 82, 92 are absorbed by the peripheral carrier absorption parts 13, 83, 93 before reaching the APDs 11, 81, 91. As a result, the carriers generated by the temperature compensation diodes 12, 82, 92 can be suppressed from reaching the APDs 11, 81, 91, and the detection accuracy can be improved. Therefore, in the above-mentioned light detection devices 1, 1C, it is possible to achieve temperature compensation for the multiplication factor while suppressing the manufacturing cost, and to improve the detection accuracy. L2 / L1 is, for example, greater than 1 and less than 50. L2 / L1 can also be greater than 20 and less than 50, in which case, the carriers generated by the temperature compensation diodes 12, 82, 92 can be further suppressed from reaching the APDs 11, 81, 91.

[0115] The photodetection device 1, 1C includes electrodes 42, 43, 44, 45. The electrode 42 is connected to the APD 11, 81, 91 and outputs a signal from the APD 11, 81, 91. The electrode 43 is connected to the temperature compensation diode 12, 82, 92, and the electrode 44 is connected to the peripheral carrier absorption section 13, 83, 93. Therefore, a desired potential can be applied to the APD 11, 81, 91, the temperature compensation diode 12, 82, 92, and the peripheral carrier absorption section 13, 83, 93. When a voltage is applied to the peripheral carrier absorption section 13, 83, 93, carriers generated by the temperature compensation diode 12, 82, 92 can be further absorbed.

[0116] The APD 11, 81, 91, the temperature compensation diode 12, 82, 92, and the peripheral carrier absorption section 13, 83, 93 are connected in parallel to the electrode 45. The APD 11, 81, 91 and the temperature compensation diode 12, 82, 92 are connected in parallel, so that a potential corresponding to the breakdown voltage of the temperature compensation diode 12, 82, 92 can be applied to the APD 11, 81, 91. The peripheral carrier absorption section 13, 83, 93 is also connected in parallel with the APD 11, 81, 91 and the temperature compensation diode 12, 82, 92, so that a potential can be applied to the peripheral carrier absorption section 13, 83, 93 without separately providing a power supply. When a voltage is applied to the peripheral carrier absorption section 13, 83, 93, carriers generated by the temperature compensation diode 12, 82, 92 can be further absorbed.

[0117] The semiconductor substrate 10, 10A, 10B includes a semiconductor region 21 of the first conductivity type. The APD 11, 81 and the temperature compensation diode 12, 82 include a semiconductor layer 31 and a semiconductor layer 32, respectively. In the semiconductor substrate 10, 10A, 10B, the semiconductor layer 31 is of the second conductivity type. The semiconductor layer 32 is of the first conductivity type having a higher impurity concentration than the semiconductor region 21. The semiconductor layer 32 is located between the semiconductor region 21 and the semiconductor layer 31. In this way, the temperature compensation diode 12, 82 has the same structure as the APD 11, 81. Therefore, it is possible to easily form a temperature compensation diode 12, 82 whose temperature characteristics with respect to amplification factor and bias voltage are similar to those of the APD 11, 81.

[0118] In the semiconductor substrates 10, 10A, 10B having the through-type APDs 11, 81, respectively, the peripheral carrier absorption regions 13, 83 include the second conductivity type semiconductor layer 33. Therefore, the peripheral carrier absorption regions 13, 83 can further absorb carriers generated by the temperature compensation diodes 12, 82.

[0119] The semiconductor substrate 10C includes a semiconductor region 21 of the first conductivity type. The APD 91 and the temperature compensation diode 92 include a semiconductor layer 35 and a semiconductor layer 36, respectively. In the semiconductor substrate 10C, the semiconductor layer 35 is of the second conductivity type. The semiconductor layer 36 is of the first conductivity type having a higher impurity concentration than the semiconductor region 21. The semiconductor layer 36 is located between the semiconductor region 21 and the semiconductor layer 35. It can be seen that the temperature compensation diode 92 has the same structure as the APD 91. Therefore, it is possible to easily form a temperature compensation diode 92 whose temperature characteristics with respect to amplification factor and bias voltage are similar to those of the APD 91.

[0120] In the semiconductor substrate 10C having the inverted APD 91, the peripheral carrier absorbing portion 93 includes the first conductivity type semiconductor layer 33. Therefore, the peripheral carrier absorbing portion 93 can further absorb carriers generated by the temperature compensation diode 92.

[0121] In the semiconductor substrates 10, 10A, and 10B, the impurity concentration in the semiconductor layer 32 of the temperature compensation diode 12 and 82 is higher than the impurity concentration in the semiconductor layer 32 of the APD 11 and 81. In this case, in the light detection device 1, for example, the breakdown voltage of the APD 11 and 81 is higher than the breakdown voltage of the temperature compensation diode 12 and 82. As a result, temperature compensation for the multiplication rate of the APD 11 and 81 operating in the linear mode can be achieved. In addition, when the APD 91 of the semiconductor substrate 10C is operated in the linear mode, the semiconductor substrate 10C is configured so that the impurity concentration in the semiconductor layer 36 of the temperature compensation diode 92 is higher than the impurity concentration in the semiconductor layer 36 of the APD 91. In this case, in the light detection device 1C, for example, the breakdown voltage of the APD 91 is higher than the breakdown voltage of the temperature compensation diode 92.

[0122] In the semiconductor substrate 10C, the impurity concentration in the semiconductor layer 36 of the temperature compensation diode 92 is lower than the impurity concentration in the semiconductor layer 36 of the APD 91. In this case, in the light detection device 1C, for example, the breakdown voltage of the APD 91 can be lower than the breakdown voltage of the temperature compensation diode 92. As a result, temperature compensation for the multiplication rate of the APD 91 operating in the Geiger mode can be achieved. In addition, when the APD 11 and 81 of the semiconductor substrates 10, 10A, and 10B are operated in the Geiger mode, the semiconductor substrates 10, 10A, and 10B are configured so that the impurity concentration in the semiconductor layer 32 of the temperature compensation diode 12 and 82 is lower than the impurity concentration in the semiconductor layer 32 of the APD 11 and 81. In this case, in the light detection device 1, for example, the breakdown voltage of the APD 11 and 81 is lower than the breakdown voltage of the temperature compensation diode 12 and 82.

[0123] Next, refer to Fig.10An example of a method for manufacturing a photodetection device will be described. Fig.10 1 is a flowchart showing a method for manufacturing the semiconductor substrate 10 in the photodetection device 1 .

[0124] First, a semiconductor wafer is prepared (step S1). The semiconductor wafer is a substrate before being processed as a semiconductor substrate 10, and has main surfaces 10a and 10b facing each other. The semiconductor wafer contains a semiconductor region of the first conductivity type corresponding to the semiconductor region 21. The semiconductor region is provided on the main surface 10a side of the semiconductor wafer and constitutes the entire main surface 10a. For example, the semiconductor region of the semiconductor wafer is P - In this embodiment, impurities are added to the semiconductor wafer from the main surface 10b side to form a semiconductor layer 35 of the first conductivity type having an impurity concentration higher than that of the semiconductor region of the semiconductor wafer. For example, the semiconductor layer 35 is P + type.

[0125] Next, as a first ion implantation step (step S2), impurity ions are implanted into the main surface 10a side by an ion implantation method to add impurities, thereby forming the second conductivity type semiconductor layers 31 and 33 and the first conductivity type semiconductor layers 32 and 34. For example, the semiconductor layers 31 and 33 are N + type, semiconductor layer 32 is P type, semiconductor layer 34 is P + In this embodiment, the semiconductor layer 31 and the semiconductor layer 33 are formed by injecting the second conductivity type impurity ions into two different locations separated from each other through a single ion implantation process. The semiconductor layer 32 is formed by injecting the first conductivity type impurity ions after forming the semiconductor layers 31 and 33. The semiconductor layer 32 may also be formed by injecting the first conductivity type impurity ions before forming the semiconductor layers 31 and 33.

[0126] The semiconductor layers 31 and 32 are formed at positions overlapping each other when viewed from a direction perpendicular to the main surface 10a. The semiconductor layer 32 is formed by implanting the first conductive type impurity into a position deeper than the semiconductor layer 31 when viewed from the main surface 10a side. The semiconductor layers 31 and 32 are formed at a plurality of locations spaced apart from each other when viewed from a direction perpendicular to the main surface 10a in a region forming one semiconductor substrate 10. The plurality of locations include a location where the APD 11 is configured and a location where the temperature compensation diode 12 is configured. In the first ion implantation step, the second conductive type impurity is added to each location in such a way that the impurity concentration of the semiconductor layer 31 becomes equal. Similarly, the first conductive type impurity is added to each location in such a way that the impurity concentration of the semiconductor layer 32 becomes equal.

[0127] Next, as a second ion implantation process (step S3), impurities are further added to the semiconductor layer 32 only at a portion of the above-mentioned multiple locations by an ion implantation method. In the present embodiment, impurities of the first conductivity type are further implanted into the semiconductor layer 32 only at the location where the temperature compensation diode 12 is configured. Therefore, in the light detection device 1, the impurity concentration in the semiconductor layer 32 of the temperature compensation diode 12 is higher than the impurity concentration in the semiconductor layer 32 of the APD 11. In this case, the light detection device 1 is configured so that the breakdown voltage of the APD 11 is greater than the breakdown voltage of the temperature compensation diode 12.

[0128] In the second ion implantation step, the first conductivity type impurity may be further implanted into the semiconductor layer 32 only in the portion where the temperature compensation diode 12 is not disposed but the portion where the APD 11 is disposed. In this case, in the light detection device 1, the impurity concentration in the semiconductor layer 32 of the temperature compensation diode 12 is lower than the impurity concentration in the semiconductor layer 32 of the APD 11. The light detection device in this case is configured so that the breakdown voltage of the APD 11 is lower than the breakdown voltage of the temperature compensation diode 12.

[0129] The semiconductor substrate 10 of the light detection device 1 is formed through the above steps. In the present embodiment, the semiconductor layers 31, 32, 33, and 34 are formed after the semiconductor layer 35 is already formed. However, the semiconductor layer 35 may be formed after the semiconductor layers 31, 32, 33, and 34 are formed.

[0130] In the above-mentioned manufacturing method, semiconductor layers 31 and semiconductor layers 32 are formed in each part by injecting ions into a plurality of different parts. Then, ions are further injected into the semiconductor layer 32 of a part of the part. Therefore, it is easy to manufacture the temperature compensation diode 12 and APD11 which have the same temperature characteristics with respect to the multiplication factor and the bias voltage and are respectively set to the required breakdown voltage. In this case, for example, the multiplication factor of APD11 can be arbitrarily set according to the breakdown voltage difference between the temperature compensation diode 12 and APD11. Therefore, when the temperature compensation diode 12 and APD11 are respectively set to the required breakdown voltage, the detection accuracy can be improved. For example, when the multiplication factor of APD11 is set to the optimal multiplication factor Mopt with a relatively high S / N ratio according to the breakdown voltage difference between the temperature compensation diode 12 and APD11, the detection accuracy can be improved. It can be seen that in the above-mentioned manufacturing method, it is possible to achieve temperature compensation for the multiplication factor and improve the detection accuracy while suppressing the manufacturing cost.

[0131] In the present embodiment, the semiconductor layer 31 and the semiconductor layer 33 are formed by a single ion implantation process in the first ion implantation step. Therefore, the peripheral carrier absorption region 13 can be formed without increasing the number of ion implantation steps. Therefore, the manufacturing cost can be reduced.

[0132] As mentioned above, although embodiment and modification of this invention were described, this invention is not necessarily limited to the said embodiment and modification, Various changes can be made within the range which does not deviate from the summary.

[0133] For example, the above manufacturing method can be applied not only to the manufacturing of the semiconductor substrate 10 of the light detection device 1 but also to the manufacturing of the semiconductor substrates 10A and 10B. The above manufacturing method can be applied not only to the manufacturing of the light detection device 1 but also to the manufacturing of the light detection device 1C.

[0134] In the present embodiment and the modified example, the peripheral carrier absorption section 13 is described as being formed in a ring shape, but is not limited thereto. The peripheral carrier absorption section 13 can completely surround the APD 11 or the APD array 80. In other words, the peripheral carrier absorption section 13 can surround the APD 11 or the APD array 80 360° when viewed from a direction orthogonal to the main surface 10a. For example, as long as it is arranged between the APD 11 and the temperature compensation diode 12, the peripheral carrier absorption section 13 can also be in an I-shape or a U-shape, etc.

[0135] The peripheral carrier absorption section 83 can surround the multiple APDs 81 included in the APD array 80, respectively. In other words, the peripheral carrier absorption section 83 can surround the multiple APDs 81 included in the APD array 80 one by one. Any APD 81 among the multiple APDs 81 can be used as a temperature compensation diode. In this case, it is also possible to suppress the carriers generated from the APD 81 used as a temperature compensation diode from reaching other APDs 81.

[0136] In the above-described modification, the semiconductor substrate 10C is described as including the semiconductor layer 36. However, the APD 91 of the semiconductor substrate 10C may not include the semiconductor layer 36, and in this case, it also functions as an APD. In the configuration in which the semiconductor substrate 10C does not include the semiconductor layer 36, for example, the semiconductor region 21 and the semiconductor layer 35 are in contact with each other without sandwiching the semiconductor layer 36.

[0137] Explanation of symbols

[0138] 1, 1C…light detection device, 10, 10A, 10B, 10C…semiconductor substrate, 10a, 10b…main surface, 11, 81, 81a, 91…APD, 11a, 91a…light incident surface, 12, 82, 92…temperature compensation diode, 13, 83, 93…peripheral carrier absorption part, 13a, 13b, 83a, 83b, 93a, 93b…edge, 13c, 83c, 93c…part, 21…semiconductor region, 31, 32, 33, 36…semiconductor layer, 42, 43, 44, 45…electrode, 80…APD array, L1, L2, L3, L4…distance.

Claims

1. A light detection device, characterized in that: include: a semiconductor substrate having a first main surface and a second main surface facing each other, and having an avalanche photodiode and a temperature compensation diode formed thereon so as to be spaced apart from each other when viewed from a direction perpendicular to the first main surface; and at least one electrode connected to the semiconductor substrate, When viewed from a direction perpendicular to the first main surface, the semiconductor substrate has a peripheral carrier absorption portion between the avalanche photodiode and the temperature compensation diode for absorbing peripheral carriers. The semiconductor substrate comprises a semiconductor region. The peripheral carrier absorption portion includes a semiconductor layer that is in contact with the semiconductor region and surrounded by the semiconductor region when viewed from a direction perpendicular to the first main surface. The at least one electrode includes an electrode connected to the semiconductor layer of the peripheral carrier absorption portion, When viewed from a direction perpendicular to the first main surface, on a line segment connecting the avalanche photodiode and the temperature compensation diode at the shortest distance, The shortest distance between the avalanche photodiode and the peripheral carrier absorbing portion is smaller than the shortest distance between the portion of the edge of the peripheral carrier absorbing portion closest to the avalanche photodiode and the temperature compensation diode. Temperature compensation of the multiplication factor of the avalanche photodiode is performed by applying a voltage corresponding to a breakdown voltage applied to the temperature compensation diode to the avalanche photodiode as a bias voltage.

2. The light detection device according to claim 1, wherein include: a first electrode connected to the avalanche photodiode and outputting a signal from the avalanche photodiode; A second electrode connected to the temperature compensation diode; and The third electrode is connected to the peripheral carrier absorption portion.

3. The light detection device according to claim 2, characterized in that A fourth electrode is included, and the avalanche photodiode, the temperature compensation diode, and the peripheral carrier absorption portion are connected to the fourth electrode in parallel with each other.

4. The light detection device according to any one of claims 1 to 3, characterized in that The semiconductor substrate includes a semiconductor region of a first conductivity type, The avalanche photodiode and the temperature compensation diode respectively include: a first semiconductor layer of a second conductivity type different from the first conductivity type; and a second semiconductor layer of the first conductivity type located between the semiconductor region and the first semiconductor layer and having a higher impurity concentration than the semiconductor region.

5. The light detection device according to claim 4, characterized in that The peripheral carrier absorption portion includes a third semiconductor layer of the second conductivity type.

6. The light detection device according to claim 4, characterized in that The peripheral carrier absorption portion includes a third semiconductor layer of the first conductivity type.

7. The light detection device according to any one of claims 4 to 6, characterized in that When viewed from a direction perpendicular to the first main surface, on a line segment connecting the avalanche photodiode and the temperature compensation diode at the shortest distance, The shortest distance between the first semiconductor layer of the avalanche photodiode and the peripheral carrier absorbing portion is smaller than the shortest distance between the portion of the peripheral carrier absorbing portion and the first semiconductor layer of the temperature compensation diode.

8. The light detection device according to any one of claims 4 to 7, wherein: When viewed from a direction perpendicular to the first main surface, on a line segment connecting the avalanche photodiode and the temperature compensation diode at the shortest distance, The shortest distance between the second semiconductor layer of the avalanche photodiode and the peripheral carrier absorbing portion is smaller than the shortest distance between the portion of the peripheral carrier absorbing portion and the second semiconductor layer of the temperature compensation diode.

9. The light detection device according to any one of claims 4 to 8, characterized in that An impurity concentration in the second semiconductor layer of the temperature compensation diode is higher than an impurity concentration in the second semiconductor layer of the avalanche photodiode.

10. The light detection device according to any one of claims 4 to 8, characterized in that An impurity concentration in the second semiconductor layer of the temperature compensation diode is lower than an impurity concentration in the second semiconductor layer of the avalanche photodiode.

11. The light detection device according to any one of claims 1 to 10, wherein: An avalanche photodiode array including the avalanche photodiode is formed on the first main surface side of the semiconductor substrate. The peripheral carrier absorption portion is located between the avalanche photodiode array and the temperature compensation diode when viewed from a direction perpendicular to the first main surface.

12. A light detection device, characterized in that: include: A semiconductor substrate having a first main surface and a second main surface facing each other; and at least one electrode connected to the semiconductor substrate, The semiconductor substrate has: a first avalanche photodiode having a light incident surface on the first main surface side; a second avalanche photodiode that is spaced apart from the first avalanche photodiode and shielded from light when viewed from a direction perpendicular to the first main surface; and a peripheral carrier absorption portion, which is located between the first and second avalanche photodiodes when viewed from a direction perpendicular to the first main surface, and absorbs carriers located in the periphery, The semiconductor substrate comprises a semiconductor region. The peripheral carrier absorption portion includes a semiconductor layer that is in contact with the semiconductor region and surrounded by the semiconductor region when viewed from a direction perpendicular to the first main surface. The at least one electrode includes an electrode connected to the semiconductor layer of the peripheral carrier absorption portion, When viewed from a direction perpendicular to the first main surface, on a line segment connecting the first avalanche photodiode and the second avalanche photodiode at the shortest distance, The shortest distance between the first avalanche photodiode and the peripheral carrier absorbing portion is smaller than the shortest distance between a portion of an edge of the peripheral carrier absorbing portion closest to the first avalanche photodiode and the second avalanche photodiode.

13. A method for manufacturing a light detection device, characterized in that: have: A step of preparing a semiconductor wafer having a first main surface and including a semiconductor region of a first conductivity type; and The process of implanting impurity ions into the semiconductor wafer to form a semiconductor substrate having the first main surface and a second main surface opposite to the first main surface, and having an avalanche photodiode and a temperature compensation diode spaced apart from each other when viewed from a direction perpendicular to the first main surface, The light detection device includes the semiconductor substrate, and performs temperature compensation of the multiplication factor of the avalanche photodiode by applying a voltage corresponding to the breakdown voltage applied to the temperature compensation diode to the avalanche photodiode as a bias voltage. The process of forming the semiconductor substrate includes: a first ion implantation step of implanting impurity ions into a first portion and a second portion of the semiconductor wafer that are spaced apart from each other when viewed in a direction perpendicular to the first main surface, thereby forming a first semiconductor layer having a second conductivity type different from the first conductivity type and a second semiconductor layer of the first conductivity type located between the semiconductor region and the first semiconductor layer and having a higher impurity concentration than the semiconductor region at the first portion and the second portion, respectively; and In the second ion implantation step, impurity ions are further implanted into the second semiconductor layer in the first portion.

14. The method for manufacturing a light detection device according to claim 13, wherein: The first ion implantation process comprises: A step of forming the first semiconductor layer in the first portion and the second portion and forming a third semiconductor layer of the second conductivity type in the third portion by implanting impurity ions of the second conductivity type into the first portion and the second portion and a third portion spaced apart from the first portion and the second portion when viewed from a direction perpendicular to the first main surface, through a single ion implantation process; and A step of forming the second semiconductor layer in the first portion and the second portion by implanting impurity ions of the first conductivity type into the first portion and the second portion, respectively.

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