Semiconductor devices

Abstract

A semiconductor device (100) comprises a semiconductor substrate (10), a first anode electrode (1), and a second anode electrode (2). The first anode electrode (1) is arranged on the semiconductor substrate (10). The second anode electrode (2) is arranged on the semiconductor substrate (10) around the first anode electrode (1) at a distance from the first anode electrode (1). At least one of a first end (1E) of the first anode electrode (1) on the second anode electrode (2) side and a second end (2E) of the second anode electrode (2) on the first anode electrode (1) side is covered by a SInSiN film (3).

Description

Technical Field

[0001] The present invention relates to a semiconductor device. Background Art

[0002] For example, Japanese Patent Gazette No. 2002-359377 discloses a semiconductor device. The semiconductor device has an anode electrode on one main surface of a semiconductor substrate and a cathode electrode on another main surface of the semiconductor substrate. The anode electrode includes a first anode electrode and a second anode electrode. The first anode electrode is formed in the central portion on one main surface of the semiconductor substrate. The second anode electrode is formed on the outer side of the first anode electrode at a distance from the first anode electrode on one main surface. The first anode electrode and the second anode electrode are both current-carrying portions of the semiconductor device. However, the first anode electrode is formed in the active region of the semiconductor device, whereas the second anode electrode is formed as a monitoring electrode on the outer side of the first anode electrode. The monitoring electrode is formed to confirm the current-carrying characteristics of the semiconductor device.

[0003] However, in the semiconductor device of Japanese Patent Application Laid-Open No. 2002-359377, there is a possibility that discharge may occur between the first anode electrode and the second anode electrode. Summary of the invention

[0004] The present invention has been made in view of the above-mentioned problems, and its object is to provide a semiconductor device capable of suppressing discharge between a first anode electrode and a second anode electrode outside the first anode electrode.

[0005] The semiconductor device of the present invention comprises a semiconductor substrate, a first anode electrode, and a second anode electrode. The first anode electrode is arranged on the semiconductor substrate. The second anode electrode is arranged around the first anode electrode on the semiconductor substrate at a distance from the first anode electrode. At least one of a first end of the first anode electrode on the second anode electrode side and a second end of the second anode electrode on the first anode electrode side is covered with a SInSiN film (Semi-Insulated Silicon Nitride).

[0006] The above and other objects, features, aspects and advantages of the present invention will become more apparent from the following detailed description of the present invention when taken in conjunction with the accompanying drawings. BRIEF DESCRIPTION OF THE DRAWINGS

[0007] Figure 1 This is a schematic plan view of a semiconductor device according to a first example of the first embodiment.

[0008] Figure 2 This is a schematic plan view of a portion of a semiconductor substrate included in the semiconductor device of the first example of the first embodiment.

[0009] Figure 3 is along Figure 1 as well as Figure 2 Schematic cross-sectional view of the semiconductor device of the first example of the first embodiment taken along line III-III.

[0010] Figure 4 yes Figure 1 Schematic enlarged top view of area IV surrounded by the dotted line.

[0011] Figure 5 This is a schematic cross-sectional view of a semiconductor device according to a second example of the first embodiment.

[0012] Figure 6 This is a schematic cross-sectional view of a semiconductor device according to a third example of the first embodiment.

[0013] Figure 7 This is a schematic diagram for explaining the operation and effect of the semiconductor device according to the first embodiment.

[0014] Figure 8 This is a schematic cross-sectional view of a semiconductor device according to a second embodiment.

[0015] Fig. 9 This is a schematic cross-sectional view of a semiconductor device according to a first example of the third embodiment.

[0016] Fig.10 This is a schematic cross-sectional view of a semiconductor device according to a second example of the third embodiment.

[0017] Fig.11 is the same as in Implementation 4 Figure 4 A schematic enlarged top view of the same area.

[0018] Fig.12 It means Fig.11 A schematic enlarged plan view of the corners of the first end face and the second end face in the same region. DETAILED DESCRIPTION

[0019] Hereinafter, this embodiment will be described based on the drawings.

[0020] Implementation method 1.

[0021] First, use Figure 1 to Figure 4 The structure of the semiconductor device of this embodiment will be described. In addition, for the convenience of description, the X direction, the Y direction, and the Z direction are introduced. Figure 1 This is a schematic plan view of a semiconductor device according to a first example of the first embodiment. Figure 2 This is a schematic plan view of a portion of a semiconductor substrate included in the semiconductor device of the first example of the first embodiment. Figure 3 is along Figure 1 as well as Figure 2A schematic cross-sectional view of a semiconductor device according to the first example of the first embodiment of the present invention at a portion of the line III-III. Figure 1 as well as Figure 2 As shown, the X direction and the Y direction in the above-mentioned figures are respectively directions inclined by about 45° with respect to the left-right direction and the up-down direction of the figure. Figure 1 as well as Figure 2 The same orientation is depicted in the accompanying drawings.

[0022] Reference Figure 1 , Figure 2 as well as Figure 3 The semiconductor device 100 according to the first example of the present embodiment includes a semiconductor substrate 10. A diode is formed on the semiconductor substrate 10. Specifically, the semiconductor substrate 10 includes a main surface 10A and another main surface 10B, and the other main surface 10B is opposite to the opposite side of the main surface 10A. The semiconductor substrate 10 is formed of, for example, n-type silicon. The main surface 10A is arranged on the upper side in the Z direction of each figure, and the other main surface 10B is arranged on the lower side in the Z direction of each figure.

[0023] The semiconductor substrate 10 has a diode section 11 and a monitoring section 12. The diode section 11 is a region in the semiconductor substrate 10 where a diode is formed. The diode section 11 is arranged, for example, in the central portion when one main surface 10A of the semiconductor substrate 10 is viewed from above. The diode section 11 has an active region 11A and a peripheral region 11B. The active region 11A is a region in the diode section 11 where the main body of the diode is formed and electricity is passed through the diode. The peripheral region 11B is a region for making the main body of the diode formed in the active region 11A have a withstand voltage greater than or equal to a certain value. The peripheral region 11B is arranged, for example, on the outside of the active region 11A when one main surface 10A of the semiconductor substrate 10 is viewed from above in a manner that surrounds the active region 11A.

[0024] The monitoring portion 12 is disposed, for example, outside the diode portion 11 when the one main surface 10A of the semiconductor substrate 10 is viewed from above, so as to surround the diode portion 11. The monitoring portion 12 may also be Figure 1 as well as Figure 2 As shown in FIG. 1 , for example, the monitoring unit 12 is formed at a corner of the semiconductor substrate 10 which is rectangular when viewed from above. Alternatively, the monitoring unit 12 may be formed as shown in FIG. Figure 2 As shown in FIG. 1 , the monitoring portion 12 is formed only at the upper left corner of the semiconductor substrate 10 which is rectangular when viewed from above and at the lower right corner diagonally opposite to the upper left corner. The monitoring portion 12 is a region formed to confirm the conduction characteristics of the diode. In addition, the active region 11A, the peripheral region 11B and the monitoring portion 12 may be adjacent to each other in a contacting manner.

[0025] Figure 4 yes Figure 1 A schematic enlarged top view of the region IV surrounded by the dotted line. Figure 1 to Figure 3 as well as Figure 4 A first anode electrode 1 is arranged on one main surface 10A of the diode portion 11. A second anode electrode 2 is arranged on one main surface 10A of the monitoring portion 12. The second anode electrode 2 is arranged around the first anode electrode 1 on one main surface 10A of the semiconductor substrate 10 with a gap therebetween. That is, the second anode electrode 2 is arranged outside the first anode electrode 1 when viewed from above.

[0026] exist Figure 3 In the example, the first anode electrode 1 includes an active electrode 1A and a peripheral electrode 1B. The active electrode 1A is a first anode electrode formed in an active region 11A in the diode portion 11. Therefore, the active electrode 1A functions as a main anode electrode of the diode. The peripheral electrode 1B is a first anode electrode formed in a peripheral region 11B in the diode portion 11. The peripheral electrode 1B is spaced apart from the active electrode 1A and is disposed on the second anode electrode 2 side relative to the active electrode 1A, that is, on the outside of the active electrode 1A. In other words, as Figure 1 As shown, the peripheral electrode 1B is formed on one main surface 10A so as to surround the active electrode 1A. Therefore, the peripheral electrode 1B functions as a so-called guard ring for ensuring the withstand voltage of the diode including the active electrode 1A. Thus, when viewed from above, the second anode electrode 2 is spaced apart from the peripheral electrode 1B and is arranged outside the peripheral electrode 1B.

[0027] Consider the first end 1E on the second anode electrode 2 side, that is, the outer side of the first anode electrode 1 in the X direction. The first anode electrode 1 includes an active portion electrode 1A and a peripheral electrode 1B on the outer side of the active portion electrode 1A. Figure 3 In the example, the first end 1E is the end of the peripheral electrode 1B on the second anode electrode 2 side. In addition, consider the second end 2E on the first anode electrode 1 side, i.e., the inner side of the second anode electrode 2. Here, the first end 1E and the second end 2E are not limited to the end face, but also include a slightly wider range adjacent to the end face surrounded by the dotted line in the figure. At this time, the first end 1E and the second end 2E are both covered by the SInSiN film 3. Figure 1 as well as Figure 3 In the embodiment, the SInSiN film 3 is formed so as to connect the entire surface of the peripheral electrode 1B including the first end 1E except the surface facing the semiconductor substrate 10 side, i.e., the lower side in the Z direction, to a part of the surface of the active electrode 1A, i.e., the right side in the X direction. In other words, Figure 3The SInSiN film 3 shown in the figure straddles the active portion electrode 1A and the peripheral electrode 1B so as to be in contact with a part of both of them.

[0028] The SInSiN film 3 is a semi-insulating silicon nitride film. Figure 3 As shown, the SInSiN film 3 may cover the entire first end 1E and the second end 2E. The SInSiN film 3 may cover only a portion of at least one of the first end 1E and the second end 2E. The SInSiN film 3 may be formed only on a portion of the surface of the peripheral electrode 1B other than the first end 1E, or the SInSiN film 3 may not be formed at all. The SInSiN film 3 may not be formed at all on the surface of the active portion electrode 1A.

[0029] In addition, Figure 3 In the embodiment, the third end 2G of the second anode electrode 2 on the opposite side to the second end 2E in the X direction is covered by the SInSiN film 3. Such a structure may also be adopted. Figure 3 As shown, the SInSiN film 3 may cover the entire third end portion 2G. However, the SInSiN film 3 may be formed only on a portion of the third end portion 2G. Alternatively, the SInSiN film 3 may not be formed at all on the third end portion 2G.

[0030] exist Figure 3 In the embodiment, the SInSiN film 3 on the second end 2E and the SInSiN film 3 on the third end 2G are formed as separate films. As a result, the uppermost portion, i.e., the central portion, of the second anode electrode 2 is exposed and not covered by the SInSiN film 3. A test pin (not shown) is provided at the exposed portion of the second anode electrode 2 for making the second anode electrode 2 function as a monitoring electrode.

[0031] In addition, in this embodiment, a resin insulating film such as a polyimide film may be used instead of the SInSiN film 3. Alternatively, the film covering at least one of the first end 1E and the second end 2E may be a two-layer structure in which the SInSiN film 3 and the resin insulating film such as a polyimide film are stacked.

[0032] A first anode region 4 and a second anode region 5 are formed on one main surface 10A of the semiconductor substrate 10. The first anode region 4 is formed in the diode portion 11, and the second anode region 5 is formed in the monitoring portion 12. The first anode region 4 has a first anode active region 4A and a first anode peripheral region 4B. The first anode active region 4A is formed in the active region 11A, and the first anode peripheral region 4B is formed in the peripheral region 11B. The first anode active region 4A, the first anode peripheral region 4B, and the second anode region 5 are formed as p-type impurity regions in the n-type semiconductor substrate 10.

[0033] The first anode active region 4A is formed in at least a portion of one main surface 10A of the active region 11A. The first anode peripheral region 4B is formed in at least a portion of one main surface 10A of the peripheral region 11B. The second anode region 5 is formed in at least a portion of one main surface 10A of the monitoring portion 12. Thus, when viewed from above, at least a portion of the first anode active region 4A overlaps with the active portion electrode 1A. When viewed from above, at least a portion of the first anode peripheral region 4B overlaps with the peripheral electrode 1B. When viewed from above, at least a portion of the second anode region 5 overlaps with the second anode electrode 2. Thus, on one main surface 10A, the first anode active region 4A is in contact with the active portion electrode 1A, the first anode peripheral region 4B is in contact with the peripheral electrode 1B, and the second anode region 5 is in contact with the monitoring portion 12.

[0034] A cathode region 6 is formed on the other main surface 10B of the semiconductor substrate 10. The cathode region 6 may be formed as Figure 3 As shown in FIG. 1 , the cathode region 6 is formed on substantially the entirety of the active region 11A, the peripheral region 11B, and the other main surface 10B of the monitoring portion 12. However, the cathode region 6 may be formed only on a portion of the other main surface 10B of the active region 11A. The cathode region 6 is formed in the n-type semiconductor substrate 10 as an n-type impurity region having a higher impurity concentration than the semiconductor substrate 10.

[0035] Furthermore, contrary to the above, the semiconductor substrate 10 and the cathode region 6 may be of the p-type, and the first anode region 4 and the second anode region 5 may be of the n-type.

[0036] A cathode electrode 7 is formed on the other main surface 10B of the semiconductor substrate 10. The cathode electrode 7 is preferably formed so as to overlap with the cathode region 6 in a plan view. Figure 3 In the embodiment, since the cathode region 6 is formed on the entire other main surface 10B, the cathode electrode 7 is formed on the entire other main surface 10B in a manner covering the entire cathode region 6. Thus, on the other main surface 10B, the cathode region 6 is in contact with the cathode electrode 7. Therefore, the cathode electrode 7 is electrically connected to the cathode region 6.

[0037] And, if Figure 3As shown, an oxide film 8 is formed on one main surface 10A of the semiconductor substrate 10. The oxide film 8 is formed in a manner that contacts both the first anode active region 4A and the first anode peripheral region 4B and spans between the two. In addition, the other oxide film 8 is formed in a manner that contacts both the first anode peripheral region 4B and the second anode region 5 and spans between the two. The oxide film 8 is formed in a manner that covers only a portion of the first anode active region 4A, the first anode peripheral region 4B, and the second anode region 5 that are in contact with one main surface 10A. Therefore, the end surface of the oxide film 8 in the X direction forms an opening 8A in one main surface 10A of the first anode active region 4A, the first anode peripheral region 4B, and the second anode region 5. That is, in the opening 8A, the first anode active region 4A, the first anode peripheral region 4B, and the second anode region 5 are exposed from the oxide film 8 in a manner that is not covered by the oxide film 8.

[0038] The active electrode 1A contacts the first anode active region 4A through the opening 8A of the oxide film 8. Thus, the first anode active region 4A is electrically connected to the active electrode 1A. Similarly, the peripheral electrode 1B contacts the first anode peripheral region 4B through the opening 8A of the oxide film 8. Thus, the first anode peripheral region 4B is electrically connected to the peripheral electrode 1B. Furthermore, the second anode electrode 2 contacts the second anode region 5 through the opening 8A of the oxide film 8. Thus, the second anode region 5 is electrically connected to the second anode electrode 2.

[0039] The active electrode 1A, the peripheral electrode 1B, and the second anode electrode 2 are arranged so that a part of them covers the surface of the oxide film 8. More specifically, the oxide film 8 straddles the active electrode 1A and the peripheral electrode 1B so as to contact a part of both. In addition, another oxide film 8 straddles the peripheral electrode 1B and the second anode electrode 2 so as to contact a part of both.

[0040] Figure 5 2 is a schematic cross-sectional view of a semiconductor device according to a second example of the first embodiment. Figure 5 The semiconductor device 100 according to the second example of this embodiment has the same structure as that of the semiconductor device 100 according to the first example. Figure 3 Therefore, the same reference numerals are given to the same structural elements, and their description will not be repeated unless there are any special differences. Figure 5 In, with Figure 3 In comparison, the structures of the first anode electrode 1 and the first anode region 4 are different.

[0041] Specifically, in Figure 5 In the embodiment, the first anode electrode 1 is not divided into two parts, namely, the active electrode 1A and the peripheral electrode 1B, but only has Figure 3 The active electrode 1A is an active electrode 1A as a single first anode electrode 1 in which the active electrode 1A and the peripheral electrode 1B are integrated. The active electrode 1A is formed at Figure 3 The first anode region 4 is not divided into two parts: the first anode active region 4A and the first anode peripheral region 4B. Figure 3 The first anode active region 4A is formed as a single first anode region 4 in which the first anode active region 4A and the first anode peripheral region 4B are integrated. The first anode active region 4A is formed in Figure 3 The area where the first anode active region 4A and the first anode peripheral region 4B are arranged and the entire area between the first anode active region 4A and the first anode peripheral region 4B. Figure 5 The semiconductor device 100 is shown in a top view (not shown). Figure 1 The semiconductor device 100 has an active portion electrode 1A and a peripheral electrode 1B that are integrated into one, and has a form in which the active portion electrode 1A has the meaning of a single first anode electrode 1 .

[0042] Figure 3 The peripheral electrode 1B in the first example is provided from the viewpoint of setting the diode including the active electrode 1A to have a withstand voltage greater than or equal to a certain value. However, if the above-mentioned diode can ensure a large withstand voltage, the peripheral electrode 1B as a guard ring is not required. In this case, Figure 5 The semiconductor device 100 having the structure as in the second example can also be considered as an example of this embodiment.

[0043] Figure 6 1 is a schematic cross-sectional view of a semiconductor device according to a third example of the first embodiment. Figure 6 The semiconductor device 100 according to the third example of this embodiment has the same structure as that of the first example. Figure 3 Therefore, the same reference numerals are given to the same structural elements, and their description will not be repeated unless there are any special differences. Figure 6 In, with Figure 3 In comparison, the structure of the SInSiN film 3 is different.

[0044] Specifically, in Figure 6 In the embodiment, only the active electrode 1A and the peripheral electrode 1B of the first anode electrode 1 are formed with Figure 3 The same morphology of the SInSiN film 3. Therefore, in Figure 6 In the embodiment, a SInSiN film 3 is formed so as to cover the first end portion 1E. Figure 6In FIG. 2 , the second anode electrode 2 is not covered with the SInSiN film 3. Therefore, the SInSiN film 3 is not formed on the second end portion 2E.

[0045] In this embodiment, the SInSiN film 3 may be formed so as to cover at least one of the first end portion 1E and the second end portion 2E. Figure 6 As shown in FIG. 1 , the SInSiN film 3 is formed so as to cover only the first end 1E of the first anode electrode 1 and not to cover the second end 2E of the second anode electrode 2. Figure 6 On the contrary, it can also be the following structure, that is, with Figure 3 In the same manner, the SInSiN film 3 covering the second end 2E is formed only on the second anode electrode 2, and the SInSiN film 3 covering the first end 1E is not formed on the first anode electrode 1. Figure 5 In the second example, the first anode electrode 1 has only the active portion electrode 1A, and the SInSiN film 3 is formed only at the first end 1E and the second end 2E. The above structure can also be considered as a further modification of the semiconductor device 100.

[0046] In the above Figure 3 , Figure 5 , Figure 6 In FIG. 1 , the boundaries between the active region 11A, the peripheral region 11B, and the monitoring portion 12 are indicated by a dotted line extending in the Z direction. However, the position of the dotted line may be slightly changed in the left-right direction relative to the position in the above-mentioned figures. For example, Figure 3 , Figure 6 The dotted line on the left side of may be arranged at any position between the active portion electrode 1A and the peripheral electrode 1B in the X direction. Figure 3 , Figure 6 The dotted line on the right side of may be arranged at any position between the peripheral electrode 1B and the second anode electrode 2 in the X direction.

[0047] Below, while referring to Figure 7 The effects of this embodiment will be described below.

[0048] The semiconductor device 100 according to the present invention includes a semiconductor substrate 10, a first anode electrode 1, and a second anode electrode 2. The first anode electrode 1 is disposed on the semiconductor substrate 10. The second anode electrode 2 is disposed around the first anode electrode 1 on the semiconductor substrate 10 at a distance from the first anode electrode 1. At least one of a first end 1E of the first anode electrode 1 on the second anode electrode 2 side and a second end 2E of the second anode electrode 2 on the first anode electrode 1 side is covered by a SInSiN film 3.

[0049] By driving the semiconductor device 100, a potential difference is generated between the first end 1E of the first anode electrode 1 and the second end 2E of the second anode electrode 2. Therefore, a state is formed in which discharge can be caused between the first anode electrode 1 and the second anode electrode 2. However, the semiconductor device 100 has the SInSiN film 3, which has semi-insulating properties, that is, insulating properties. Therefore, compared with, for example, a semiconductor device that does not have the SInSiN film 3 but has the same structure as the semiconductor device 100, the spatial distance and the creeping distance, which are the insulating distance between the first end 1E and the second end 2E, are extended. By extending the creeping distance in the above manner, the semiconductor device 100 can suppress discharge between the first anode electrode 1 including the first end 1E and the second anode electrode 2 including the second end 2E.

[0050] Figure 7 1 is a schematic diagram for explaining the effects of the semiconductor device according to the first embodiment. Figure 7 , (B) and (D) of the figure will Figure 6 A portion of the region on one main surface 10A of the semiconductor device 100 is extracted and shown. On the other hand, (A) is a comparative example, which differs from (B) in that the SInSiN film 3 is not formed, and the other aspects are the same as (B). In addition, (C) is a comparative example, which differs from (D) in that the SInSiN film 3 is not formed, and the other aspects are the same as (D). In addition, Figure 7 In the figure, the oxide film 8, the first anode region 4, and the second anode region 5 are omitted. Figure 7 In each of the drawings, the distance between the peripheral electrode 1B and the second anode electrode 2 along the X direction is represented by L.

[0051] In the comparative example (A) without the SInSiN film 3, the insulation distance between the peripheral electrode 1B and the second anode electrode 2, i.e., the spatial distance, is equal to the distance L between the highest point 1U of the first end 1E and the highest point 2U of the second end 2E, as shown by the arrow in the figure. In contrast, in the third example (B) of the present embodiment, the insulation distance between the peripheral electrode 1B and the second anode electrode 2, i.e., the creeping distance, is greater than the distance L, as shown by the arrow in the figure. The creeping distance in (B) extends along the surface of the SInSiN film 3 and needs to cross the SInSiN film 3, and accordingly becomes greater than the spatial distance in (A).

[0052] As described above, in the comparative example (C) without the SInSiN film 3, the insulation distance, i.e., the spatial distance, between the peripheral electrode 1B and the second anode electrode 2 is equal to the distance L between the lowest point 1L of the first end 1E and the lowest point 2L of the second end 2E, as shown by the arrow in the figure. In contrast, in the form (D) of the present embodiment, the creepage distance between the peripheral electrode 1B and the second anode electrode 2 is greater than the distance L, as shown by the arrow in the figure. The creepage distance in (D) extends along the surface of the SInSiN film 3 and needs to cross the SInSiN film 3, and accordingly becomes greater than the spatial distance in (C).

[0053] In addition, Figure 7 Cited in Figure 6 3, but for example in Figure 3 In the first example, Figure 7 This is because the SInSiN film 3 is formed not only on the first end 1E of the first anode electrode 1 but also on the second end 2E of the second anode electrode 2 serving as a monitor electrode.

[0054] The semiconductor device 100 according to the present invention may also use a resin insulating film such as a polyimide film instead of the SInSiN film 3. That is, the semiconductor device 100 includes a semiconductor substrate 10, a first anode electrode 1, and a second anode electrode 2. The first anode electrode 1 is disposed on the semiconductor substrate 10. The second anode electrode 2 is disposed around the first anode electrode 1 on the semiconductor substrate 10 at a distance from the first anode electrode 1. At least one of the first end 1E on the second anode electrode 2 side of the first anode electrode 1 and the second end 2E on the first anode electrode 1 side of the second anode electrode 2 is covered by a resin insulating film such as a polyimide film. The effects in this case are the same as those described above, so the description thereof will not be repeated.

[0055] In the semiconductor device 100, the first anode electrode 1 on the semiconductor substrate 10 includes an active electrode 1A and a peripheral electrode 1B. The peripheral electrode 1B is spaced apart from the active electrode 1A and is arranged on the second anode electrode 2 side of the active electrode 1A. The first end 1E is the end of the peripheral electrode 1B on the second anode electrode 2 side. The following structure is more preferred. In this way, the peripheral electrode 1B functions as a guard ring, thereby ensuring a high withstand voltage of the diode.

[0056] In the semiconductor device 100, the SInSiN film 3 is formed so as to connect at least a portion of the surface of the active electrode 1A to the surface of the peripheral electrode 1B including the first end 1E except the surface facing the semiconductor substrate 10. Such a structure is more preferable. In addition, it is more preferable that the SInSiN film 3 is formed so as to connect at least a portion of the surface of the active electrode 1A to the entire surface of the peripheral electrode 1B including the first end 1E except the surface facing the semiconductor substrate 10. That is, in this case, the SInSiN film 3 is formed at the first anode electrode 1 so as to straddle the active electrode 1A and the peripheral electrode 1B. Thus, for example, when the semiconductor device 100 is mounted in a package, it is possible to suppress the active electrode 1A and the peripheral electrode 1B from being compressed and contacting each other and short-circuiting due to stress applied from the upper side in the Z direction. In addition, it is possible to suppress discharge between the active electrode 1A and the peripheral electrode 1B.

[0057] In addition, for example in Figure 3 or Figure 5 In the embodiment, the SInSiN film 3 covering the first anode electrode 1 and the SInSiN film 3 covering the second anode electrode 2 may be formed integrally. That is, the SInSiN film 3 may be formed so as to straddle the first anode electrode 1 and the second anode electrode 2 .

[0058] Implementation method 2.

[0059] Figure 8 2 is a schematic cross-sectional view of a semiconductor device according to Embodiment 2. Figure 8 The semiconductor device 100 according to this embodiment has the same structure as that of each example of the first embodiment, for example, Figure 3 Therefore, the same reference numerals are given to the same structural elements, and their description will not be repeated unless there are any special differences. Figure 8 In, with Figure 3 In comparison, there is a difference in that the convex structure 30 is further provided.

[0060] Specifically, Figure 8The semiconductor device 100 has a convex structure 30 on a semiconductor substrate 10, that is, on one main surface 10A. The convex structure 30 is formed between the peripheral electrode 1B of the first anode electrode 1 and the second anode electrode 2 on the one main surface 10A, and on the opposite side of the second anode electrode 2 from the first anode electrode 1. More specifically, the convex structure 30 is formed between the SInSiN film 3 covering the first end 1E of the peripheral electrode 1B and the SInSiN film 3 covering the second end 2E of the second anode electrode 2, with a gap therebetween. In addition, the convex structure 30 is formed in a manner adjacent to the SInSiN film 3 covering the third end 2G of the second anode electrode 2 with a gap therebetween in the X direction. However, the convex structure 30 may be formed only between the peripheral electrode 1B and the second anode electrode 2.

[0061] The convex structure 30 is a columnar structure extending upward in the Z direction from one main surface 10A. The convex structure 30 is formed by a SInSiN film 3. The SInSiN film 3 of the convex structure 30 may be formed as the same layer as the SInSiN film 3 covering the first anode electrode 1 and the second anode electrode 2, or may be formed as a different layer from them. If the SInSiN film 3 of the convex structure 30 is the same layer as the SInSiN film 3 covering the first anode electrode 1, etc., the size of the convex structure 30 in the Z direction is approximately the same as the thickness of the SInSiN film 3 covering the first anode electrode 1, etc. Therefore, the convex structure 30 of the present embodiment may also be smaller in size in the Z direction than a structure in which the SInSiN film 3 is formed on the first anode electrode 1 and the second anode electrode 2.

[0062] In this embodiment, a resin insulating film such as a polyimide film may be used instead of the SInSiN film 3 as in Embodiment 1. Alternatively, the SInSiN film 3 and a polyimide film may be stacked.

[0063] The semiconductor device 100 according to the present invention has the following effects in addition to the same effects as the semiconductor device 100 according to the first embodiment.

[0064] The semiconductor device 100 according to the present invention further includes a convex structure 30 including a SInSiN film 3 between the first anode electrode 1 and the second anode electrode 2 on the semiconductor substrate 10. The convex structure 30 can further improve the effect of suppressing discharge between the first anode electrode 1 and the second anode electrode 2 compared to a case where the convex structure 30 is not provided. This is because the creepage distance between the first anode electrode 1 and the second anode electrode 2 is further lengthened by the outer edge length of the convex structure 30 compared to the first embodiment.

[0065] Implementation method 3.

[0066] Fig. 9 1 is a schematic cross-sectional view of a semiconductor device according to a first example of the third embodiment. Fig. 9 The semiconductor device 100 according to this embodiment has the same Figure 8 Therefore, the same reference numerals are given to the same structural elements, and their description will not be repeated unless there are any special differences. Fig. 9 In, with Figure 8 In comparison, the structure of the convex structure 30 is different.

[0067] Specifically, in the present embodiment, the convex structure 30 includes the SInSiN film 3 and another material portion 31 made of a material other than the SInSiN film 3. The convex structure 30 has a two-layer structure in which the SInSiN film 3 and the other material portion 31 are stacked on each other. The convex structure 30 may also be a structure composed of three or more layers.

[0068] exist Fig. 9 In the convex structure 30, the other material portion 31 is formed as a lower layer, for example, the semi-insulating SInSiN film 3 is formed as an upper layer in a manner covering the surface of the other material portion 31. Therefore, the other material portion 31 may be formed, for example, as the same layer as the first anode electrode 1 and the second anode electrode 2, as the same conductive material as these electrodes. Alternatively, the other material portion 31 may be formed as a layer different from the electrodes, i.e., a thin film. In this case, the convex structure 30 is formed by forming the SInSiN film 3 in a manner covering the surface of the other material portion 31 except the surface facing the semiconductor substrate 10 side, i.e., the lower side. Preferably, the SInSiN film 3 is formed in a manner covering the entire surface of the other material portion 31 except the surface facing the lower side.

[0069] Fig.10 2 is a schematic cross-sectional view of a semiconductor device according to a second example of the third embodiment. Fig.10 The semiconductor device 100 according to the second example of this embodiment has the same structure as that of the semiconductor device 100 according to the first example. Fig. 9 Therefore, the same reference numerals are given to the same structural elements, and their description will not be repeated unless there are any special differences. Fig.10 In, with Fig. 9 In contrast, the dimension of the convex structure 30 in the Z direction is different.

[0070] Specifically, in Fig. 9In the embodiment, the size of the entire convex structure 30 formed by combining the SInSiN film 3 and the other material portion 31 in the Z direction is substantially equal to the size of the portion formed by combining the first anode electrode 1 and the SInSiN film 3 formed on the first anode electrode 1 in the Z direction. Fig.10 In the embodiment, the size of the entire convex structure 30 formed by combining the SInSiN film 3 and the other material portion 31 in the Z direction is larger than the size of the portion formed by combining the first anode electrode 1 and the SInSiN film 3 formed on the first anode electrode 1 in the Z direction. Fig.10 In the embodiment, the dimension in the Z direction of the other material portion 31 constituting the protruding structure 30 is larger than the dimension in the Z direction of the portion formed by combining the first anode electrode 1 and the SInSiN film 3 formed on the first anode electrode 1. Such a structure is also possible.

[0071] In this embodiment, as in Embodiments 1 and 2, a resin insulating film such as a polyimide film may be used instead of the SInSiN film 3, or the SInSiN film 3 and the polyimide film may be stacked. In addition, the structure of each example of this embodiment may be combined with the features of each example of Embodiment 1.

[0072] Next, the effects of this embodiment will be described. The semiconductor device 100 according to the present invention has the following effects in addition to the same effects as the semiconductor devices 100 of the first and second embodiments.

[0073] In the semiconductor device 100 according to the present invention, the convex structure 30 includes a SInSiN film 3 and another material portion 31 configured on the inner side of the SInSiN film 3 and composed of a material other than the SInSiN film 3. In this way, the convex structure 30 of the semiconductor device 100 of the present embodiment becomes a structure composed of multiple layers. If so, the size in the Z direction becomes larger than the convex structure 30 of a single-layer structure composed only of the SInSiN film 3 as in Embodiment 2. Therefore, compared with the case of having the convex structure 30 of Embodiment 2, the creepage distance between the first anode electrode 1 and the second anode electrode 2 can be further extended. Therefore, compared with Embodiment 2, the effect of suppressing the discharge between the first anode electrode 1 and the second anode electrode 2 can be further improved.

[0074] In addition, if Fig.10 By increasing the size of the convex structure 30 in the Z direction, the creeping distance between the first anode electrode 1 and the second anode electrode 2 formed by the convex structure 30 can be further extended. Fig. 9 In comparison, the effect of suppressing discharge between the first anode electrode 1 and the second anode electrode 2 can be further enhanced.

[0075] Implementation method 4.

[0076] Fig.11 is the same as in Implementation 4 Figure 4 A schematic enlarged top view of the same area. Fig.11 The semiconductor device 100 according to this embodiment has a structure substantially the same as that of the semiconductor device 100 according to the first example of the first embodiment. Therefore, the same reference numerals are given to the same structural elements, and their descriptions will not be repeated unless there are any particular differences. Fig.11 In, with Figure 4 In contrast, the outer peripheral electrode 1B of the first anode electrode 1 and the second anode electrode 2 have different planar shapes.

[0077] Specifically, the first end face 1F is considered, which is a part of the first end 1E of the peripheral electrode 1B and is a surface directly opposite to the second end 2E of the second anode electrode 2. In addition, the second end face 2F is considered, which is a part of the second end 2E of the second anode electrode 2 and is a surface directly opposite to the first end 1E of the peripheral electrode 1B. Fig.11 In the embodiment, chamfered portions 40 are formed at corners of the first end surface 1F and corners of the second end surface 2F.

[0078] Fig.12 It means Fig.11 A schematic enlarged top view of the corners of the first end face and the second end face in the same region. Fig.12 The corner portion 41 is a portion that is curved into a convex shape when viewed from the outside at the end of the first end face 1F and the second end face 2F in the extending direction of the first end face 1F and the second end face 2F. Fig.12 In the embodiment, two corners 41 are formed in the peripheral electrode 1B, and four corners 41 are formed in the second anode electrode 2. The angle formed by the corners 41 can be, for example, a right angle or an obtuse angle larger than a right angle. The corners 41 are chamfered so that the first end face 1F and the second end face 2F, which were originally planar, become curved, especially, for example, in a circular arc shape when viewed from above. Thus, Fig.12 The corner 41 becomes Fig.11 The chamfered portion 40 has a shape like that.

[0079] In addition, Fig.11 In, for Fig.12 All corners 41 of the embodiment are formed into curved surfaces, and chamfered portions 40 are formed. However, it is also possible to Fig.12 A portion of the plurality of corner portions 41 in the embodiment is formed into a curved surface, thereby forming a chamfered portion 40 .

[0080] When the chamfered portion 40 is, for example, in an arc shape when viewed from above, the first anode electrode 1 is larger than the second anode electrode 2 in terms of the radius of the arc shape. However, the first anode electrode 1 and the second anode electrode 2 may be substantially equal in terms of the radius of the arc shape, or the second anode electrode 2 may be larger than the first anode electrode 1 in terms of the radius of the arc shape.

[0081] In this embodiment, a resin insulating film such as a polyimide film may be used instead of the SInSiN film 3. The structure of each example of this embodiment may be combined with the features of each example of Embodiments 1 to 3.

[0082] The semiconductor device 100 according to the present invention has the following effects in addition to the same effects as the semiconductor devices 100 of the first to third embodiments.

[0083] The semiconductor device 100 according to the present invention has chamfered portions 40 formed at corners 41 of a first end surface 1F of the first end 1E that faces the second end 2E and at corners 41 of a second end surface 2F of the second end 2E that faces the first end 1E. Fig.12 Compared with the corner 41, Fig.11 The chamfered portion 40 can suppress the electric field concentration in the peripheral electrode 1B and the second anode electrode 2. Therefore, the chamfered portion 40 can suppress the discharge between the first end face 1F and the second end face 2F as compared with the corner portion 41.

[0084] The features described in the above-mentioned embodiments (including the examples) may be appropriately combined within the range without technical contradiction.

[0085] Although the present embodiment has been described, the embodiment disclosed this time should be considered to be illustrative in all aspects and not restrictive. The scope of the present invention is indicated by the claims, and all modifications within the meaning and scope equivalent to the claims are included.

Claims

1. A semiconductor device comprising: Semiconductor substrates; a first anode electrode disposed on the semiconductor substrate; and a second anode electrode disposed on the semiconductor substrate at a distance from the first anode electrode and around the first anode electrode, At least one of a first end portion of the first anode electrode on the second anode electrode side and a second end portion of the second anode electrode on the first anode electrode side is covered with a SInSiN film, A convex structure including the SInSiN film is further provided between the first anode electrode and the second anode electrode on the semiconductor substrate to separate the first anode electrode from the second anode electrode. The semiconductor substrate overlapping the convex structure in a plan view does not include an impurity region of a conductivity type different from that of the semiconductor substrate formed from the main surface side of the semiconductor substrate on the side where the convex structure is formed, The convex structure includes the SInSiN film and another material portion, wherein the other material portion is covered by the SInSiN film on a surface other than a surface facing the semiconductor substrate side and is composed of a material other than the SInSiN film.

2. The semiconductor device according to claim 1, wherein The first anode electrode on the semiconductor substrate includes an active electrode and a peripheral electrode, the peripheral electrode being spaced apart from the active electrode and arranged on the second anode electrode side of the active electrode. The first end portion is an end portion of the peripheral electrode on the second anode electrode side.

3. The semiconductor device according to claim 2, wherein: The SInSiN film is formed so as to connect at least a portion of the surface of the active portion electrode to the surface of the peripheral electrode including the first end portion except for the surface facing the semiconductor substrate.

4. The semiconductor device according to any one of claims 1 to 3, wherein: Chamfered portions are formed at corners of a first end surface of the first end portion that faces the second end portion and at corners of a second end surface of the second end portion that faces the first end portion.

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