Interconnect structure and method of forming the same

Abstract

The present application discloses an interconnection structure and a method for forming the same, the method comprising: providing a substrate, the substrate comprising an active region; forming a dielectric layer on the substrate, the dielectric layer having an opening penetrating the dielectric layer, the opening exposing the surface of the active region; forming a first metal layer at the bottom of the opening; after forming the first metal layer, performing a passivation treatment on the top region in the first metal layer to form a first barrier layer; after the first barrier layer, performing an annealing treatment to react the first metal layer remaining at the bottom of the opening with the material on the surface of the active region to form a metal silicide layer; after forming the metal silicide layer, forming a second barrier layer on the surface of the first barrier layer and the sidewall of the opening; and after forming the second barrier, forming a second metal layer filling the opening in the opening. The interconnection structure and the method for forming the same disclosed in the present application improve the performance of the interconnection structure.

Description

Technical Field

[0001] The present application relates to the field of semiconductor technology, and in particular to an interconnect structure and a method for forming the same. Background Art

[0002] With the development of semiconductor technology, the integration of ultra-large-scale integrated circuit chips has reached billions or even tens of billions of devices, and metal interconnect technology has been widely used. For nodes of 10nm and below, reducing the contact resistance (Rc) of the interconnect structure is becoming increasingly important for improving device performance.

[0003] When tungsten (W) is used as the material of the conductive connection layer and titanium nitride (TiN) is used as the material of the diffusion inhibition layer, the contact resistance of the entire interconnect structure should be the sum of the resistance of tungsten and the resistance of titanium nitride. It is well known that the larger the volume of the conductive connection layer, the lower its resistance. In order to make the conductive connection layer have a larger volume, it is usually possible to consider reducing the thickness of the titanium nitride layer to make more space for the conductive connection layer without changing the overall size of the device. However, if the thickness of the titanium nitride layer is excessively sacrificed, after the titanium ions combine with the fluorine ions generated during the deposition of the conductive connection layer and become titanium fluoride gas and leave, the remaining titanium nitride layer may no longer be able to achieve the effect of diffusion inhibition.

[0004] Therefore, there is a need to improve the method for forming the interconnect structure. Summary of the invention

[0005] In view of the above-mentioned shortcomings of the prior art, an object of the present application is to provide an interconnect structure and a method for forming the same, which improves the performance of the interconnect structure.

[0006] One aspect of the present application provides a method for forming an interconnect structure, comprising: providing a substrate, the substrate comprising an active area; forming a dielectric layer on the substrate, the dielectric layer having an opening penetrating the dielectric layer, the opening exposing the surface of the active area; forming a first metal layer at the bottom of the opening; after forming the first metal layer, passivating the top area in the first metal layer to form a first barrier layer; after forming the first barrier layer, performing an annealing treatment to allow the remaining first metal layer at the bottom of the opening to react with the material on the surface of the active area to form a metal silicide layer; after forming the metal silicide layer, forming a second barrier layer on the surface of the first barrier layer and the sidewall of the opening; and after forming the second barrier, forming a second metal layer in the opening to fill the opening.

[0007] Optionally, the material of the first metal layer includes titanium, and the materials of the first barrier layer and the second barrier layer both include titanium nitride.

[0008] Optionally, before the passivation treatment is performed, the thickness of the first metal layer is 100 angstroms to 160 angstroms.

[0009] Optionally, the first barrier layer has a thickness of 20 angstroms to 25 angstroms.

[0010] Optionally, the second barrier layer has a thickness of 10 angstroms to 40 angstroms.

[0011] Optionally, the passivation treatment includes nitrogen plasma treatment.

[0012] Optionally, the annealing treatment comprises a dynamic surface annealing treatment.

[0013] Optionally, the process of forming the first metal layer is a physical vapor deposition process.

[0014] Optionally, the process of forming the second barrier layer includes an atomic layer deposition process.

[0015] The present application also provides an interconnect structure, comprising: a substrate, the substrate comprising an active area; a dielectric layer, located on the substrate and having an opening penetrating the dielectric layer, the opening being located on the active area; a metal silicide layer, located on the surface of the active area at the bottom of the opening; a first barrier layer, located on the surface of the metal silicide layer; a second barrier layer, located on the surface of the first barrier layer and on the sidewall of the opening, and the second barrier layer on the sidewall of the opening is in contact with the dielectric layer; and a second metal layer, located on the surface of the second barrier layer and filling the opening.

[0016] Optionally, the metal silicide layer has a thickness of 75 angstroms to 140 angstroms.

[0017] Optionally, the first barrier layer has a thickness of 20 angstroms to 25 angstroms.

[0018] Optionally, the second barrier layer has a thickness of 10 angstroms to 40 angstroms.

[0019] Optionally, the material of the metal silicide layer includes titanium silicide, and the material of the first barrier layer and the second barrier layer includes titanium nitride.

[0020] The technical solution of this application has the following beneficial effects:

[0021] In the technical solution of the present application, the first barrier layer is formed in the top area of ​​the first metal layer by passivating the surface of the first metal layer, thereby avoiding the formation of the first barrier layer on the side wall of the opening. Then, a second barrier layer is formed, and the second barrier layer is located at the side wall and bottom of the opening. The total thickness of the first barrier layer and the second barrier layer at the bottom of the opening is greater than the thickness of the second barrier layer at the side wall of the opening. In this way, the superposition of the first barrier layer and the second barrier layer at the bottom of the opening has a better blocking effect. Therefore, in the process of forming the second metal layer, the source gas used to form the second metal layer is avoided from passing through the first barrier layer and the second barrier layer to the metal silicide layer, thereby avoiding corrosion of the metal silicide layer. Secondly, since the thickness of the second barrier layer located on the side wall of the opening is small, more space is freed up for forming the second metal layer (i.e., the conductive connection layer), so that it can have a smaller contact resistance, and the filling performance of the second metal layer is better.

[0022] Since the attack of fluoride ions on the metal nitride layer mainly occurs at the bottom of the opening, the technical solution of the present application reduces the thickness of the metal nitride layer located at the side wall of the opening as much as possible while ensuring that the metal nitride layer at the bottom of the opening has sufficient thickness, so that the conductive connection layer can have a larger volume, thereby reducing the contact resistance and improving the performance of the interconnection structure. BRIEF DESCRIPTION OF THE DRAWINGS

[0023] The following drawings describe in detail the exemplary embodiments disclosed in this application. The same reference numerals represent similar structures in several views of the drawings. Those skilled in the art will understand that these embodiments are non-limiting, exemplary embodiments, and the drawings are only for the purpose of illustration and description, and are not intended to limit the scope of the present disclosure. Other embodiments may also accomplish the inventive intent of this application. It should be understood that the drawings are not drawn to scale. Among them:

[0024] Figures 1A to 1H A structural schematic diagram of a process of forming an interconnect structure;

[0025] Figure 2 is a flow chart of a method for forming an interconnect structure according to an embodiment of the present application;

[0026] FIG. 3A to FIG. 3H It is a structural schematic diagram of the interconnection structure forming process of an embodiment of the present application. DETAILED DESCRIPTION

[0027] The following description provides specific application scenarios and requirements of the present application, with the purpose of enabling those skilled in the art to make and use the content in the present application. Various local modifications to the disclosed embodiments are obvious to those skilled in the art, and the general principles defined herein may be applied to other embodiments and applications without departing from the spirit and scope of the present disclosure. Therefore, the present disclosure is not limited to the embodiments shown, but to the widest scope consistent with the claims.

[0028] The technical solution of the present application is described in detail below with reference to the embodiments and drawings.

[0029] like Figures 1A to 1H As shown, a method for forming an interconnect structure includes: providing a substrate 1, the substrate 1 including an active area 2; forming a dielectric layer 3 on the substrate 1, the dielectric layer 3 having an opening 4, the opening 4 exposing the active area 2; forming a first metal layer 5 (for example, titanium) at the bottom of the opening 4 and the surface of the dielectric layer 2; forming a first metal nitride layer 6 (for example, titanium nitride) on the surface of the first metal layer 5 and the sidewall of the opening 4; performing an annealing treatment to react the first metal layer 5 located at the bottom of the opening 4 with the material on the surface of the active area 2 to form a metal silicide layer 7; forming a second metal nitride layer 8 (for example, titanium nitride) on the surface of the first titanium nitride layer 6; forming a second metal layer 9 (for example, tungsten) filling the opening 4 on the surface of the second titanium nitride layer 8; and performing a planarization treatment to remove excess first metal layer 5, first metal nitride layer 6, second metal nitride layer 8, and second metal layer 9.

[0030] When filling the opening with metal tungsten using chemical vapor deposition, tungsten fluoride (WF6) can be used as the source gas, and under heat-assisted conditions, it can be reduced with hydrogen (H2) to generate a tungsten metal layer and hydrogen fluoride (HF). Both tungsten fluoride and hydrogen fluoride are highly corrosive and can corrode the metal nitride layer to a certain extent and can damage the metal silicide layer underneath.

[0031] In the above method, the thickness of the metal nitride layer at the bottom and side wall of the opening 4 is substantially the same, and the corrosion of the metal nitride layer at the bottom of the opening 4 by tungsten fluoride and hydrogen fluoride is much greater than the corrosion of the metal nitride layer at the side of the opening 4. Therefore, the thickness of the metal nitride layer at the side wall of the opening 4 is somewhat wasted compared with the actual needs, which limits the volume expansion of the second metal layer 9, is not conducive to the reduction of the contact resistance, and further affects the performance of the entire interconnection structure.

[0032] In order to solve the above problems, the present application provides a method for forming an interconnect structure, such as Figure 2 As shown, the following steps are included:

[0033] Step S11: providing a substrate, wherein the substrate includes an active area;

[0034] Step S12: forming a dielectric layer on the substrate, wherein the dielectric layer has an opening penetrating the dielectric layer, and the opening exposes a surface of the active area;

[0035] Step S13: forming a first metal layer at the bottom of the opening;

[0036] Step S14: after forming the first metal layer, performing a passivation treatment on the top area of ​​the first metal layer to form a first barrier layer;

[0037] Step S15: after forming the first barrier layer, performing annealing treatment to make the first metal layer remaining at the bottom of the opening react with the material on the surface of the active area to form a metal silicide layer;

[0038] Step S16: after forming the metal silicide layer, forming a second barrier layer on the surface of the first barrier layer and the sidewall of the opening;

[0039] Step S17: After forming the second barrier, forming a second metal layer in the opening to fill the opening.

[0040] Combine the following 3A to 3H The above steps are described in detail. It should be noted that methods that perform the above and following steps in other sequences also fall within the protection scope of the present disclosure.

[0041] like Figure 3A As shown, a substrate 100 is provided, and the substrate 100 includes an active region 200 .

[0042] The material of the substrate 100 may be silicon (Si), germanium (Ge), silicon germanium (GeSi), silicon carbide (SiC), silicon on insulator (SOI), germanium on insulator (GOI), or other materials, such as III-V compounds such as gallium arsenide. The material of the substrate 100 may be one of single crystal silicon, polycrystalline silicon, and amorphous silicon. The substrate 100 may also be a silicon on insulator structure or an epitaxial layer structure on silicon. In the substrate 100, a semiconductor device (not shown) may be formed, such as a metal oxide semiconductor device having a gate, a source, and a drain.

[0043] The material of the active region 200 may be silicide such as silicon phosphorus (SiP) and silicon germanium (SiGe). The active region 200 may be formed in the groove of the substrate 100 by ion implantation, physical vapor deposition (PVD), chemical vapor deposition (CVD), etc. The groove may be formed by various suitable etching processes.

[0044] like Figure 3B As shown, a dielectric layer 300 is formed on a substrate 100 , and the dielectric layer 300 has an opening 400 penetrating the dielectric layer 300 , and the opening 400 exposes the surface of the active region 200 .

[0045] The material of the dielectric layer 300 may be silicon oxide, borosilicate glass, phosphosilicate glass, borophosphosilicate glass, etc. In this embodiment, the dielectric layer 300 may be made of silicon oxide (SiO2). The dielectric layer 300 may be formed by physical vapor deposition, chemical vapor deposition, etc.

[0046] The opening 400 may be formed by spin coating photoresist on the surface of the dielectric layer 300, forming an opening pattern in the photoresist after an exposure and development process, and then etching to form the opening 400, and then introducing oxygen plasma after etching to remove the remaining photoresist by ashing.

[0047] like Figure 3C As shown, a first metal layer 500 is formed at the bottom of the opening 400 .

[0048] In this embodiment, the first metal layer 500 is formed on the bottom of the opening 400 and the surface of the dielectric layer 300 .

[0049] In the present embodiment, the material of the first metal layer 500 may be titanium (Ti). The thickness of the first metal layer 500 may be 100 angstroms to 160 angstroms, preferably 140 angstroms to 150 angstroms. The first metal layer 500 may be formed by processes such as physical vapor deposition, chemical vapor deposition, and atomic layer deposition. In the present embodiment, the first metal layer 500 is formed by a physical vapor deposition process. In the present embodiment, the first metal layer 500 is not deposited or is hardly formed on the sidewalls of the opening 400. In some embodiments, the first metal layer 500 formed on the sidewalls of the opening 400 is only 1% to 10% of the first metal layer 500 formed on the bottom of the opening 400 and the surface of the dielectric layer 300.

[0050] like Figure 3D As shown, after the first metal layer 500 is formed, a passivation process is performed on the top region of the first metal layer 500 to form a first barrier layer 600 .

[0051] In this embodiment, after forming the first metal layer 500, the surface of the first metal layer is treated with nitrogen-containing plasma, so that a portion of the first metal layer 500 forms the first barrier layer 600. In this embodiment, the material of the first barrier layer 600 is titanium nitride (TiN). Glow discharge can be used to change the properties of nitrogen from inert to active in a plasma environment, thereby causing it to react with titanium and convert a portion of the first metal layer 500 from titanium to titanium nitride. For example, the power of the glow discharge can be 3000 watts to 5000 watts, and the flow rate of the plasma can be 1000 sccm to 3000 sccm. In this embodiment, the thickness of the first barrier layer 600 is 20 angstroms to 25 angstroms.

[0052] Compared with the technical solution of directly depositing the first metal layer in the opening, the first barrier layer formed by a part of the first metal layer through nitrogen-containing plasma treatment only exists at the bottom of the opening and the top of the dielectric layer, avoiding the formation of the first barrier layer on the sidewall of the opening. In this way, since the thickness of the second barrier layer located on the sidewall of the opening is small, more space is freed up for the subsequent formation of the second metal layer (i.e., the conductive connection layer), so that it can have a smaller contact resistance, and the filling performance of the second metal layer is better.

[0053] like Figure 3E As shown, after the first barrier layer 600 is formed, an annealing process is performed to make the first metal layer 500 remaining at the bottom of the opening 400 react with the material on the surface of the active region 200 to form a metal silicide layer 700 .

[0054] In this embodiment, the material of the metal silicide layer 700 is titanium silicide (TiSi). In this embodiment, the annealing process may be a dynamic surface annealing (DSA) process, which can change the material properties at the atomic level and complete the annealing of a local limited area in a relatively short time. The annealing process may also be a rapid thermal processing (RTP, Rapid Thermal Processing), which can complete the annealing process in a relatively short time. The thickness of the metal silicide layer 700 may be 75 angstroms to 140 angstroms.

[0055] like Figure 3F As shown, after the metal silicide layer 700 is formed, a second barrier layer 800 is formed on the surface of the first barrier layer 600 and the sidewall of the opening 400 .

[0056] In this embodiment, after forming the metal silicide layer 700 , a second barrier layer 800 is formed on the surface and sidewalls of the first barrier layer 600 , the sidewalls of the first metal layer 500 above the dielectric layer 300 , and the sidewalls of the opening 400 .

[0057] In this embodiment, the material of the second barrier layer 800 is titanium nitride. The second barrier layer 800 can be formed by physical vapor deposition, chemical vapor deposition, atomic layer deposition and other processes. In this embodiment, the second barrier layer 800 is formed by an atomic layer deposition process. The thickness of the second barrier layer 800 is 10 angstroms to 40 angstroms, for example, 15 angstroms.

[0058] like Figure 3G As shown, after forming the second barrier layer 800 , a second metal layer 900 is formed in the opening 400 to fill the opening 400 .

[0059] In this embodiment, after the second barrier layer 800 is formed, a second metal layer 900 is formed on the surface of the second barrier layer 800 to fill the opening 400 .

[0060] In this embodiment, the material of the second metal layer 900 is tungsten (W). The second metal layer 900 can be formed by physical vapor deposition, chemical vapor deposition, atomic layer deposition and other processes.

[0061] When metal tungsten is filled in the opening 400 (for example, using a chemical vapor deposition process), tungsten fluoride can be used as a source gas, and under thermal assistance conditions, it is reduced with hydrogen to generate a second metal layer 900 and hydrogen fluoride. Both tungsten fluoride and hydrogen fluoride are highly corrosive and can corrode the first barrier layer 600 and the second barrier layer 800 and can damage the metal silicide layer 700 thereunder.

[0062] In the present application, by avoiding forming the first barrier layer 600 on the sidewall of the opening 400, the total thickness of the first barrier layer 600 and the second barrier layer 800 at the bottom of the opening 400 is greater than the thickness of the second barrier layer 800 on the sidewall of the opening 400. In this way, the superposition of the first barrier layer 600 and the second barrier layer 800 at the bottom of the opening 400 has a better barrier effect, so in the process of forming the second metal layer 900, the source gas used to form the second metal layer 800 is prevented from etching through the first barrier layer 600 and the second barrier layer 800 to the metal silicide layer 700, thereby corroding the metal silicide layer 700.

[0063] In addition, the corrosion of the barrier layer at the bottom of the opening 400 by tungsten fluoride and hydrogen fluoride is much greater than that of the barrier layer at the side of the opening 400, so reducing the overall thickness of the barrier layer at the side wall of the opening 400 will not affect the performance of the entire interconnection structure. In addition, doing so will allow the second metal layer to have a larger volume, thereby reducing the contact resistance.

[0064] like Figure 3HAs shown, after the second metal layer 900 is formed, a planarization process is performed to remove the first metal layer 500 , the first barrier layer 600 , the second barrier layer 800 , and the second metal layer 900 located above the dielectric layer 300 , and to make the top surface of the second metal layer 900 flush with the top surface of the dielectric layer 300 .

[0065] In this embodiment, the planarization process is chemical-mechanical polishing (CMP).

[0066] Accordingly, the present application also provides an interconnect structure, which includes: a substrate 100, the substrate 100 includes an active area 200; a dielectric layer 300, located on the substrate 100 and having an opening 400 that penetrates the dielectric layer 300, and the opening 400 is located on the active area 200; a metal silicide layer 700, located on the surface of the active area at the bottom of the opening 400; a first barrier layer 500, located on the surface of the metal silicide layer 700; a second barrier layer 800, located on the surface of the first barrier layer 600 and the sidewall of the opening 400, and the second barrier layer 800 on the sidewall of the opening 400 is in contact with the dielectric layer 300; and a second metal layer 900, located on the surface of the second barrier layer 800 and filling the opening 400.

[0067] The material of the substrate 100 may be silicon, germanium, silicon germanium, silicon carbide, silicon on insulator, germanium on insulator, or other materials, such as III-V compounds such as gallium arsenide.

[0068] The material of the active region 200 may be silicide such as silicon phosphorus, silicon germanium, etc. The active region 200 may be formed in the trench of the substrate 100 by ion implantation, physical vapor deposition, chemical vapor deposition, etc.

[0069] The material of the dielectric layer 300 may be silicon oxide, borosilicate glass, phosphosilicate glass, borophosphosilicate glass, etc. In this embodiment, silicon oxide may be used for the dielectric layer 300. The dielectric layer 300 may be formed by physical vapor deposition, chemical vapor deposition, etc.

[0070] The opening 400 may be formed by spin coating photoresist on the surface of the dielectric layer 300, forming an opening pattern in the photoresist after an exposure and development process, and then etching to form the opening 400, and then introducing oxygen plasma after etching to remove the remaining photoresist by ashing.

[0071] The material of the first barrier layer 600 may include titanium nitride. In this embodiment, a glow discharge method is used to change the nature of nitrogen from inert to active in a plasma environment, thereby causing it to react with titanium and change the pre-formed metal layer from titanium to titanium nitride. In this embodiment, the thickness of the first barrier layer 600 is 20 angstroms to 25 angstroms.

[0072] The material of the metal silicide layer 700 may include titanium silicide. In this embodiment, the metal silicide layer 700 is formed by performing a dynamic surface annealing process on a preformed metal layer. In this embodiment, the thickness of the metal silicide layer 700 may be 75 angstroms to 140 angstroms.

[0073] The material of the second barrier layer 800 may include titanium nitride. In this embodiment, the second barrier layer 800 is formed by an atomic layer deposition process. In this embodiment, the thickness of the second barrier layer 800 is 10 angstroms to 40 angstroms, for example, 15 angstroms.

[0074] The material of the second metal layer 900 may include tungsten. The second metal layer 900 may be formed by physical vapor deposition, chemical vapor deposition, atomic layer deposition, or the like.

[0075] In summary, after reading this detailed disclosure, it will be apparent to those skilled in the art that the foregoing detailed disclosure may be presented only by way of example and may not be limiting. Although not explicitly stated herein, it will be appreciated by those skilled in the art that this application is intended to encompass various reasonable changes, improvements, and modifications to the embodiments. These changes, improvements, and modifications are intended to be proposed by this disclosure and are within the spirit and scope of the exemplary embodiments of this disclosure.

Claims

1. A method for forming an interconnect structure, characterized in that: include: providing a substrate, the substrate comprising an active region; forming a dielectric layer on the substrate, wherein the dielectric layer has an opening penetrating the dielectric layer, and the opening exposes a surface of the active area; forming a first metal layer at the bottom of the opening, and not forming the first metal layer on the sidewall of the opening; After forming the first metal layer, treating a top area of ​​the first metal layer by nitrogen-containing plasma so that a portion of the first metal layer forms a first barrier layer; After forming the first barrier layer, performing an annealing process to make the first metal layer remaining at the bottom of the opening react with the material on the surface of the active area to form a metal silicide layer; After forming the metal silicide layer, forming a second barrier layer on the surface of the first barrier layer and the sidewall of the opening; as well as After forming the second barrier, a second metal layer filling the opening is formed in the opening.

2. The method for forming an interconnect structure according to claim 1, wherein: The material of the first metal layer includes titanium, and the materials of the first barrier layer and the second barrier layer both include titanium nitride.

3. The method for forming an interconnect structure according to claim 1, wherein: Before treating the top region of the first metal layer with the nitrogen-containing plasma, the first metal layer has a thickness of 100 angstroms to 160 angstroms.

4. The method for forming an interconnect structure according to claim 1, wherein: The thickness of the first barrier layer is 20 angstroms to 25 angstroms.

5. The method for forming an interconnect structure according to claim 1, wherein: The second barrier layer has a thickness of 10 angstroms to 40 angstroms.

6. The method for forming an interconnect structure according to claim 1, wherein: The annealing treatment includes a dynamic surface annealing treatment.

7. The method for forming an interconnect structure according to claim 1, wherein: The process of forming the first metal layer is a physical vapor deposition process.

8. The method for forming an interconnect structure according to claim 1, wherein: The process of forming the second barrier layer includes an atomic layer deposition process.

9. An interconnection structure, characterized in that: Formed by the method of any one of claims 1 to 8, comprising: a substrate, the substrate comprising an active region; a dielectric layer, located on the substrate and having an opening penetrating the dielectric layer, wherein the opening is located on the active area; a metal silicide layer located on the surface of the active area at the bottom of the opening; A first barrier layer, located on the surface of the metal silicide layer; a second barrier layer, located on a surface of the first barrier layer and a sidewall of the opening, wherein the second barrier layer on the sidewall of the opening contacts the dielectric layer; and The second metal layer is located on the surface of the second barrier layer and fills the opening.

10. The interconnect structure according to claim 9, characterized in that The thickness of the metal silicide layer is 75 angstroms to 140 angstroms.

11. The interconnect structure according to claim 9, characterized in that The thickness of the first barrier layer is 20 angstroms to 25 angstroms.

12. The interconnect structure according to claim 9, wherein: The second barrier layer has a thickness of 10 angstroms to 40 angstroms.

13. The interconnect structure according to claim 9, wherein: The material of the metal silicide layer includes titanium silicide, and the materials of the first barrier layer and the second barrier layer include titanium nitride.

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