Harmonic Processing Circuits and Amplifiers

Abstract

A harmonic processing circuit includes: a feeder configured to feed power to an amplifier device; and a harmonic processing unit connected to the feeder and configured to perform harmonic processing on harmonics of a signal output from the amplifier device. The feeder is connected to a fundamental wave matching circuit that is connected to the amplifier device and performs matching with respect to the fundamental wave of the signal.

Description

Technical Field

[0001] The invention relates to a harmonic processing circuit and an amplifier.

[0002] This application claims priority from Japanese Patent Application No. 2019-012992 filed on January 29, 2019, which is hereby incorporated by reference herein in its entirety. Background Art

[0003] Generally, in order to perform harmonic processing for improving power efficiency of an amplifier, a harmonic processing circuit including an open stub for appropriately adjusting impedance at harmonic frequencies is generally provided to a signal line (for example, see Patent Document 1).

[0004] Reference List

[0005] [Patent Document]

[0006] Patent Document 1: Japanese Laid-Open Patent Publication No. 2011-66839 Summary of the invention

[0007] A harmonic processing circuit according to an embodiment includes: a feeder configured to feed power to an amplifier device; and a harmonic processing unit connected to the feeder and configured to perform harmonic processing at a harmonic frequency of a signal output from the amplifier device. The feeder is connected to a fundamental matching circuit, which is connected to the amplifier device and performs matching at a fundamental frequency of the signal.

[0008] An amplifier according to another embodiment includes: an amplifying device; a feeder configured to feed power to the amplifying device; a harmonic processing unit connected to the feeder and configured to perform harmonic processing at a harmonic frequency of a signal output from the amplifying device. The feeder is connected to a fundamental matching circuit that is connected to the amplifying device and performs matching at a fundamental frequency of the signal. BRIEF DESCRIPTION OF THE DRAWINGS

[0009] Figure 1 is a block diagram showing a configuration of a Doherty amplifier according to an embodiment.

[0010] Figure 2 is a block diagram showing the configuration of a first harmonic processing circuit.

[0011] Figure 3A is a Smith chart showing the impedance when the harmonic processing circuit is viewed from the connection portion.

[0012] Figure 3B is a Smith chart showing impedance when one end of the second line is viewed from the connection portion.

[0013] Figure 4A : is a Smith chart showing the impedance when the connection portion is viewed from the other end of the first line.

[0014] Figure 4B It is a Smith chart showing the impedance when the end of the carrier-side output matching circuit is viewed from the amplifier device.

[0015] Figure 5A The measurement results of characteristics related to saturation power and efficiency with respect to a fundamental wave in an amplifying device are shown.

[0016] Figure 5B is a graph showing measurement results of characteristics related to saturation power and efficiency with respect to the second harmonic in an amplifying device.

[0017] Fig. 6A Only a fundamental wave matching circuit is shown used as an example.

[0018] Figure 6B The figure shows that when one end of the fundamental wave matching circuit is connected to the amplifying device and a 50Ω load is connected to the other end of the fundamental wave matching circuit, the Fig. 6A The Smith chart of impedance at one end of the fundamental matching circuit is shown.

[0019] Fig. 7A The harmonic handling circuit is shown connected to Fig. 6A The situation of the fundamental wave matching circuit is shown.

[0020] Figure 7B The figure shows that when one end of the fundamental wave matching circuit is connected to the amplifying device and a 50Ω load is connected to the other end of the fundamental wave matching circuit, the Fig. 7A The Smith chart of impedance at one end of the fundamental matching circuit is shown.

[0021] Figure 8 A circuit is shown in which a harmonic processing circuit is provided to a feeder line.

[0022] Fig. 9A It is a Smith chart showing the impedance when the terminal of the harmonic processing unit is viewed from the connection portion.

[0023] Fig. 9B It is a Smith chart showing the impedance when the terminal of the fundamental wave matching circuit is viewed from the connection portion.

[0024] Fig. 9C This is a Smith chart showing the impedance (load impedance) when the connection portion is viewed from the amplifying device. DETAILED DESCRIPTION

[0025] [Problems to be Solved by the Invention]

[0026] The size of the open stub included in the harmonic processing circuit is determined based on the wavelength of the signal to be processed. That is, since the open stub needs to have a certain size that is ensured, it is difficult to miniaturize the open stub.

[0027] A feeder for feeding power to the gate terminal and the drain terminal is connected to the amplifying device included in the amplifier, and it is conceivable to provide a harmonic processing circuit to the feeder. In this case, since the harmonic processing circuit is not provided to a new feeder but to an existing feeder, the circuit can be miniaturized.

[0028] Typically, a feed line is connected to an input / output terminal of the amplifying device. In addition, a fundamental wave matching circuit that performs matching of a fundamental wave included in a signal is connected to the input / output terminal of the amplifying device.

[0029] Figure 8 A circuit is shown in which a harmonic processing circuit is provided to a feeder line. Figure 8 In the embodiment of the present invention, a fundamental wave matching circuit 102 that performs impedance matching of a fundamental wave included in a signal output from the amplifying device 100 is connected to a drain terminal of the amplifying device 100 .

[0030] The feed line 104 connects the drain terminal of the amplifying device 100 to a DC power supply 106. To the feed line 104, a harmonic processing unit 108 that performs harmonic processing of a signal is connected.

[0031] The fundamental wave matching circuit 102 and the harmonic wave processing unit 108 convert the impedance (load impedance) when the load side connected to the amplifying device 100 is viewed from the amplifying device 100 into a desired impedance. The desired load impedance to be achieved by conversion by the fundamental wave matching circuit 102 and the harmonic wave processing unit 108 needs to be appropriately set so that the amplifying device 100 has high efficiency.

[0032] The load impedance viewed from the amplifying device 100 is defined as a combined impedance of an impedance when the terminal 108 a of the harmonic processing unit 108 is viewed from the connecting portion 110 and an impedance when the terminal 102 a of the fundamental wave matching circuit 102 is viewed from the connecting portion 110 .

[0033] Since the fundamental matching circuit 102 is configured to optimize the load impedance at the fundamental frequency of the amplifying device 100 , the load impedance at the harmonic frequencies may not necessarily be considered.

[0034] Therefore, the impedance at the harmonic frequency at the terminal 108 a of the harmonic processing unit 108 needs to be appropriately set according to the impedance at the harmonic frequency at the terminal 102 a of the fundamental wave matching circuit 102 .

[0035] Since the load impedance at the harmonic frequency in the fundamental wave matching circuit 102 is not taken into consideration in the fundamental wave matching circuit 102 , the impedance at the harmonic frequency is almost short-circuited when the terminal 102 a of the fundamental wave matching circuit 102 is viewed from the connection portion 110 .

[0036] When the impedance at the harmonic frequency when the terminal 102a of the fundamental matching circuit 102 is observed from the connection portion 110 is almost short-circuited, the fundamental matching circuit 102 has a greater influence on the combined impedance than the harmonic processing unit 108. Therefore, even if the harmonic processing unit 108 is adjusted to change the impedance at the harmonic frequency at the terminal 108a, it may be difficult to adjust the load impedance at the harmonic frequency when observed from the amplifying device 100 to a desired value.

[0037] That is, when the impedance at the harmonic frequency at the fundamental matching circuit 102 is almost short-circuited when viewed from the connection portion 110 to which the harmonic processing unit 108 is connected, it may be difficult to adjust the load impedance at the harmonic frequency when viewed from the amplifying device 100 through the harmonic processing unit 108.

[0038] Fig. 9A is a Smith chart showing the impedance when the terminal 108a of the harmonic processing unit 108 is viewed from the connection portion 110, Fig. 9B is a Smith chart showing the impedance when the terminal 102a of the fundamental wave matching circuit 102 is viewed from the connection portion 110, and Fig. 9C It is a Smith chart showing the impedance (load impedance) when the connection portion 110 is viewed from the amplifying device 100 .

[0039] 9A to 9C Each shows the impedance when the frequency of the signal changes from the fundamental frequency f0 to the second harmonic frequency 2f0.

[0040] like Fig. 9B As shown, the impedance at the second harmonic frequency 2f0 in the fundamental wave matching circuit 102 is almost short-circuited.

[0041] At the same time, if Fig. 9C As shown, the load impedance observed from the amplifier device 100 is Fig. 9B The impedances shown are almost identical.

[0042] This means that the load impedance viewed from the amplifying device 100 is not affected by the harmonic processing unit 108 .

[0043] As described above, when the impedance at the second harmonic frequency 2f0 in the fundamental matching circuit 102 is almost short-circuited when viewed from the connection portion 110, even if the impedance at the second harmonic frequency 2f0 in the harmonic processing unit 108 is changed, it may be difficult to adjust the impedance at the second harmonic frequency 2f0 when viewed from the amplifying device 100.

[0044] This may prevent harmonic processing from being properly performed.

[0045] The present disclosure has been made in view of the above-described circumstances, and an object of the present disclosure is to provide a harmonic processing circuit and an amplifier capable of appropriately performing harmonic processing.

[0046] [Effects of the present disclosure]

[0047] According to the present disclosure, harmonic processing can be appropriately performed.

[0048] First, the contents of the embodiments of the present invention are listed and described.

[0049] [Overview of Embodiments]

[0050] (1) A harmonic processing circuit according to one embodiment includes: a feeder configured to feed power to an amplifying device; and a harmonic processing unit connected to the feeder and configured to perform harmonic processing at a harmonic frequency of a signal output from the amplifying device. The feeder is connected to a fundamental matching circuit that is connected to the amplifying device and performs matching at a fundamental frequency of the signal.

[0051] According to the harmonic processing circuit having the above configuration, since the feed line is connected to the fundamental wave matching circuit, the feed line can be connected to any position within the line length in the fundamental wave matching circuit.

[0052] Therefore, the impedance at the harmonic frequency when the fundamental wave matching circuit is viewed from the connection point to which the feed line is connected can be adjusted so as not to be short-circuited.

[0053] As a result, the load impedance at the harmonic frequency when the load side is viewed from the amplifying device can be adjusted by the impedance at the harmonic frequency set in the harmonic processing unit, so that the harmonic processing can be appropriately performed.

[0054] (2) In the above harmonic processing circuit, the fundamental wave matching circuit preferably includes a first line having one end connected to the amplifying device and a second line connected to the other end of the first line. The feed line is preferably connected to a connection portion connecting the first line and the second line.

[0055] In this case, the impedance at the harmonic frequency when the second line is viewed from the connection point can be adjusted by adjusting the line length of the first line so as not to be short-circuited.

[0056] (3) In the above-mentioned harmonic processing circuit, assuming that the wavelength of the fundamental wave of the signal is λ, the first line preferably has a line length not shorter than λ / 16 and not longer than 3λ / 16.

[0057] In this case, the phase angle of the impedance at the second harmonic when the second line is viewed from the connection point can be changed by about 90 degrees to about 270 degrees relative to the impedance at the second harmonic when the fundamental matching circuit is viewed from the amplifying device.

[0058] Therefore, the impedance at the harmonic frequency when the second line is viewed from the connection point can be reliably adjusted so as not to be short-circuited by setting the line length of the first line within the above range.

[0059] (4) In the above harmonic processing circuit, the fundamental wave matching circuit preferably includes a signal line having one end connected to the amplifying device. The feeder line is preferably connected to the signal line at a position where the line length from the one end of the signal line is a predetermined length.

[0060] In this case, the impedance at the harmonic frequency when the other end side of the signal line is viewed from the connection point of the feeder line can be adjusted so as not to be short-circuited by adjusting the position of the connection point of the feeder line.

[0061] (5) In the above-mentioned harmonic processing circuit, assuming that the wavelength of the signal fundamental wave is λ, the predetermined length is preferably not shorter than λ / 16 and not longer than 3λ / 16.

[0062] In this case, for example, the phase angle of the impedance at the second harmonic when the other end side of the signal line is viewed from the connection point of the feeder line can change by about 90 degrees to about 270 degrees relative to the impedance at the second harmonic when the fundamental matching circuit is viewed from the amplification device.

[0063] Therefore, the impedance at the harmonic frequency when the other end side of the signal line is viewed from the connection point can be reliably adjusted so as not to be short-circuited.

[0064] (6) An amplifier according to another embodiment includes: an amplifying device; a feeder configured to feed power to the amplifying device; and a harmonic processing unit connected to the feeder and configured to perform harmonic processing at a harmonic frequency of a signal output from the amplifying device. The feeder is connected to a fundamental matching circuit that is connected to the amplifying device and performs matching at a fundamental frequency of the signal.

[0065] [Details of Example]

[0066] Hereinafter, preferred embodiments will be described with reference to the accompanying drawings. It should be noted that at least some parts of the embodiments described below may be combined together as desired.

[0067] [Configuration of Doherty amplifier]

[0068] Figure 1 is a block diagram showing a configuration of a Doherty amplifier according to an embodiment.

[0069] The Doherty amplifier 1 is mounted on a wireless communication device such as a base station device in a mobile communication system, and amplifies a transmission signal (RF signal) having a radio frequency.

[0070] The Doherty amplifier 1 amplifies an RF signal (input signal) supplied to an input terminal 2 , and outputs a combined signal from an output terminal 3 .

[0071] like Figure 1 As shown, the Doherty amplifier 1 includes a carrier amplifier 4, a peak amplifier 5 connected in parallel with the carrier amplifier 4, a distributor 6, a combiner 7 for combining the outputs from the carrier amplifier 4 and the peak amplifier 5, a carrier side input matching circuit 8, a peak side input matching circuit 9, a carrier side output matching circuit 10, and a peak side output matching circuit 11.

[0072] The distributor 6 is connected to a subsequent stage of the input terminal 2 , and distributes the RF signal supplied from the input terminal 2 to the carrier amplifier 4 and the peak amplifier 5 .

[0073] The output from the distributor 6 is supplied to the carrier amplifier 4 via the carrier-side input matching circuit 8 , and is supplied to the peak amplifier 5 via the peak-side input matching circuit 9 .

[0074] The carrier side input matching circuit 8 performs impedance matching between the distributor 6 side and the carrier amplifier 4 side at the frequency of the fundamental wave included in the input to the carrier amplifier 4. The peak side input matching circuit 9 performs impedance matching between the distributor 6 side and the peak amplifier 5 side at the frequency of the fundamental wave included in the input to the peak amplifier 5.

[0075] The carrier amplifier 4 is an amplifying device for constantly amplifying an input signal supplied thereto. Meanwhile, the peak amplifier 5 is an amplifying device for amplifying an input signal when the power of the input signal becomes equal to or higher than a predetermined value. Each of the carrier amplifier 4 and the peak amplifier 5 is, for example, a high electron mobility transistor (HEMT) using gallium nitride (GaN).

[0076] The carrier amplifier 4 and the peak amplifier 5 are mounted on an integrated circuit and housed in a package 12 .

[0077] The output from the carrier amplifier 4 is supplied to the combiner 7 via the carrier-side output matching circuit 10 .

[0078] The output of the peak amplifier 5 is supplied to the combiner 7 via the peak-side output matching circuit 11 .

[0079] The carrier side output matching circuit 10 is a circuit for converting the impedance (load impedance) when the combiner 7 side as the load side is viewed from the carrier amplifier 4 to a desired impedance. The carrier side output matching circuit 10 performs impedance matching for converting the load impedance to a desired impedance with respect to the fundamental frequency of the signal output from the carrier amplifier 4.

[0080] The peak side output matching circuit 11 is a circuit for converting the impedance (load impedance) when the combiner 7 side as the load side is viewed from the peak amplifier 5 to a desired impedance. The peak side output matching circuit 11 performs impedance matching with respect to the frequency of the fundamental wave output from the peak amplifier 5.

[0081] The combiner 7 combines the output from the carrier amplifier 4 with the output from the peak amplifier 5. The combiner 7 supplies the combined output to the output terminal 3 as an output signal.

[0082] The output terminal 3 outputs the output signal supplied from the combiner 7 .

[0083] A package 12 accommodating the amplifiers 4 , 5 , the input and output terminals 2 , 3 , the divider 6 , the combiner 7 , and the matching circuits 8 , 9 , 10 , and 11 is mounted on a circuit board 25 .

[0084] The first drain power source 30 , the second drain power source 40 , the first gate power source 60 , and the second gate power source 70 , which are arranged outside the circuit board 25 , are connected to the Doherty amplifier 1 .

[0085] The first drain power source 30 is a direct current power source for supplying power to the drain terminal of the carrier amplifier 4 , and is connected to the carrier-side output matching circuit 10 via a first feeder line 31 .

[0086] The second drain power source 40 is a direct current power source for supplying power to the drain terminal of the peak amplifier 5 , and is connected to the peak-side output matching circuit 11 via a second feeding line 41 .

[0087] The first gate power source 60 is a direct current power source for supplying electricity to the gate terminal of the carrier amplifier 4 , and is connected to the gate terminal of the carrier amplifier 4 via a third feeder line 61 .

[0088] The second gate power source 70 is a direct current power source for supplying electricity to the gate terminal of the peak amplifier 5 , and is connected to the gate terminal of the peak amplifier 5 via a fourth feeding line 71 .

[0089] A first harmonic processing unit 32 having a function of performing harmonic processing at the frequency of harmonics included in the output from the carrier amplifier 4 is connected to the first feeder line 31 .

[0090] A second harmonic processing unit 42 having a function of performing harmonic processing at the frequency of harmonics included in the output from the peak amplifier 5 is connected to the second feeder line 41 .

[0091] The first feeder line 31 and the first harmonic processing unit 32 connected to the first feeder line 31 form a first harmonic processing circuit 33 .

[0092] The first harmonic processing circuit 33 is a circuit for converting the load impedance at the harmonic frequency into a desired impedance when the combiner 7 side as the load side is viewed from the carrier amplifier 4. The process of converting the load impedance at the harmonic frequency into the desired impedance is harmonic processing.

[0093] The second feeder line 41 and the second harmonic processing unit 42 connected to the second feeder line 41 form a second harmonic processing circuit 43 .

[0094] Like the first harmonic processing circuit 33 , the second harmonic processing circuit 43 is a circuit for converting the load impedance at the harmonic frequency when the combiner 7 side as the load side is viewed from the peak amplifier 5 into a desired impedance.

[0095] Figure 2 3 is a block diagram showing the configuration of the first harmonic processing circuit 33. The configuration of the second harmonic processing circuit 43 is the same as that of the first harmonic processing circuit 33. Therefore, only the first harmonic processing circuit 33 will be described.

[0096] like Figure 2 As shown, the first harmonic processing circuit 33 is configured to include a first feeder 31 and a first harmonic processing unit 32 .

[0097] The first harmonic processing unit 32 is configured to include a first inductance element 34 , a second inductance element 35 , a first capacitance element 36 , and a second capacitance element 37 .

[0098] The respective elements 34 , 35 , 36 , and 37 are lumped elements connected to the first feeder line 31 , and the first harmonic processing unit 32 is configured to include a lumped element circuit.

[0099] The first inductance element 34 and the second inductance element 35 are connected in series to the first feeder line 31 .

[0100] One end of the first capacitance element 36 is connected to a connection point 38 between the first inductance element 34 and the second inductance element 35 , and the other end thereof is grounded.

[0101] One end of the second capacitance element 37 is connected to a connection point 39 between the second inductance element 35 and the first drain power source 30 , and the other end thereof is grounded.

[0102] Therefore, the first harmonic processing unit 32 is configured to include a first LC circuit 51 including a first inductance element 34 and a first capacitance element 36, and a second LC circuit 52 including a second inductance element 35 and a second capacitance element 37. That is, the first harmonic processing unit 32 is configured by connecting two stages of the LC circuit. This configuration can process the second harmonic.

[0103] As described above, at least a portion of the first harmonic processing unit 32 (second harmonic processing unit 42) for setting the load impedance at the harmonic frequency is configured by using a lumped element circuit. Therefore, the size of the first harmonic processing unit 32 (second harmonic processing unit 42) can be reduced compared to, for example, the case where harmonic processing is performed using an open stub, thereby achieving miniaturization of the entire circuit.

[0104] Furthermore, in the present embodiment, the first harmonic processing circuit 33 (the second harmonic processing circuit 43) is provided by connecting the first harmonic processing unit 32 (the second harmonic processing unit 42) to the first feeder line 31 (the second feeder line 41). Therefore, the first harmonic processing circuit 33 (the second harmonic processing circuit 43) can be provided without adding a new line.

[0105] Therefore, even if the harmonic processing circuit is provided to the Doherty amplifier 1 having the amplifiers 4 , 5 , the size of the Doherty amplifier 1 is suppressed from increasing due to the provision of the harmonic processing circuit.

[0106] In the present embodiment, the first harmonic processing unit 32 (the second harmonic processing unit 42) is arranged so that the first feeder line 31 (the second feeder line 41) is open with respect to the fundamental wave.

[0107] In this case, the influence of the first harmonic processing unit 32 (the second harmonic processing unit 42) on the fundamental wave can be reduced.

[0108] In this embodiment, the first harmonic processing unit 32 includes a plurality of (two) capacitance elements 36, 37 connected in parallel. Among the capacitance elements 36, 37, the second capacitance element 37 connected to a position adjacent to the first drain power source 30 is set to have a capacitance causing a short circuit with respect to the fundamental wave.

[0109] Therefore, the high-frequency signal is prevented from leaking to the power supply side of the feeder line.

[0110] In the present embodiment, the inductance value of the second inductance element 35 is set to be larger than the inductance value of the first inductance element 34 , and the capacitance of the second capacitance element 37 is set to be larger than the capacitance of the first capacitance element 36 .

[0111] By setting the above-mentioned relationship to be satisfied, the values ​​of the respective elements can be appropriately set while satisfying the capacitance of the second capacitance element 37 and other conditions.

[0112] In some cases, the capacitance of the first capacitive element 36 is set to an extremely small value.

[0113] Therefore, in some cases, the first capacitive element 36 is not connected between the first inductive element 34 and the second inductive element 35 .

[0114] like Figure 2 As shown, the first feeding line 31 of the present embodiment is connected to the carrier side output matching circuit 10 .

[0115] The carrier side output matching circuit 10 is configured to include a first line 21 and a second line 22 .

[0116] One end 21a of the first line 21 is connected to the carrier amplifier 4. The other end 21b of the first line 21 is connected to one end 22a of the second line 22.

[0117] The other end of the second line 22 is connected to the combiner 7 .

[0118] The first feeder line 31 is connected to the connection portion 23 that connects the first line 21 to the second line 22 .

[0119] Although the harmonic processing circuit 33 is connected to the carrier side output matching circuit 10 in the present embodiment, a case where the harmonic processing circuit 33 is connected to the drain terminal of the carrier amplifier 4 is considered.

[0120] In this case, assuming that the impedance at the second harmonic frequency is almost short-circuited when observing the carrier side output matching circuit 10 (one end 21a) from the connection part of the harmonic processing circuit 33 (the drain terminal of the carrier amplifier 4), even if the impedance at the harmonic frequency to be converted by the first harmonic processing circuit 33 is changed by adjusting the first harmonic processing unit 32, it is difficult to adjust the load impedance observed from the carrier amplifier 4 to the desired value in some cases.

[0121] In this regard, according to the above configuration, by changing the line lengths of the first line 21 and the second line 22 , the first feed line 31 can be connected to any position within the line length in the carrier side output matching circuit 10 .

[0122] Therefore, the impedance at the harmonic frequency when the carrier side output matching circuit 10 is viewed from the connection portion 23 to which the first feeder line 31 (harmonic processing circuit 33 ) is connected can be adjusted so as not to be short-circuited.

[0123] As a result, the load impedance at the harmonic frequency when the load side is viewed from the carrier amplifier 4 is adjusted by the impedance at the harmonic frequency set in the first harmonic processing unit 32 .

[0124] Therefore, harmonic processing can be appropriately performed.

[0125] Furthermore, in the above configuration, since the first feed line 31 is connected to the connection portion 23, even if the impedance with respect to the harmonics when the one end 21a of the carrier side output matching circuit 10 is observed from the carrier amplifier 4 is almost short-circuited, the impedance at the harmonic frequency when the one end 22a of the second line 22 is observed from the connection portion 23 can be adjusted so as not to be short-circuited by adjusting the line length of the first line 21.

[0126] Assuming that the wavelength of the fundamental wave is λ, the line length of the first line 21 is set within a range of not shorter than λ / 16 and not longer than 3λ / 16.

[0127] Therefore, the phase angle of the impedance with respect to the second harmonic in the carrier side output matching circuit 10 can be changed within the range of about 90 degrees to about 270 degrees.

[0128] Therefore, if the line length of the first line 21 is set within the above range, adjustment can be reliably performed so that the impedance at the harmonic frequency is not short-circuited when the second line 22 is viewed from the connection portion 23 .

[0129] Figure 3A , Figure 3B , Figure 4A and Figure 4B It is shown Figure 2 FIG. 1 is a Smith chart showing an example of impedances in various components of the carrier-side output matching circuit 10 . Figure 3A , Figure 3B , Figure 4A and Figure 4B Each shows impedance changes corresponding to frequencies from the fundamental frequency f0 to the second harmonic frequency 2f0.

[0130] Figure 3A The impedance when the harmonic processing circuit 33 is viewed from the connection portion 23 is shown. Figure 3B The impedance when the one end 22 a of the second line 22 is viewed from the connection portion 23 is shown.

[0131] exist Figure 3A In the example, the impedance at the fundamental frequency f0 is almost an open circuit, as described above.

[0132] exist Figure 3B In the figure, the impedance at the second harmonic frequency 2f0 is almost an open circuit.

[0133] Assume that the carrier side output matching circuit 10 of the present embodiment is arranged so that, for example, if the harmonic processing circuit 33 is connected to the drain terminal of the carrier amplifier 4, the impedance at the second harmonic frequency 2f0 will be short-circuited when viewed from the connection portion of the harmonic processing circuit 33. Even if the carrier side output matching circuit 10 is arranged as described above, since the first feed line 31 can be connected to any position within the line length in the carrier side output matching circuit 10 according to the present embodiment, the impedance at the harmonic frequency when (one end 21a of) the carrier side output matching circuit 10 is viewed from the connection portion 23 can be adjusted so as not to be short-circuited.

[0134] Figure 4A shows the impedance when the connection portion 23 is viewed from the other end 21b of the first line 21, and Figure 4B The impedance when the one end 21 a of the carrier-side output matching circuit 10 is viewed from the carrier amplifier 4 is shown.

[0135] when Figure 4A The impedance shown is Figure 3A These impedances have different characteristics when compared to the impedances shown. Figure 4A The impedance shown is Figure 4B When comparing the impedances shown, these impedances have different characteristics.

[0136] Thus, it is found that the impedance to be converted by the carrier side output matching circuit 10 and the impedance to be converted by the harmonic processing circuit 33 are combined with each other to obtain a Figure 4A Combined impedance of the characteristics shown.

[0137] As described above, since the first feeder line 31 is connected to the carrier side output matching circuit 10, the load impedance at the harmonic frequency viewed from the carrier amplifier 4 can be adjusted by the impedance at the harmonic frequency set in the first harmonic processing circuit 33. Therefore, harmonic processing can be appropriately performed.

[0138] [Example]

[0139] Hereinafter, an example of a harmonic processing circuit will be described.

[0140] As an example, it is assumed that the amplifier includes an amplifier device that amplifies an RF signal having a frequency of 3.8 GHz, a fundamental matching circuit connected to the output terminal of the amplifier device, and a harmonic processing circuit. With respect to the amplifier, an example of setting the impedance of the fundamental matching circuit and the harmonic processing circuit will be described.

[0141] First, characteristics related to saturated power and efficiency of the amplification device used in the example are understood by load-pull measurement. Based on the measurement results, a target impedance to be converted by a fundamental matching circuit and a harmonic processing circuit is specified.

[0142] Figure 5A The measurement results of the characteristics related to the saturation power and efficiency relative to the fundamental wave in the amplifier device are shown. Figure 5A , a contour plot showing measurement results related to saturated power and efficiency is superimposed on a portion of a Smith chart. In the contour plot, the contours indicated by thick lines represent saturated power, and the contours indicated by thin lines represent efficiency.

[0143] Figure 5A The contour map shown is an image, and numerical values ​​and the like indicated by the contour map are omitted.

[0144] Based on the saturated power contour plot and the efficiency contour plot superimposed on the Smith chart, the point on the Smith chart where the saturated power and efficiency are highest is designated as the target impedance with respect to the fundamental frequency.

[0145] In this example, Figure 5A The point indicated by the arrow in the middle is the target impedance about the fundamental frequency.

[0146] Figure 5A The magnitude (Mag) of the impedance at the point indicated by the middle arrow is 0.77, and the phase angle (Ang) is -155 degrees. Therefore, the target phase angle of the fundamental frequency is set to -155 degrees.

[0147] Figure 5B is a graph showing the measurement results of characteristics related to saturated power and efficiency with respect to the second harmonic in an amplification device.

[0148] exist Figure 5B In , the horizontal axis indicates the phase angle, and the vertical axis indicates the magnitude of saturated power and efficiency. Figure 5B In FIG. 1 , line L1 represents saturated power and line L2 represents efficiency.

[0149] Based on this graph, the phase angle at which the saturated power and efficiency are the highest is designated as the target phase angle of the second harmonic frequency.

[0150] When the phase angle is 120 degrees, both the saturated power and the efficiency are at a high level. Therefore, the target phase angle of the second harmonic frequency is set to 120 degrees.

[0151] Next, a fundamental wave matching circuit and a harmonic processing circuit for realizing a target phase angle are designed, and the impedance of the designed circuits is obtained by simulation using a computer and evaluated.

[0152] Fig. 6A Only the fundamental wave matching circuit is shown for example.

[0153] exist Fig. 6A, the fundamental wave matching circuit 210 includes a signal line 225 having one end 225a connected to an amplifying device. The signal line 225 is configured to include: a wide portion 226 having a maximum line width; a narrow portion 228 having a minimum line width and including the other end 225b to which a load or the like is connected; and an intermediate portion 227 connecting the wide portion 226 and the narrow portion 228.

[0154] Fig. 6A The fundamental wave matching circuit 210 shown in is designed so that the phase angle of the impedance with respect to the fundamental wave frequency is about -155 degrees as a target phase angle, while the impedance with respect to the second harmonic frequency is not particularly considered.

[0155] Figure 6B It is shown in Fig. 6A The Smith chart of impedance when one end 225a of the fundamental wave matching circuit 210 is viewed from the amplifying device, when one end 225a of the fundamental wave matching circuit 210 is connected to the amplifying device and a load of 50Ω is connected to the other end 225b.

[0156] exist Figure 6B , symbol m1 indicates impedance at a fundamental frequency (3.8 GHz), and symbol m2 indicates impedance at a second harmonic frequency (7.6 GHz).

[0157] The impedance indicated by the symbol m1 has a Mag of 0.772 and an Ang of -155.353 degrees. Ang is approximately the designed target phase angle.

[0158] The impedance indicated by symbol m2 has a Mag of 0.844 and an Ang of 178.186 degrees, which means that the impedance is almost short-circuited.

[0159] In this case, if the harmonic processing circuit is connected to the output terminal of the amplifying device, the impedance at the second harmonic frequency will be almost short-circuited when observing the fundamental matching circuit 210 from the connection portion of the harmonic processing circuit 233. Therefore, as described above, even if the impedance at the harmonic frequency in the harmonic processing circuit is changed, it may be difficult to adjust the load impedance at the harmonic frequency when observed from the amplifying device to a desired value.

[0160] Fig. 7A The harmonic processing circuit 233 is shown connected to Fig. 6A The situation of the fundamental wave matching circuit 210 is shown.

[0161] Fig. 7A The harmonic processing circuit 233 shown has a structure similar to Figure 2The first harmonic processing circuit 33 is configured as shown, and includes: a feeder line 231 that connects a DC power source (not shown) connected to a connection portion 239 to a fundamental wave matching circuit 210; and elements constituting a harmonic processing unit.

[0162] Elements constituting the harmonic processing unit include a first inductance element 234, a second inductance element 235, a first capacitance element 236, and a second capacitance element 237. The first inductance element 234 and the second inductance element 235 are connected via a connection portion 238.

[0163] The first inductance element 234, the second inductance element 235, the first capacitance element 236, the second capacitance element 237, the connection portion 238 and the connection portion 239 correspond to the first inductance element 34, the second inductance element 35, the first capacitance element 36, the second capacitance element 37, the connection point 38 and the connection point 39 shown in FIG. 3, respectively.

[0164] The line 229 connecting the first inductance element 234 and the harmonic processing circuit 233 is a part of the feeder line 231, and connects the harmonic processing unit composed of these elements to the harmonic processing circuit 233. The line 229 is connected to a position at a predetermined length L from one end 225a of the signal line 225.

[0165] In this example, the predetermined length L is set to 5.2 mm. Assuming that the wavelength of the fundamental wave is λ, the predetermined length L corresponds to λ / 8.

[0166] The elements included in the harmonic processing circuit 233 are designed so that the phase angle of the impedance with respect to the second harmonic frequency is approximately 120 degrees as a target phase angle.

[0167] In this example, the values ​​of the various components are set as follows.

[0168] First inductor element: 1.3nH

[0169] Second inductor: 3.0nH

[0170] First capacitor element: 0.2pF

[0171] Second capacitor element: 5.1pF

[0172] Figure 7B It is shown in Fig. 7A 1 is a Smith chart of impedance when one end 225a of the fundamental wave matching circuit 210 is viewed from the amplifying device in the case where one end 225a of the fundamental wave matching circuit 210 shown in FIG. 2 is connected to the amplifying device and a load of 50Ω is connected to the other end 225b.

[0173] exist Figure 7B, symbol m11 indicates impedance at a fundamental frequency (3.8 GHz), and symbol m12 indicates impedance at a second harmonic frequency (7.6 GHz).

[0174] The impedance indicated by the symbol m11 has a Mag of 0.778 and an Ang of -156.519 degrees. Ang is approximately the designed target phase angle.

[0175] The impedance indicated by the symbol m12 has a Mag of 0.686 and an Ang of 122.231 degrees. Ang is approximately the designed target phase angle.

[0176] As described above, according to the example, the phase angle of the impedance with respect to the fundamental frequency and the phase angle of the impedance with respect to the second harmonic frequency are both the target phase angles, thereby appropriately adjusting the impedance.

[0177] That is, even in a case where it is difficult to adjust the load impedance at the harmonic frequency when observed from the amplifying device if the fundamental matching circuit 210 and the harmonic processing circuit 233 are connected to the output end of the amplifying device, the load impedance at the harmonic frequency can be appropriately adjusted by connecting the harmonic processing circuit 233 to the fundamental matching circuit 210 as in this example.

[0178] More specifically, the feeder line 231 included in the harmonic processing circuit 233 is connected to a position where the line length from one end 225a of the signal line 225 is a predetermined length L. Therefore, the impedance at the harmonic frequency when the other end side of the signal line 225 is viewed from the connection portion of the feeder line 231 can be adjusted so as not to be short-circuited by changing the predetermined length L to adjust the position of the connection portion of the feeder line 231. Therefore, the load impedance at the harmonic frequency can be appropriately adjusted.

[0179] Although the predetermined length L is λ / 8 in the above example, the predetermined length L may be not shorter than λ / 16 and not longer than 3λ / 16.

[0180] Therefore, for example, the phase angle of the impedance at the harmonic frequency when the other end side of the signal line 225 is viewed from the connection portion of the feeder line 231 can be changed by about 180 degrees relative to the impedance at the harmonic frequency when the signal line 225 is viewed from the amplifying device.

[0181] Therefore, it is possible to reliably perform adjustment so that the impedance at the harmonic frequency is not short-circuited when the other end side of the signal line 225 is viewed from the connection portion.

[0182] [other]

[0183] Note that the embodiments disclosed herein are merely illustrative in all aspects and should not be considered restrictive.

[0184] For example, assuming that the wavelength of the fundamental wave is λ, the line length of the first line 21 is set within the range of not shorter than λ / 16 and not longer than 3λ / 16. However, the present disclosure is not limited thereto, and the line length may be outside the numerical range as long as harmonic processing can be appropriately performed.

[0185] In this example, the predetermined length L is set to λ / 8. However, as with the line length of the first line 21, the value of the predetermined length L is not particularly limited as long as harmonic processing can be appropriately performed. However, the predetermined length L within the range of not shorter than λ / 16 and not longer than 3λ / 16 can be appropriately adjusted so that the impedance at the harmonic frequency is not short-circuited when the other end 225b side of the signal line 225 is viewed from the connection portion of the line 229.

[0186] Although the Doherty amplifier 1 has been described in the above embodiment, an amplifier using a package accommodating a single amplifying device may be used.

[0187] In the above-described embodiment, the first harmonic processing unit 32 is configured by connecting two stages of the LC circuit. However, more stages (such as three or four stages of the LC circuit) may be connected. For example, the two stages of the connected LC circuit are capable of harmonic processing up to the second harmonic, and the three stages of the connected LC circuit are capable of harmonic processing up to the triple harmonic. Therefore, the number of stages of the LC circuit to be connected is set according to the order of the harmonic to be processed.

[0188] In the above embodiment, the first harmonic processing unit 32 has been described in which the elements 34, 35, 36, and 37 are implemented by lumped elements. However, some or all of the elements may be implemented by distributed elements.

[0189] The scope of the present disclosure is defined by the scope of the claims rather than the meaning described above, and is intended to include meanings equivalent to the scope of the claims and all modifications within the scope.

[0190] The Doherty amplifier 1 is mounted on a wireless communication device such as a base station device in a mobile communication system and amplifies a radio frequency transmission signal (RF signal). That is, the carrier amplifier 4 and the peak amplifier 5 included in the Doherty amplifier amplify the radio frequency transmission modulated signal obtained by modulating the radio frequency carrier with the transmission data.

[0191] Therefore, the above description includes the following features.

[0192] [Additional Notes]

[0193] A harmonic processing circuit comprises:

[0194] a feed line configured to feed power to the amplifying device; and

[0195] a harmonic processing unit connected to the feeder line and configured to perform harmonic processing at harmonic frequencies of the radio frequency transmission modulation signal output from the amplifying device, wherein

[0196] The feed line is connected to a fundamental wave matching circuit which is connected to the amplifying device and performs matching at the fundamental wave frequency of the transmission modulated signal.

[0197] Reference numerals list

[0198] 1 Doherty Amplifier

[0199] 2 Input terminals

[0200] 3 output terminals

[0201] 4 Carrier Amplifier

[0202] 5 Peak Amplifier

[0203] 6 Distributor

[0204] 7Combiners

[0205] 8Carrier side input matching circuit

[0206] 9 Peak side input matching circuit

[0207] 10Carrier side output matching circuit

[0208] 11Peak side output matching circuit

[0209] 12 Packaging

[0210] 21 First Line

[0211] 21a end

[0212] 21b The other end

[0213] 22 Second Line

[0214] 22a one end

[0215] 23Connection

[0216] 25 Circuit Boards

[0217] 30 First drain power supply

[0218] 31 First Feeder

[0219] 32 First harmonic processing unit

[0220] 33 First harmonic processing circuit

[0221] 34 first inductor element

[0222] 35 Second inductor element

[0223] 36 first capacitance element

[0224] 37 second capacitor element

[0225] 38 connection points

[0226] 39 connection points

[0227] 40 Second drain power supply

[0228] 41 Second feeder

[0229] 42 Second harmonic processing unit

[0230] 43 Second harmonic processing circuit

[0231] 51 First LC Circuit

[0232] 52 Second LC Circuit

[0233] 60 First grid power supply

[0234] 61 Third Feeder

[0235] 70 Second grid power supply

[0236] 71 Fourth Feeder

[0237] 100 amplifier devices

[0238] 102 Fundamental Wave Matching Circuit

[0239] 102a terminal

[0240] 104 Feeder

[0241] 106 DC power supply

[0242] 108 harmonic processing units

[0243] 108a terminal

[0244] 110 connection

[0245] 210 Fundamental Wave Matching Circuit

[0246] 225a one end

[0247] 225 signal line

[0248] 226 Width

[0249] 227 Middle

[0250] 228 Narrow part

[0251] 225b The other end

[0252] Line 229

[0253] 231 First Feeder

[0254] 233 First Harmonic Processing Circuit

[0255] 234 first inductor element

[0256] 235 second inductor element

[0257] 236 first capacitor element

[0258] 237 second capacitor element

[0259] 238 connection points

[0260] 239 connection points

Claims

1. A harmonic processing circuit, comprising: a feeder configured to feed power to the amplifying device; as well as a harmonic processing unit connected to the feeder line and configured to perform harmonic processing at a harmonic frequency of a signal output from the amplifying device, wherein The feed line is connected to a fundamental wave matching circuit which is connected to the amplifying device and performs matching at the fundamental wave frequency of the signal, The fundamental wave matching circuit includes a first line and a second line, one end of the first line is connected to the amplifying device, and the second line is connected to the other end of the first line. The feeder line is connected to a connection portion connecting the first line and the second line, and Assuming that the wavelength of the fundamental wave of the signal is λ, the first line has a line length not shorter than λ / 16 and not longer than 3λ / 16.

2. A harmonic processing circuit, comprising: a feeder configured to feed power to the amplifying device; as well as a harmonic processing unit connected to the feeder line and configured to perform harmonic processing at a harmonic frequency of a signal output from the amplifying device, wherein The feed line is connected to a fundamental wave matching circuit which is connected to the amplifying device and performs matching at the fundamental wave frequency of the signal, The fundamental wave matching circuit includes a signal line, one end of which is connected to the amplifying device. The feeder line is connected to a position of the signal line at which a line length from the one end of the signal line is a predetermined length, and Assuming that the wavelength of the fundamental wave of the signal is λ, the predetermined length is not shorter than λ / 16 and not longer than 3λ / 16.

Images