Method for manufacturing a multilayer substrate

Abstract

A manufacturing method of a multilayer substrate includes a preparation step, a filling step, and first, second, and third formation steps. The preparation step prepares an insulating base material (12) on which a conductor pattern (18) is formed on one surface. At this time, the conductor pattern (18) is composed of a Cu element. In addition, a Ni layer (16) is formed on the surface of the insulating base material (12) on the side of the conductor pattern (18). The first formation step forms a via hole (20) having the conductor pattern (18) as a bottom (20a) to the insulating base material (12). At this time, the Ni layer (16) in the range of the bottom (20a) is removed. The filling step fills a conductive paste (22) into the inside of the via hole (20). The second formation step forms a laminate (24) by laminating a plurality of insulating base materials (12). The third formation step heats the laminate (24) while pressing it. Thus, in the manufacturing method of the multilayer substrate, the plurality of insulating base materials (12) are integrated to form a conductive hole (26). At this time, a diffusion layer (28) containing a metal element in the conductive paste (22) and a Cu element is formed between the conductor pattern (18) and the conductive hole (26).

Description

[0001] This application is a divisional application of the application with the application number 201780035204.0, the application date of May 25, 2017, and the invention title of "Manufacturing method of multilayer substrate". TECHNICAL FIELD

[0002] The present disclosure relates to a manufacturing method of a multilayer substrate. BACKGROUND

[0003] A manufacturing method of a multilayer substrate is described in Patent Literature 1. In this manufacturing method, first, an insulating substrate having a conductor pattern formed on one surface is prepared. Thereafter, a via hole is formed in the insulating substrate with the conductor pattern as a bottom. Thereafter, a conductive hole formation material is filled in the inside of the via hole. Thereafter, a plurality of insulating substrates are stacked to form a stack. Thereafter, the stack is heated while being pressed. Thus, the plurality of insulating substrates are integrated. In this manufacturing method, the conductive hole is electrically connected to the conductor pattern.

[0004] In the manufacturing method described in Patent Literature 1, a conductor pattern composed of Cu element is formed. As the conductive hole formation material, for example, a conductive paste containing Ag particles and Sn particles can be used. Then, the conductive hole formation material is heated. Thus, a conductive hole composed of an alloy containing Ag element and Sn element is formed. In this manufacturing method, when the conductive hole formation material is heated, a diffusion layer formed by diffusion of Sn element in the conductive hole formation material and Cu element in the conductor pattern to each other is formed between the conductor pattern and the conductive hole. The manufacturing method described in Patent Literature 1 realizes the joining of the conductor pattern and the conductive hole via the diffusion layer thus formed.

[0005] In addition, a Ni layer as a surface treatment layer is formed on the surface of the insulating substrate on the side of the conductor foil for manufacturing a multilayer substrate. Here, when soldering the conductor pattern located on the most surface of the multilayer substrate and a member, if the solder is wound into the joint surface of the conductor pattern and the insulating substrate from the side surface of the conductor pattern, Cu element in the conductor pattern diffuses into the solder. Thus, the conductor pattern can be peeled off from the insulating substrate. The Ni layer functions as a diffusion barrier layer that suppresses this diffusion of Cu element.

[0006] PRIOR ART DOCUMENTS

[0007] PATENT LITERATURE

[0008] Patent Literature 1: Japanese Patent Application Publication No. 2003-110243 SUMMARY

[0009] The inventors actually manufactured a plurality of multilayer substrates according to the above-described conventional multilayer substrate manufacturing method. At this time, an insulating substrate having a conductor pattern composed of a Cu element and a Ni layer on the surface of the insulating substrate side of the conductor pattern was used as the insulating substrate on which the conductor pattern was formed on one surface. Then, durability tests were performed on the plurality of manufactured multilayer substrates. As a result, the inventors confirmed that cracks were easily generated between the conductor pattern and the conductive hole in some of the plurality of multilayer substrates.

[0010] Therefore, the inventors performed element analysis of the multilayer substrates. As a result, it was revealed that the multilayer substrates in which cracks were generated in the durability test did not form a diffusion layer between the conductor pattern and the conductive hole. Or, even if a diffusion layer was formed, it was formed only in a narrow range, and the formation of the diffusion layer was insufficient. In such a multilayer substrate, a Ni layer remained on the surface of the conductor pattern between the conductor pattern and the conductive hole. On the other hand, for the multilayer substrates in which cracks were not generated in the durability test, a diffusion layer was sufficiently formed between the conductor pattern and the conductive hole. In addition, there was no Ni layer on the surface of the conductor pattern between the conductor pattern and the conductive hole. From such results, the inventors found that the Ni layer hindered the formation of the diffusion layer.

[0011] Note that the above-described problem is not limited to the Ni layer. It is considered that the problem also occurs in a case where a surface metal layer that hinders the formation of a diffusion layer as much as the Ni layer is formed on the surface of the insulating substrate side of the conductor pattern.

[0012] An object of the present disclosure is to provide a multilayer substrate manufacturing technique capable of reducing multilayer substrates in which the joining strength between the conductor pattern and the conductive hole is low.

[0013] A multilayer substrate manufacturing method according to one aspect of the technology of the present disclosure includes a preparation step, a filling step, and first, second, and third formation steps.

[0014] The preparation step prepares an insulating substrate (12) having one surface (12a) and another surface (12b) on the opposite side thereof, and a conductor pattern (18) formed on only one of the one surface and the other surface.

[0015] The first formation step, after the insulating substrate is prepared, forms a through-hole (20) having an opening on the other surface side and having the conductor pattern as a bottom on the insulating substrate.

[0016] The filling step, after the through-hole is formed, fills the inside of the through-hole with a conductive hole formation material (22) containing a plurality of metal particles.

[0017] The second formation step, after the conductive hole formation material is filled, stacks a plurality of insulating substrates to form a laminate (24).

[0018] The third formation step forms the laminated body, and then integrates the plurality of insulating substrates and sintering the plurality of metal particles while pressing the laminated body to form the conductive hole (26).

[0019] The preparation step prepares the insulating substrate having a conductor pattern composed of at least Cu element and a surface metal layer (16) composed of at least a metal element having a higher activation energy than the metal element constituting the conductive hole formation material on the surface of the insulating substrate side of the conductor pattern.

[0020] The first formation step includes a step (removal step) of removing the surface metal layer in the range of the conductor pattern located at the bottom during the period from when the via hole is formed to before the conductive hole formation material is filled in the inside of the via hole.

[0021] The third formation step forms a diffusion layer (28) containing the metal element constituting the conductive hole formation material and Cu element between the conductor pattern and the conductive hole on the basis of the formation of the conductive hole.

[0022] In the manufacturing method of the present disclosure, the surface metal layer located at the bottom of the via hole is removed before the conductive hole formation material is filled in the inside of the via hole. Thereby, the diffusion layer can be sufficiently formed between the conductor pattern and the conductive hole. Therefore, the manufacturing method of the present disclosure reduces the multilayer substrate having a low joining strength of the conductive hole and the conductor pattern.

[0023] Note that the symbols in parentheses of the above elements indicate one example of the correspondence relationship between the specific elements described in the embodiments described later and the above elements. BRIEF DESCRIPTION OF DRAWINGS

[0024] Figure 1 is a cross-sectional view showing a manufacturing step of a multilayer substrate in the first embodiment.

[0025] Figure 2 is a cross-sectional view showing a manufacturing step of a multilayer substrate in the first embodiment. Figure 1

[0026] Figure 3A is a cross-sectional view showing a manufacturing step of a multilayer substrate in the first embodiment.

[0027] Figure 3B is a cross-sectional view showing a manufacturing step of a multilayer substrate in the first embodiment.

[0028] Figure 3C is a cross-sectional view showing a manufacturing step of a multilayer substrate in the first embodiment.

[0029] Figure 4 is a cross-sectional view showing a manufacturing step of a multilayer substrate in the second embodiment. DETAILED DESCRIPTION ​

[0030] Hereinafter, embodiments of the technology disclosed herein will be described with reference to the figures. It should be noted that in the following embodiments, the same or equivalent parts are labeled with the same symbols.

[0031] (First Embodiment)

[0032] use Figure 1 , Figure 2 The manufacturing method of the multilayer substrate of this embodiment will be described.

[0033] like Figure 1 As illustrated in (A), in the manufacturing method of this embodiment, the first step is to prepare a single-sided conductor film 10 (preparation step). The single-sided conductor film 10 has a resin film 12 and a conductor foil 14. The resin film 12 has one side 12a and another side 12b opposite to it. The conductor foil 14 is bonded only to one side 12a of the other side 12b. The resin film 12 is a film-like insulating substrate. The resin film 12 is made of thermoplastic resin. The conductor foil 14 is made of a pure metal of Cu element.

[0034] A surface treatment layer, such as a Ni layer 16, is formed on the surface of the conductor foil 14 on the resin film 12 side, i.e., the resin surface 14a. It should be noted that... Figure 1 , Figure 2 In the diagram, only the Ni layer 16 is shown as a surface treatment layer. To improve the adhesion between the conductor foil 14 and the resin film 12, the resin surface 14a is roughened. Therefore, the resin surface 14a is also called the roughened surface, matte surface, M surface, etc.

[0035] Ni layer 16 is a metal layer composed of Ni element. In this embodiment, Ni layer 16 corresponds to a surface metal layer formed on the surface of the insulating substrate side of the conductor pattern. Ni element has a higher activation energy than Cu element constituting conductor foil 14 and Sn element constituting conductive paste 22 described later. Activation energy is the energy required for the starting material of a reaction to be excited from the ground state to the transition state. Activation energy is also called the Arrhenius parameter. A high activation energy manifests as an activation barrier. Therefore, Ni layer 16 functions as a diffusion barrier layer to suppress the diffusion of Cu element in conductor foil 14 into solder (not shown). This Ni layer 16 is used to suppress the solder used when connecting the conductor pattern and components located on the outermost surface of the multilayer substrate from the side of conductor foil 14 into resin surface 14a. Ni layer 16 is a plating layer formed by a plating process. Ni layer 16 contains 99% by mass of Ni element and 1% by mass of impurities other than Ni element.

[0036] like Figure 1As illustrated in (B) of FIG. 1, next, in the manufacturing method of the present embodiment, a process of forming the conductor pattern 18 is performed in the preparation process. In this process, the conductor foil 14 is patterned by photolithography and etching. Thus, the conductor pattern 18 having a desired planar shape for constituting a circuit is formed.

[0037] As Figure 1 As illustrated in (C) of FIG. 1, next, in the manufacturing method of the present embodiment, a process of forming the via hole 20 (first formation process) is performed. In this process, the other face 12b of the resin film 12 is irradiated with laser light. As the laser light used at this time, for example, a carbon dioxide laser or the like can be given. In addition, in this process, the output of the laser light and the irradiation time are set as follows. Specifically, the output of the laser light and the irradiation time are set in such a manner that the via hole 20 reaches the conductor pattern 18 from the other face 12b of the resin film 12 and the Ni layer 16 is removed. Thus, in this process, the via hole 20 having an opening on the other face 12b side and taking the conductor pattern 18 as a bottom 20a is formed in the resin film 12 (insulating base material). Further, in this process, the Ni layer 16 (surface metal layer) in the range of the conductor pattern 18 that becomes the bottom 20a of the via hole 20 is removed. That is, the Ni layer 16 in the range of the conductor pattern 18 that faces the inner space 21 of the via hole 20 is removed. Thus, the first formation process of the present embodiment has a removal process of removing the Ni layer 16 in the period from when the via hole 20 is formed to before the inner portion of the via hole 20 is filled with the conductive paste 22 (conductive hole formation material). Note that it is preferable that all of the Ni layer 16 in the range be removed, and it is also possible that not all of the Ni layer 16 be removed. As long as it is to the extent that the formation of the diffusion layer 28 described later is not hindered, it is possible to leave a Ni metal portion composed of the Ni element.

[0038] As Figure 1 As illustrated in (D) of FIG. 1, next, in the manufacturing method of the present embodiment, a process of filling the inner portion of the via hole 20 with the conductive paste 22 (filling process) is performed. The conductive paste 22 is a conductive hole formation material for forming the conductive hole 26 described later. The conductive paste 22 is formed by mixing a plurality of metal particles with a solvent in a paste shape. The conductive paste 22 is further mixed with an adhesive. As the adhesive, for example, polyimide particles, glass powder, an epoxy resin, a polyester resin, or the like can be given.

[0039] In this embodiment, the conductive paste 22 contains a plurality of Ag particles and a plurality of Sn particles as a plurality of metal particles. Furthermore, the composition ratio of Ag to Sn components in the conductive paste 22 is set. Specifically, the composition ratio of Ag to Sn components is set in such a way that even after the diffusion layer 28 is formed, the alloy constituting the conductive hole 26 achieves the desired composition. That is, compared to the case where only conductive holes 26 with the desired alloy composition are formed, the proportion of Sn component relative to the overall conductive paste 22 is increased. Therefore, in the manufacturing method of this embodiment, even after the diffusion layer 28 is formed, conductive holes 26 with the desired alloy composition can be formed. Furthermore, the reduction in strength of the conductive hole 26 due to changes in the alloy composition of the conductive hole 26 can be avoided.

[0040] In the manufacturing method of this embodiment, after the above-described process (after the filling process), there is no Ni layer 16 between the conductive paste 22 and the conductor pattern 18. Alternatively, only a Ni metal portion composed of Ni elements exists partially between the conductive paste 22 and the conductor pattern 18. That is, Ni elements do not exist in a layered manner between the conductive paste 22 and the conductor pattern 18.

[0041] like Figure 2 As illustrated in (A), the manufacturing method of this embodiment proceeds to the step of forming a laminate 24 by stacking multiple resin films 121 to 125 (second forming step). Each of the stacked resin films 121 to 125 is filled with conductive paste 22 in the through holes 20.

[0042] In this embodiment, the vias 20 formed in each of the plurality of resin films 121-125 are arranged in a row in the stacking direction. Furthermore, among the plurality of resin films 121-125, the uppermost resin film 121 is stacked with its orientation opposite to that of the other resin films 122-125. Therefore, the conductive paste 22 of the first resin film 121 and the second resin film 122 are in contact with each other.

[0043] like Figure 2 As illustrated in (B), the process of heating the laminate 24 while applying pressure is carried out (the third forming process). The heating temperature in this process is, for example, a temperature in the range of 232 to 350°C.

[0044] Thus, in the present process, the plurality of resin films 121 to 125 in which the laminate 24 is formed are integrated. In addition, the Ag particles and the Sn particles are sintered to form the conductive hole 26. Specifically, the Sn particles are melted to be alloyed with the Ag particles. Then, the alloyed particles are sintered to form the conductive hole 26. Thus, the conductive hole 26 is composed of an alloy of Sn element and Ag element. In the resin films 122 to 125 other than the first resin film 121 in the laminate 24, the resin film 12 and the conductor pattern 18 are integrated. The conductor pattern 18 and the conductive hole 26 are integrated. In addition, the conductive holes 26 formed in the first resin film 121 and the second resin film 122 in the laminate 24 are integrated with each other.

[0045] Further, in the present process (the third forming process), the diffusion layer 28 is formed in one resin film 12. Specifically, the diffusion layer 28 containing Cu element and Sn element is formed between the conductive hole 26 formed in the via hole 20 and the conductor pattern 18 that becomes the bottom 20a of the via hole 20. The diffusion layer 28 is formed by mutual diffusion of the Cu element constituting the conductor pattern 18 and the Sn element constituting the metal particles in the conductive paste 22. Note that the Ni layer 16 is not formed on the surface of the conductor foil 14 opposite to the resin surface 14a, i.e., the glossy surface. Thus, although not shown, the diffusion layer 28 is also formed between the glossy surface of the conductor pattern 18 and the conductive hole 26. In addition, the heating temperature of the present process can be lower than the above temperature (e.g., 232°C) as long as the alloy constituting the conductive hole 26 is formed and the diffusion layer 28 is formed.

[0046] Thus, in the manufacturing method of the present embodiment, a multilayer substrate as follows is manufactured. Specifically, a multilayer substrate having a structure in which a plurality of resin films 121 to 125 in which the conductor pattern 18 is formed are laminated and the conductor patterns 18 that are arranged side by side in the lamination direction are connected to each other via the conductive hole 26 formed in the resin film 12 is manufactured.

[0047] Here, the manufacturing method of the multilayer substrate of the present embodiment and the manufacturing method of the multilayer substrate in Comparative Example 1 are compared. As Figure 3A As illustrated, in Comparative Example 1, in the process of forming the via hole 20 (the process corresponding to the first forming process of the present embodiment), the Ni layer 16 is not removed unlike the present embodiment. That is, Comparative Example 1 does not include the removal process possessed by the first forming process of the present embodiment. Note that the other processes possessed by the manufacturing method of Comparative Example 1 are the same as the processes possessed by the manufacturing method of the present embodiment.

[0048] Thus, as Figure 3BAs illustrated, in Comparative Example 1, the Ni layer 16 is present between the conductive paste 22 and the conductor pattern 18 when the conductive paste 22 is filled. Specifically, the Ni layer 16a having the same thickness as the Ni layer 16b present outside the internal space 21 of the via hole 20 is present in the range of the bottom 20a of the via hole 20. Further, as illustrated, the Ni layer 16b is present on the surface of the conductor pattern 18. In addition, the Ni layer 16c is present on the surface of the conductive paste 22. Figure 3C As illustrated, in Comparative Example 1, there is a case where the diffusion layer 28 is not formed after the process of heating the laminate 24 while pressing (process corresponding to the process of the 3rd formation of the present embodiment). The reason for this is that the diffusion of the Cu element (metal element constituting the conductor pattern 18) and the Sn element (metal element constituting the metal particles in the conductive paste 22) is hindered by the Ni layer 16 present between the conductive paste 22 and the conductor pattern 18.

[0049] In contrast, in the present embodiment, the Ni layer 16 is removed (removal process) in the process of forming the via hole 20 (1st formation process). Therefore, in the process of heating the laminate 24 while pressing, the Cu element and the Sn element diffuse for the manufacturing method of the present embodiment. Thereby, the diffusion layer 28 is formed. Therefore, the multilayer substrate manufactured by the manufacturing method of the present embodiment becomes a structure in which the conductor pattern 18 and the conductive hole 26 are connected via the diffusion layer 28. That is, a structure in which the conductor pattern 18 and the conductive hole 26 are diffusion-bonded.

[0050] As described above, in the manufacturing method of the multilayer substrate of the present embodiment, the joining strength (connection strength) of the conductive hole 26 and the conductor pattern 18 is improved (high strength can be achieved) compared to the manufacturing method of Comparative Example 1. That is, by manufacturing a plurality of multilayer substrates using the manufacturing method of the present embodiment, compared to the case where the manufacturing method in which the Ni layer 16 is not removed is used, it is possible to reduce the defective multilayer substrates manufactured. Specifically, it is possible to reduce the multilayer substrates in which the joining strength of the conductive hole 26 and the conductor pattern 18 is low.

[0051] In the manufacturing method of the multilayer substrate of the present embodiment, in the process of forming the via hole 20 (process corresponding to the 1st formation process of the present embodiment), the via hole 20 is formed by laser irradiation. Therefore, the bottom 20a of the formed via hole 20 becomes a spherical surface with the internal space 21 side as the concave surface. Thereby, the area of the diffusion layer 28 becomes larger in the manufacturing method of the present embodiment compared to the case where the bottom 20a of the via hole 20 is a flat surface. Therefore, the joining strength (connection strength) of the conductive hole 26 and the conductor pattern 18 is further improved.

[0052] (2nd Embodiment)

[0053] In the manufacturing method of the multilayer substrate of the first embodiment, the Ni layer 16 is removed in the process of forming the via hole 20 (first formation process). That is, in the first embodiment, the first formation process has the removing process. In contrast, in the manufacturing method of the multilayer substrate of the present embodiment, the process of forming the via hole 20 and the process of removing the Ni layer 16 are performed separately. That is, in the present embodiment, the first formation process and the removing process are performed separately.

[0054] In the manufacturing method of the present embodiment, after the process of forming the conductor pattern 18 exemplified in (B) in Figure 1 the following process is performed. Specifically, as exemplified in (A) in Figure 4 the other surface 12b of the resin film 12 is irradiated with carbon dioxide laser to form the via hole 20. At this time, the Ni layer 16 is present on the bottom 20a of the via hole 20. That is, the conductor pattern 18 and the Ni layer 16 become the bottom 20a of the via hole 20.

[0055] Next, as exemplified in (B) in Figure 4 in the manufacturing method of the present embodiment, excimer laser capable of performing fine removing processing is irradiated to the inside of the via hole 20. Thereby, in the present embodiment, the Ni layer 16 present in the range of the conductor pattern 18 which becomes the bottom 20a of the via hole 20 is removed.

[0056] Then, in the manufacturing method of the present embodiment, the process of filling the conductive paste 22 (process corresponding to the filling process of the first embodiment) is performed similarly to the first embodiment.

[0057] As explained above, in the manufacturing method of the multilayer substrate of the present embodiment, the process of removing the Ni layer 16 (removing process) is performed from the start of the implementation of the process of forming the via hole 20 (first formation process) to the end of the implementation of the process of filling the conductive paste 22 in the via hole 20 (filling process). Thereby, the same effects as the first embodiment are also obtained.

[0058] (Other Embodiments)

[0059] (1) In each of the above embodiments, the conductor pattern 18 is composed of a pure metal of Cu element, but is not limited thereto. The conductor pattern 18 can be composed of at least Cu element.

[0060] (2) In each of the above embodiments, as the plurality of metal particles contained in the conductive paste 22, a plurality of Ag particles and a plurality of Sn particles are used, but are not limited thereto. Other metal particles can be used for the conductive paste 22.

[0061] Further, for example, a plurality of Ag particles can be used as the plurality of metal particles. In this case, the conductive hole 26 is formed using a metal composed of pure metal of the Ag element. The diffusion layer 28 is formed of a layer containing the Cu element that constitutes the conductor pattern 18 and the Ag element that constitutes the plurality of metal particles.

[0062] Further, for example, Cu particles and Sn particles can be used as the plurality of metal particles. In this case, the conductive hole 26 is formed of an alloy containing the Cu element and the Sn element. The diffusion layer 28 is formed of a layer containing the Cu element that constitutes the conductor pattern 18 and the Cu element and the Sn element that constitute the plurality of metal particles.

[0063] (3) In each of the above embodiments, the Ni layer 16 contains 99 mass% of the Ni element in total. The content rate of the Ni element in the Ni layer 16 is not limited thereto.

[0064] (4) In each of the above embodiments, the Ni layer 16 is formed as the surface metal layer, but is not limited thereto. As the surface metal layer, a metal layer other than the Ni layer 16 can be formed.

[0065] The surface metal layer can be a layer composed of at least a metal element having higher activation energy compared to the Cu element that constitutes the conductor pattern 18 and the metal element that constitutes the conductive hole formation material. The metal element that constitutes the conductive hole formation material can be any one of Sn and Ag, and as a metal element having higher activation energy compared to the metal element, in addition to Ni, for example, Co, Pt, W, Mo, and the like can be cited. The surface metal layer can be composed of pure metal formed of a single metal element. Further, the surface metal layer can be composed of an alloy formed of a plurality of metal elements. Therefore, the surface metal layer can be a layer composed of one or more metal elements selected from Ni, Co, Pt, W, and Mo.

[0066] (5) In each of the above embodiments, the resin film 12 is composed of a thermoplastic resin, but is not limited thereto. The resin film 12 can be composed of another flexible resin other than a thermosetting resin and the like, for example. Further, the resin film 12 can be composed of another insulating material other than a resin having flexibility.

[0067] (6) The technology according to the present disclosure is not limited to the above-described embodiments. The technology according to the present disclosure can be appropriately changed within the scope of the claims. The technology according to the present disclosure also includes various modifications, modifications within the equivalent scope. In addition, the above-described embodiments are not irrelevant to each other, and can be appropriately combined except for cases where it is obvious that they cannot be combined. In addition, in the above-described embodiments, the components of the embodiments are not necessarily essential except for cases where it is particularly indicated that they are essential and cases where it is obvious that they are essential in principle. In addition, in the above-described embodiments, the number, value, amount, range, and the like of the components of the embodiments are not limited to the specific number except for cases where it is particularly indicated that they are limited to the specific number or range, and the like. In addition, in the above-described embodiments, the material, shape, positional relationship, and the like of the components and the like are not limited to the specific material, shape, positional relationship, and the like except for cases where it is particularly indicated that they are limited to the specific material, shape, positional relationship, and the like, and the like.

[0068] (SUMMARY)

[0069] According to a first aspect shown by some or all of the above-described embodiments, a multilayer substrate manufacturing method according to one aspect of the technology according to the present disclosure includes a preparation step, a filling step, and first, second, and third formation steps.

[0070] The preparation step prepares an insulating substrate having one surface and the other surface opposite to the one surface, and a conductor pattern is formed only on one of the one surface and the other surface.

[0071] The first formation step forms a via hole having an opening on the other surface side and taking the conductor pattern as a bottom after the insulating substrate is prepared.

[0072] The filling step fills a conductive hole formation material containing a plurality of metal particles inside the via hole after the via hole is formed.

[0073] The second formation step forms a laminate by laminating a plurality of insulating substrates after the conductive hole formation material is filled.

[0074] The third formation step integrates the plurality of insulating substrates and forms a conductive hole by sintering the plurality of metal particles by heating the laminate while pressing the laminate after the laminate is formed.

[0075] The preparation step prepares an insulating substrate, and the conductor pattern is composed of at least a Cu element, and a surface metal layer composed of at least a metal element having a higher activation energy than metal elements constituting a conductive hole formation material is present on the surface of the insulating substrate side of the conductor pattern.

[0076] The first formation step includes a step (removing step) of removing the surface metal layer in the conductor pattern in a range to be a bottom during a period from when the through hole is formed to before the conductive hole formation material is filled in the inside of the through hole.

[0077] The third formation step forms a diffusion layer containing a metal element constituting the conductive hole formation material and a Cu element between the conductor pattern and the conductive hole on the basis of the formation of the conductive hole.

[0078] Further, according to the second aspect, the filling step uses a plurality of Ag particles and a plurality of Sn particles as the plurality of metal particles. The third formation step forms a layer containing a Cu element and a Sn element as the diffusion layer. This configuration can be adopted in the first aspect, for example.

[0079] Further, according to the third aspect, the filling step uses a plurality of Ag particles as the plurality of metal particles. The third formation step forms a layer containing a Cu element and an Ag element as the diffusion layer. This configuration can be adopted in the first aspect, for example.

[0080] Further, according to the fourth aspect, the filling step uses a plurality of Cu particles and a plurality of Sn particles as the plurality of metal particles. The third formation step forms a layer containing a Cu element and a Sn element as the diffusion layer. This configuration can be adopted in the first aspect, for example.

[0081] Further, according to the fifth aspect, the preparation step uses a layer composed of one or more metal elements selected from Ni, Co, Pt, W, and Mo as the surface metal layer. This configuration can be adopted in the second to fourth aspects, for example.

[0082] Symbol explanation

[0083] 12 Resin film (insulating base material)

[0084] 16 Ni layer

[0085] 18 Conductor pattern

[0086] 20 Through hole

[0087] 22 Conductive paste

[0088] 24 Layered body

[0089] 26 Conductive hole

[0090] 28 Diffusion layer

Claims

1. A multilayer substrate comprising: A laminate comprising multiple insulating substrates having one side and the opposite side thereof, the multiple insulating substrates including a first insulating substrate and a second insulating substrate. The first conductor pattern is a Cu-containing conductor foil formed on one side of the first insulating substrate, comprising a side exposed from the multilayer substrate through the outermost layer, an other side opposite to the first side in the direction in which the insulating substrate is stacked, and a side connecting the first side and the other side. The second conductor pattern is a conductor foil containing Cu element formed on one or the other side of the second insulating substrate. A surface treatment layer is disposed on the other side of the first conductor pattern and a portion of the surface of the second conductor pattern. The first conductive hole is disposed in the first insulating substrate. A second conductive hole is disposed in the second insulating substrate; The surface treatment layer is absent in at least a portion of the area connecting the first conductive hole and the first conductor pattern, and on the side surface of the first conductor pattern. The second insulating substrate is bonded to the other side of the first insulating substrate. The first conductive hole and the second conductive hole are joined without being separated by a conductor foil. The conductive via forming material contains Sn element, and a diffusion layer containing Sn element constituting the conductive via forming material is formed between the first conductor pattern and the first conductive via. At least a portion of the area where the second conductive hole connects to the second conductor pattern lacks the surface treatment layer. A diffusion layer containing Sn element constituting the conductive hole forming material is formed between the second conductor pattern and the second conductive hole.

2. The multilayer substrate according to claim 1, wherein, The laminate contains multiple insulating substrates, including a third insulating substrate and a fourth insulating substrate. The multilayer substrate further comprises: The third conductor pattern is a Cu-containing conductor foil formed on the other side of the third insulating substrate, comprising a side exposed from the multilayer substrate by being located at the outermost layer and a side closer to the third insulating substrate than the other side. The fourth conductor pattern is a conductor foil containing Cu element formed on the other side of the fourth insulating substrate. A surface treatment layer is disposed on one side of the third conductor pattern. A third conductive hole is disposed in the third insulating substrate; At least a portion of the area connecting the third conductive hole and the third conductor pattern lacks the surface treatment layer. The fourth insulating substrate is bonded to one side of the third insulating substrate. The fourth conductor pattern is connected to the third conductive hole. The surface treatment layer is absent in the portion connecting the third conductive hole and the fourth conductor pattern.

3. A multilayer substrate, comprising: A laminate comprising multiple insulating substrates having one side and the opposite side thereof, the multiple insulating substrates including a first insulating substrate and a second insulating substrate. The first conductor pattern is a Cu-containing conductor foil formed on one side of the first insulating substrate, comprising a side exposed from the multilayer substrate through the outermost layer, an other side opposite to the first side in the direction in which the insulating substrate is stacked, and a side connecting the first side and the other side. The second conductor pattern is a conductor foil containing Cu element formed on one side of the second insulating substrate. A surface treatment layer is disposed on the other side of the first conductor pattern. The first conductive hole is disposed inside the through hole of the first insulating substrate; The surface treatment layer is absent in at least a portion of the area connecting the first conductive hole and the first conductor pattern, and on the side surface of the first conductor pattern. The second insulating substrate is bonded to the other side of the first insulating substrate. The second conductor pattern is connected to the first conductive hole. The surface treatment layer is absent in the portion connecting the first conductive hole and the second conductor pattern. A diffusion layer containing Sn elements constituting the conductive hole forming material is formed by interdiffusion of Cu elements forming the second conductor pattern that constitutes the bottom of the via with Sn elements contained in the conductive hole forming material constituting the first conductive hole.

4. The multilayer substrate according to claim 1 or 3, wherein, The surface roughness of the other side of the first conductor pattern is greater than the surface roughness of one side of the first conductor pattern.

5. The multilayer substrate according to claim 1 or 3, wherein, The first conductor pattern has a recessed portion that connects to the first conductive hole.

6. The multilayer substrate according to claim 1 or 3, wherein, The diffusion layer also contains Cu.

7. The multilayer substrate according to claim 1 or 3, wherein, The material of the first conductive hole contains Ag and Sn.

8. The multilayer substrate according to claim 1 or 3, wherein, The material of the first conductive hole contains Cu and Sn.

9. The multilayer substrate according to claim 1 or 3, wherein, The surface treatment layer is composed of one or more metallic elements selected from Ni, Co, Pt, W and Mo.

10. A method for manufacturing a multilayer substrate, comprising the following steps: A process for preparing multiple insulating substrates, wherein the insulating substrate has one side and another side opposite to it, and a conductor foil containing Cu element having a surface treatment layer formed on one side of the insulating substrate. After the process of preparing the insulating substrate, a process of forming through holes with openings on the other side and the conductor foil as the bottom on the plurality of insulating substrates; After the process of forming the via, a process of removing at least a portion of the surface treatment layer at the bottom of the via from at least one of the plurality of insulating substrates; After the process of removing the surface treatment layer, a process of filling the interior of the through-hole with a conductive hole forming material is performed. After the process of filling the conductive hole forming material, the conductive hole forming materials of two insulating substrates filled with the conductive hole forming material are connected to each other without the conductor foil by pressing and heating the plurality of insulating substrates, thereby integrating the plurality of insulating substrates. Even if a diffusion layer containing metal elements constituting the conductive hole forming material and Cu elements is formed between the conductor foil and the conductive hole formed by heating in the process of integrating multiple insulating substrates, the composition ratio of the multiple metal particles contained in the conductive hole forming material is adjusted in the process of filling the conductive hole forming material so that the conductive hole has a specified metal composition.

11. A method for manufacturing a multilayer substrate, comprising the following steps: A process for preparing multiple insulating substrates, wherein the insulating substrate has one side and another side opposite to it, and a conductor foil containing Cu element having a surface treatment layer formed on one side of the insulating substrate. After the process of preparing the insulating substrate, a process of forming through holes with openings on the other side and the conductor foil as the bottom on the plurality of insulating substrates; After the process of forming the via, a process of removing at least a portion of the surface treatment layer at the bottom of the via from at least one of the plurality of insulating substrates; After the process of removing the surface treatment layer, a process of filling the interior of the through-hole with a conductive hole forming material is performed. After the process of filling the conductive hole forming material, the conductive hole forming material of the insulating substrate filled with the conductive hole forming material is brought into contact with the portion of the conductor foil disposed on the insulating substrate that is not provided with the surface treatment layer, which is different from the insulating substrate, by pressing and heating the plurality of insulating substrates, thereby integrating the plurality of insulating substrates into one piece. Even if a diffusion layer containing metal elements constituting the conductive hole forming material and Cu elements is formed between the conductor foil and the conductive hole formed by heating in the process of integrating multiple insulating substrates, the composition ratio of the multiple metal particles contained in the conductive hole forming material is adjusted in the process of filling the conductive hole forming material so that the conductive hole has a specified metal composition.

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