Uninterruptible power supply, non-transitory computer readable medium and power system

Abstract

An uninterruptible power supply, a non-transitory computer-readable medium, and a power system, wherein the uninterruptible power supply includes a first input terminal, a backup input terminal, an output terminal providing output power, an inverter coupled to the first input terminal, the backup input terminal, and the output terminal, a first sensor detecting the voltage of the inverter output terminal, a second sensor detecting the voltage of the first input terminal, a bypass switch coupled to the first input terminal and the output terminal, and a controller coupled to the bypass switch and the first and second sensors, wherein the controller is configured to use at least one of the first and second sensors to determine a first voltage difference across the bypass switch; apply a high-pass filter to the first voltage difference to obtain a first filtered voltage difference; determine whether a value obtained by the first filtered voltage difference exceeds a threshold value; and output a fault indication of the bypass switch based on a value obtained from the first filtered voltage difference and exceeding the threshold value. The present invention can overcome at least one disadvantage of the prior art.

Description

Technical Field

[0001] In accordance with at least one example of the present invention, monitoring electronic devices is generally directed to. Background Art

[0002] It is known to use power supply devices to provide a stable power supply, such as uninterruptible power supplies (UPS), for sensitive and / or critical loads (such as computer systems and other data processing systems). Known UPS include online UPS, offline UPS, line interactive UPS, etc. Online UPS provides conditioned AC power and backup AC power when the main AC power is interrupted. Summary of the invention

[0003] According to at least one aspect of the present invention, there is provided an uninterruptible power supply, comprising: a first input terminal configured to receive input power; a backup input terminal configured to receive backup power from a backup power source; an output terminal configured to provide output power to a load, the output power being obtained from at least one of the input power and the backup power; an inverter coupled to the first input terminal, the backup input terminal and the output terminal; a first sensor configured to detect a voltage at an output terminal of the inverter; a second sensor configured to detect a voltage at the first input terminal; a bypass switch coupled to the first input terminal and the output terminal; and a controller coupled to the bypass switch, the first sensor and the second sensor, and the controller is configured to: use at least one of the first sensor and the second sensor to determine a first voltage difference across the bypass switch; apply a high pass filter to the first voltage difference to obtain a first filtered voltage difference; determine whether a value obtained from the first filtered voltage difference exceeds a threshold; and output an indication of a fault of the bypass switch based on a value obtained from the first filtered voltage difference and exceeding the threshold.

[0004] In various examples, the controller is further configured to: determine an absolute value of the first filtered voltage difference; and sum the absolute value of the first filtered voltage difference with an array of one or more filtered voltage differences to produce a value derived from the first filtered voltage difference, the value derived from the first filtered voltage difference being a first absolute value voltage sum. In at least one example, the controller is further configured to: determine that the first absolute value voltage sum does not exceed the threshold; add the first filtered voltage difference to an array of one or more filtered voltage differences; determine a second voltage difference across the bypass switch using at least one of the first sensor and the second sensor; apply the high pass filter to the second voltage difference to obtain a second filtered voltage difference; determine an absolute value of the second filtered voltage difference; sum the absolute value of the second filtered voltage difference with an array of one or more filtered voltage differences to determine a second absolute value voltage sum; determine that the second absolute value voltage sum exceeds the threshold; and output the indication of the fault of the bypass switch based on the second absolute value voltage sum exceeding the threshold.

[0005] In some examples, the bypass switch includes at least one thyristor. In various examples, the bypass switch includes a first thyristor and a second thyristor, the second thyristor coupled in anti-parallel to the first thyristor. In at least one example, the controller is further configured to: determine a second voltage difference across the bypass switch using at least one of the first sensor and the second sensor; determine whether the first thyristor or the second thyristor is forward biased based on the second voltage difference; apply the high pass filter to the voltage difference to obtain a second filtered voltage difference; determine whether a value obtained from the second filtered voltage difference exceeds the threshold; and output an indication of a fault of at least one of the first thyristor and the second thyristor based on the second filtered voltage difference exceeding the threshold. In some examples, the controller is further configured to: control the inverter and the bypass switch in response to determining that the value obtained from the first filtered voltage difference exceeds the threshold to change a mode of operation.

[0006] According to some aspects of the present invention, a non-transitory computer-readable medium stores thereon a computer-executable instruction sequence for controlling an electric power device, the electric power device having an input terminal and an output terminal, the output terminal being configured to be coupled to an AC power source and configured to receive AC power from the AC power source, the output terminal being configured to provide AC power to a load, the electric power device comprising an inverter and a bypass switch, the inverter being coupled to the input terminal and the output terminal, the bypass switch being coupled between the input terminal and the output terminal, the computer-executable instruction sequence comprising a plurality of instructions, the plurality of instructions instructing at least one processor to execute: determining a first voltage difference across the bypass switch; applying a high-pass filter to the first voltage difference to obtain a first filtered voltage difference; determining whether a value obtained from the first filtered voltage difference exceeds a threshold value; and outputting an indication of a fault of the bypass switch based on a value obtained from the first filtered voltage difference and exceeding the threshold value.

[0007] In at least one example, the plurality of instructions further instruct the at least one processor to perform: determining an absolute value of the first filtered voltage difference; and summing the absolute value of the first filtered voltage difference with an array of one or more filtered voltage differences to produce a value derived from the first filtered voltage difference, the value derived from the first filtered voltage difference being a first absolute value voltage sum. In various examples, the plurality of instructions further instruct the at least one processor to perform: determining that the first absolute value voltage sum does not exceed the threshold; adding the first absolute value voltage sum to an array of one or more filtered voltage differences; determining a second voltage difference across the bypass switch; applying the high pass filter to the second voltage difference to obtain a second filtered voltage difference; determining an absolute value of the second filtered voltage difference; summing the absolute value of the second filtered voltage difference with an array of one or more filtered voltage differences to determine a second absolute value voltage sum; determining that the second absolute value voltage sum exceeds the threshold; and outputting the indication of the fault of the bypass switch based on the second absolute value voltage sum exceeding the threshold.

[0008] In some examples, the plurality of instructions further instruct the at least one processor to perform: determining that the second filtered voltage difference exceeds the threshold response to control the inverter and the bypass switch to change a mode of operation. In at least one example, the bypass switch includes a first thyristor rectifier and a second thyristor rectifier, the second thyristor rectifier is anti-parallel coupled to the first thyristor rectifier, the power device includes a first sensor and a second sensor, the first sensor is coupled to the output terminal, and the second sensor is coupled to the output terminal, and the plurality of instructions further instruct the at least one processor to perform: using at least one of the first sensor and the second sensor to determine a second voltage difference across the bypass switch; determining whether the first thyristor rectifier or the second thyristor rectifier is forward biased based on the second voltage difference; applying the high pass filter to the second voltage difference to obtain a second filtered voltage difference; determining whether a value obtained from the second filtered voltage difference exceeds the threshold; and outputting an indication of a fault of at least one of the first thyristor rectifier and the second thyristor rectifier based on the second filtered voltage difference exceeding the threshold.

[0009] In at least one example, the first thyristor and the second thyristor each include an anode, and when instructing the at least one processor to determine whether the first thyristor or the second thyristor is forward biased based on the second voltage difference, the multiple instructions instruct the at least one processor to perform: determining whether a voltage at an anode of the first thyristor is higher than a voltage at an anode of the second thyristor based on the second voltage difference; and identifying the first thyristor as forward biased in response to the voltage at the anode of the first thyristor being higher than the voltage at the anode of the second thyristor.

[0010] According to at least one invention of the present invention, there is provided an electric power system comprising: a first input terminal configured to receive input power; a first output terminal configured to provide output power from the first input terminal to a load; an inverter coupled to the first input terminal and the first output terminal; a first sensor configured to detect a voltage at an output terminal of the inverter; a second sensor configured to detect a voltage at the first input terminal; a bypass switch coupled to the first input terminal and the first output terminal; and a controller coupled to the bypass switch, the first sensor and the second sensor, and the controller is configured to: use at least one of the first sensor and the second sensor to determine a first voltage difference across the bypass switch; apply a high-pass filter to the first voltage difference to obtain a first filtered voltage difference; determine whether a value obtained from the first filtered voltage difference exceeds a threshold; and output an indication of a fault of the bypass switch based on a value obtained from the first filtered voltage difference and exceeding the threshold.

[0011] In at least one example, the controller is further configured to: determine an absolute value of the first filtered voltage difference; and sum the absolute value of the first filtered voltage difference with an array of one or more filtered voltage differences to determine a first absolute value voltage sum. In various examples, the controller is further configured to: determine that the first absolute value voltage sum does not exceed the threshold; add the first filtered voltage difference to an array of one or more filtered voltage differences; use at least one of the first sensor and the second sensor to determine a second voltage difference across the bypass switch; apply the high pass filter to the second voltage difference to obtain a second filtered voltage difference; determine an absolute value of the second filtered voltage difference; sum the absolute value of the second filtered voltage difference with an array of one or more filtered voltage differences to determine a second absolute value voltage sum; determine that the second absolute value voltage sum exceeds the threshold; and output the indication of the fault of the bypass switch based on the second absolute value voltage sum exceeding the threshold. In some examples, the bypass switch includes at least one silicon controlled rectifier.

[0012] In various examples, the bypass switch includes a first thyristor and a second thyristor, the second thyristor being coupled in anti-parallel to the first thyristor. In at least one example, the controller is further configured to: determine a second voltage difference across the bypass switch using at least one of the first sensor and the second sensor; determine whether the first thyristor or the second thyristor is forward biased based on the second voltage difference; apply the high pass filter to the second voltage difference to obtain a second filtered voltage difference; determine whether a value obtained from the second filtered voltage difference exceeds the threshold; and output an indication of a fault of at least one of the first thyristor and the second thyristor based on the second filtered voltage difference exceeding the threshold. In some examples, the controller is further configured to: control the inverter and the bypass switch in response to determining that the value obtained from the first filtered voltage difference exceeds the threshold to change a mode of operation. BRIEF DESCRIPTION OF THE DRAWINGS

[0013] Various aspects of at least one embodiment are discussed below with reference to the accompanying drawings, which are not intended to be drawn to scale. The included drawings provide illustration and further understanding of various aspects and embodiments, and the drawings are incorporated into and constitute a part of this specification, but are not intended to define limitations of the invention. The drawings, together with the remainder of the specification, are used to explain the principles and operation of the described and claimed aspects and embodiments. In the drawings, each identical or nearly identical component shown in each figure is represented by a like number. For clarity, not every component may be labeled in every figure. In the drawings:

[0014] Figure 1 A block diagram illustrating an uninterruptible power supply (UPS) according to an example is shown.

[0015] Figure 2 The display illustrates the process of controlling the UPS according to an example.

[0016] Figure 3 A graph illustrating voltage values ​​according to an example is shown.

[0017] Figure 4 A graph illustrating a filtered voltage according to an example is shown.

[0018] Figure 5 A graph illustrating filtered voltage summation according to an example is shown. DETAILED DESCRIPTION

[0019] The examples of the methods and systems discussed herein are not limited in application to the following description or the configuration details and arrangement of components shown in the accompanying drawings. The methods and systems can be implemented in other embodiments and can be practiced or executed in various ways. The examples of specific embodiments provided herein are for illustrative purposes only and are not intended to be limiting. In particular, the actions, components, elements, and features discussed in conjunction with any one or more examples are not excluded from similar effects in any other examples.

[0020] In addition, the wording and terms used herein are for descriptive purposes and should not be considered limiting. Any reference to the examples, embodiments, components, elements, or actions of the systems and methods mentioned herein in the singular may also include multiple embodiments, and any reference to any embodiment, component, element, or action in the plural form herein may also include only singular embodiments. References in the singular or plural form are not intended to limit the currently disclosed systems or methods, their components, actions, or elements. The use of "including," "comprising," "having," "containing," "involving," and variations thereof herein is intended to cover the items listed thereafter and their equivalents and other items.

[0021] References to "or" may be interpreted as inclusive, such that any term described using "or" may indicate any of a single, more than one, and all of the terms described. Additionally, in the event of an inconsistency in the usage of a term between this document and a document incorporated by reference, the usage of the term in the incorporated reference supplements this document. For inconsistencies, the usage of the term in this document controls.

[0022] As described above, some systems may include uninterruptible power supplies (UPS) configured to provide regulated, uninterrupted power to one or more loads. The UPS may operate in one of a plurality of modes. As discussed in more detail below, some UPS may operate in a hybrid mode in which power is provided to the UPS output to a load substantially simultaneously through at least two paths. In a first path, power is efficiently provided through a bypass switch with minimal loss from an input power source to an output terminal, the bypass switch bypassing a power conditioning circuit including a rectifier, an energy storage device, and an inverter. In a second path, power is provided through the inverter via the power conditioning circuit to provide power factor correction for a load coupled to the UPS.

[0023] The bypass switch may include two silicon-controlled rectifiers (SCRs) coupled to each other in an anti-parallel arrangement. If a fault condition occurs in one or both of the SCRs such that the SCRs are no longer able to operate in an expected manner, the performance of the UPS may be negatively impacted. For example, if the UPS is operating in a hybrid mode, but one or both of the SCRs are unable to operate properly, additional power may be provided from a second path (i.e., via a power conditioning circuit) to compensate for the lack or insufficiency of power provided from the first path via the bypass switch. Therefore, it may be advantageous to identify a fault condition of one or more SCRs so that power inefficiencies can be detected and corrected.

[0024] In various examples, a fault condition of one or more SCRs is identified by comparing the harmonic signal level at the input of the one or more SCRs with the harmonic signal level at the output of the one or more SCRs. If the one or more SCRs are operating in an expected state (i.e., not faulty), harmonics present at an input will typically appear at an output because power containing harmonics is conducted from the input to the output through the one or more SCRs. Conversely, if one or more SCRs fail and fail to conduct normally, harmonics may be present at the input, but harmonics may not be present at the output, and vice versa, because power with harmonics is not conducted through the one or more SCRs. Therefore, a fault condition in one or more SCRs can be at least partially detected by analyzing the difference in harmonics at the input and output of the one or more SCRs. If the difference between the input and output harmonics is large enough, an SCR fault condition can be detected.

[0025] According to at least one example, a fault condition of one or more SCRs is monitored. A voltage signal at an input terminal of one or more SCRs and a voltage signal at an output terminal of one or more SCRs are detected, and a difference between the voltage signals is determined. A high pass filter is applied to the difference between the voltage signals to isolate higher harmonics in the voltage signal. An absolute value of the filtered signal is determined. Samples of the absolute value of the filtered signal are added over a time period. It is determined whether the sum over the time period meets a criterion (e.g., reaches a threshold). If the sum meets the criterion, a fault condition is detected. In response to detecting the fault condition, one or more actions can be performed (e.g., changing a mode of a UPS having implemented the SCRs from a hybrid mode to an online double conversion mode). Otherwise, if the sum does not meet the criterion, the fault condition is not detected. The process of monitoring the fault condition can be repeated thereafter.

[0026] Figure 11 is a block diagram of a UPS. The UPS 100 includes an input terminal 102, an AC / DC converter 104, one or more DC (direct current) buses 106, a DC / DC converter 108, an energy storage device 110 that may include one or more batteries, a controller 112, a DC / AC inverter 114, an output terminal 116, and a bypass switch 118, wherein the bypass switch 118 includes a first SCR 120a and a second SCR 120b (collectively referred to as "SCR 120"). The controller 112 may include one or more sensors 122. Similarly, the bypass switch 118 may include one or more sensors 124. For example, the sensors 122, 124 may include one or more voltage, current and / or power sensors.

[0027] The input terminal 102 is coupled to the AC / DC converter 104 and the bypass switch 118, and the input terminal 102 is configured to be coupled to an AC (alternating current) power source (not shown), such as an AC mains power source. The AC / DC converter 104 is coupled to the input terminal 102 and the one or more DC buses 106, and is communicatively coupled to the controller 112. The one or more DC buses 106 are coupled to the AC / DC converter 104, the DC / DC converter 108, and the DC / AC inverter 114. The DC / DC converter 108 is coupled to the one or more DC buses 106 and the energy storage device 110, and is communicatively coupled to the controller 112. The energy storage device 110 is coupled to the DC / DC converter 108. The DC / AC inverter 114 is coupled to the one or more DC buses 106 and the output terminal 116, and is communicatively coupled to the controller 112. The output terminal 116 is coupled to the DC / AC inverter 114 and the bypass switch 118 , and is configured to be coupled to an external load (not shown). The bypass switch 118 is coupled to the input terminal 102 and the output terminal 116 , and is coupled in parallel with the components 104 - 110 and 114 .

[0028] The one or more sensors 122 are configured to be coupled to one or more of the components 104, 108, 110, 114, and 118, and sense electrical parameters (e.g., current, voltage, and / or power) of the components. For example, the one or more sensors 122 may include a first voltage sensor and a second voltage sensor coupled to the input and output of the bypass switch 118, respectively. The one or more sensors 124 are configured to be coupled to one or more components or nodes of the bypass switch 118, and sense electrical parameters (e.g., current, voltage, and / or power) of the components or nodes. For example, the one or more sensors 124 may include a first voltage sensor and a second voltage sensor coupled to the input and output of the bypass switch 118, respectively. The input terminal 102 is configured to be coupled to an AC main power source and receive input AC power having an input voltage level. The UPS 100 is configured to operate in different modes based at least in part on the input voltage level of the AC power provided to the input terminal 102. More specifically, the controller 112 is configured to control the operation of the UPS 100 based at least in part on the input voltage level of the AC power provided to the input terminal 102. When the AC power provided to the input terminal 102 is acceptable (e.g., by making parameters such as voltage level meet specified values), the UPS 100 can be operated in a hybrid mode. In the hybrid mode, the AC power received at the input terminal 102 will be provided to the bypass switch 118 and the AC / DC converter 104 at the same time.

[0029] The power provided to the bypass switch 118 through the input terminal 102 is provided from the bypass switch 118 to the output terminal 116, which can provide power to a load. More specifically, power is provided to the output terminal 116 via one of the two SCRs 120. For example, the SCRs 120 can be coupled to each other by an anti-parallel configuration so that only one of the two SCRs 120 is configured to be set to forward bias at any time. If the SCRs 120 operate as expected in the hybrid mode, during the positive half cycle of the input voltage waveform received at the input terminal 102, the second SCR 120b is controlled by the controller to be turned on and forward biased, and the SCR 120a is reverse biased and non-conductive. Conversely, during the negative half cycle of the input voltage waveform received at the input terminal 102, the first SCR 120a is controlled by the controller to be turned on and forward biased and conductive, and the second SCR 120b is reverse biased and non-conductive.

[0030] The power provided to the AC / DC converter 104 during the hybrid mode operation can be used to compensate for the harmonics generated by the load in the power provided by the bypass switch 118. More specifically, the AC / DC converter 104 converts the AC power received from the input terminal 102 into DC power and provides the DC power to the one or more DC buses 106. The one or more DC buses 106 distribute the DC power to the DC / DC converter 108 and the DC / AC inverter 114. The DC / DC converter 108 converts the received DC power and provides the converted DC power to the energy storage device 110 to charge the energy storage device 110. The DC / AC inverter 114 receives the DC power from the one or more DC buses 106, converts the DC power into regulated AC power, and provides the regulated AC power to the output terminal 116 together with the power provided by the bypass switch 118. The power provided by the DC / AC inverter 114 can compensate for the harmonics in the power provided by the bypass switch 118.

[0031] In various examples, the UPS 100 can be operated in double conversion mode even if the AC power provided to the input terminal 102 has an acceptable voltage level (e.g., by making a parameter, such as a voltage level, satisfy a specified value). In the double conversion mode of operation, the AC power received at the input terminal 102 is provided to the AC / DC converter 104. In the double conversion mode of operation, the bypass switch 118 is disconnected. However, similar to the hybrid mode of operation, the AC / DC converter 104 converts the AC power received from the input terminal 102 into DC power and provides the DC power to the one or more DC buses 106. The one or more DC buses 106 distribute the DC power to the DC / DC converter 108 and the DC / AC inverter 114. The DC / DC converter 108 converts the received DC power and provides the converted DC power to the energy storage device 110 to charge the energy storage device 110. The DC / AC inverter 114 receives DC power from the one or more DC buses 106, converts the DC power into regulated AC power, and provides the regulated AC power to the output terminal 116. Therefore, the power provided to the output terminal 116 is mainly provided by the DC / AC inverter 114.

[0032] When the AC power provided to the input terminal 102 from the AC main power source is unacceptable (for example, by causing parameters such as voltage levels not to meet specified values), the UPS 100 operates in a backup mode. In the backup mode, DC power is discharged from the energy storage device 110 to the DC / DC converter 108. The DC / DC converter 108 converts the received DC power and distributes the DC power between the one or more DC buses 106. The one or more DC buses 106 provide the received power to the DC / AC inverter 114. The DC / AC inverter 114 receives DC power from the one or more DC buses 106, converts the DC power into regulated AC power, and provides the regulated AC power to the output terminal 116. In some embodiments, in addition to one or more alternative modes of operation, all or part of the above modes can be implemented for operation.

[0033] Thus, the mode of operation of the UPS 100 can be selected from a list of operations including a hybrid mode, a double conversion mode, a standby mode, and a bypass mode. In bypass mode operation, all power is provided to the load through the bypass switch. For example, the controller 112 can select the mode of operation based on one or more parameters (including, for example, the voltage level of the input power) and control the operation of the AC / DC converter 104, the DC / DC converter 108, the DC / AC inverter 114, and the bypass switch 118 according to the selected operating mode.

[0034] However, in various examples, it may be disadvantageous to operate the UPS 100 in a mixed mode in which one or both of the SCRs 120 are in a faulty state. A fault condition may include any condition or state of the corresponding SCR that negatively affects the performance of the corresponding SCR. For example, an SCR that fails to conduct even when forward biased may be considered to be failing. In this example, the operation of the UPS 100 may be adversely affected by the fault condition, at least because the bypass switch 118 may be unable to conduct the required amount of electricity, thereby requiring the DC / AC inverter 114 to compensate for the reduction in power, which may negatively affect the efficiency of the UPS 100. Therefore, it may be beneficial to detect a fault condition in one or both of the SCRs 120 so that the fault condition can be addressed to improve the performance of the UPS 100.

[0035] Figure 2 The display illustrates a process 200 for operating the UPS 100 according to an example. In various examples, the process 200 may be performed by the controller 112. For example, the process 200 may be performed by the controller 112 during a hybrid mode of operation.

[0036] At act 202, the process 200 begins.

[0037] At act 204, an input voltage and an output voltage of the bypass switch 118 are detected. The controller 112 may include or be coupled to one or more voltage sensors configured to measure a voltage at the input of the bypass switch 118 and a voltage at the output of the bypass switch 118. For example, the controller 112 may include one or more sensors 122 and may be coupled to one or more sensors 124. As used herein, the input of the bypass switch 118 may refer to a node of a cathode of the first SCR 120a and an anode of the second SCR 120b, but in other examples, the input of the bypass switch 118 may refer to a node of an anode of the first SCR 120a and a cathode of the second SCR 120b. Similarly, the output of the bypass switch 118 may refer to the node of the anode of the first SCR 120a and the cathode of the second SCR 120b, although in other examples, the output of the bypass switch 118 may refer to the node of the cathode of the first SCR 120a and the anode of the second SCR 120b, depending on which node is identified as the input of the bypass switch 118. That is, a node cannot be both an input and an output at the same time.

[0038] In act 206, a voltage difference is determined. The controller 112 may determine the difference between the input voltage and the output voltage detected in act 204. For example, Figure 3 A graph 300 illustrating voltage values ​​according to an example is shown, the graph 300 including an input voltage trace 302, an output voltage trace 304, and a voltage difference trace 306. Although the difference between the input voltage trace 302 and the output voltage trace 304 is small and relatively difficult to visually detect, the voltage difference trace 306 shows a voltage difference signal between the input voltage trace 302 and the output voltage trace 304. As shown in the voltage difference trace 306, until a first time 308, the time difference between the input voltage and the output voltage is generally sinusoidal with a frequency approximately equal to the grid frequency (approximately 60 Hz). At the first time 308, at least one of the SCRs 120 experiences a fault condition, and higher harmonics typically pass through at least one of the SCRs 120 and by performing a voltage difference operation, the offsetting voltage difference appears in the voltage difference trace 306.

[0039] In action 208, the voltage difference is filtered to determine a filtered voltage difference. For example, the controller 112 may perform a high pass filtering technique on the voltage difference determined in action 206. More specifically, the high pass filtering technique may filter signals below a threshold frequency selected to isolate higher harmonics. The threshold frequency may be twice the grid frequency. For example, in the case where the grid frequency is 60 Hz, as described above with respect to Figure 3 As discussed, the threshold frequency may be 120 Hz. Figure 4 A graph 400 of a filtered voltage signal according to an example is shown, the graph 400 including a filtered voltage signal trace 402. The filtered voltage signal trace 402 includes a plurality of data points, each data point representing a filtered voltage difference determined at a corresponding time. Figure 3 As discussed, at least one SCR 120 experiences a fault condition at the first time 308 , after which higher harmonics are more substantially present in the voltage difference across the at least one SCR 120 .

[0040] At act 210, an absolute value of the filtered voltage difference is determined. Determining the absolute value of the filtered voltage difference includes determining a magnitude of the filtered voltage difference.

[0041] In action 212, the absolute values ​​of the filtered voltage differences are added to an array and summed over time to produce a value derived from the filtered voltage differences, also referred to herein as an absolute value voltage sum. The array includes a plurality of elements, each element being an absolute value of the filtered voltage differences determined at a respective point in time. When each absolute value of a respective filtered voltage difference is determined, the absolute value is added to the other elements in the array and summed. As described above, in the presence of higher harmonics, the absolute values ​​of the respective filtered voltage differences may be larger. For example, the extreme values ​​of the filtered voltage signal trace 402 after the first time 308 are typically greater than the extreme values ​​of the filtered voltage signal trace 402 before the first time 308. Therefore, before the first time 308 (i.e., before at least one of the SCRs 120 encounters a fault condition), the absolute values ​​of the filtered voltage differences and therefore the sum of the array may be relatively small, and may be relatively large after the first time 308.

[0042] For example, Figure 5 A graph 500 illustrating a filtered voltage sum according to an example is shown, the graph 500 including a filtered voltage sum trace 502. The filtered voltage sum trace 502 represents the sum of the array discussed above over time. As indicated by the filtered voltage trace 502, the sum value increases rapidly after the first time 308 as at least one SCR 120 experiences a fault condition and harmonics are more prominently present in the voltage difference.

[0043] At act 214, it is determined whether the sum (i.e., the value derived from the filtered voltage difference) satisfies a fault detection criterion. For example, the fault detection criterion may include a threshold above which a fault condition is determined to have occurred. The threshold may be selected such that the sum exceeds a threshold at which at least one SCR 120 is intended to operate in a closed state and the conduction mode of operation experiences a fault, thereby generating higher harmonics in the voltage difference. Similarly, the threshold may also be selected such that the sum does not exceed a threshold at which at least one SCR 120 does not experience a fault condition, thereby canceling out the higher harmonics in the voltage difference. If it is determined that the sum satisfies the fault detection criterion (214 Yes), the process 200 continues to perform act 216.

[0044] At act 216, a fault condition is detected. As described above, it may be determined that a fault condition has occurred based on an imbalance of higher harmonics between the input and output of the at least one SCR 120. Thus, at least due to the at least one SCR 120 failing to conduct normally, the at least one SCR 120 may be identified as being in a faulty state, as evidenced by the imbalance of higher harmonics of the at least one SCR 120.

[0045] Identifying a fault condition may include determining which SCR 120 is experiencing the fault condition. Because only one SCR 120 may be forward biased at any one time, it may be determined which SCR 120 should be assumed to be operating when a fault condition is detected, but detection of a fault condition does not determine whether the SCR 120 is operating. For example, the controller 112 may be configured to control the respective states of the SCRs 120a, 120b, and thus may already have readily available information indicating the operating mode of the SCRs 120a, 120b. In one example, determining which of the SCRs 120a, 120b should be operated includes determining which of the SCRs 120a, 120b has a higher anode voltage, and identifying the SCR as being forward biased. Thus, identifying a fault condition may more specifically include determining whether the first SCR 120a or the second SCR 120b is experiencing the fault condition.

[0046] In response to detecting the fault condition, the operating mode of the UPS 100 is changed at action 218. Because at least one SCR 120 is not operating properly, the hybrid mode of operation may not be able to operate at a desired efficiency level. Therefore, the operating mode of the UPS 100 can be changed from the hybrid mode to another operating mode, such as a double conversion mode, a standby mode, or another operating mode.

[0047] At act 220, an indication of the fault condition is output. For example, act 222 may include transmitting one or more signals to one or more internal devices or external devices via a wired or wireless connection. The internal device may include, for example, a display coupled to the UPS 100 to provide information to one or more operators of the UPS 100. The external device may include, for example, one or more user devices, such as a computer, laptop, tablet, cellular phone, etc., to provide information to one or more operators of the UPS 100. The parties receiving the information may then act on the indication, such as by replacing the SCR that has been identified as experiencing a fault condition.

[0048] At act 222, process 200 ends.

[0049] Returning to act 214, if it is determined that the sum does not meet the criteria (214 No), the process 200 continues to act 224. At act 224, it is determined whether the array storing the voltage values ​​is full. Since even small voltage differences identified before a fault condition occurs may eventually sum to a large value sufficient to meet the fault detection criteria, the array has a selected finite size, so it is unlikely that the array contains voltage differences small enough to meet the fault detection criteria. If the array is full (224 Yes), the process 200 ends at act 222. Otherwise, if the array is not full (224 NO), then the process 200 returns to act 204 and repeats acts 204-214 and 224 until the sum meets the criteria (214 Yes) or the array is filled (224 Yes).

[0050] In various examples, a delay can be implemented after determining that the array is not full (224 No). For example, the UPS 100 can be configured to perform actions 204-214 at a frequency of approximately 2 kHz, and a delay can be implemented after determining that the array is not full (224 No). This can achieve a sampling frequency of 2 kHz. In other examples, any other desired frequency can be achieved by implementing a delay period.

[0051] In at least one example, the size of the array is 100 elements. In an example where the size of the array is 100 elements and the UPS 100 operates at a sampling frequency of approximately 2 kHz, a fault condition may be detected within 50 milliseconds (i.e., the time required to sample 100 elements at 2 kHz).

[0052] In various examples, each SCR 120 may be associated with a dedicated circuit so that a fault condition of either of the individual SCRs 120a, 120b may be detected, rather than detecting a fault condition of the bypass switch 118 as is conventional. For example, each SCR 120a, 120b may be associated with a dedicated high pass filter and a summing array so that information indicating a fault condition of one of the SCRs 120a, 120b does not affect the determination of a fault condition of the other of the SCRs 120a, 120b. In these examples, in performing the process 200, the process may include additional actions. For example, after determining the input voltage and the output voltage at action 204, the controller 112 may determine which of the SCRs 120a, 120b is forward biased (i.e., which of the SCRs 120a, 120b experiences a voltage drop from its anode to its cathode). The determination may be based on the measurement of the input voltage and the output voltage at action 204. When subsequently outputting a fault indication at act 220 , the controller 112 may more specifically output an indication as to which of the SCRs 120 a , 120 b is experiencing a fault.

[0053] Although certain examples have been provided with respect to SCRs, it should be understood that the principles of the present invention are applicable to other devices, such as other types of voltage-controlled switches. Similarly, although certain examples have been provided with respect to UPS systems, it should be understood that the principles of the present invention are applicable to other systems, such as power systems, in which devices such as SCRs may be implemented.

[0054] Various controllers such as the controller 112 can perform the various operations discussed above. Using data stored in an associated memory, the controller 112 also executes one or more instructions stored on one or more non-transitory computer-readable media, which may result in manipulated data. In some examples, the controller 112 may include one or more processors or other types of controllers. In one example, the controller 112 is or includes a commercially available general-purpose processor. In another example, the controller 112 uses a dedicated integrated circuit designed to perform specific operations in addition to or instead of a general-purpose processor to perform at least a portion of the above operations. As shown in these examples, many specific combinations of hardware and software can be used according to examples of the present invention to perform the operations described herein, and the present invention is not limited to any specific combination of hardware and software components.

[0055] In various examples, one or more actions of the process 200 may be optionally performed. For example, one or more of actions 210, 212, 218, and 224 may be optionally not performed in various examples of the process 200. In other examples, each action discussed above with respect to the process 200 is performed.

[0056] Thus, having described at least one embodiment of the present invention, various changes, modifications and improvements will be readily apparent to those skilled in the art. Such changes, modifications and improvements are intended to be a part of the present invention and are within the spirit and scope of the present invention. Therefore, the foregoing description and accompanying drawings are intended only as examples.

Claims

1. An uninterruptible power supply, characterized in that: The uninterruptible power supply comprises: a first input terminal configured to receive input power; a backup input terminal configured to receive backup power from a backup power source; an output terminal configured to provide output power to a load, wherein the output power is obtained from at least one of the input power and the backup power; an inverter coupled to the first input terminal, the standby input terminal and the output terminal; a first sensor configured to detect a voltage at an output terminal of the inverter; a second sensor configured to detect a voltage at the first input terminal; a bypass switch coupled to the first input terminal and the output terminal; and a controller coupled to the bypass switch, the first sensor, and the second sensor, and the controller is configured to: determining a first voltage difference across the bypass switch using the first sensor and the second sensor; applying a high pass filter to the first voltage difference to obtain a first filtered voltage difference; determining whether a value obtained from the first filtered voltage difference exceeds a threshold; and An indication of a fault of the bypass switch is output based on a value derived from the first filtered voltage difference and exceeding the threshold.

2. The uninterruptible power supply as claimed in claim 1, wherein: The controller is also configured to: determining an absolute value of the first filtered voltage difference; and summing the absolute value of the first filtered voltage difference with an array of one or more filtered voltage differences to produce a value derived from the first filtered voltage difference, the value derived from the first filtered voltage difference being a first absolute value voltage sum; Determining that the first absolute value voltage sum does not exceed the threshold; adding the first filtered voltage difference to an array of one or more filtered voltage differences; determining a second voltage difference across the bypass switch using at least one of the first sensor and the second sensor; applying the high pass filter to the second voltage difference to obtain a second filtered voltage difference; determining an absolute value of the second filtered voltage difference; summing the absolute value of the second filtered voltage difference with an array of one or more filtered voltage differences to determine a second absolute value voltage sum; determining that the second absolute value voltage sum exceeds the threshold; and The indication of the fault of the bypass switch is output based on the second absolute value voltage sum exceeding the threshold.

3. The uninterruptible power supply as claimed in claim 1, wherein: The bypass switch includes at least one silicon controlled rectifier.

4. The uninterruptible power supply as claimed in claim 1, wherein: The bypass switch includes a first thyristor rectifier and a second thyristor rectifier, wherein the second thyristor rectifier is anti-parallel coupled to the first thyristor rectifier.

5. The uninterruptible power supply as claimed in claim 4, characterized in that: The controller is also configured to: determining a second voltage difference across the bypass switch using at least one of the first sensor and the second sensor; determining whether the first thyristor or the second thyristor is forward biased based on the second voltage difference; applying the high pass filter to the voltage difference to obtain a second filtered voltage difference; determining whether a value obtained from the second filtered voltage difference exceeds the threshold; and An indication of a fault of at least one of the first thyristor and the second thyristor is output based on the second filtered voltage difference exceeding the threshold.

6. The uninterruptible power supply as claimed in claim 1, wherein: The controller is also configured to: The inverter and the bypass switch are controlled in response to determining that a value derived from the first filtered voltage difference exceeds the threshold value to change a mode of operation.

7. A non-transitory computer-readable medium having stored thereon a sequence of computer-executable instructions for controlling an electric device, the electric device having an input terminal and an output terminal, the input terminal being configured to be coupled to an AC power source and configured to receive AC power from the AC power source, the output terminal being configured to provide AC power to a load, the electric device comprising an inverter, a first sensor, a second sensor, and a bypass switch, the inverter being coupled to the input terminal and the output terminal, the first sensor being configured to detect a voltage at an output terminal of the inverter, the second sensor being configured to detect a voltage at the input terminal, the bypass switch being coupled between the input terminal and the output terminal, characterized in that: The computer executable instruction sequence includes a plurality of instructions, wherein the plurality of instructions instruct at least one processor to execute: determining a first voltage difference across the bypass switch using the first sensor and the second sensor; applying a high pass filter to the first voltage difference to obtain a first filtered voltage difference; determining whether a value obtained from the first filtered voltage difference exceeds a threshold; and An indication of a fault of the bypass switch is output based on a value derived from the first filtered voltage difference and exceeding the threshold.

8. The non-transitory computer readable medium of claim 7, wherein: The plurality of instructions further instruct the at least one processor to execute: determining an absolute value of the first filtered voltage difference; and summing the absolute value of the first filtered voltage difference with an array of one or more filtered voltage differences to produce a value derived from the first filtered voltage difference, the value derived from the first filtered voltage difference being a first absolute value voltage sum; Determining that the first absolute value voltage sum does not exceed the threshold; adding the first absolute value voltage sum to an array of one or more filtered voltage differences; determining a second voltage difference across the bypass switch; applying the high pass filter to the second voltage difference to obtain a second filtered voltage difference; determining an absolute value of the second filtered voltage difference; summing the absolute value of the second filtered voltage difference with an array of one or more filtered voltage differences to determine a second absolute value voltage sum; determining that the second absolute value voltage sum exceeds the threshold; and The indication of the fault of the bypass switch is output based on the second absolute value voltage sum exceeding the threshold.

9. The non-transitory computer readable medium of claim 8, wherein: The plurality of instructions further instruct the at least one processor to execute: The inverter and the bypass switch are controlled in response to determining that the second filtered voltage difference exceeds the threshold to change a mode of operation.

10. The non-transitory computer readable medium of claim 7, wherein: The bypass switch includes a first thyristor rectifier and a second thyristor rectifier, wherein the second thyristor rectifier is anti-parallel coupled to the first thyristor rectifier, and the plurality of instructions further instruct the at least one processor to execute: determining a second voltage difference across the bypass switch using at least one of the first sensor and the second sensor; determining whether the first thyristor or the second thyristor is forward biased based on the second voltage difference; applying the high pass filter to the second voltage difference to obtain a second filtered voltage difference; determining whether a value obtained from the second filtered voltage difference exceeds the threshold; and An indication of a fault of at least one of the first thyristor and the second thyristor is output based on the second filtered voltage difference exceeding the threshold.

11. The non-transitory computer readable medium of claim 10, wherein: The first thyristor and the second thyristor each include an anode, and when instructing the at least one processor to determine whether the first thyristor or the second thyristor is forward biased based on the second voltage difference, the plurality of instructions instruct the at least one processor to execute: determining whether a voltage at an anode of the first thyristor is higher than a voltage at an anode of the second thyristor based on the second voltage difference; and In response to the voltage at the anode of the first silicon thyristor being higher than the voltage at the anode of the second silicon thyristor, the first silicon thyristor is identified as being forward biased.

12. A power system, characterized in that: The power system comprises: a first input terminal configured to receive input power; a first output terminal configured to provide output power from the first input terminal to a load; an inverter coupled to the first input terminal and the first output terminal; a first sensor configured to detect a voltage at an output terminal of the inverter; a second sensor configured to detect a voltage at the first input terminal; a bypass switch coupled to the first input terminal and the first output terminal; and a controller coupled to the bypass switch, the first sensor, and the second sensor, and the controller is configured to: determining a first voltage difference across the bypass switch using the first sensor and the second sensor; applying a high pass filter to the first voltage difference to obtain a first filtered voltage difference; determining whether a value obtained from the first filtered voltage difference exceeds a threshold; and An indication of a fault of the bypass switch is output based on a value derived from the first filtered voltage difference and exceeding the threshold.

13. The power system according to claim 12, characterized in that: The controller is also configured to: determining an absolute value of the first filtered voltage difference; and summing the absolute value of the first filtered voltage difference with an array of one or more filtered voltage differences to determine a first absolute value voltage sum; Determining that the first absolute value voltage sum does not exceed the threshold; adding the first filtered voltage difference to an array of one or more filtered voltage differences; determining a second voltage difference across the bypass switch using at least one of the first sensor and the second sensor; applying the high pass filter to the second voltage difference to obtain a second filtered voltage difference; determining an absolute value of the second filtered voltage difference; summing the absolute value of the second filtered voltage difference with an array of one or more filtered voltage differences to determine a second absolute value voltage sum; determining that the second absolute value voltage sum exceeds the threshold; and The indication of the fault of the bypass switch is output based on the second absolute value voltage sum exceeding the threshold.

14. The power system according to claim 12, characterized in that: The bypass switch includes at least one silicon controlled rectifier.

15. The power system according to claim 12, characterized in that: The bypass switch includes a first thyristor rectifier and a second thyristor rectifier, wherein the second thyristor rectifier is anti-parallel coupled to the first thyristor rectifier.

16. The power system according to claim 15, characterized in that: The controller is also configured to: determining a second voltage difference across the bypass switch using at least one of the first sensor and the second sensor; determining whether the first thyristor or the second thyristor is forward biased based on the second voltage difference; applying the high pass filter to the second voltage difference to obtain a second filtered voltage difference; determining whether a value obtained from the second filtered voltage difference exceeds the threshold; and An indication of a fault of at least one of the first thyristor and the second thyristor is output based on the second filtered voltage difference exceeding the threshold.

17. The power system according to claim 12, characterized in that: The controller is also configured to: The inverter and the bypass switch are controlled in response to determining that a value derived from the first filtered voltage difference exceeds the threshold value to change a mode of operation.

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