Chip mounting device and method for manufacturing semiconductor device

Abstract

The present invention provides a chip mounting device for mounting a semiconductor chip (bare chip) on a substrate with high positioning accuracy on a substrate without additional markings. The chip mounting device is configured to recognize and measure the position of a characteristic portion of the outer shape of the substrate using a camera device, save the measured position as an initial position, define a reference position based on the measured position, and sequentially mount the bare chips using a mounting head using the reference position as a reference.

Description

Technical Field

[0001] The present disclosure relates to a chip mounting device, which can be applied to, for example, bare chip placement for fan-out panel level packaging or fan-out wafer level packaging. Background Art

[0002] In the field of electronic component installation, there is a process that forms a sealing body having a plurality of semiconductor chips and a sealing resin covering the plurality of semiconductor chips by sealing a plurality of semiconductor chips formed on a temporary substrate and arranged on an adhesive layer on the temporary substrate with a sealing resin, peels off the temporary substrate including the adhesive layer from the sealing body, and then forms a rewiring layer on the surface of the adhesive layer to which the sealing body is attached. In this case, the bonding accuracy of the rewiring layer and the semiconductor chip depends on the positioning accuracy of the chip on the temporary substrate. Therefore, it is necessary to have positioning accuracy when mounting the semiconductor chip on the temporary substrate.

[0003] Prior art literature

[0004] Special document 1: Japanese Patent Publication No. 2014-45013

[0005] Special document 2: JP Patent Publication No. 2018-133353

[0006] By attaching a positioning correction mark of the mounting target position to the temporary substrate and using the mark position to correct the mounting positioning position, the positioning accuracy of the semiconductor chip relative to the temporary substrate during temporary fixation can be improved. However, the position where the mark is attached to the temporary substrate is determined according to the structure or size of the semiconductor chip and the final configuration relationship between the semiconductor chip and the sealing body. In other words, it is necessary to prepare a temporary substrate with a mark based on the structure or size of the final product and the prescribed component configuration. Therefore, since multiple temporary substrates with prescribed marks must be produced for each product, there is a problem of rising costs. Summary of the invention

[0007] An object of the present disclosure is to provide a die mounting device that mounts a semiconductor chip (bare chip) on a substrate to which no mark is attached with high positioning accuracy.

[0008] The typical outline of the present disclosure is briefly described below.

[0009] That is, the chip mounting device is configured to use a camera device to identify and measure the position of a characteristic portion of the substrate's outer shape, save the measured position as an initial position, define a reference position based on the measured position, and use the reference position as a reference to sequentially mount bare chips using a mounting head.

[0010] Effects of the Invention

[0011] According to the above-mentioned chip mounting device, the accuracy of bare chip placement can be improved. BRIEF DESCRIPTION OF THE DRAWINGS

[0012] Figure 1 It is a diagram showing an overview of a die mounting device in an embodiment.

[0013] Figure 2 It is a top view showing the substrate in the first embodiment.

[0014] Figure 3 Yes Description Figure 2 Top view of the calculation of the center of the substrate.

[0015] Figure 4 It is a plan view showing a state where a bare chip is mounted with the center of the substrate as a reference.

[0016] Figure 5 It is a top view for explaining the expansion and contraction of the substrate.

[0017] Figure 6 This is a plan view showing a state in which the expansion and contraction of the substrate is corrected and the bare chip is mounted with the center of the substrate as a reference.

[0018] Figure 7 It is a plan view for explaining a method of calculating the center and slope of the substrate in the first modification example of the first embodiment.

[0019] Figure 8 It is a plan view for explaining a method of calculating the center and slope of the substrate in the second modification example of the first embodiment.

[0020] Fig. 9 It is a plan view for explaining a method of calculating the center and slope of the substrate in the third modification example of the first embodiment.

[0021] Fig.10 It is a plan view for explaining a method of calculating the center and slope of the substrate in the fourth modification example of the first embodiment.

[0022] Fig.11 It is a plan view for explaining a method of calculating the center and slope of the substrate in the fifth modification example of the first embodiment.

[0023] Fig.12 It is a plan view for explaining a method of calculating the center and slope of the substrate in the sixth modification example of the first embodiment.

[0024] Fig.13 It is a plan view for explaining a method of calculating the center and slope of the substrate in the seventh modification example of the first embodiment.

[0025] Fig.14It is a top view showing a mounting stage in the second embodiment.

[0026] Fig.15 It is a figure explaining the board|substrate conveyance jig in 2nd Embodiment.

[0027] Fig.16 It is a plan view for explaining the method of calculating the center of the substrate in the second embodiment.

[0028] Fig.17 It is a diagram for explaining detection of the edge of a substrate.

[0029] Fig.18 It is a diagram for explaining detection of the slope of the substrate.

[0030] Fig.19 It is a diagram for explaining a method of measuring the position of a notch.

[0031] Fig. 20 It is a plan view for explaining a method of calculating the center of a substrate in the first modified example of the second embodiment.

[0032] Fig.21 This is a diagram for explaining a method of calculating an approximate circle using the least squares method and obtaining the center (Xc, Yc) and radius (R) of the approximate circle.

[0033] Fig. 22 This is a diagram showing an equation used in a method of calculating an approximate circle using the least squares method to obtain the center (Xc, Yc) and radius (R) of the approximate circle.

[0034] Fig.23 It is a plan view for explaining a method of calculating the center and size of a substrate in the second modification example of the second embodiment.

[0035] Fig.24 It is a plan view showing a mounting stage in a third modified example of the second embodiment.

[0036] Fig.25 It is a diagram for explaining a substrate transport jig in a third modified example of the second embodiment.

[0037] Fig.26 It is a plan view showing a mounting stage in a fourth modified example of the second embodiment.

[0038] Fig. 27 It is a diagram for explaining a substrate transport jig in a fourth modified example of the second embodiment.

[0039] Fig.28 It is a plan view schematically showing a flip chip mounter in the embodiment.

[0040] Fig.29 It is explained in Fig.28The figure shows the actions of the flip chip pickup head, transfer head and placement head when viewed from the direction of arrow A.

[0041] Fig.30 It is shown Fig.28 A schematic cross-sectional view of the main parts of the bare chip supply unit.

[0042] Fig.31 It shows the use of Fig.28 Flow chart of the mounting method implemented by the flip chip mounting machine.

[0043] The accompanying drawings are described as follows:

[0044] BH: Placement head

[0045] BD: Chip Attach Device

[0046] CM: Camera

[0047] CNT: Control Device

[0048] D: Bare chip

[0049] P: Substrate

[0050] CN: Center (reference position)

[0051] CLU, CRU, CLD, CRD: Corner (characteristic part) DETAILED DESCRIPTION

[0052] Hereinafter, the embodiments, modifications and examples are described using the accompanying drawings. Here, in the following description, the same component is sometimes marked with the same reference numeral, and repeated description is omitted. In addition, in order to make the description clearer, the width, thickness, shape, etc. of each part in the drawings are sometimes schematically shown compared with the actual form, but this is only an example and does not limit the interpretation of the present invention.

[0053] Fan Out Wafer Level Package (FOWLP) is a package that forms a rewiring layer in a wide area that exceeds the chip area. Fan Out Panel Level Package (FOPLP) is a package that further breaks through the idea of ​​FOWLP's batch manufacturing method. FOWLP reduces the manufacturing cost of each package by placing multiple silicon bare chips on a wafer with a diameter of, for example, 300 mm and manufacturing the packages at the same time. FOPLP is the application of this batch manufacturing method to a panel (panel-shaped substrate) that is larger than a wafer. The panel uses a printed substrate or a glass substrate (such as a substrate for liquid crystal panel manufacturing, etc.).

[0054] There are many types of FOPLP manufacturing processes, one of which is to mount the bare chip picked up from the wafer on a panel (hereinafter referred to as the substrate) as a temporary substrate with the help of an adhesive main agent coated on the substrate and temporarily fix it, then seal it with a sealing resin, peel the sealing body from the substrate and perform rewiring or pad (PAD) formation. In this method, in order to maintain the yield and quality, it is necessary to mount the bare chip on the substrate with high precision, and high precision such as 3 to 5 μm is required due to the miniaturization and high-density wiring of the bare chip.

[0055] In order to improve the precision of manufacturing equipment, a method of aligning by pre-arranging marks on the substrate as a reference for positioning is considered. However, when the substrate is processed to form the target mark, it is difficult to reuse the substrate (as a mold) when the size of the manufactured component changes. On this basis, it costs money to form alignment marks on the substrate with an accuracy of less than 3 to 5 μm. The increase in the cost of the substrate is associated with an increase in the price of the package. Therefore, it is necessary to install the bare chip with high precision on a substrate without a mark or pattern, and the manufacturing equipment will become expensive. In order to reduce the cost of FOPLP, it is necessary to realize a manufacturing device that can be installed with high precision and at a low price.

[0056] In addition, FOPLP is very large (e.g., 515mm×510mm), and bare chips need to be mounted in large quantities with high precision of 3 to 5μm on a substrate without a positioning reference. However, sometimes, due to changes in ambient temperature, changes in substrate temperature required in the process, changes in the device over time, etc., the substrate may expand and contract during the mounting process, affecting the accuracy after mounting.

[0057] Therefore, in the embodiment of the present disclosure, the position that can be measured as the outer shape feature of the substrate, such as the corner or edge of the substrate, is identified and the reference position of the substrate is calculated, and the bare chip is mounted based on the reference position. During the mounting process of a substrate, the outer shape feature of the substrate is identified multiple times, the reference position is corrected, and the bare chip is mounted. In this way, the influence of changes such as expansion and contraction of the substrate on the mounting accuracy during the mounting process can be reduced. This embodiment can be applied to FOWLP chips in addition to the temporary substrate of FOPLP.

[0058] <First Embodiment>

[0059] The first embodiment uses FOPLP as the object to identify the corners or edges of a rectangular substrate without patterns and marks, and perform position measurement, thereby correcting the position, size, and expansion of the substrate while mounting the bare chip. Figure 1 to Figure 6 Provide explanation. Figure 1 It is a diagram showing an overview of a die mounting device in an embodiment. Figure 2It is a top view showing the substrate in the first embodiment. Figure 3 Yes Description Figure 2 Top view of the calculation of the center of the substrate. Figure 4 It is a plan view showing a state where a bare chip is mounted with the center of the substrate as a reference. Figure 5 It is a top view for explaining the expansion and contraction of the substrate. Figure 6 This is a plan view showing a state in which the bare chip is mounted with the center of the substrate as a reference while correcting the expansion and contraction of the substrate.

[0060] like Figure 1 As shown, the chip mounting device BD in the first embodiment includes: a mounting table BS for fixing a substrate P; a mounting head BH for mounting a bare chip D on the substrate P; a camera CM for photographing the bare chip D or the substrate P; and a control device CNT for controlling the mounting head BH and the camera CM. The mounting table BS has a vacuum suction mechanism for fixing the substrate P and a mechanism for heating the substrate P. The control device CNT has a CPU (not shown) and a storage device MM for storing programs or data executed by the CPU.

[0061] Below, use Figure 2 to Figure 6 The mounting method according to the first embodiment will be described.

[0062] (Step 1)

[0063] First, after the substrate P is carried to the mounting station BS of the chip mounting device BD, a position that can be measured as an outer shape feature of the substrate P such as a corner or edge of the substrate P is identified and the initial position is saved. Figure 2 As shown, the substrate P is rectangular in a plan view, one side extends in the X-axis direction, and the other side intersecting with the one side extends in the Y-axis direction.

[0064] For example, the control device CNT transports the substrate P to the mounting station BS, and immediately starts the recognition operation for the corners of the substrate P after vacuum adsorbing the substrate P. Figure 2 As shown, the control device CNT uses the camera device CM to capture at least two corners CRU, CLU, CLD, and CRD of the substrate P during the identification operation, identifies (measures) the position of the corner of the substrate P, and saves the position and distance to the storage device MM.

[0065] (Step 2)

[0066] The position (substrate reference position) of the center or corner of the substrate P, etc., which serves as a reference, is defined based on the position of the corner of the substrate P measured in step 1 .

[0067] For example, Figure 3As shown, the two points of the upper right corner CRU and the upper left corner CLU of the substrate P are identified to measure the position, the upper straight line SL1 of the substrate P is defined and calculated, and the midpoint CP1 of the two points of the corner CRU and the corner CLU is calculated. From the midpoint CP1, a straight line SL2 perpendicular to the upper straight line SL1 is calculated, and the center CN of the substrate P is calculated according to the size of the substrate P (the position of 1 / 2 of the depth dimension). The XY coordinate system on the substrate is defined by using the slope of the upper straight line SL1 with the center CN as the reference. Here, the center CN is an example of the reference position of the substrate.

[0068] (Step 3)

[0069] The position where the bare chips D are to be mounted is registered in advance based on the substrate reference position, and the bare chips D are mounted sequentially at the position.

[0070] For example, Figure 4 As shown, the position for mounting the bare chip D at the lower left is -x in the X direction and -y1 in the Y direction from the center CN as the substrate reference position, and the coordinates are (-x1, -y1). First, the control device CNT uses the mounting head BH to mount the bare chip D at the position of 16 (=4×4) previously registered.

[0071] (Step 4)

[0072] Based on a setting similar to the passage of time such as a certain time or a certain number, the initial position of the corner of the substrate P measured and registered in advance in step 1 is measured again after the period has passed, and the displacement from the initial position is measured.

[0073] For example, when the control device CNT completes mounting the bare chip D at the position 16, Figure 5 As shown, the recognition operation of the corners CRU, CLU, CLD, and CRD of the substrate P is performed in the same manner as step 1, and the center CN of the substrate P is calculated in the same manner as step 2. Figure 5 , the substrate P is reduced compared to the initial state shown by the two-dot chain line.

[0074] (Step 5)

[0075] The change in the substrate reference position, the expansion and contraction change, etc. are calculated from the measurement results in step 4, and the substrate reference position and substrate size are corrected.

[0076] For example, the control device CNT corrects the center CN of the substrate P and the size of the substrate P based on the center CN of the substrate P calculated in step 2 and the center CN of the substrate P calculated in step 4, and the size of the substrate P calculated based on the distance between the two corners calculated in step 1 and the size of the substrate P calculated based on the distance between the two corners calculated in step 4.

[0077] (Step 6)

[0078] Based on the corrected substrate reference position and substrate size information, the expansion and contraction and the slope are corrected based on the previously registered substrate reference position obtained by correcting the position for mounting the bare chip D, and the bare chip D is mounted. This allows mounting to follow changes in the substrate reference position and substrate size.

[0079] For example, the control device CNT corrects and calculates the next 16 mounting positions registered in advance based on the center CN and the substrate size calculated in step 5. The control device CNT mounts the bare chip D on the substrate P based on the corrected 16 mounting positions.

[0080] According to the embodiment, even a substrate without a mark can be mounted with higher accuracy and with reduced influence of heat shrinkage, etc. In addition, since the mounting station BS is heated, it is possible to follow the change of the reference position or the size of the substrate due to heat shrinkage, the above-mentioned step 1 can be performed regardless of the temperature when the substrate is transported to the mounting station BS. Therefore, the recognition operation does not require waiting time.

[0081] <Modification of First Embodiment>

[0082] Hereinafter, several representative variations of the first embodiment are illustrated. In the following description of the variations, the same reference numerals as those in the above embodiment are used for the parts having the same structure and function as the parts described in the above embodiment. Moreover, the description of these parts may be appropriately cited from the description in the above embodiment within the scope that does not cause technical contradictions. In addition, a part of the above embodiment and all or part of the multiple variations may be appropriately combined and applied within the scope that does not cause technical contradictions.

[0083] (First Modification)

[0084] The center and slope of the substrate P are calculated in Figure 3 There are several methods other than those shown. Figure 7 A first modification example will be described. Figure 7 It is a plan view for explaining a method of calculating the center and slope of the substrate in the first modification example of the first embodiment.

[0085] For example, Figure 7As shown, the two points of the upper right corner CRU and the upper left corner CLU of the substrate P are identified and their positions are measured, the upper straight line SL1 of the substrate P is defined and calculated, and the midpoint CP1 of the two points of the corner CRU and the corner CLU is calculated. The straight line SL2 perpendicular to the upper straight line SL1 is defined and calculated from the midpoint CP1. The two points of the upper right corner CRU and the lower right corner CRD of the substrate P are identified and their positions are measured, the right straight line SL3 of the substrate P is defined and calculated, and the midpoint CP2 of the two points of the corner CRU and the corner CRD is calculated. The straight line SL4 perpendicular to the right straight line SL3 is defined and calculated from the midpoint CP2. The intersection of the two orthogonal straight lines SL2 and SL4 is calculated as the center CN of the substrate P. The XY coordinate system on the substrate is defined using the slope of the upper straight line SL1 or the right straight line SL3 with the center CN as a reference.

[0086] (Second Modification)

[0087] use Figure 8 A second modification example will be described. Figure 8 It is a plan view for explaining a method of calculating the center and slope of the substrate in the second modification example of the first embodiment.

[0088] For example, Figure 8 As shown, the four corners CRU, CLU, CLD, and CRD of the substrate P are identified for position measurement, and two diagonal lines SL5 and SL6 are defined as straight lines connecting the diagonal corners, and the intersection of the two diagonal lines SL5 and SL6 is calculated as the center CN. The midlines SL7 and SL8 of the diagonal lines SL5 and SL6 are defined, and the XY coordinate system on the substrate is defined using the slope of the diagonal line SL7 or the diagonal line SL8 with the center CN as a reference.

[0089] (Third Modification)

[0090] use Fig. 9 A third modification example will be described. Fig. 9 It is a plan view for explaining a method of calculating the center and slope of the substrate in the third modification example of the first embodiment.

[0091] For example, Fig. 9 As shown, the edges EG1 and EG2 on the left and right sides of the substrate P are identified and their positions are measured, a straight line SL9 connecting the edges EG1 and EG2 is defined and calculated, and the midpoint CP3 of the straight line SL9 is calculated. A straight line SL10 perpendicular to the straight line SL9 is defined and calculated from the midpoint CP3. The edges EG3 and EG4 on the upper and lower sides of the substrate P on the straight line SL10 are identified and their positions are measured. The calculation is performed with the midpoint of the edges EG3 and EG4 as the center CN. The XY coordinate system on the substrate is defined using the slope of the straight line SL9 or the straight line SL10 with the center CN as the reference.

[0092] (Fourth Modification)

[0093] use Fig.10 A fourth modification example will be described. Fig.10 It is a plan view for explaining a method of calculating the center and slope of the substrate in the fourth modification example of the first embodiment.

[0094] For example, Fig.10 As shown, the edges EG5 and EG6 of the two points on the upper side of the substrate P are identified and their positions are measured, and a straight line SL11 connecting the two points of the edges EG5 and EG6 is defined, and the straight line SL11 is used as the slope of the substrate P. A straight line parallel to the straight line SL11 is defined as the point from the straight line SL11 to 1 / 2 of the width of the substrate P, and is set as the straight line SL12. The edges EG7 and EG8 on the left and right sides of the substrate P are identified on the straight line SL12 and their positions are measured, and the midpoint CP4 is calculated. A straight line passing through the midpoint CP4 and perpendicular to the straight lines SL11 and SL12 is defined as the straight line SL13. The edge EG9 of the lower side of the substrate P on the straight line SL13 is identified and its position is measured, and the distance between the straight line SL11 and the edge EG9 is calculated. The point from the intersection CP1 of the straight line SL11 and the straight line SL13 to 1 / 2 of the calculated distance between the straight line SL11 and the edge EG9 is calculated as the center CN.

[0095] (Fifth Modification)

[0096] use Fig.11 A fifth modification example will be described. Fig.11 It is a plan view for explaining a method of calculating the center and slope of the substrate in the fifth modification example of the first embodiment.

[0097] For example, Fig.11 As shown, the upper left edges EG10 and EG11 of the substrate P are identified and the intersection position is calculated to find the corner CLU of the substrate P. Next, the lower right edges EG12 and EG13 of the substrate P are identified and the intersection position is calculated to find the corner CRD of the substrate P. A straight line SL14 connecting the two corners CLU and CRD is defined, and the midpoint of the two corners CLU and CRD on the straight line SL14 is calculated, and the midpoint is set as the center CN. Using the slope of the diagonal line SL14 as a reference, the straight lines SL15 and SL16 in the XY direction are defined, and the XY coordinate system on the substrate is defined.

[0098] (Sixth Modification)

[0099] use Fig.12 A sixth modification example will be described. Fig.12 It is a plan view for explaining a method of calculating the center and slope of the substrate in the sixth modification example of the first embodiment.

[0100] For example, Fig.12 As shown, the edges EG14 and EG15 on the upper and lower sides of the substrate P are identified and their positions are measured, and the midpoint CP5 is obtained. Similarly, the edges EG16 and EG17 on both sides are identified and their positions are measured, and the midpoint CP6 is obtained. A straight line SL17 passing through the two midpoints CP5 and CP6 is defined, and the left and right edges EG18 and EG19 of the substrate P located on the straight line SL17 are identified and their positions are measured, and the midpoint is set as the center CN. The XY coordinates on the substrate are defined using the slope of the straight line SL17 with the center CN as the reference.

[0101] (Seventh Modification)

[0102] use Fig.13 A seventh modification example will be described. Fig.13 It is a plan view for explaining a method of calculating the center and slope of the substrate in the seventh modification example of the first embodiment.

[0103] For example, Fig.13 As shown, the edges EG20 and EG21 on the upper and lower sides of the substrate P are identified and their positions are measured to find the midpoint CP7. Similarly, the edges EG22 and EG23 on both sides are identified and their positions are measured to find the midpoint CP8. Next, the edges EG24 and EG25 on the left and right sides of the substrate P are identified and their positions are measured to find the midpoint CP9. Similarly, the edges EG26 and EG27 on both sides are identified and their positions are measured to find the midpoint CP10. Define a straight line SL22 passing through the two midpoints CP7 and CP8. In addition, define a straight line SL23 passing through the two midpoints CP9 and CP10. Find the intersection of the two straight lines SL22 and SL23, and set this point as the center CN. Define the XY coordinate system on the substrate using the slope of the straight line SL22 or the straight line SL23 with the center CN as the reference.

[0104] <Second Embodiment>

[0105] The second embodiment recognizes the edge of a wafer which is a circular substrate without patterns or marks for FOWLP and measures its position, thereby mounting bare chips while correcting the position, size, and expansion / contraction of the substrate.

[0106] First, use Fig.14 A mounting stage according to a second embodiment will be described. Fig.14 1 is a plan view showing a mounting station in the second embodiment. In the die mounting device BD in the second embodiment, the substrate P and the mounting station BS to which the substrate P is fixed are different from those in the first embodiment, but the other parts are the same as those in the first embodiment.

[0107] like Fig.14As shown, the mounting station BS is configured to vacuum and heat both the rectangular substrate (panel) for FOPLP and the circular substrate (wafer) for FOWLP. The rectangular substrate can be loaded with a substrate of 515mm×510mm in size, for example, and the circular substrate can be loaded with a substrate of 12-foot and 8-foot wafer size, for example.

[0108] The mounting table BS has a vacuum suction groove VT1 and a heater HT1 for circular substrates in the central circle, a vacuum suction groove VT2 and a heater HT2 for rectangular substrates in the outer periphery, and retreat holes EH1 and EH2 for substrate transport jigs. The retreat hole EH1 is used for the substrate holding claw WSC described later, and the retreat hole EH2 is used for the substrate positioning claw WPM described later. When a circular substrate is placed, only the central circular heater HT1 and the vacuum suction groove VT1 are used, and when a rectangular substrate is placed, the central circular heater HT1 and the peripheral heater HT2 and the vacuum suction grooves VT1 and VT2 are used.

[0109] Next, use Fig.15 A substrate transport jig is described. Fig.15 2 is a diagram for explaining a substrate transport jig in a second embodiment. Fig.15 (a) is a top view showing a substrate transport jig, Fig.15 (b) shows the state before the substrate transport jig is placed on the mounting table. Fig.15 (a) is a cross-sectional view of the AA line, Fig.15 (c) shows the state where the substrate transport jig is placed on the mounting table. Fig.15 (a) is a cross-sectional view of the line AA.

[0110] The substrate transport jig WC includes: a rectangular substrate WCS having a hole formed in the center; four substrate holding claws WSC for holding the substrate P at four locations; and substrate positioning claws WPM. Fig.15 As shown in (b), the substrate holding claw WSC has a portion WSCa that abuts against and fixes the upper surface of the substrate WCS, and a portion WSCb that abuts against the lower surface of the substrate P and holds the substrate P. The upper surface of the portion WSCb that holds the substrate P abuts against the lower surface of the substrate P. Fig.15 As shown in (c), the portion WSCb holding the substrate P is configured to be buried in the escape hole of the mounting table BS and to make the lower surface of the substrate P contact the upper surface of the mounting table BS. The substrate positioning claw WPM is aligned with the notch (notch) NT formed in the substrate P to position the substrate P.

[0111] use Figure 16 to Figure 19 The mounting method according to the second embodiment will be described. Fig.16It is a plan view for explaining the method of calculating the center of the substrate in the second embodiment. Fig.17 is a diagram illustrating detection of an edge of a substrate. Fig.17 (a) is an enlarged view of edge EG31. Fig.17 (b) is an enlarged view of edge EG32. Fig.17 (c) is an enlarged view of edge EG33. Fig.17 (d) is an enlarged view of edge EG34. Fig.18 is a diagram illustrating detection of the slope of a substrate, Fig.18 (a) is a top view showing a state without a slope, Fig.18 (b) is a top view showing a state having a slope. Fig.19 is a diagram for explaining a method of measuring the position of a notch. Fig.19 (a) is a top view showing a method based on pattern matching, Fig.19 (b) is a top view showing the shape-based approach.

[0112] Regarding the mounting method of the second embodiment, the following is used Figure 16 to Figure 19 The following description will focus on points different from the first embodiment.

[0113] (Step 1)

[0114] First, after the substrate P held by the substrate transport jig WC is carried to the mounting table BS of the chip mounting device BD, a position that can be measured as an outer shape feature of the substrate P such as an edge of the substrate P is identified and the initial position is saved. Fig.16 As shown, the substrate P is circular in a plan view.

[0115] For example, after the control device CNT transfers the substrate P held by the substrate transfer jig WC to the mounting station BS and vacuum-adsorbs the substrate P, it immediately starts the recognition operation of the edge of the substrate P. Fig.16 As shown, in the recognition operation, the control device CNT uses the camera device CM to capture the four edges of the substrate P, recognizes (measures) the positions of the four edges of the substrate P, and stores the positions and distances in the storage device MM.

[0116] (Step 2)

[0117] The position (substrate reference position) such as the center of the substrate P and the size of the substrate P are located from the positions of the four edges of the substrate P measured in step 1 .

[0118] For example, Fig.16As shown, the left and right edges EG31 and EG32 of the substrate P are identified and their positions are measured, a straight line SL31 connecting the two edges EG31 and EG32 is defined and calculated, and the midpoint CP31 of the straight line SL31 is calculated. A straight line SL32 from the midpoint CP31 to the straight line SL31 is defined and calculated. The upper and lower edges EG33 and EG34 of the substrate P on the straight line SL32 are identified and their positions are measured. The midpoint of the edges EG33 and EG34 is calculated as the center CN. In addition, the radius (R) as the size of the substrate P is calculated based on the center CN and the positions of the edges EG31, EG32, EG33, and EG34. In addition, the detection of the edges EG31, EG32, EG33, and EG34 is performed by edge scanning based on the camera device CM, and the change position can also be measured by height scanning based on a laser height sensor or the like.

[0119] After calculating the center CN of the substrate P while measuring the setting slope of the substrate P, the position of the positioning notch NT set on the substrate P is measured and the axis is defined based on the position (Xc, Yc) of the center CN and the position (X, Y) of the notch NT to calculate the slope. As a method for calculating the position of the notch NT, it can be as follows: Fig.19 The position of the notch NT can be measured by pattern recognition (pattern matching) as shown in (a) of FIG. Fig.19 As shown in (b), the position of the notch NT is measured using shape edge recognition.

[0120] (Step 3)

[0121] As in the first embodiment, the positions where the bare chips D are to be mounted are registered in advance based on the substrate reference positions, and the reference bare chips D are sequentially mounted at the positions.

[0122] (Step 4)

[0123] Similar to the first embodiment, based on a setting similar to the passage of time such as a certain time or a certain number, the initial position of the edge of the substrate P measured and logged in advance in step 1 is measured again after the period has passed, and the displacement from the initial position is measured.

[0124] (Step 5)

[0125] Similar to the first embodiment, the change in the substrate reference position, the expansion / contraction change, etc. are calculated based on the measurement result in step 4, and the substrate reference position and the substrate size are corrected.

[0126] (Step 6)

[0127] Similar to the first embodiment, based on the corrected substrate reference position and the information on the substrate size, the previously registered position for mounting the bare chip D is corrected with reference to the corrected substrate reference position, and the bare chip D is mounted.

[0128] In the second embodiment, the center (substrate reference position) and radius (substrate size) of the wafer placed on the mounting table are detected, and the center is used as a reference to perform telescopic correction by using position alignment and radius change. Thus, mounting can be performed in accordance with changes in the substrate reference position and substrate size due to thermal shrinkage.

[0129] <Modification of Second Embodiment>

[0130] Hereinafter, several representative modifications of the second embodiment are illustrated. In the following description of the modifications, the same reference numerals as those in the above embodiment are used for parts having the same structure and function as those in the above embodiment. Moreover, the description of the part may be appropriately cited from the description in the above embodiment within the scope that does not cause technical contradictions. In addition, part of the above embodiment and all or part of the multiple modifications may be appropriately combined and applied within the scope that does not cause technical contradictions.

[0131] (First Modification)

[0132] The second embodiment is simple to process, but it takes time to measure four points each time. Therefore, in the first variant, the approximate circle is calculated using the least square method based on the measurement results of the edge of three points, and the center (Xc, Yc) and radius (R) of the approximate circle are obtained. Only three points are used for measurement, which can shorten the measurement time compared to using four points.

[0133] use Figure 20 to Figure 22 A mounting method according to a first modified example will be described. Fig. 20 It is a plan view for explaining a method of calculating the center of the substrate in the first modified example of the second embodiment. Fig.21 This is a diagram for explaining how to calculate an approximate circle using the least squares method, and is a diagram for explaining how to find the center (Xc, Yc) and radius (R) of the approximate circle. Fig.21 1 is a diagram showing calculation of an approximate circle using the least squares method, and is a diagram showing equations used in a method of obtaining the center (Xc, Yc) and radius (R) of the approximate circle.

[0134] The following description will focus on points different from the second embodiment.

[0135] (Step 1)

[0136] like Fig. 20As shown, in the recognition operation, the control device CNT uses the camera device CM to capture the three edges of the substrate P, recognizes (measures) the positions of the three edges of the substrate P, and stores the positions and distances in the storage device MM.

[0137] (Step 2)

[0138] The position (substrate reference position) of the center of the substrate P and the like and the size of the substrate P are defined from the positions of the three edges of the substrate P measured in step 1 .

[0139] For example, Fig. 20 As shown, the left and right edges EG31 and EG32 of the substrate P are identified and their positions are measured, a straight line SL31 connecting the two points of the edges EG31 and EG32 is defined and calculated, and the midpoint CP31 of the straight line SL31 is calculated. A straight line SL32 perpendicular to the straight line SL31 is defined and calculated from the midpoint CP31. The edge EG33 below the substrate P on the straight line SL32 is identified and its position is measured.

[0140] Here, use Fig.21 as well as Fig. 22 The following describes a method for calculating the center (Xc, Yc) of a circle by using the least squares method to approximate the circle from multiple measurement points (xi, yi). Fig.21 As shown, an approximate circle can be calculated as long as there are three or more measurement points.

[0141] If the coordinates (Xc, Yc) of the center CN of the approximated circle are (a, b) and the radius is r, the equation of the approximated circle is Fig. 22 The formula (1) shown can be transformed to Fig. 22 Here, the parameters A, B, and C of equation (2) are Fig. 22 It is represented by the formula (3) shown.

[0142] Using a plurality of measurement points (xi, yi) (i = 1 to n), the parameters A, B, and C are calculated using the least squares method. Fig. 22 The parameters A, B, and C are calculated using equation (4) shown.

[0143] When the partial differential calculation of equation (4) is performed using parameters A, B, and C, it becomes Fig. 22 The equations (5)(6)(7) are shown. When the determinant is used to express the equations (5)(6)(7), it becomes Fig. 22 When the formula (8) is transformed, it becomes Fig. 22 The parameters A, B, and C are calculated according to the formula (9).

[0144] Substitute A and B calculated from equation (9) into equation (3) to calculate (a, b). Substitute (a, b) calculated from equation (3) and C calculated from equation (9) into equation (3) to calculate r. Here, r corresponds to the radius (R) of the substrate P of the second embodiment.

[0145] (Second Modification)

[0146] use Fig.23 A second modification example will be described. Fig.23 It is a plan view for explaining a method of calculating the center and size of a substrate in the second modification example of the second embodiment.

[0147] For example, Fig.23 As shown, the left and right edges EG31 and EG32 of the substrate P are identified and their positions are measured, a straight line SL31 connecting the edges EG3 and EG32 is defined and calculated, and a midpoint CP31 of the straight line SL31 is calculated. A straight line SL32 perpendicular to the straight line SL31 is defined and calculated from the midpoint CP31.

[0148] A straight line SL33 perpendicular to the straight line SL31 is defined and calculated from the edge EG32. The edge EG34 of the substrate P on the straight line SL33 is identified and its position is measured. The midpoint CP32 of the straight line SL33 is calculated, and a straight line SL34 perpendicular to the straight line SL33 is defined and calculated from the midpoint CP32. The center (Xc, Yc) of the circle is calculated from the intersection of the two straight lines SL32 and SL34. A straight line SL35 connecting the two points of the edges EG31 and EG34 is defined, and the center of the circle as the midpoint is calculated. The centers of the two calculated circles are compared and confirmed.

[0149] The radius (R) is set to the average of the distances between the edges EG31, EG32, EG34 and the center (Xc, Yc). Alternatively, the lengths of the sides of the triangle formed by the three points of the edges EG31, EG32, EG34 are set to a, b, c, and the radius of the circumscribed circle of the triangle is calculated using Fig.23 The radius (R) is calculated by using the equation (10) shown in FIG. As in the first modification, the calculation results of the center (Xc, Yc) and the radius (R) of the three edges EG31, EG32, and EG34 by the least square method may be compared and the average value may be obtained.

[0150] According to the second modification, similarly to the first modification, only three measurement points are required, and the measurement time can be shortened compared to the four measurement points in the second embodiment.

[0151] (Third Modification)

[0152] use Fig.24 The mounting stage in the third modified example will be described. Fig.24It is a plan view showing a mounting stage in a third modified example of the second embodiment.

[0153] like Fig.24 As shown, the mounting station BS of the third variant is configured to vacuum adsorb and heat both the rectangular substrate (panel) for FOPLP and the circular substrate (wafer) for FOWLP in the same manner as the second embodiment. The mounting station BS has a vacuum adsorption groove VT1 and a heater HT1 for circular substrates in the center circle, a vacuum adsorption groove VT2 and a heater HT2 for rectangular substrates in the periphery, and a retreat groove ET for a substrate transport fixture. When a circular substrate is mounted, only the central circular heater HT1 and the vacuum adsorption groove VT1 are used, and when a rectangular substrate is mounted, the central circular heater HT1 and the peripheral heater HT2 and the vacuum adsorption grooves VT1 and VT2 are used.

[0154] Next, use Fig.25 A substrate transport jig is described. Fig.25 1 is a diagram for explaining a substrate transport jig in a third modified example of the second embodiment. Fig.25 (a) is a top view showing a substrate transport jig, Fig.25 (b) shows the state before the substrate transport jig is placed on the mounting table. Fig.25 (a) is a cross-sectional view of the AA line, Fig.25 (c) shows the state where the substrate transport jig is placed on the mounting table. Fig.25 (a) is a cross-sectional view of the line AA.

[0155] The substrate transport jig WC includes a rectangular substrate WCS having a hole formed in the center, and a substrate positioning claw WPM. Fig.25 As shown in (b), the substrate WCS has a portion WSCb that abuts against the lower surface of the substrate P and holds the substrate P. The upper surface of the portion WSCb that holds the substrate P abuts against the lower surface of the substrate P. Fig.25 As shown in (c), the portion WSCb holding the substrate P is formed to be buried in the retreat groove ET of the mounting table BS, so that the lower surface of the substrate P abuts against the upper surface of the mounting table BS. The substrate positioning claw WPM positions the substrate P by matching the notch (cut notch) NT formed in the substrate P.

[0156] (Fourth Modification)

[0157] use Fig.26 The mounting stage in the fourth modified example will be described. Fig.26 1 is a plan view showing a mounting stage in a fourth modification.

[0158] like Fig.26As shown, the mounting station BS of the fourth variant is configured to vacuum adsorb and heat both the rectangular substrate (panel) for FOPLP and the circular substrate (wafer) for FOWLP in the same manner as the second embodiment. The mounting station BS has a vacuum adsorption groove VT1 and a heater HT1 for the circular substrate in the central circle, a vacuum adsorption groove VT2 and a heater HT2 for the rectangular substrate in the outer periphery, and a central isolation groove ST. When a circular substrate is placed, only the heater HT1 and the vacuum adsorption groove VT1 on the inner side of the central isolation groove ST are used. In this case, the inner side of the central isolation groove ST rises only a few mm to raise and support the substrate P. When a rectangular substrate is placed, the heater HT1 on the inner side of the central isolation groove ST and the heater HT2 and the vacuum adsorption grooves VT1 and VT2 on the outer periphery are used.

[0159] Next, use Fig. 27 A substrate transport jig is described. Fig. 27 2 is a diagram for explaining a substrate transport jig in a fourth modified example of the second embodiment. Fig. 27 (a) is a top view showing a substrate transport jig, Fig. 27 (b) shows the state before the substrate transport jig is placed on the mounting table. Fig. 27 (a) is a cross-sectional view taken along line AA. Fig. 27 (c) shows the state where the substrate transport jig is placed on the mounting table. Fig. 27 (a) is a cross-sectional view taken along line AA.

[0160] like Fig. 27 As shown in (a) of FIG. 1 , the substrate transport jig WC has a rectangular substrate WCS with a hole formed in the center. Fig. 27 As shown in (b), the substrate WCS has a portion WSCb that abuts against the lower surface of the substrate P and holds the substrate P. The upper surface of the portion WSCb that holds the substrate P abuts against the lower surface of the substrate P. Fig. 27 As shown in (c), the portion WSCb holding the substrate P is configured to be buried in the central isolation groove ST of the mounting table BS so that the lower surface of the substrate P is in contact with the upper surface of the mounting table BS. The mounting table BS on the inner side of the central isolation groove ST rises and supports the substrate P. In addition, as described above, since the position of the notch NT can be measured, the substrate positioning claw WPM of the second embodiment is not required.

[0161] Hereinafter, an example in which the present invention is applied to FOPLP will be described as an embodiment, but the present invention is not limited thereto and can also be applied to FOWLP described in the second embodiment.

[0162] [Example]

[0163] Fig.28It is a plan view schematically showing a flip chip mounter in the embodiment. Fig.29 It is explained in Fig.28 The figure shows the actions of the flip chip pickup head, transfer head and placement head when viewed from the direction of arrow A.

[0164] The flip chip mounting machine 10 as a chip mounting device generally includes a bare chip supply unit 1, a pickup unit 2, a transfer unit 8, an intermediate stage unit 3, a mounting unit 4, a conveying unit 5, a substrate supply unit 6K, a substrate unloading unit 6H, and a control device 7 for monitoring and controlling the operation of each unit.

[0165] First, the bare chip supply unit 1 supplies the bare chip D to be mounted to the substrate P. The bare chip supply unit 1 includes a wafer holding table 12 for holding the divided wafer 11, a push-up unit 13 shown by a dotted line for pushing the bare chip D from the wafer 11, and a wafer ring supply unit 18. The bare chip supply unit 1 is moved in the XY direction by a driving mechanism (not shown) to move the picked-up bare chip D to the position of the push-up unit 13. The wafer ring supply unit 18 has a wafer ring 14 (see FIG. 1 ). Fig.29 ) wafer box, and sequentially supplies the wafer ring 14 to the bare chip supply unit 1 to replace it with a new wafer ring 14. The bare chip supply unit 1 moves the wafer ring 14 to the pickup point in a manner that the desired bare chip D can be picked up from the wafer ring 14. The wafer ring 14 is a fixture that fixes the wafer 11 and can be installed in the bare chip supply unit 1.

[0166] The pickup unit 2 includes a pickup flip head 21 for picking up and flipping the bare chip D, and various driving units (not shown) for lifting, rotating, and flipping the collet 22 and moving it in the X direction. With this configuration, the pickup flip head 21 picks up the bare chip, rotates the pickup flip head 21 180 degrees, flips the bump of the bare chip D to face the lower surface, and puts the bare chip D in a posture for delivery to the transfer head 81.

[0167] The transfer unit 8 receives the inverted bare chip D from the pickup flip head 21 and places it on the intermediate stage 31. The transfer unit 8 includes a transfer head 81 having a collet 82 for sucking and holding the bare chip D at the front end, similarly to the pickup flip head 21, and a Y drive unit 83 for moving the transfer head 81 in the Y direction.

[0168] The intermediate stage unit 3 includes an intermediate stage 31 on which the bare chip D is temporarily placed, and a stage recognition camera 34. The intermediate stage 31 is movable in the Y-axis direction by a driving unit (not shown).

[0169] The mounting section 4 picks up the bare chip D from the intermediate stage 31 and mounts it on the conveyed substrate P. Here, a glass panel is used as the substrate P. The mounting section 4 includes a mounting head 41 having a collet 42 for sucking and holding the bare chip D at the front end, similar to the pickup flip chip head 21, a Y beam 43 as a driving section for moving the mounting head 41 along the Y axis direction, a substrate recognition camera 44 as a camera device for photographing the substrate P and recognizing the mounting position, and an X beam 45. Fig.28 As shown, the X beam 45 is provided near the transport rails 51 and 52 , and the Y beam 43 extends in the Y-axis direction so as to straddle the mounting table BS. Both ends are supported by the X beam 45 so as to be movably supported in the X-axis direction.

[0170] The mounting head 41 is a device having a collet 42 that holds the bare chip D in a freely attachable and detachable manner by vacuum adsorption, and is mounted on the Y beam 43 so as to freely reciprocate in the Y-axis direction and the Z-axis direction. The mounting head 41 has the function of holding and conveying the bare chip D picked up from the intermediate stage 31, and mounting the bare chip D on the substrate P adsorbed and fixed to the mounting table BS. In addition, when the mounting head 41 moves toward the intermediate stage 31 side compared to the X beam 45, the mounting head 41 is raised in such a manner that the collet 42 becomes higher than the X beam 45.

[0171] With this configuration, the mounting head 41 picks up the bare chip D from the intermediate stage 31 and mounts the bare chip D on the substrate P based on the imaging data of the substrate recognition camera 44. The mounting head 41 corresponds to the mounting head BH of the embodiment, and the substrate recognition camera 44 corresponds to the imaging device CM of the embodiment.

[0172] The transport section 5 has transport rails 51 and 52 for the substrate P to move in the X-axis direction. The transport rails 51 and 52 are arranged in parallel. With this structure, the substrate P is unloaded from the substrate supply section 6K, moved along the transport rails 51 and 52 to the mounting position, and moved to the substrate unloading section 6H after mounting, and the substrate P is delivered to the substrate unloading section 6H. In the process of mounting the bare chip D on the substrate P, the substrate supply section 6K unloads a new substrate P and waits on the transport rails 51 and 52.

[0173] The control device 7 includes a memory storing a program (software) for monitoring and controlling the operation of each part of the flip chip mounter 10, and a central processing unit (CPU) for executing the program stored in the memory. For example, the control device 7 acquires various information such as the image information of the substrate recognition camera 44 and the position of the mounting head 41 from the substrate recognition camera 44 and stores them in the memory, and controls the operation of each component such as the mounting operation of the mounting head 41.

[0174] Fig.30 It is shown Fig.28 A schematic cross-sectional view of the main parts of the bare chip supply unit. Fig.30 As shown, the bare chip supply unit 1 includes an expansion ring 15 for holding a wafer ring 14, a support ring 17 for horizontally positioning a dicing tape 16 to which a plurality of bare chips D are bonded and held on the wafer ring 14, and a push-up unit 13 for pushing the bare chip D upward. In order to pick up a predetermined bare chip D, the push-up unit 13 is moved in the vertical direction by a driving mechanism (not shown), and the bare chip supply unit 1 is moved in the horizontal direction.

[0175] Next, use Fig.31 A mounting method (a method for manufacturing a semiconductor device) performed in the flip chip mounter of the embodiment will be described. Fig.30 It is used Fig.28 Flow chart of the mounting method implemented by the flip chip mounter. Before the following steps, the wafer ring 14 holding the dicing tape 16 with the bare chip D and the substrate P with multiple areas are loaded into the flip chip mounter. The loaded substrate P is conveyed to the mounting station BS, and the center and substrate size of the substrate P are calculated and registered as initial values.

[0176] (Step S21: Wafer bare chip pickup)

[0177] The control device 7 moves the wafer holding table 12 so that the picked-up bare chip D is located directly above the push-up unit 13, and positions the stripping target bare chip on the push-up unit 13 and the collet 22. The push-up unit 13 is moved so that the upper surface of the push-up unit 13 contacts the back surface of the dicing tape 16. At this time, the control device 7 adsorbs the dicing tape 16 to the upper surface of the push-up unit 13. The control device 7 lowers the collet 22 while evacuating the vacuum, and makes it land on the stripping target bare chip D, thereby adsorbing the bare chip D. The control device 7 raises the collet 22 to strip the bare chip D from the dicing tape 16. Thus, the bare chip D is picked up by the pickup flip head 21.

[0178] (Step S22: Pick up the flip chip head and move it)

[0179] The control device 7 moves the pickup flip head 21 from the pickup position to the flip position.

[0180] (Step S23: Pick up the flip head and flip it)

[0181] The control device 7 rotates the pickup flip head 21 by 180 degrees, turns the bump surface (front surface) of the bare chip D over to face the lower surface, and sets the bare chip D to a posture for delivering the bare chip D to the transfer head 81 .

[0182] (Step S24: Transfer Head Delivery)

[0183] The control device 7 picks up the bare chip D from the collet 22 of the flip chip head 21 by the collet 82 of the transfer head 81 , and delivers the bare chip D.

[0184] (Step S25: Pick up the flip head and flip it)

[0185] The control device 7 turns over the pickup flip head 21 so that the suction surface of the collet 22 faces downward.

[0186] (Step S26: Transfer Head Movement)

[0187] Before or in parallel with step S25 , the control device 7 moves the transfer head 81 to the intermediate stage 31 .

[0188] (Step S27: Bare Chip Mounting on Intermediate Stage)

[0189] The control device 7 places the bare chip D held by the transfer head 81 on the intermediate stage 31 .

[0190] (Step S28: Transfer Head Movement)

[0191] The control device 7 moves the transfer head 81 to the bare chip D delivery position.

[0192] (Step S29: Intermediate stage position movement)

[0193] After step S28 or in parallel therewith, the control device 7 moves the intermediate stage 31 to a position for handing over to the placement head 41 .

[0194] (Step S2A: Head Delivery)

[0195] The control device 7 picks up the bare chip D from the intermediate stage 31 by the collet of the mounting head 41 , and delivers the bare chip D.

[0196] (Step S2B: Intermediate Stage Position Movement)

[0197] The control device 7 moves the intermediate stage 31 to a delivery position with the transfer head 81 .

[0198] (Step S2C: Mounting head movement)

[0199] The control device 7 moves the bare chip D held by the collet 42 of the mounting head 41 onto the substrate P.

[0200] (Step S2D: Mounting)

[0201] The control device 7 mounts the bare chip D picked up from the intermediate stage 31 by the collet 42 of the mounting head 41 onto the substrate P coated with an adhesive main agent (adhesive layer). More specifically, the control device 7 mounts the bare chip D onto the substrate P using, for example, steps 1 to 6 of the first embodiment described above.

[0202] (Step S2E: Mounting head movement)

[0203] The control device 7 moves the mounting head 41 to a delivery position with the intermediate stage 31 .

[0204] After step S2E, the control device 7 uses the substrate unloading unit 6H to take out the substrate P on which the bare chip D is mounted from the transport rails 51 and 52 . The substrate P is unloaded from the flip chip mounting machine 10 .

[0205] Thereafter, after sealing a plurality of bare chips (semiconductor chips) arranged on the adhesive layer of the substrate P together with a sealing resin to form a sealing body having a plurality of semiconductor chips and a sealing resin covering the plurality of semiconductor chips, the substrate P is peeled off from the sealing body, and then a rewiring layer is formed on the surface of the substrate P to which the sealing body is attached, thereby manufacturing FOPLP.

[0206] As mentioned above, the invention proposed by the present inventors has been specifically described based on the embodiments, modifications, and examples. However, the present disclosure is not limited to the above-described embodiments, modifications, and examples, and various modifications are possible, of course.

[0207] For example, in the embodiment, the pickup unit 2, transfer unit 8, intermediate stage 3 and mounting unit 4 are described as one example, but the pickup unit 2, transfer unit 8, intermediate stage 3 and mounting unit 4 may be two groups respectively.

[0208] Furthermore, in the embodiment, an example in which one placement head 41 is provided on the Y beam 43 has been described, but a plurality of placement heads may be provided.

[0209] Furthermore, although the flip chip mounter has been described in the embodiments, the invention can also be applied to a chip mounter that mounts a bare chip picked up from a bare chip supply unit without flipping it.

Claims

1. A chip mounting device, characterized in that: have: a placement head that places the picked-up bare chip on the upper surface of the substrate; a camera device for photographing the substrate; and a control device for controlling the placement head and the camera device, The control device recognizes and measures the position of the characteristic portion of the outer shape of the substrate using the imaging device, and saves the measured position as an initial position. defining a reference position based on the measured position, Based on the reference position, the bare chips are sequentially mounted using the mounting head. The control device measures the position of the feature again after a predetermined time has passed or after a predetermined number of mounts have been made, and measures the displacement from the initial position. Based on the measured displacement, a change in the reference position of the substrate and a change in the expansion and contraction of the substrate are calculated, and the reference position and the size of the substrate are corrected. The position for mounting the bare chip is corrected based on the corrected reference position and size information, and the bare chip is mounted.

2. The chip mounting device according to claim 1, characterized in that: The substrate is rectangular in plan view. The feature portion is a corner or edge of the substrate in a top view, The reference position is the center of the substrate in a plan view.

3. The chip mounting device according to claim 2, characterized in that: The control device calculates the reference position based on two corners of the substrate in a plan view.

4. The chip mounting device according to claim 2, characterized in that: The control device calculates the reference position based on three corners of the substrate in a plan view.

5. The chip mounting device according to claim 2, characterized in that: The control device calculates the reference position based on four corners of the substrate in a plan view.

6. The chip mounting device according to claim 2, characterized in that: The control device calculates the reference position based on four edges of the substrate in a plan view.

7. The chip mounting device according to claim 2, characterized in that: The control device calculates the reference position based on five edges of the substrate in a plan view.

8. The chip mounting device according to claim 2, characterized in that: The control device calculates the reference position based on four edges and two corners of the substrate in a plan view.

9. The chip mounting device according to claim 2, characterized in that: The control device calculates the reference position based on six edges of the substrate in a plan view.

10. The chip mounting device according to claim 2, characterized in that: The control device calculates the reference position based on eight edges of the substrate in a plan view.

11. The chip mounting device according to claim 1, characterized in that: The substrate is circular in plan view. The feature portion is an edge of the substrate in a top view, The reference position is the center of the substrate in a plan view.

12. The chip mounting device according to claim 11, characterized in that: The control device calculates the reference position based on four edges of the substrate in a plan view.

13. The chip mounting device according to claim 11, characterized in that: The control device calculates the reference position based on three edges of the substrate in a plan view.

14. A method for manufacturing a semiconductor device, characterized in that: include: (a) a step of carrying in a wafer ring that holds a dicing tape having bare chips; (b) the process of loading the substrate; as well as (c) picking up the bare chip from the wafer ring and placing the picked-up bare chip on the substrate, In the step (c), recognizing and measuring the position of the characteristic portion of the outer shape of the substrate by using an imaging device, and saving the measured position as an initial position, defining a reference position based on the measured position, The bare chips are mounted sequentially based on the reference position. After a predetermined time has passed or a predetermined number of devices have been mounted, the position of the feature is measured again, and the displacement from the initial position is measured. Based on the measured displacement, a change in the reference position of the substrate and a change in the expansion and contraction of the substrate are calculated, and the reference position and the size of the substrate are corrected. The position for mounting the bare chip is corrected based on the corrected reference position and size information, and the bare chip is mounted.

15. The method for manufacturing a semiconductor device according to claim 14, wherein: The substrate is rectangular in plan view. The feature portion is a corner or edge of the substrate in a top view, The reference position is the center of the substrate in a plan view.

16. The method for manufacturing a semiconductor device according to claim 15, wherein: In the step (c), the reference position is calculated based on two corners of the substrate in a plan view.

17. The method for manufacturing a semiconductor device according to claim 15, wherein: In the step (c), the reference position is calculated based on three corners of the substrate in a plan view.

18. The method for manufacturing a semiconductor device according to claim 15, wherein: In the step (c), the reference position is calculated based on four corners of the substrate in a plan view.

19. The method for manufacturing a semiconductor device according to claim 15, wherein: In the step (c), the reference position is calculated based on four edges of the substrate in a plan view.

20. The method for manufacturing a semiconductor device according to claim 15, wherein: In the step (c), the reference position is calculated based on five edges of the substrate in a plan view.

21. The method for manufacturing a semiconductor device according to claim 14, wherein: The substrate is circular in plan view. The feature portion is an edge of the substrate in a top view, The reference position is the center of the substrate in a plan view.

22. The method for manufacturing a semiconductor device according to claim 21, wherein: In the step (c), the reference position is calculated based on four edges of the substrate in a plan view.

23. The method for manufacturing a semiconductor device according to claim 21, wherein: In the step (c), the reference position is calculated based on three edges of the substrate in a plan view.

Images