Image sensing device

Abstract

An image sensing device includes a first impurity region, a second impurity region, a floating diffusion region, and a transfer gate. The first impurity region is provided in a semiconductor substrate and includes impurities having a first doping type, and the first impurity region generates photocharges by performing photoelectric conversion in response to incident light. The second impurity region is provided above the first impurity region and has impurities of a second doping type different from the first doping type, and the second impurity region contacts the first impurity region on some portions of the first impurity region. The floating diffusion region is provided above the second impurity region. The transfer gate is coupled to the floating diffusion region and transfers the photocharges generated by the first impurity region to the floating diffusion region. The first impurity region is arranged not to contact the transfer gate.

Description

Technical Field

[0001] Technologies and embodiments disclosed in this patent document generally relate to an image sensing device. Background Art

[0002] Image sensors are devices (or elements) used to convert optical images into electrical signals. With the recent developments in the automotive, medical, computer and communication industries, the demand for high-performance image sensors is growing in various devices such as digital cameras, camcorders, personal communication systems (PCS), game consoles, surveillance cameras, medical micro cameras, robots, etc. Summary of the invention

[0003] Various embodiments of the disclosed technology relate to an image sensing device for improving operating characteristics.

[0004] According to one embodiment of the disclosed technology, an image sensing device may include: a first impurity region disposed in a semiconductor substrate and including impurities having a first doping type, the first impurity region being configured to generate photocharges by performing photoelectric conversion in response to incident light; a second impurity region disposed above the first impurity region and having impurities of a second doping type different from the first doping type, the second impurity region contacting the first impurity region on some portions of the first impurity region; a floating diffusion region disposed above the second impurity region and configured to store photocharges; and a transfer gate coupled to the floating diffusion region and configured to transfer the photocharges generated by the first impurity region to the floating diffusion region. The first impurity region may be arranged not to contact the transfer gate.

[0005] According to another embodiment of the disclosed technology, an image sensing device may include: a pixel array including a plurality of unit pixels and configured to provide an electrical signal corresponding to incident light received by the pixel array. Each of the plurality of unit pixels may include: a first impurity region having a first type of impurity and configured to generate photocharges by photoelectric conversion of incident light; and a second impurity region having a second type of impurity different from the first type of impurity and disposed above the first impurity region. A top surface of the first impurity region may have a portion away from the second impurity region.

[0006] It is to be understood that both the foregoing general description and the following detailed description of the disclosed technology are illustrative and explanatory and are intended to provide further explanation of the disclosure as claimed. BRIEF DESCRIPTION OF THE DRAWINGS

[0007] The above and other features and advantageous aspects of the disclosed technology will become apparent when the following detailed description is considered in conjunction with the accompanying drawings.

[0008] Figure 1 is a block diagram illustrating an example of an image sensing device based on some embodiments of the disclosed technology.

[0009] Figure 2 is a diagram showing some embodiments based on the disclosed technology. Figure 1 A cross-sectional view of an example of a unit pixel taken along line AA′ is shown.

[0010] Figure 3 Some embodiments based on the disclosed technology are shown Figure 2 The cross-sectional view shown is of an N-type photoelectric conversion region formed by a combination of N-type impurity regions having different densities.

[0011] Figure 4 Some embodiments based on the disclosed technology are shown Figure 3 A plan view of an example of a low-density N-type impurity region shown in FIG.

[0012] FIG. 5A to FIG. 5D The invention is a method for forming a Figure 3 A cross-sectional view of an example of a method of constructing is shown.

[0013] Figure 6 is a cross-sectional view showing an example of a unit pixel obtained based on some other embodiments of the disclosed technology.

[0014] Figure 7 Some embodiments based on the disclosed technology are shown in Figure 6 The cross-sectional view shown is of an N-type photoelectric conversion region formed by a combination of N-type impurity regions having different densities. DETAILED DESCRIPTION

[0015] The present patent document provides an embodiment and example of an image sensing device that substantially solves one or more problems caused by limitations and disadvantages of the prior art. Some embodiments of the disclosed technology propose a design of an image sensing device with a new structure to improve its operating characteristics.

[0016] Reference will now be made in detail to specific embodiments, examples of which are illustrated in the accompanying drawings. Whenever possible, the same reference numerals are used throughout the drawings to refer to the same or similar components. In the following description, detailed descriptions of related known configurations or functions incorporated herein will be omitted to avoid obscuring the subject matter.

[0017] Figure 1 is an example of a block diagram illustrating an image sensing device based on some embodiments of the disclosed technology.

[0018] Reference Figure 1 , the image sensing device may include a pixel array 100 , a correlated double sampler (CDS) 200 , an analog-to-digital converter (ADC) 300 , a buffer 400 , a row driver 500 , a timing generator 600 , a control register 700 , and a ramp signal generator 800 .

[0019] The pixel array 100 may include unit pixels PX arranged continuously in a two-dimensional (2D) structure, wherein the unit pixels are arranged along a first direction and a second direction perpendicular to the first direction. Each unit pixel PX may convert incident light into an electrical signal to generate a pixel signal, and may output the pixel signal to a correlated double sampler (CDS) 200 through a column line. The substrate may include a semiconductor substrate including a first surface on which light is incident and a second surface opposite to or opposite to the first surface. Each unit pixel PX may include a photoelectric conversion region formed in the substrate, and a transfer gate (transfer gate) for transferring photocharges (electrons) generated in the photoelectric conversion region to a concave floating diffusion region. In this case, the bottom surface of the transfer gate may be formed not to contact the photoelectric conversion region. The photoelectric conversion region may include a distribution structure in which a high-density N-type impurity region and a low-density N-type impurity region are combined with each other. A P-type impurity region may be formed above the photoelectric conversion region. The P-type impurity region may be used as a well region of a pixel transistor, and the photoelectric conversion region and the floating diffusion region may be isolated from each other. As described above, the photoelectric conversion region is formed with a combined structure of a high-density impurity region and a low-density impurity region, resulting in an increase in the transfer characteristics of photoelectric charges. In addition, the junction breakdown voltage between the photoelectric conversion region as an N-type impurity region and the P-type impurity region disposed above the photoelectric conversion region can be prevented from deteriorating. The above impurity distribution structure of the photoelectric conversion region will be described later.

[0020] The correlated double sampler (CDS) 200 may sample and hold the electrical image signal received from the pixel PX of the pixel array 100. For example, the correlated double sampler (CDS) 200 may sample a reference voltage level and a voltage level of the received electrical image signal in response to a clock signal received from the timing generator 600, and may transmit an analog signal corresponding to a difference between the reference voltage level and the voltage level of the received electrical image signal to an analog-to-digital converter (ADC) 300.

[0021] The analog-to-digital converter (ADC) 300 may compare the ramp signal received from the ramp signal generator 800 with the sampling signal received from the correlated double sampler (CDS) 200, and may thereby output a comparison signal indicating a comparison result between the ramp signal and the sampling signal. The analog-to-digital converter (ADC) 300 may count a level transition time of a comparison signal based on a clock signal received from the timing generator 600 and a ramp signal received from the ramp signal generator 800, and may output a count value indicating the counted level transition time to the buffer 400.

[0022] The buffer 400 may store each digital signal received from the analog-to-digital converter (ADC) 300, may sense and amplify each digital signal, and may output each amplified digital signal. The buffer 400 may include a memory (not shown) and a sense amplifier (not shown). The memory may store a count value, and the count value may be associated with the output signals of the plurality of unit pixels PX. The sense amplifier may sense and amplify each count value received from the memory.

[0023] The row driver 500 may drive the pixel array 100 in units of row lines in response to an output signal of the timing generator 600. For example, the row driver 500 may generate a selection signal capable of selecting any one of a plurality of row lines.

[0024] The timing generator 600 may generate timing signals to control the row driver 500 , the correlated double sampler (CDS) 200 , the analog-to-digital converter (ADC) 300 , and the ramp signal generator 800 .

[0025] The control register 700 may generate control signals to control the ramp signal generator 800 , the timing generator 600 , and the buffer 400 .

[0026] The ramp signal generator 800 may generate a ramp signal based on a control signal received from the control register 700 and a timing signal received from the timing generator 600 to control the image signal output to the buffer 400 .

[0027] Figure 2 is a diagram showing some embodiments based on the disclosed technology. Figure 1 A cross-sectional view of an example of a unit pixel (PX) taken along line AA′ is shown.

[0028] Reference Figure 2 , the unit pixel PX may include a photoelectric conversion region 110 , a well and isolation region 120 , a floating diffusion region 130 , and a plurality of pixel transistors 140 .

[0029] Figure 2The photosensing unit pixel PX shown is an example of a CMOS image sensor constructed in a back-illuminated (BSI) configuration by configuring the unit pixel PX so that the incident light first enters the first surface of the substrate 10 to reach the photoelectric conversion region 110 without encountering the metal pattern (including conductive metal lines) for the photoelectric conversion region 110 and the sensing circuit formed above the second surface on the other side of the substrate 10. Such a metal pattern formed above the second surface of the substrate 10 can reflect or scatter the incident light received by the CMOS image sensor, and if not managed, such reflected or scattered light may adversely affect the sensing performance or operation. The BSI configuration can avoid undesired scattering or reflection of the incident light before the incident light enters the photoelectric conversion region 110. This improves the optical sensing of the incident light and is therefore advantageous. In some embodiments, a lens array of lenses for receiving the incident light to the CMOS image sensor can be formed on the first surface to focus the incident light onto different photoelectric conversion regions 110, respectively.

[0030] The photoelectric conversion region 110 may generate photocharges by photoelectrically converting incident light received via the first surface of the semiconductor substrate 10. The photoelectric conversion region 110 may be implemented as a photodiode, a phototransistor, a grating, or other photosensitive circuit capable of converting light into a pixel signal (e.g., charge, voltage, or current). The photoelectric conversion region 110 may include an N-type impurity region formed in the semiconductor substrate 10 of a unit pixel (PX) region defined by the device isolation layer 20.

[0031] like Figure 2As shown, the photoelectric conversion region 110 may be disposed below the well and isolation region 120. The photoelectric conversion region 110 may have a top surface having a portion disposed relatively closer to the bottom surface of the photoelectric conversion region 110 and a remaining portion disposed relatively farther from the bottom surface of the photoelectric conversion region 110. The remaining portion of the top surface of the photoelectric conversion region 110 may protrude upward compared to the portion of the top surface of the photoelectric conversion region 110 so that the remaining portion may contact the well and isolation region 120. The portion of the top surface of the photoelectric conversion region 110 may be formed in a concave shape so that the portion does not contact the well and isolation region 120. For example, the portion of the top surface of the photoelectric conversion region 110 may be disposed below the transmission gate TG and spaced a predetermined distance from the well and isolation region 120. Therefore, the portion of the top surface of the photoelectric conversion region 110 does not contact the well and isolation region 120. In some embodiments, the portion of the top surface of the photoelectric conversion region 110 disposed below the transmission gate TG may not be in contact with the transmission gate TG. For example, the transmission gate TG may be formed in such a manner that the bottom surface of the transmission gate TG is disposed at a lower height than the bottom surface of the well and isolation region 120. Such a bottom surface of the transmission gate TG is disposed to be separated from the portion of the top surface of the photoelectric conversion region 110 disposed below the transmission gate TG. The portion of the top surface of the photoelectric conversion region 110 does not contact with the bottom surface of the transmission gate TG.

[0032] The remaining portion of the top surface of the photoelectric conversion region 110, except for the portion disposed under the transmission gate TG, may contact the bottom surface of the well and isolation region 120. For example, the photoelectric conversion region 110 and the well and isolation region 120 may be formed to have a PN junction structure in which a P-type impurity region and an N-type impurity region are in contact with each other, and the N-type impurity region 110 may be formed not to contact the transmission gate TG. The n-type impurity region 110 has a portion disposed under the floating diffusion region 130. The remaining portion of the n-type impurity region 110 may protrude upward compared to the portion of the top surface under the transmission gate TG 142, so that the protruding region contacts the well and isolation region 120 and the channel region of the transmission gate TG. As a result, a path for transferring photocharges from the photoelectric conversion region 110 to the floating diffusion region 130 is formed, and the photocharges may flow from the photoelectric conversion region 110 to the floating diffusion region 130.

[0033] The photoelectric conversion region 110 may include different N-type impurity regions having different densities from each other. Alternatively, the photoelectric conversion region 110 may include a structure in which N-type impurities are distributed at a uniform impurity density.

[0034] The well and isolation region 120 may include at least one P-type impurity region. Figure 2In the example of , the well and isolation region 120 includes a first p-type impurity region 120a and a second p-type impurity region 120b. The first p-type impurity region 120a may be formed to contact the second surface of the semiconductor substrate 10 opposite to the first surface of the semiconductor substrate 10. The second p-type impurity region 120b may be disposed below the floating diffusion region. The first p-type impurity region 120a and the second p-type impurity region 120b may be formed by the injection of p-type impurities injected from the second surface to a predetermined depth. The well and isolation region 120 may be used as a p-well region of a pixel transistor formed in a unit pixel PX. In some embodiments, the second p-type impurity region 120b may allow the photoelectric conversion region 110 and the floating diffusion region 130 to be isolated from each other without applying a transfer control signal to the transfer gate TG. The well and isolation region 120 may include a p-type impurity having a higher density (or concentration) than other p-type impurities contained in the semiconductor substrate 10. Alternatively, the well and isolation region 120 may also be formed by or include a p-type impurity injected into the substrate 10. The floating diffusion region 130 may temporarily store photocharges (electrons) transmitted from the photoelectric conversion region 110 through the transfer gate TG. The floating diffusion region 130 may include an impurity region that is in contact with the second surface of the semiconductor substrate 10 and is formed by implantation of N-type impurities implanted from the second surface to a predetermined depth. The floating diffusion region 130 may be disposed above the well and isolation region 120. For example, the floating diffusion region 130 may be electrically isolated from the photoelectric conversion region 110 by the well and isolation region 120.

[0035] Pixel transistor 140 may include a transfer transistor 142 , a source follower transistor 144 , and a select transistor 146 .

[0036] The transfer transistor 142 may transfer photocharges (electrons) generated by the photoelectric conversion region 110 to the floating diffusion region 130 in response to a transfer control signal. The transfer transistor 142 may include a transfer gate TG formed between the photoelectric conversion region 110 and the floating diffusion region 130. Therefore, the photoelectric conversion region and the floating diffusion region are used as source / drain regions of the transfer transistor 142.

[0037] The transfer gate TG may include a recessed gate structure in which at least some regions are buried in the semiconductor substrate 10. For example, the transfer transistor 142 may be a vertical channel transfer transistor having a vertical channel formed between the photoelectric conversion region 110 and the floating diffusion region 130. In addition, the transfer gate TG may be formed to have a predetermined length so that the transfer gate TG may vertically pass through the well and isolation region 120. For example, a lower region of the transfer gate TG may protrude more downward than a bottom surface of the well and isolation region 120.

[0038] As described above, when the transfer gate TG is formed in a recessed gate structure having a vertical channel, in order to increase the number of electrons transferred from the photoelectric conversion region to the floating diffusion region, the N-type impurity density of the photoelectric conversion region needs to be increased.

[0039] However, when a high density of N-type impurities is formed to contact the channel region of the transmission gate, the transfer (Tx) characteristics may be deteriorated due to the potential pocket phenomenon. For example, when the transfer transistor is turned on, a potential pocket may be formed at a specific portion of the N-type impurity region where the channel region of the transmission gate is connected to the photoelectric conversion region. If a potential pocket is formed, some photocharges generated by the photoelectric conversion region may accumulate in the potential pocket without being transferred to the floating diffusion region. Therefore, some photocharges may remain in the lower portion of the transmission gate.

[0040] As described above, if the transfer transistor is turned off while photocharges are accumulated in the potential pocket, a spill-back phenomenon may occur, by which all or part of the photocharges accumulated in the potential pocket may move back to the photoelectric conversion region. The degradation of the transfer (Tx) characteristics caused by such a potential pocket may become more severe in proportion to the increase in the density of the N-type impurities contacting the transfer gate.

[0041] Therefore, in some embodiments, the photoelectric conversion region 110 serving as an N-type impurity region may be formed not to contact the transfer gate TG, so that transfer (Tx) characteristic degradation caused by a potential pocket may be minimized.

[0042] The source follower transistor 144 may generate a signal corresponding to the amount of charge stored in the floating diffusion region 130 and output the signal to the selection transistor 146. The selection transistor 146 may receive the output signal of the source follower transistor 144 and may output the received signal through a column line based on the selection signal. The selection transistor 144 and the source follower transistor 146 may be formed above the photoelectric conversion region 110 in such a manner that the transistor 146 may vertically overlap the photoelectric conversion region 110.

[0043] Figure 3 Some embodiments based on the disclosed technology are shown in Figure 2 The illustrated cross-sectional view shows a photoelectric conversion region formed by a combination of N-type impurity regions having different densities.

[0044] Reference Figure 3 , the photoelectric conversion region 110 may include a plurality of N-type impurity regions 112 , 114 , and 116 having different impurity densities.

[0045] The N-type impurity region 112 may be disposed below the well and isolation region 120 in the semiconductor substrate 10. In this case, the N-type impurity region 112 may be spaced apart from the well and isolation region 120 by a predetermined distance in such a manner that the N-type impurity region 112 does not contact the well and isolation region 120. In addition, the N-type impurity region 112 may be formed so as not to contact the transmission gate TG (or the channel region of the transmission gate TG). Therefore, the N-type impurity region 112 may be formed so as not to contact both the well and isolation region 120 and the transmission gate TG.

[0046] The N-type impurity region 114 may be disposed between the well and isolation region 120 and the N-type impurity region 112 in such a manner that the N-type impurity region 114 contacts the well and isolation region 120. The N-type impurity region 114 may be formed so as not to contact the transfer gate TG. The N-type impurity region 114 has a region disposed below the floating diffusion region 130 and in contact with the channel region of the transfer gate TG so that a transfer path of photocharges flowing from the photoelectric conversion region 110 to the floating diffusion region 130 may be formed.

[0047] The N-type impurity regions 112 and 114 may also be formed by some portions of the N-type impurity regions 112 and 114 (ie, Figure 3 The N-type impurity region 114 is formed in such a way that the N-type impurity region 112 and the N-type impurity region 114 overlap each other. For example, when the N-type impurity region 112 is first formed and the N-type impurity region 114 is subsequently formed, some impurities may also be implanted into the N-type impurity region 112 during the impurity implantation process for forming the N-type impurity region 114. In this case, depending on the actual process, a region where the N-type impurity regions 112 and 114 overlap each other may or may not be formed. In the following description, the N-type impurity region 114 may refer to a region disposed above the N-type impurity region 112 that does not overlap with the N-type impurity region 112.

[0048] The impurity density of the N-type impurity region 114 may be less than the impurity density of the N-type impurity region 112. Therefore, the photoelectric conversion region 110 may include a stacked structure of a low-density N-type impurity region 114 contacting the well and isolation region 120 and a high-density N-type impurity region 112 not contacting the well and isolation region 120. Although for ease of description, Figure 3 N-type impurity regions 114 are shown as separate regions separated from each other, but the disclosed technology is not limited thereto and other embodiments are possible. For example, the N-type impurity region 114 may be formed in a single ring shape having an opening corresponding to a formation region of the transfer gate TG. Figure 4 A plan view of the N-type impurity region 114 having a region of a single ring shape is shown. The N-type impurity region 114 has an opening in which a transfer gate TG is formed.

[0049] The N-type impurity region 116 may be disposed in the N-type impurity region 112. The N-type impurity region 116 may be formed simultaneously with the N-type impurity region 114. For example, the N-type impurity region 116 may be a region in which the N-type impurities injected when the N-type impurity region 114 is formed are also injected into the N-type impurity region 112. Therefore, the N-type impurity region 116 may have an impurity density higher than that of the N-type impurity region 112. The N-type impurity region 116 may be located in a region of the N-type impurity region 112 that vertically overlaps the transmission gate TG. The N-type impurity region 116 may not be formed simultaneously with the N-type impurity region 114.

[0050] Figure 3 The effects of the impurity distribution structure of the photoelectric conversion region 110 shown are as follows.

[0051] exist Figure 2 In the impurity distribution structure of the photoelectric conversion region 110 shown, the photoelectric conversion region 110 can be formed not to contact the transmission gate TG, so that regardless of the higher impurity density of the photoelectric conversion region 110, the backflow phenomenon caused by the potential pocket can be reduced, thereby improving the transfer (Tx) characteristics. However, when the impurity density of the photoelectric conversion region 110 increases, the difference in impurity density between the photoelectric conversion region 110 and the well and isolation region 120 may also increase, resulting in degradation of the breakdown voltage (BV) characteristics of the PN junction region.

[0052] Therefore, in some embodiments, the photoelectric conversion region 110 may be divided into an upper N-type impurity region 114 in contact with the well and isolation region 120 and a lower N-type impurity region 112 disposed below the upper N-type impurity region 114, so that the upper N-type impurity region 114 may be used as a low-density impurity region 114, and the lower N-type impurity region 112 may be used as a high-density impurity region 112. Therefore, the photoelectric conversion region 110 may include a stacked structure of a high-density lower N-type impurity region 112 and a low-density upper N-type impurity region 114.

[0053] In the above structure, the upper N-type impurity region 114 contacting the well and isolation region 120 is formed as a low-density impurity region, and the lower N-type impurity region 112 may be formed as a high-density impurity region. For example, the upper N-type impurity region 114 is maintained in a predetermined low-density state. As a result, although the lower N-type impurity region 112 is formed to have a high density, the difference in impurity density in the PN junction region between the photoelectric conversion region 110 and the well and isolation region 120 may not increase. Therefore, although the lower N-type impurity region 112 is formed to have a high density, the degradation of the breakdown voltage (BV) characteristics between the photoelectric conversion region 110 and the well and isolation region 120 may be prevented.

[0054] In addition, the low-density upper N-type impurity region 114 may not be formed under the transmission gate TG, and the high-density lower N-type impurity region 112 may be exposed to the transmission gate TG, so that the transfer (Tx) characteristics implemented by the transmission gate TG can be improved by the high-density lower N-type impurity region 112.

[0055] FIG. 5A to FIG. 5D The invention is a method for forming a Figure 3 A cross-sectional view of an example of a method of constructing is shown.

[0056] Reference Figure 5A , N-type impurities may be implanted into a lower region of the semiconductor substrate 10 including a first surface and a second surface opposite or opposite to the first surface, so that a high-density lower N-type impurity region 112 may be formed. For example, high-density N-type impurities may be implanted into the semiconductor substrate 10 through the second surface of the semiconductor substrate 10, so that a lower N-type impurity region 112 may be formed in the lower region of the semiconductor substrate 10.

[0057] Thereafter, P-type impurities may be implanted into the semiconductor substrate 10 through the second surface of the semiconductor substrate 10 so that a P-type impurity region 120 having a predetermined depth from the second surface while in contact with the second surface may be formed. The P-type impurity region 120 may be spaced apart from the lower N-type impurity region 112 by a predetermined distance.

[0058] Subsequently, after forming a trench defining a pixel region (PX) by etching the semiconductor substrate 10, an insulating layer is formed to fill the trench, thereby forming a device isolation layer 20. The device isolation layer 20 may include a deep trench isolation (DTI) structure and may be formed to penetrate the semiconductor substrate 10.

[0059] Reference Figure 5B A specific region to be used as a formation region of the transfer gate TG may be etched to a predetermined depth at the second surface of the semiconductor substrate 10 , thereby forming a trench 148 for a transfer gate (hereinafter referred to as a transfer gate trench).

[0060] The transmission gate trench 148 may be formed to penetrate the P-type impurity region 120, and the bottom surface of the transmission gate trench 148 may be spaced apart from the lower N-type impurity region 112 by a predetermined distance without contacting the lower N-type impurity region 112. For example, the transmission gate trench 148 may be formed to a predetermined depth, by which the bottom surface of the transmission gate trench 148 may be disposed between the P-type impurity region 120 and the lower N-type impurity region 112.

[0061] Reference Figure 5CBy implanting N-type impurities through the second surface of the semiconductor substrate 10 , an N-type impurity region 114 may be formed between the P-type impurity region 120 and the lower N-type impurity region 112 , so that an N-type impurity region 116 may be formed in the lower N-type impurity region 112 .

[0062] In this case, the density of the implanted N-type impurities may be lower than the density of other N-type impurities implanted in the process of forming the lower N-type impurity region 112. In other words, the impurity density of the upper N-type impurity region 114 may be lower than that of the lower N-type impurity region 112.

[0063] However, in the process of implanting N-type impurities, some N-type impurities implanted into the semiconductor substrate 10 through the transmission gate trench 148 may be implanted deeper into the semiconductor substrate 10 than other N-type impurities (which are not implanted into the semiconductor substrate 10 through the transmission gate trench 148) to a predetermined depth corresponding to the depth of the trench 148, so that the N-type impurities may be implanted into the lower N-type impurity region 112. In other words, an N-type impurity region 116 may be formed in the lower N-type impurity region 112, and N-type impurities may be additionally implanted into the N-type impurity region 112, so that the impurity density of the N-type impurity region 116 may be higher than that of the lower N-type impurity region 112.

[0064] Reference Figure 5D , a gate insulating layer and a conductive layer for a gate (ie, a gate conductive layer) are sequentially formed over the second surface and in the transfer gate trench 148 , and are then patterned so that pixel transistors 142 , 144 , and 146 can be formed.

[0065] In addition, N-type impurities may be implanted into a region to be used as a floating diffusion region in the P-type impurity region 120 so that the floating diffusion region 130 may be formed at one side of the transfer gate TG.

[0066] Figure 6 is a cross-sectional view showing an example of a unit pixel obtained based on some other embodiments of the disclosed technology. Figure 7 It is shown Figure 6 The illustrated cross-sectional view shows a photoelectric conversion region formed by a combination of N-type impurity regions having different densities.

[0067] exist Figure 6 and Figure 7 In, with Figure 2 and Figure 3 The same constituent elements are denoted by the same reference numerals, and thus, a detailed description thereof will be omitted herein for the sake of convenience of description.

[0068] Reference Figure 6 and Figure 7 , with Figure 2 and Figure 3 Differently, the photoelectric conversion region 110 ′ may be formed to contact the well and the isolation region 120 only below the floating diffusion region 130 .

[0069] For example, the photoelectric conversion region 110' may include a high-density lower N-type impurity region 112 and a low-density upper N-type impurity region 114'. The high-density lower N-type impurity region 112 may be disposed below the well and isolation region 120 while being spaced apart from the well and isolation region 120 by a predetermined distance in such a manner that the high-density lower N-type impurity region 112 does not contact the well and isolation region 120 and the transmission gate TG. The low-density upper N-type impurity region 114' may be formed below the floating diffusion region 130 in such a manner that the low-density upper N-type impurity region 114' contacts the well and isolation region 120. Although the low-density upper N-type impurity region 114' is formed not to contact the transmission gate TG, the low-density upper N-type impurity region 114' is formed to contact the channel region of the transmission gate TG so that a transmission path of photocharges flowing from the photoelectric conversion region 110 to the floating diffusion region 130 may be formed.

[0070] As is apparent from the above description, an image sensing device based on some embodiments of the disclosed technology can improve transfer (Tx) characteristics of photo charges generated in a photoelectric conversion region.

[0071] In addition, image sensing devices based on some embodiments of the disclosed technology can prevent degradation of breakdown voltage (BV) characteristics in photoelectric conversion elements.

[0072] Those skilled in the art will appreciate that the embodiments may be performed in other specific ways than those set forth herein. Therefore, the above embodiments should be interpreted in all respects as illustrative and not restrictive. In addition, those skilled in the art will appreciate that claims that are not explicitly referenced to each other in the appended claims may be combined as one embodiment, or may be included as new claims through subsequent amendments after filing an application.

[0073] Although many illustrative embodiments have been described, it will be appreciated that numerous other modifications and embodiments may be devised by those skilled in the art. In particular, within the scope of the present disclosure, the drawings, and the appended claims, a variety of changes and modifications may be made in the components and / or arrangements. In addition to changes and modifications in the components and / or arrangements, alternative uses will be apparent to those skilled in the art.

[0074] CROSS-REFERENCE TO RELATED APPLICATIONS

[0075] This patent document claims priority to and the benefit of Korean Patent Application No. 10-2020-0039214, filed on March 31, 2020, the entire contents of which are incorporated herein by reference as a part of the disclosure of this patent document.

Claims

1. An image sensing device, comprising: a first impurity region disposed in the semiconductor substrate and including impurities having a first doping type, the first impurity region being configured to generate photocharges by performing photoelectric conversion in response to incident light; a second impurity region, the second impurity region being disposed above the first impurity region and having impurities of a second doping type different from the first doping type, the second impurity region being in contact with the first impurity region at some portions of the first impurity region; a floating diffusion region disposed above the second impurity region and configured to store the photocharges; as well as a transfer gate coupled to the floating diffusion region and configured to transfer the photocharges generated by the first impurity region to the floating diffusion region, wherein the first impurity region is arranged not to contact the transfer gate, wherein a portion of the first impurity region vertically overlapping the transmission gate is spaced apart from a channel region of the transmission gate, and A portion of the first impurity region vertically overlapping the floating diffusion region contacts the channel region of the transfer gate.

2. The image sensing device according to claim 1, wherein: The first impurity region is formed to be in contact with the second impurity region in a region disposed below the floating diffusion region.

3. The image sensing device according to claim 1, wherein: The first impurity region includes a portion disposed under the transfer gate and spaced apart from a bottom surface of the second impurity region by a predetermined distance.

4. The image sensing device according to claim 1, wherein: The first impurity region includes a plurality of impurity regions having different impurity densities from one another.

5. The image sensing device according to claim 1, wherein: The first impurity region includes: a lower impurity region having a first impurity density and disposed to be spaced apart from the second impurity region by a predetermined distance; and an upper impurity region having a second impurity density lower than the first impurity density and disposed between the lower impurity region and the second impurity region, wherein the upper impurity region is in contact with the lower impurity region and the second impurity region.

6. The image sensing device according to claim 5, wherein: The upper impurity region has an opening exposing the lower impurity region, and the opening is located at a position vertically overlapping the transfer gate.

7. The image sensing device according to claim 6, wherein: The upper impurity region has a ring shape including the opening.

8. The image sensing device according to claim 5, wherein: The upper impurity region is located below the floating diffusion region.

9. The image sensing device according to claim 5, further comprising: A third impurity region is provided in the lower impurity region and has a third impurity density higher than the first impurity density.

10. The image sensing device according to claim 9, wherein: The third impurity region is disposed to vertically overlap the transfer gate.

11. The image sensing device according to claim 1, wherein: The transfer gate has a buried portion buried in the semiconductor substrate.

12. The image sensing device according to claim 11, wherein: A distance between the buried portion of the transfer gate and a top surface of the first impurity region is shorter than a distance between a bottom surface of the second impurity region and a top surface of the first impurity region.

13. The image sensing device according to claim 1, further comprising: a source follower transistor configured to output a signal corresponding to an amount of photocharge stored in the floating diffusion region; as well as a selection transistor configured to transmit an output signal of the source follower transistor to a column line based on a selection signal, The source follower transistor and the selection transistor are disposed above the first impurity region so that the source follower transistor and the selection transistor vertically overlap with the first impurity region.

14. An image sensing device, comprising: a pixel array including a plurality of unit pixels and configured to provide an electrical signal corresponding to incident light received by the pixel array, Wherein, each of the plurality of unit pixels comprises: a first impurity region having a first type of impurities and configured to generate photocharges by photoelectric conversion of the incident light; and a second impurity region having a second type of impurity different from the first type of impurity and disposed above the first impurity region, wherein the top surface of the first impurity region has a portion away from the second impurity region, wherein a portion of the first impurity region vertically overlapping with the transmission gate is spaced apart from a channel region of the transmission gate, and A portion of the first impurity region vertically overlapping the floating diffusion region contacts the channel region of the transfer gate.

15. The image sensing device according to claim 14, wherein: The first impurity region includes a plurality of impurity regions having different impurity densities from one another.

16. The image sensing device according to claim 14, wherein: The first impurity region includes: a lower impurity region having a first impurity density and disposed to be spaced apart from the second impurity region by a predetermined distance; and an upper impurity region having a second impurity density lower than the first impurity density and disposed between the lower impurity region and the second impurity region, wherein the upper impurity region is in contact with the lower impurity region and the second impurity region.

17. The image sensing device according to claim 16, wherein: The upper impurity region has a ring shape including an opening to partially expose the lower impurity region.

18. The image sensing device according to claim 17, further comprising: A third impurity region is provided in the lower impurity region and has a third impurity density higher than the first impurity density.

19. The image sensing device according to claim 18, wherein: The third impurity region is disposed to vertically overlap the opening.

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