Imaging device and imaging system

Abstract

An image sensor that analogically combines and reads out image sensing photodiodes and phase detection photodiodes. An imaging device includes a first pixel circuit having a first plurality of photodiodes including a phase detection autofocus photodiode and an image sensing photodiode. A first buffer transistor having a first threshold voltage is coupled to the first plurality of photodiodes to generate a first output signal. A second pixel circuit is included having a second plurality of photodiodes that are all image sensing photodiodes. A second buffer transistor having a second threshold voltage is coupled to the second plurality of photodiodes to generate a second output signal. The first threshold voltage is less than the second threshold voltage. A driver is coupled to receive a combination of the first and second output signals to generate a total output signal. Because the first threshold voltage is less than the second threshold voltage, the first output signal has a greater influence in the total output signal than the second output signal.

Description

TECHNICAL FIELD

[0001] The present disclosure relates generally to image sensors, and in particular, but not exclusively, to image sensors including phase-detection autofocus pixels. BACKGROUND

[0002] Image sensors have become ubiquitous and are widely used in digital cameras, cellular phones, security cameras, and medical, automotive, and other applications. As image sensors are integrated into a wide variety of electronic devices, it is desirable to enhance their functionality, performance metrics, etc. in as many aspects as possible (e.g., resolution, power consumption, dynamic range, etc.) by both device architects design as well as image acquisition processing.

[0003] A typical image sensor operates in response to image light incident on the image sensor from an external scene. The image sensor includes an array of pixels having a photosensitive element (e.g., a photodiode) that absorbs a portion of the incident image light and generates image charge after absorbing the image light. The image charge of each of the pixels can be measured as an output signal from each photosensitive element, which varies with the incident image light. In other words, the amount of image charge generated is proportional to the intensity of the image light used to generate a digital image (i.e., image data) representing the external scene. SUMMARY

[0004] Embodiments of the present disclosure provide an imaging device comprising: a first pixel circuit including: a first plurality of photodiodes, wherein the first plurality of photodiodes includes at least one phase-detection autofocus (PDAF) photodiode, wherein the remaining photodiodes of the first plurality of photodiodes are all image-sensing photodiodes; and a first buffer transistor having a first threshold voltage, wherein the first buffer transistor is coupled to the first plurality of photodiodes to generate a first output signal in response to charge photogenerated by the first plurality of photodiodes in response to incident light; a second pixel circuit including: a second plurality of photodiodes, wherein the second plurality of photodiodes are all image-sensing photodiodes; and a second buffer transistor having a second threshold voltage, wherein the first threshold voltage is less than the second threshold voltage, wherein the second buffer transistor is coupled to the second plurality of photodiodes to generate a second output signal in response to charge photogenerated by the second plurality of photodiodes in response to the incident light; and a driver coupled to receive the first output signal and the second output signal to generate a total output signal in response to a combination of the first output signal and the second output signal, wherein in response to the first threshold voltage being less than the second threshold voltage, an influence of the first output signal prevails over an influence of the second output signal in the total output signal.

[0005] Another embodiment of the present disclosure provides an imaging system, comprising: a pixel array coupled to generate image data in response to incident light, the pixel array including: a first pixel circuit including: a first plurality of photodiodes, wherein the first plurality of photodiodes includes at least one phase detection autofocus (PDAF) photodiode, wherein the remaining photodiodes of the first plurality of photodiodes are all image sensing photodiodes; and a first buffer transistor having a first threshold voltage, wherein the first buffer transistor is coupled to the first plurality of photodiodes to generate a first output signal in response to charge photogenerated by the first plurality of photodiodes in response to the incident light; a second pixel circuit including: a second plurality of photodiodes, wherein the second plurality of photodiodes are all image sensing photodiodes; and a second buffer transistor having a second threshold voltage, wherein the first threshold voltage is less than the second threshold voltage, wherein the second buffer transistor is coupled to the second plurality of photodiodes to generate a second output signal in response to charge photogenerated by the second plurality of photodiodes in response to the incident light; and control circuitry coupled to the pixel array to control operation of the pixel array; and readout circuitry coupled to the pixel array to read out the first output signal and the second output signal from the pixel array, wherein the readout circuitry includes a driver coupled to receive the first output signal and the second output signal to generate a total output signal in response to a combination of the first output signal and the second output signal, wherein in response to the first threshold voltage being less than the second threshold voltage, an influence of the first output signal prevails over an influence of the second output signal in the total output signal, wherein the image data is generated in response to the total output signal. BRIEF DESCRIPTION OF DRAWINGS

[0006] Non-limiting and exhaustive embodiments of the present disclosure are described with reference to the following drawings, wherein like numerals refer to like parts throughout the several views, unless otherwise indicated.

[0007] Figure 1A FIG. illustrates one example of an imaging system including an image sensor that analogically merges readout of image sensing photodiodes and phase detection photodiodes in accordance with the teachings of this disclosure.

[0008] Figure 1B FIG. illustrates one example of a pixel circuit having a group of photodiodes included in an imaging system including an image sensor that analogically merges readout of image sensing photodiodes and phase detection photodiodes in accordance with the teachings of this disclosure.

[0009] Figure 2 FIG. illustrates one example of a color pixel array with a photodiode array including interspersed phase detect autofocus photodiodes among image sensing photodiodes, in accordance with the teachings of this disclosure.

[0010] Figure 3 FIG. shows one example of a schematic diagram of a color pixel array with a group of pixel circuits including interspersed phase detect autofocus pixel circuits among image sensing pixel circuits, analog binning and readout of image sensing pixel circuits by readout circuitry in an image sensor, in accordance with the teachings of this disclosure.

[0011] Figure 4 FIG. shows one example of a timing diagram illustrating the relative relationship between phase detect autofocus readout, normal image sensing readout, and combined readout of binned pixel circuits, in accordance with the teachings of this disclosure.

[0012] Throughout the drawings, like reference characters designate like elements. Those of ordinary skill in the art will understand that the elements in the figures are shown for illustration only and that the figures are not necessarily drawn to scale. For example, the dimensions of some of the elements in each of the figures can be exaggerated relative to other elements for clarity. Further, it is understood that common but well-known elements that are useful or necessary, but are not fundamental to the understanding of the various embodiments of the present disclosure, are not depicted in order to more clearly illustrate the various embodiments of the present disclosure. DETAILED DESCRIPTION

[0013] Described herein relate to reading out phase detect autofocus pixel circuits and binned photodiodes included in image sensing pixel circuits in an imaging system. In the following description, numerous specific details are set forth to provide a thorough understanding of the examples. One skilled in the relevant art will recognize, however, that the technology described herein can be practiced without one or more of the specific details, or with other methods, components, materials, etc. In other instances, well-known structures, materials, or operations are not shown or described in detail in order to avoid obscuring aspects of certain innovations.

[0014] Reference throughout this specification to "one example" or "an example" means that a particular feature, structure, or characteristic described in connection with the example is included in at least one example of the present invention. Thus, the appearance of the phrases "in one example" or "in one embodiment" in various places throughout this specification are not necessarily all referring to the same example. Furthermore, the particular features, structures, or characteristics can be combined in any suitable manner in one or more examples.

[0015] For ease of description, spatially relative terms (e.g., “beneath,” “below,” “lower,” “under,” “above,” “upper,” “top,” “bottom,” “left,” “right,” “front,” “back,” “rear,” “rearward,” “forward,” “side,” “horizontal,” “vertical,” and the like) can be used herein for the purpose of illustrating elements of the apparatus and like in the figures. It will be understood that the spatially relative terms are intended to encompass different orientations of the device in use or operation, in addition to the orientations depicted in the figures. For example, if a device in the figures is turned over or rotated, elements described as “below” or “beneath” other elements or features would then be oriented “above” the other elements or features. Thus, the exemplary term “below” can encompass both an orientation of above and below. The device can be otherwise oriented (rotated 90 degrees or at other orientations) and the spatially relative descriptors used herein interpreted accordingly. It will also be understood that when a layer is referred to as being “between” two layers, it can be the only layer between the two layers or one or more intervening layers can also be present.

[0016] Throughout this specification, several terms will be used. These terms will take on their ordinary meaning in the art unless otherwise specifically defined herein or the context of their use will dictate otherwise. It is noted that in this document, element names and symbols can be used interchangeably (e.g., Si and silicon); however, both have the same meaning.

[0017] As will be discussed, various examples are disclosed of reading out phase detection autofocus pixel circuits and image sensing pixel circuits from an analog- merged array of color pixels. For example, in one example, an imaging device includes phase detection autofocus pixel circuits interspersed among image sensing pixel circuits in an array of color pixels. In examples, each of the pixel circuits includes a plurality of photodiodes, such as four photodiodes. Note that for illustrative purposes, the examples described herein describe embodiments in which each pixel circuit includes four photodiodes. Of course, it should be appreciated that in other examples, a smaller or larger number of photodiodes can be included in each pixel circuit. Assuming an example in which each pixel circuit has four photodiodes, the charge information generated from each of the four photodiodes in each pixel circuit is combined or merged together into one output signal. In various examples, the outputs of groups of multiple pixel circuits are also combined together or analog- merged and read out. In various examples, the groups of multiple pixel circuits include phase detection autofocus pixels and normal image sensing pixel circuits. In various examples, in accordance with the teachings of this disclosure, to read out phase detection autofocus information from the analog- merged pixel circuits, the influence of the output of the phase detection autofocus pixel circuits is set to overcome the combined influence of the outputs of the normal image sensing pixel circuits by utilizing a buffer amplifier or source follower transistor with a low threshold voltage in the phase detection autofocus pixel circuits and / or utilizing a floating diffusion boost signal.

[0018] To illustrate, Figure 1AFigure illustrates one example of an imaging system 100 including a color pixel array 102 in accordance with an embodiment of the present disclosure, reading out analog- merged pixel circuits including phase detection autofocus pixel circuits and normal image sensing pixel circuits from the color pixel array 102. As will be discussed in greater detail below, in accordance with the teachings of the present disclosure, a buffer amplifier with a low threshold voltage and / or a floating diffusion boost signal can be utilized in the phase detection autofocus pixel circuits to read out phase detection information from the merged phase detection autofocus pixel circuits and image sensing pixel circuits. As shown, the imaging system 100 includes a pixel array 102, control circuitry 110, readout circuitry 106, and functional logic 108. In one example, the pixel array 102 is a two-dimensional (2D) array including a plurality of photodiodes (e.g., P1, P2,... Pn). In one example, some of the photodiodes interspersed among the photodiode array are configured as phase detection autofocus (PDAF) photodiodes interspersed among the normal image sensing photodiodes in the pixel array 102. As illustrated in the depicted example, pixel circuits 104 including the PDAF photodiodes interspersed among the image sensing photodiodes are arranged in rows (e.g., R1 to Ry) and columns (e.g., C1 to Cx) to capture image data of a person, place, object, etc., which can then be used to render a 2D image of the person, place, object, etc. In an example, the PDAF photodiodes interspersed among the pixel circuits 104 of the pixel array 102 provide phase detection information, which the image data can be used for autofocus operation of the imaging system 100.

[0019] In one example, in accordance with the teachings of the present disclosure, after each image sensor photodiode in the pixel array 102 has acquired its image charge or phase detection charge by photo-generating charge in response to incident light, the corresponding image charge data and / or phase detection charge data is read out by the readout circuitry 106 via bit lines 112 and then transferred to the functional logic 106. The readout circuitry 106 can be coupled to read out data from the pixel circuits 104 in the pixel array 102. In various examples, the readout circuitry 106 can include amplification circuitry, analog-to-digital (ADC) conversion circuitry, or others. In one example, the readout circuitry 106 can read out image data or phase detection data from the pixels 104 via the bit lines 112 as illustrated in FIG. 1. Figure 1A The functional logic 108 can store the image data or even manipulate the image data by applying image post effects (e.g., cropping, rotating, removing red eye, adjusting brightness, adjusting contrast, or others). In various examples, the imaging system 100 can utilize the phase detection autofocus information provided by the PDAF pixel circuits to provide autofocus operation.

[0020] Figure 1B FIG. 1 illustrates one example of a schematic diagram of a pixel circuit 104 included in an image sensor from which phase detection autofocus information can be read out from analog- merged phase detection autofocus pixel circuits and image-sensing pixel circuits, in accordance with the teachings of this disclosure. It should be appreciated that Figure 1B The pixel circuit 104 can be one example of a pixel circuit 104 of the image sensor 100 shown in Figure 1A The pixel circuit 104 can be one example of a pixel circuit 104 of the image sensor 100 shown in

[0021] In the example depicted in Figure 1B In the example depicted in

[0022] In examples where all of the photodiodes 114 in the pixel circuit 104 are configured as image-sensing photodiodes, the pixel circuit 104 can be considered an image-sensing pixel circuit 104. In examples where some or at least one of the photodiodes 114 in the pixel circuit 104 are configured as image-sensing photodiodes, the pixel circuit 104 can be considered a phase detection autofocus pixel circuit 104. Note that the examples described herein describe embodiments in which a phase detection autofocus pixel circuit 104 includes two photodiodes configured as phase detection autofocus photodiodes and two photodiodes configured as image-sensing photodiodes for illustrative purposes. It should of course be appreciated that in other examples, a smaller number or a larger number of phase detection autofocus photodiodes can be included among the image-sensing photodiodes.

[0023] Figure 1BThe example depicted in the middle also illustrates a group of transfer transistors coupled between the floating diffusion 118 and the group of photodiodes. In the example, the group of transfer transistors includes transfer transistors 116-1, 116-2, 116-3, and 116-4, which are coupled to be controlled in response to transfer transistor control signals TX1, TX2, TX3, and TX4, respectively. As such, the floating diffusion 118 is coupled to receive photo-generated charges from the four photodiodes 114-1, 114-2, 114-3, and 114-4 via the transfer transistors 116-1, 116-2, 116-3, and 116-4. Thus, the photo-generated charges received from the four photodiodes 114-1, 114-2, 114-3, and 114-4 are combined together or analogically merged in the floating diffusion 118.

[0024] Figure 1B The example shown in the middle shows the reset transistor 120 and the buffer transistor 124 coupled to a voltage supply and the floating diffusion 118. In operation, the reset transistor is coupled to reset the floating diffusion 118 in response to a reset signal RST. In the example, the buffer transistor 124 has a gate terminal coupled to the floating diffusion 118 to generate an output signal 130 in response to photo-generated charges that have been transferred from the photodiodes 114 to the floating diffusion 118 by the respective transfer transistors 116. In one example, the buffer transistor 124 is a buffer amplifier or source follower coupled MOSFET transistor coupled to provide the output signal 130, which includes the shown drain current I D In the depicted example, the select transistor 126 is coupled between the buffer transistor 124 and the bit line 112. In operation, the pixel circuit 104 outputs the output signal 130 to the bit line 112 via the select transistor 126 in response to a select signal SEL. As will be discussed in greater detail below, in various embodiments, the bit line 112 is coupled to receive multiple output signals 130 simultaneously from multiple pixel circuits 104. As such, in accordance with the teachings of this disclosure, each output signal 130 received by the bit line 112 is combined or analogically merged with the other output signals 130 when the respective pixel circuits 104 are read out.

[0025] Figure 2 An example of a color pixel array 202 including a color filter array disposed above the pixel circuits, including the shown pixel circuits 204A, 204B, 204C, 204D, 204E, 204F, 204G, and 204H, in accordance with the teachings of this disclosure is illustrated. It will be appreciated that, Figure 2 The color pixel array 202 can be Figure 1AThe example of the pixel array 102 discussed in the middle and the pixel circuits 204A, 204B, 204C, 204D, 204E, 204F, 204G, and 204H can be Figure 1B The example of the pixel circuit 104 discussed in the middle and the elements described above with similar names and numbers are coupled and have similar functionality below.

[0026] In Figure 2 In the example depicted in the middle, the pixel circuits 204A, 204B, 204C, 204D, 204E, 204F, 204G, and 204H are organized into groups of four pixel circuits. A first group of pixel circuits includes the pixel circuits 204A, 204B, 204C, and 204D. A second group of pixel circuits includes the pixel circuits 204E, 204F, 204G, and 204H. In various examples, all of the pixel circuits in each group of pixel circuits are read out simultaneously. Within each pixel circuit 204 is a respective group of four adjacent photodiodes that surround four respective transfer transistors 216A, 216B, 216C, 216D, 216E, 216F, 216G, and 216H that surround respective floating diffusions 218A, 218B, 218C, 218D, 218E, 218F, 218G, and 218H. Thus, as shown in the example depicted, each respective floating diffusion 218A, 218B, 218C, 218D, 218E, 218F, 218G, and 218H is shared between the four respective photodiodes included in each respective pixel circuit 204A, 204B, 204C, 204D, 204E, 204F, 204G, and 204H via the respective transfer transistors 216A, 216B, 216C, 216D, 216E, 216F, 216G, and 216H.

[0027] In an example, a color filter array having a Bayer color filter array pattern is disposed over the pixel circuits 204 of the color pixel array 202. In the depicted example, the color filter array includes a plurality of color filters. In the depicted example, the color filters in the color filter array include red filters indicated with an “R” label, green filters indicated with a “G” label, and blue filters indicated with a “B” label. In the depicted example, each color filter is disposed over a respective photodiode of an underlying pixel circuit 204. As Figure 2As shown in the example depicted in the middle, all photodiodes of each pixel circuit 204A, 204B, 204C, 204D, 204E, 204F, 204G, and 204H that are under a color filter are under a color filter with the same green "G". As such, all photodiodes of pixel circuits 204A, 204B, 204C, 204D, 204E, 204F, 204G, and 204H that are under a color filter are illuminated by green "G" incident light.

[0028] Figure 2 The example depicted in the middle also illustrates that each pixel circuit group includes pixel circuits that include one or more PDAF photodiodes. Specifically, the first pixel circuit group of pixel circuits 204A, 204B, 204C, and 204D includes pixel circuit 204A that includes two PDAF photodiodes within the dashed oval, which are labeled "PD". The remaining pixel circuits 204B, 204C, and 204D of the first group all include normal image sensing photodiodes that are optically coupled to receive green "G" incident light. Similarly, the second pixel circuit group of pixel circuits 204E, 204F, 204G, and 204H includes pixel circuit 204F that includes two PDAF photodiodes within the dashed oval, which are labeled "PD". The remaining pixel circuits 204E, 204G, and 204H of the second group all include normal image sensing photodiodes that are optically coupled to receive green "G" light.

[0029] In various examples, pixel circuits that include PDAF photodiodes can be considered PDAF pixel circuits that provide phase detection information, and other pixel circuits that all include image sensing photodiodes are normal image sensing pixel circuits. As will be discussed, in accordance with the present disclosure, an imaging system that includes color pixel array 202 can read out an entire group of multiple pixel circuits at one time, including in examples four pixel circuits or 16 photodiodes at one time by analog combining or combining output signals from each pixel circuit. In various examples, in accordance with the teachings of the present disclosure, phase detection information included in the total output signals from four pixel circuits or 16 photodiodes in a group are read out by having the influence of output signals from PDAF pixel circuits dominate the influence of output signals from normal image sensing pixel circuits in the combined or analog combined total output signals from the group of pixel circuits.

[0030] To illustrate, Figure 3An example of a schematic diagram of a color pixel array 302 comprising a group of pixel circuits according to the teachings of the present invention is shown, wherein the PDAF pixel circuit 304A is distributed among the normal image sensing pixel circuits 304B, 340C, and 304D, and the readout circuit system 306 in the image sensor analogally combines and reads out the PDAF pixel circuit 304A and the normal image sensing pixel circuits 304B, 340C, and 304D. It should be understood that... Figure 3 The color pixel array 302 and readout circuit system 306 can be Figure 1A Examples of pixel array 102 and readout circuit system 106 discussed herein, and Figure 3 The pixel circuits 304A, 304B, 304C, and 304D can be Figure 2 The first group or pixel circuits 204A, 204B, 204C and 204D discussed in the document Figure 1B The pixel circuit 104 discussed herein is an example, and the components with similar names and numbers described above are coupled and have similar functions in the following text.

[0031] like Figure 3 As shown in the example, pixel array 302 includes a group of pixel circuits, which includes PDAF pixel circuit 304A and normal image sensing pixel circuits 304B, 304C, and 304D. As shown, each pixel circuit 304 includes multiple photodiodes. PDAF pixel circuit 304A includes: two PDAF photodiodes, indicated by a “PD” label within an elliptical dashed line; and two image sensing photodiodes, optically coupled to receive green “G” incident light, indicated by a “G” label. In operation, the two PDAF photodiodes are configured to provide phase detection information (alongside other PDAF pixel circuits in pixel array 302 that are read out individually). Normal image sensing pixel circuits 304B, 304C, and 304D each include four image sensing photodiodes optically coupled to receive green “G” incident light, indicated by a “G” label. In operation, the normal image sensing photodiodes are configured to provide image sensing information. Each pixel circuit 304 includes a corresponding floating diffuser 318, which is coupled to receive the charge generated by each corresponding photodiode via a corresponding transfer transistor. Thus, the photogenerated charges from the four photodiodes are combined or simulated to merge in each corresponding floating diffuser 318.

[0032] The depicted example shows that each pixel circuit 304 includes a respective buffer transistor 324 coupled to a respective floating diffusion 318 in the pixel circuit 304. In various examples, each buffer transistor 324 is a buffer amplifier or source follower coupled MOSFET having a gate terminal coupled to the respective floating diffusion 318 to generate a respective output signal 330. In various examples, the output signal 330 from each buffer transistor 324 includes a current. Thus, the output signal 330A from the PDAF pixel circuit 304A is also labeled as II, the output signal 330B from the image sensing pixel circuit 304C is also labeled as I3, the output signal 330B from the image sensing pixel circuit 304B is also labeled as I2, and the output signal 330D from the image sensing pixel circuit 304D is also labeled as I4.

[0033] Each output signal 330 from each respective pixel circuit 304 is coupled to be received by the bit line 312 via the respective select transistor 326 shown. In the depicted example, the select transistor 326 is a pass-gate MOSFET having a gate terminal coupled to a select line 314. In various examples, the select line 314 is coupled to a row select circuit 316 in the readout circuitry 306. Figure 3 In the depicted example, the readout circuitry 306 is coupled to receive the output signals 330 from the pixel circuits 304 of the pixel array 302 via the bit line 312. The depicted example shows that the bit line 312 is split into a first portion 312-1 and a second portion 312-2. The bit line portion 312-1 is coupled to receive the output signal 330A current II from the PDAF pixel circuit 304A and the output signal 330C current I3 from the image sensing pixel circuit 304C. The bit line portion 312-2 is coupled to receive the output signal 330B current I2 from the image sensing pixel circuit 304B and the output signal 330D current I4 from the image sensing pixel circuit 304D.

[0034] As such, the output signal 330A current II and the output signal 330C current I3 are combined together or analog merged as II+I3 in the bit line portion 312-1, as shown. Similarly, the output signal 330B current I2 and the output signal 330D current I4 are combined together or analog merged as I2+I4 in the bit line portion 312-2, as shown. The bit line portions 312-1 and 312-2 come together in the readout circuitry 306. As such, the II+I3 and I2+I4 current components of the output signals 330A, 330B, 330C, and 330D are combined together or analog merged again as II+I2+I3+I4 in the bit line 312, as shown. The bit line 312 is coupled to a current source 336 coupled to ground and an input of a driver 338 in the readout circuitry 306, as shown. The current source 336 is coupled to receive the analog merged current as II+I2+I3+I4 and sinked into a bias current II+I2+I3+I4, as shown. BIASAs shown. The voltage V generated from bit line 312 at current source 336. O The voltage V is coupled to be received at the input of driver 338. O This is used to generate a total output signal 340 representing charge information read from the group of pixel circuits 304A, 304B, 340C, and 340D. Therefore, according to the teachings of the invention, in various embodiments, the total output signal 340 represents the analog-combined charge read from the corresponding four pixel units 304 or the corresponding 16 photodiodes.

[0035] According to the teachings of the present invention, Figure 3 The exemplary diagrams illustrated in the text can also be used to read out, for example... Figure 2 Other pixel unit groups illustrated in the diagram, and for example Figure 1A The imaging system illustrated in the figure contains multiple bit lines that can be used to read multiple columns of a group of pixel units.

[0036] Return to reference Figure 3 The examples depicted, note that, according to the teachings of the present invention, the higher threshold voltage "V" of the buffer transistors 324B, 324C, and 324D of the normal image sensing pixel circuits 304B, 304C, and 304D is... T "In comparison, the buffer transistor 324A of the PDAF pixel circuit 304A has a low threshold voltage 'low V'." T According to the teachings of the present invention, due to the low threshold voltage "low V" of the buffer transistor 324A, T Therefore, the effect of the 330A output signal current I1 will outweigh the effect of the other output signal currents I2+I3+I4.

[0037] Furthermore, according to the teachings of the present invention, in one embodiment, the floating diffuser boost signal 328 can also be used for the floating diffuser 318A of the PDAF pixel 304 to further enhance the influence of the output signal 330A current I1 over the influence of the combination of the remaining output signal currents I2+I3+I4 during the readout of charge information from the group of pixel circuits 304A, 304B, 304C, and 304D. In this example, during the readout period, the floating diffusers 318B, 318C, and 318D of the normal image sensing pixels 304B, 304C, and 304D are not boosted and therefore do not receive the floating diffuser boost signal 328. Therefore, according to the teachings of the present invention, since the output signals 330A, 330B, 330C, and 330D are analog-combined, the phase detection information in the I1+I2+I3+I4 current contained in the bit line 312 from the PDAF pixel 304A will not be lost.

[0038] To illustrate, in various examples, each buffer transistor 324 in each pixel circuit 304 is a source follower coupled MOSFET. As such, the drain current I D may be characterized by equation (1) below:

[0039]

[0040] I D (sat) represents the drain current of the saturated buffer transistor 324, μ represents the constant surface mobility of all mobile electrons in the inversion layer of the buffer transistor 324, C OX represents the gate oxide capacitance per unit area of the buffer transistor 324, W represents the channel width of the buffer transistor 324, L represents the channel length of the buffer transistor 324, V GS represents the gate-source voltage of the buffer transistor 324, and V TH represents the threshold voltage of the buffer transistor 324.

[0041] If it is assumed that the voltage at the corresponding floating diffusion is and the voltage drop across the select transistor 326A is minimal, then the gate-source voltage of the buffer transistor 324A can be replaced by As such, the output signal 330A drain current I1 of the buffer transistor 324A of the PDAF pixel circuit 304A can be characterized by equation (2) below:

[0042]

[0043] where represents the low threshold voltage V T .

[0044] Similarly, if it is assumed that the voltage at the corresponding floating diffusion 318B, 318C, and 318D is (where i = 2, 3, 4) and the voltage drop across the corresponding select transistor 326B, 326C, and 326D is minimal, then the combined output signal drain currents I2, I3, and I4 of the buffer transistors 324B, 324C, and 324D of the normal image sensing pixel circuits 304B, 304C, and 304D can be characterized by equation (3) below:

[0045]

[0046] where where i = 2, 3, 4, respectively, represent the higher threshold voltages V T .

[0047] Thus, combining Equations (2) and (3) above, the bias current I BIAS of current source 336 is given by 4) which can be characterized by the following Equation (4):

[0048]

[0049] Since the lower threshold voltage V of buffer transistor 324A is less than the higher threshold voltages V where i = 2, 3, 4, the I1component (i.e., Equation (2)) of I1+ I2+ I3+ I4dominates the effect of bias current I BIAS .

[0050] Furthermore, in various examples, the effect of the I1component (i.e., Equation (2)) of I1+ I2+ I3+ I4can be further enhanced by applying the floating diffusion boost signal 328 to the floating diffusion 318A of PDAF pixel circuit 304A shown in Figure 3 In examples, the floating diffusions 318B, 318C, and 318D of normal image pixels 304B, 304C, and 304D are not boosted. With the floating diffusion boost signal 328 applied to the floating diffusion 318A, the floating diffusion voltage V at the gate terminal of buffer transistor 324A will be boosted to be greater than the floating diffusion voltages V where i = 2, 3, 4, at the respective gate terminals of buffer transistors 324B, 324C, and 324D. Thus, in accordance with the teachings of the present disclosure, Equation (4) shows that the effect of the I1component (i.e., Equation (2)) of I1+ I2+ I3+ I4will further dominate the bias current I BIAS .

[0051] Thus, in accordance with the teachings of the present disclosure, the output signal 330A current I1will dominate the effect of the remaining output signal currents I2+ I3+ I4and will account for the vast majority of the bias current I BIAS received by driver 338 will be substantially in line with the voltage V O of the floating diffusion 318A of PDAF pixel circuit 304A.

[0052] To illustrate, Figure 4 ​Examples of timing diagrams illustrating the relative relationships between PDAF pixel circuit readout, normal image sensing pixel circuit readout, and the overall combined readout of the analog merging pixel circuit, according to the teachings of the present invention, are provided. It should be understood that... Figure 4 The example timing diagrams shown in the document illustrate the concept. Figure 3 The exemplary output signal readings of the color pixel array 302 and the readout circuit system 306. Figure 3 The color pixel array 302 and readout circuit system 306 may be included in Figure 1A In an example of a pixel array 102 and a readout circuit system 106, and including Figure 2 Examples of the first group of pixel circuits 204A, 204B, 204C, and 204D discussed herein, or Figure 1B An example of the pixel circuit 104 discussed herein. Thus, elements with similar names and numbers described above are coupled and have similar functions in the following text.

[0053] Figure 4 The timing diagram example shown in the figure illustrates the voltage V. O Example 434, voltage V O 434 can be Figure 3 The voltage V at the input of the driver 338 O 334 examples. The examples are illustrated. Figure 4 The V in the upper left part during the correlated double sampling (CDS) of the PDAF pixel circuit output reading 442. O 434 readout voltage, Figure 4 The upper right part of the V value during the correlation double sampling period of the normal image sensing pixel circuit output reading 444. O 434 readout voltage and Figure 4 The combined output signal 446 of the PDAF pixel circuit and the normal image sensing pixel circuit in the bottom part.

[0054] like Figure 4 The diagram in the upper left corner illustrates the readout 442, showing the V output of the PDAF pixel circuit. O The sampled and held reading of the reset (SHR) value of voltage 434 is greater than Figure 4 The SHR value V of the normal image sensing pixel circuit output shown in the upper right diagram of the readout 444 is illustrated. RESET The PDAF pixel circuit outputs a readout of 442V. O The relatively large reading of voltage 434 is due to the threshold voltage V. T The low voltage and the floating diffusion boost signal are applied to the floating diffusion section of the previously discussed PDAF pixel circuit.

[0055] in addition, Figure 4V O The sample-and-hold reading of the signal (SHS) value of the voltage 434 is also greater than the SHS value V SIGNAL of the normal image sensing pixel circuit output reading 444 O This greater reading of the voltage 434 is due to the threshold voltage V T low, the application of the floating diffusion boost signal to the floating diffusion of the previously discussed PDAF pixel circuit, and the PDAF photodiode typically having a lower sensitivity than the normal image sensing photodiode.

[0056] Thus, the PDAF pixel circuit output reading 442 has a greater influence on the combined total output signal 446 of the four pixel circuits or 16 photodiodes shown in the bottom portion of Figure 4 the normal image sensing pixel circuit output. According to the teachings of the present invention, the PDAF pixel circuit output has a greater influence on the normal image sensing pixel circuit output is due to the higher threshold voltage V T of the buffer transistor included in the normal pixel circuit compared to the threshold voltage V T low of the buffer transistor included in the PDAF pixel circuit and the application of the floating diffusion boost signal to the floating diffusion of the PDAF pixel circuit. In operation, it should be appreciated that according to the teachings of the present invention, the PDAF pixel circuit output signal can thus be selected and read out at both the relevant double-sampled SHR and SHS points after the combined output or analog merged output of the four pixel circuits or 16 photodiodes.

[0057] The above description of illustrated embodiments of the application, including what is described in the summary, is not intended to be exhaustive or to limit the application to the precise forms disclosed. While specific embodiments of, and examples for, the application are described herein for illustrative purposes, various modifications are possible within the scope of the application, as those skilled in the relevant art will recognize.

[0058] These modifications can be made in light of the above detailed description of the application. The terms used in the following claims should not be construed to limit the application to the specific embodiments disclosed in the specification and the drawings. Rather, the scope of the application is to be determined entirely by the following claims, which are to be interpreted in accordance with established claim interpretation principles.

Claims

1. An imaging device comprising: The first pixel circuit includes: A plurality of photodiodes, wherein the plurality of photodiodes includes at least one phase-detection autofocus (PDAF) photodiode, and wherein the remaining photodiodes in the plurality of photodiodes are all image-sensing photodiodes; and A first buffer transistor having a first threshold voltage, wherein the first buffer transistor is coupled to the first plurality of photodiodes to generate a first output signal in response to a charge, the charge being generated by the first plurality of photodiodes in response to incident light; The second pixel circuit includes: The second plurality of photodiodes, wherein all of the second plurality of photodiodes are image sensing photodiodes; and A second buffer transistor has a second threshold voltage, wherein the first threshold voltage is less than the second threshold voltage, wherein the second buffer transistor is coupled to a second plurality of photodiodes to generate a second output signal in response to a charge, wherein the charge is generated by the second plurality of photodiodes in response to the incident light; and A driver, coupled to receive the first output signal and the second output signal to generate a total output signal in response to a combination of the first output signal and the second output signal, wherein in response to the first threshold voltage being less than the second threshold voltage, the influence of the first output signal outweighs the influence of the second output signal in the total output signal.

2. The imaging device according to claim 1, wherein the at least one PDAF photodiode is less sensitive to the incident light than the image sensing photodiode.

3. The imaging device according to claim 1, The first pixel circuit further includes a first floating diffuser coupled between the first plurality of photodiodes and the first buffer transistor to receive the charge generated by the first plurality of photodiodes, wherein the first floating diffuser is coupled to receive a floating diffuser boost signal during the readout of the at least one PDAF photodiode, and The second pixel circuit further includes a second floating diffusion section coupled between the second plurality of photodiodes and the second buffer transistor to receive the charge generated by the second plurality of photodiodes, wherein the second floating diffusion section does not boost voltage during the readout of the at least one PDAF photodiode.

4. The imaging device according to claim 3, The first buffer transistor is coupled to the first floating diffuser to generate the first output signal in response to the first floating diffuser simulating the merging of the charges generated by the first plurality of photodiodes. The second buffer transistor is coupled to the second floating diffuser to generate the second output signal in response to the second floating diffuser simulating the combination of charges generated by the second plurality of photodiodes.

5. The imaging device according to claim 3, The first pixel circuit further includes a plurality of first transfer transistors coupled between the plurality of photodiodes and the first floating diffuser, wherein the first floating diffuser is coupled to receive the charge generated by the plurality of photodiodes through the plurality of transfer transistors; and The second pixel circuit further includes a plurality of second transfer transistors coupled between the second plurality of photodiodes and the second floating diffuser, wherein the second floating diffuser is coupled to receive the charge generated by the second plurality of photodiodes through the second plurality of transfer transistors.

6. The imaging apparatus of claim 3, further comprising a bit line coupled to receive the first output signal from the first pixel circuit and the second output signal from the second pixel circuit, wherein the bit line is coupled to provide a combination of the first output signal and the second output signal to the driver.

7. The imaging apparatus of claim 6, wherein the second pixel circuit is one of a plurality of second pixel circuits, wherein each of the plurality of second pixel circuits is coupled to generate a corresponding second output signal among a plurality of second output signals, the plurality of second output signals being coupled to be received by the bit line, wherein the bit line is coupled to provide a combination of the first output signal and the plurality of second output signals to the driver.

8. The imaging apparatus of claim 7, wherein the bit line is coupled to provide the combination of the first output signal and the plurality of second output signals to the driver by analog merging of the first output signal and the plurality of second output signals.

9. The imaging apparatus according to claim 7, wherein the first pixel circuit, the plurality of second pixel circuits and the bit line are included in a pixel array.

10. The imaging apparatus of claim 9, further comprising a color filter array including a plurality of color filters disposed above the pixel array, wherein the first pixel circuit and the plurality of second pixel circuits are disposed below corresponding color filters having the same color.

11. The imaging apparatus of claim 9, wherein the plurality of second pixel circuits comprises three second pixel circuits, each of the three second pixel circuits being coupled to generate a corresponding second output signal among three second output signals, the three second output signals being coupled to be received by the bit line, wherein the bit line is coupled to provide a combination of the first output signal and the three second output signals to the driver.

12. The imaging apparatus of claim 9, wherein the first pixel circuit and the plurality of second pixel circuits are one of a plurality of pixel circuit groups coupled to the bit line, wherein the bit line is configured to read out each of the plurality of pixel circuit groups at a time.

13. The imaging apparatus of claim 12, wherein the bit line is one of a plurality of bit lines, wherein each of the plurality of bit lines is coupled to a corresponding plurality of pixel circuit groups.

14. The imaging apparatus according to claim 1, The first plurality of photodiodes are arranged in a first 2×2 group of four adjacent photodiodes, wherein the four adjacent photodiodes include two PDAF photodiodes and two image sensing photodiodes, and The second plurality of photodiodes are arranged in a second 2×2 group of four adjacent photodiodes, the four adjacent photodiodes including four image sensing photodiodes.

15. The imaging apparatus of claim 1, wherein the first buffer transistor and the second buffer transistor comprise source follower coupled transistors.

16. An imaging system comprising: A pixel array coupled to generate image data in response to incident light, the pixel array comprising: The first pixel circuit includes: A plurality of photodiodes, wherein the plurality of photodiodes includes at least one phase-detection autofocus (PDAF) photodiode, and wherein the remaining photodiodes in the plurality of photodiodes are all image-sensing photodiodes; and A first buffer transistor having a first threshold voltage, wherein the first buffer transistor is coupled to the first plurality of photodiodes to generate a first output signal in response to a charge, the charge being generated by the first plurality of photodiodes in response to the incident light; The second pixel circuit includes: The second plurality of photodiodes, wherein all of the second plurality of photodiodes are image sensing photodiodes; and A second buffer transistor has a second threshold voltage, wherein the first threshold voltage is less than the second threshold voltage, wherein the second buffer transistor is coupled to a second plurality of photodiodes to generate a second output signal in response to a charge, wherein the charge is generated by the second plurality of photodiodes in response to the incident light; and A control circuit system coupled to the pixel array to control the operation of the pixel array; and A readout circuitry system coupled to the pixel array to read out the first output signal and the second output signal from the pixel array, wherein the readout circuitry system includes a driver coupled to receive the first output signal and the second output signal to generate a total output signal in response to a combination of the first output signal and the second output signal, wherein in response to a first threshold voltage being less than the second threshold voltage, the influence of the first output signal outweighs the influence of the second output signal in the total output signal, wherein the image data is generated in response to the total output signal.

17. The imaging system of claim 16, further comprising functional logic coupled to the readout circuitry to store the image data read from the pixel array.

18. The imaging system of claim 16, wherein the at least one PDAF photodiode is less sensitive to the incident light than the image sensing photodiode.

19. The imaging system according to claim 16, The first pixel circuit further includes a first floating diffuser coupled between the first plurality of photodiodes and the first buffer transistor to receive the charge generated by the first plurality of photodiodes, wherein the first floating diffuser is coupled to receive a floating diffuser boost signal during the readout of the at least one PDAF photodiode, and The second pixel circuit further includes a second floating diffusion section coupled between the second plurality of photodiodes and the second buffer transistor to receive the charge generated by the second plurality of photodiodes, wherein the second floating diffusion section does not boost voltage during the readout of the at least one PDAF photodiode.

20. The imaging system according to claim 19, The first buffer transistor is coupled to the first floating diffuser to generate the first output signal in response to the first floating diffuser simulating the merging of the charges generated by the first plurality of photodiodes. The second buffer transistor is coupled to the second floating diffuser to generate the second output signal in response to the second floating diffuser simulating the combination of charges generated by the second plurality of photodiodes.

21. The imaging system according to claim 19, The first pixel circuit further includes a plurality of first transfer transistors coupled between the plurality of photodiodes and the first floating diffuser, wherein the first floating diffuser is coupled to receive the charge generated by the plurality of photodiodes through the plurality of transfer transistors; and The second pixel circuit further includes a plurality of second transfer transistors coupled between the second plurality of photodiodes and the second floating diffuser, wherein the second floating diffuser is coupled to receive the charge generated by the second plurality of photodiodes through the second plurality of transfer transistors.

22. The imaging system of claim 19, wherein the pixel array further includes bit lines coupled to receive the first output signal from the first pixel circuit and the second output signal from the second pixel circuit, wherein the bit lines are coupled to the readout circuitry to provide a combination of the first output signal and the second output signal to the driver.

23. The imaging system of claim 22, wherein the second pixel circuit is one of a plurality of second pixel circuits included in the pixel array, wherein each of the plurality of second pixel circuits is coupled to generate a corresponding second output signal among a plurality of second output signals, the plurality of second output signals being coupled to be received by the bit line, wherein the bit line is coupled to provide a combination of the first output signal and the plurality of second output signals to the driver.

24. The imaging system of claim 23, wherein the bit line is coupled to provide the combination of the first output signal and the plurality of second output signals to the driver by analog merging of the first output signal and the plurality of second output signals.

25. The imaging system of claim 23, further comprising a color filter array including a plurality of color filters disposed above the pixel array, wherein the first pixel circuit and the plurality of second pixel circuits are disposed below corresponding color filters having the same color.

26. The imaging system of claim 23, wherein the plurality of second pixel circuits comprises three second pixel circuits, each of the three second pixel circuits being coupled to generate a corresponding second output signal among three second output signals, the three second output signals being coupled to be received by the bit line, wherein the bit line is coupled to provide a combination of the first output signal and the three second output signals to the driver.

27. The imaging system of claim 23, wherein the first pixel circuit and the plurality of second pixel circuits are one of a plurality of pixel circuit groups coupled to the bit line, wherein the bit line is configured to read out each of the plurality of pixel circuit groups at a time.

28. The imaging system of claim 27, wherein the bit line is one of a plurality of bit lines, wherein each of the plurality of bit lines is coupled to a corresponding plurality of pixel circuit groups.

29. The imaging system according to claim 16, The first plurality of photodiodes are arranged in a first 2×2 group of four adjacent photodiodes, wherein the four adjacent photodiodes include two PDAF photodiodes and two image sensing photodiodes, and The second plurality of photodiodes are arranged in a second 2×2 group of four adjacent photodiodes, the four adjacent photodiodes including four image sensing photodiodes.

30. The imaging system of claim 16, wherein the first buffer transistor and the second buffer transistor comprise source follower coupled transistors.

Images