Composite circuit protection device

Abstract

A composite circuit protection device includes a first positive temperature coefficient (PTC) element, a second PTC element, a varistor, a first conductive lead, a second conductive lead, and a third conductive lead. The first PTC element includes a first PTC layer, a first electrode layer, and a second electrode layer, and the first electrode layer and the second electrode layer are respectively arranged on two opposite surfaces of the first PTC layer. The second PTC element includes a second PTC layer, a third electrode layer, and a fourth electrode layer, and the third electrode layer and the fourth electrode layer are respectively arranged on two opposite surfaces of the second PTC layer. The varistor is connected to the second electrode layer and the third electrode layer. The first conductive lead is connected to the first electrode layer, the second conductive lead is connected to the varistor, and the third conductive lead is connected to the fourth electrode layer. The composite circuit protection device has excellent tolerance and can protect the varistor sandwiched between the two PTC elements from burning in the presence of overcurrent and overvoltage.

Description

Technical Field

[0001] The present invention relates to a composite circuit protection device, and more particularly to a composite circuit protection device comprising a voltage-dependent resistor (VDR, or varistor) sandwiched between two positive temperature coefficient (PTC) elements. Background Art

[0002] US Patent No. 8,508,328 B1 describes a plug-in polymer positive temperature coefficient (PPTC) over-current protection device. Figure 1 The PPTC overcurrent protection device comprises two electrodes 30, solder material, conductive leads 50, 60 respectively connected to the electrodes 30, and a PTC polymer substrate 20 laminated between the electrodes 30. A hole 40 is formed on the PTC polymer substrate 20, and the hole 40 has an effective volume capable of accommodating the thermal expansion of the PTC polymer substrate 20 when the temperature rises.

[0003] Electrical properties (such as operating current and high-voltage surge endurance) are important factors that affect the occurrence of power surges in PPTC overcurrent protection devices. For example, increasing the thickness or area of ​​the PTC polymer substrate 20 can increase the operating current of the PPTC overcurrent protection device, which is more susceptible to damage from power surges. On the other hand, reducing the thickness or area of ​​the PTC polymer substrate 20 can increase the high-voltage endurance of the PPTC overcurrent protection device, and the PPTC overcurrent protection device may not be less susceptible to damage from power surges.

[0004] Although a voltage-dependent resistor (VDR) can be combined with the PPTC overcurrent protection device to provide overcurrent and overvoltage protection for the combined composite circuit protection device, the VDR can only withstand power surges for a short period of time (e.g., 0.001 seconds). In other words, if the surge time interval exceeds the cut-off time interval, the VDR will burn out or be damaged due to overcurrent and overvoltage, causing the composite circuit protection device to permanently lose its function. Summary of the invention

[0005] An object of the present invention is to provide a composite circuit protection device that can overcome at least one disadvantage of the above-mentioned background technology.

[0006] The composite circuit protection device of the present invention comprises a first positive temperature coefficient (PTC) element, a second PTC element, a varistor, a first conductive lead, a second conductive lead and a third conductive lead. The first PTC element comprises a first PTC layer, a first electrode layer and a second electrode layer, the first PTC layer has two opposite surfaces, and the first electrode layer and the second electrode layer are respectively arranged on the two opposite surfaces of the first PTC layer. The second PTC element comprises a second PTC layer, a third electrode layer and a fourth electrode layer, the second PTC layer has two opposite surfaces, and the third electrode layer and the fourth electrode layer are respectively arranged on the two opposite surfaces of the second PTC layer. The varistor is connected to the second electrode layer of the first PTC element and the third electrode layer of the second PTC element. The first conductive lead is connected to the first electrode layer of the first PTC element. The second conductive lead is connected to the varistor. The third conductive lead is connected to the fourth electrode layer of the second PTC element.

[0007] The beneficial effect of the present invention is that the composite circuit protection device of the present invention has excellent tolerance and reliability, and can protect the varistor sandwiched between two PTC elements from burning out in the presence of overcurrent and overvoltage. BRIEF DESCRIPTION OF THE DRAWINGS

[0008] Other features and effects of the present invention will be clearly presented in the embodiments with reference to the accompanying drawings, in which:

[0009] Figure 1 It is a schematic diagram of an existing plug-in PPTC overcurrent protection device;

[0010] Figure 2 is a schematic diagram of a first specific embodiment of a composite circuit protection device of the present invention;

[0011] Figure 3 is a cross-sectional schematic diagram of the first specific embodiment;

[0012] Figure 4 is a schematic diagram of a second specific embodiment of the composite circuit protection device of the present invention;

[0013] Figure 5 is a cross-sectional schematic diagram of the second specific embodiment;

[0014] Figure 6 is a cross-sectional schematic diagram of a third specific embodiment of the composite circuit protection device of the present invention;

[0015] Figure 7is a schematic diagram of a fourth specific embodiment of the composite circuit protection device of the present invention; and

[0016] Figure 8 It is a cross-sectional schematic diagram of the fourth specific embodiment. DETAILED DESCRIPTION

[0017] Before the present invention is described in detail, it should be noted that similar elements are denoted by the same reference numerals in the following description.

[0018] See also Figure 2 and Figure 3 The first specific embodiment of the composite circuit protection device of the present invention includes a first positive temperature coefficient (PTC) element 2, a varistor 3, a second PTC element 4, a first conductive lead 5, a second conductive lead 6 and a third conductive lead 7.

[0019] The first PTC element 2 includes a first PTC layer 21 , a first electrode layer 22 and a second electrode layer 23 . The first PTC layer 21 has two opposite surfaces 211 . The first electrode layer 22 and the second electrode layer 23 are respectively disposed on the two opposite surfaces 211 of the first PTC layer 21 .

[0020] The second PTC element 4 includes a second PTC layer 41 , a third electrode layer 42 and a fourth electrode layer 43 . The second PTC layer 41 has two opposite surfaces 411 . The third electrode layer 42 and the fourth electrode layer 43 are respectively disposed on the two opposite surfaces 411 of the second PTC layer 41 .

[0021] The varistor 3 is connected to the second electrode layer 23 of the first PTC element 2 and the third electrode layer 42 of the second PTC element 4 by soldering.

[0022] The first conductive lead 5 is connected to the first electrode layer 22 of the first PTC element 2 . The second conductive lead 6 is connected to the varistor 3 . The third conductive lead 7 is connected to the fourth electrode layer 43 of the second PTC element 4 .

[0023] In some embodiments of the present invention, the first PTC element 2 has a rated voltage, which is between 40% and 200% of the varistor voltage measured at 1 mA of the varistor 3. In some embodiments of the present invention, the first PTC element 2 has a rated voltage between 110% and 200% of the varistor voltage measured at 1 mA of the varistor 3.

[0024] According to the present invention, the first PTC element 2 or the second PTC element 4 is tripped before the varistor 3 burns out under the overcurrent and the voltage greater than the varistor voltage of the varistor 3. In other words, under the overcurrent and the voltage greater than the varistor voltage of the varistor 3, the first PTC element 2 or the second PTC element 4 quickly trips to a high resistance state so that the overcurrent is limited from flowing through the varistor 3, thereby protecting the varistor 3 from burning out, and the composite circuit protection device can be reused.

[0025] In this document, the terms "burn", "spark" and "fire" are used interchangeably and refer to the varistor 3 losing its function, which usually occurs above 180°C.

[0026] In some specific embodiments of the present invention, the first PTC element 2 or the second PTC element 4 is tripped within 10μs to 10s under an overcurrent and a voltage greater than the varistor voltage of the varistor 3. In some specific embodiments of the present invention, the first PTC element 2 or the second PTC element 4 is tripped within 1ms to 10s under an overcurrent of not less than 0.5A and a voltage greater than the varistor voltage of the varistor 3. In some specific embodiments of the present invention, the first PTC element 2 or the second PTC element 4 is tripped within 1ms to 1s under an overcurrent of not less than 10A and a voltage greater than the varistor voltage of the varistor 3.

[0027] The first PTC element 2 may be formed with a first hole 210. In the present embodiment, the first hole 210 is formed in the first PTC layer 21. The first PTC layer 21 of the first PTC element 2 has a periphery 212, which defines the boundary of the first PTC layer 21 and is interconnected with two opposite surfaces 211 of the first PTC layer 21. The first hole 210 is spaced from the periphery 212 of the first PTC layer 21 and has an effective volume that can accommodate the thermal expansion of the first PTC layer 21 when the temperature rises, so as to avoid the first PTC layer 21 from having an undesirable structural deformation.

[0028] In some embodiments of the present invention, the first hole 210 penetrates at least one of the two opposite surfaces 211 of the first PTC layer 21. In some embodiments of the present invention, the first hole 210 also penetrates at least one of the first electrode layer 22 and the second electrode layer 23. In this embodiment, the first hole 210 penetrates the two opposite surfaces 211 of the first PTC layer 21 and the first electrode layer 22 and the second electrode layer 23 to form a through hole. In some embodiments of the present invention, the first hole 210 extends along a line passing through the geometric center of the first PTC layer 21 and crossing the two opposite surfaces 211. The first hole 210 is defined by a first hole definition wall, and the first hole definition wall has a cross section parallel to the surface 211 of the first PTC layer 21. The cross section of the first hole definition wall can be circular, square, elliptical, triangular, cross-shaped, etc.

[0029] The second PTC element 4 may be formed with a second hole 410. In the present embodiment, the second hole 410 is formed in the second PTC layer 41. The second PTC layer 41 of the second PTC element 4 has a periphery 412, which defines the boundary of the second PTC layer 41 and is interconnected with two opposite surfaces 411 of the second PTC layer 41. The second hole 410 is spaced from the periphery 412 of the second PTC layer 41 and has an effective volume that can accommodate the thermal expansion of the second PTC layer 41 when the temperature rises, so as to avoid the second PTC layer 41 from having undesired structural deformation.

[0030] In some embodiments of the present invention, the second hole 410 penetrates at least one of the two opposite surfaces 411 of the second PTC layer 41. In some embodiments of the present invention, the second hole 410 also penetrates at least one of the third electrode layer 42 and the fourth electrode layer 43. In this embodiment, the second hole 410 penetrates the two opposite surfaces 411 of the second PTC layer 41 and the third electrode layer 42 and the fourth electrode layer 43 to form a through hole. In some embodiments of the present invention, the second hole 410 extends along a line passing through the geometric center of the second PTC layer 41 and crossing the two opposite surfaces 411. The second hole 410 is defined by a second hole definition wall having a cross section parallel to the surface 411 of the second PTC layer 41. The cross section of the second hole definition wall can be circular, square, elliptical, triangular, cross-shaped, etc.

[0031] According to the present invention, the first PTC element 2 and the second PTC element 4 can both be polymer PTC (PPTC) elements, and the first PTC layer 21 and the second PTC layer 41 can both be PTC polymer layers. The PTC polymer layer includes a polymer substrate and a conductive filler dispersed in the polymer substrate. The polymer substrate can be made from a polymer composition containing a non-grafted olefin-based polymer. In certain specific embodiments of the present invention, the non-grafted olefin-based polymer is a high-density polyethylene (HDPE). In certain specific embodiments of the present invention, the polymer composition also includes a grafted olefin-based polymer. In certain specific embodiments of the present invention, the grafted olefin-based polymer is an olefin-based polymer grafted with carboxylic anhydride. The conductive filler applicable to the present invention is selected from carbon black powder, metal powder, conductive ceramic powder or a combination of the foregoing, but is not limited thereto.

[0032] The varistor 3 may include a varistor layer 31, a fifth electrode layer 32, and a sixth electrode layer 33. The varistor layer 31 has two opposite surfaces 311, and the fifth electrode layer 32 and the sixth electrode layer 33 are respectively disposed on the two opposite surfaces 311 of the varistor layer 31. The second conductive lead 6 may be connected to the fifth electrode layer 32 or the sixth electrode layer 33 of the varistor 3. In some specific embodiments of the present invention, the varistor layer 31 is made of a metal oxide material.

[0033] In this embodiment, the fifth electrode layer 32 is connected to the second electrode layer 23 of the first PTC element 2 . The second conductive lead 6 is connected and disposed between the sixth electrode layer 33 of the varistor 3 and the third electrode layer 42 of the second PTC element 4 .

[0034] The varistor 3 may have a third hole 310 formed in the varistor layer 31. In this specific embodiment, the varistor layer 31 of the varistor 3 has a periphery 312, which defines the boundary of the varistor layer 31 and interconnects two opposite surfaces 311 of the varistor layer 31. The third hole 310 is spaced from the periphery 312 of the varistor layer 31.

[0035] In some embodiments of the present invention, the third hole 310 penetrates at least one of the two opposite surfaces 311 of the varistor layer 31. In some embodiments of the present invention, the third hole 310 also penetrates at least one of the fifth electrode layer 32 and the sixth electrode layer 33. In this embodiment, the third hole 310 penetrates the two opposite surfaces 311 of the varistor layer 31 and the fifth electrode layer 32 and the sixth electrode layer 33 to form a through hole.

[0036] The first conductive lead 5 may have a first connection portion 51 and a first free portion 52 , the second conductive lead 6 may have a second connection portion 61 and a second free portion 62 , and the third conductive lead 7 may have a third connection portion 71 and a third free portion 72 .

[0037] In this specific embodiment, the first connecting portion 51 of the first conductive lead 5 is connected to the outer surface of the first electrode layer 22 of the first PTC element 2 by solder, and the first free portion 52 of the first conductive lead 5 extends from the first connecting portion 51 out of the first electrode layer 22 for insertion into the pin hole of a circuit board or a circuit device (not shown).

[0038] The second connection portion 61 of the second conductive lead 6 is connected by solder and arranged between the sixth electrode layer 33 and the third electrode layer 42, and the second free portion 62 of the second conductive lead 6 extends from the second connection portion 61 out of the sixth electrode layer 33 and the third electrode layer 42 for insertion into the pin hole of a circuit board or a circuit device (not shown).

[0039] The third connection portion 71 of the third conductive lead 7 is connected to the outer surface of the fourth electrode layer 43 of the second PTC element 4 by solder, and the third free portion 72 of the third conductive lead 7 extends from the third connection portion 71 out of the fourth electrode layer 43 for insertion into the pin hole of a circuit board or circuit device (not shown).

[0040] See also Figure 4 and Figure 5 The second embodiment of the composite circuit protection device of the present invention is similar to the first embodiment, except that the second embodiment further comprises a packaging material 8, which packages the first PTC element 2, the varistor 3, the second PTC element 4, a portion of the first conductive lead 5, a portion of the second conductive lead 6, and a portion of the third conductive lead 7. The first free portion 52 of the first conductive lead 5, the second free portion 62 of the second conductive lead 6, and the third free portion 72 of the third conductive lead 7 are exposed outside the packaging material 8. In some embodiments of the present invention, the packaging material 8 is made of epoxy resin.

[0041] See also Figure 6The third embodiment of the composite circuit protection device of the present invention is similar to the second embodiment, except that the third embodiment further comprises a third PTC element 9 (or another varistor 9), which is connected to the third conductive lead 7. The third PTC element 9 (or the other varistor 9) comprises a third PTC layer 91 (or another varistor layer 91), the third PTC layer 91 (or the other varistor layer 91) having two opposite surfaces 911, a seventh electrode layer 92 and an eighth electrode layer 93, the seventh electrode layer 92 and the eighth electrode layer 93 are respectively disposed on the two opposite surfaces 911. The third conductive lead 7 is connected and disposed between the fourth electrode layer 43 and the seventh electrode layer 92. The packaging material 8 also encapsulates the third PTC layer 91 (or the other varistor layer 91). The third PTC layer 91 (or the other varistor layer 91) may be formed with a fourth hole (not shown).

[0042] See also Figure 7 and Figure 8 The fourth embodiment of the composite circuit protection device of the present invention is similar to the third embodiment, except that the fourth embodiment further comprises a fourth conductive lead 10, the fourth conductive lead 10 is connected to the eighth electrode layer 93, and the fourth conductive lead 10 has a fourth connection portion 101 and a fourth free portion 102. The fourth connection portion 101 of the fourth conductive lead 10 is connected to the outer surface of the eighth electrode layer 93, and the fourth free portion 102 of the fourth conductive lead 10 extends from the fourth connection portion 101 out of the eighth electrode layer 93 for insertion into a pin hole of a circuit board or a circuit device (not shown). In addition, the packaging material 8 packages the first PTC element 2, the varistor 3, the second PTC element 4, the third PTC element 9 (or the other varistor 9), part of the first conductive lead 5, part of the second conductive lead 6, part of the third conductive lead 7 and part of the fourth conductive lead 10. The first free portion 52 of the first conductive lead 5 , the second free portion 62 of the second conductive lead 6 , the third free portion 72 of the third conductive lead 7 , and the fourth free portion 102 of the fourth conductive lead 10 are exposed outside the packaging material 8 .

[0043] The present invention will be further described with reference to the following examples, but it should be understood that the examples are only for illustration and should not be construed as limitations of the present invention.

[0044] Example

[0045] <Example 1 (E1)>

[0046] 22g of high-density polyethylene (HDPE) (purchased from Taiwan Plastics Industry Co., Ltd., product model: HDPE9002) is used as a non-grafted olefin polymer, 22g of HDPE grafted with maleic anhydride (purchased from DuPont, product model: MB100D) is used as an olefin polymer grafted with carboxylic anhydride, and 56g of carbon black powder (purchased from Columbian Chemicals, product model: Raven 430UB) is used as a conductive filler.

[0047] The above three ingredients were mixed in a mixer (Brabender) at a temperature of 200° C. and a stirring speed of 30 rpm for 10 minutes to obtain a first ingredient mixture.

[0048] In addition, 21 g of HDPE, 21 g of HDPE grafted with maleic anhydride, and 58 g of carbon black powder were mixed and formulated under the same conditions as above to obtain a second formulation mixture.

[0049] The first ingredient mixture and the second ingredient mixture obtained above were placed in a mold respectively, and hot-pressed at a temperature of 200°C and a pressure of 80 kg / cm 2 The two sheets were hot pressed for 4 minutes under the conditions of 200°C and 80kg / cm2 to form the first PTC polymer layer sheet and the second PTC polymer layer sheet. After the two sheets were taken out from the mold, the first PTC polymer layer sheet was placed between two copper foils (respectively used as the first electrode layer and the second electrode layer), and the second PTC polymer layer sheet was placed between two copper foils (respectively used as the third electrode layer and the fourth electrode layer). 2 The first PPTC element and the second PPTC element were respectively formed by hot pressing for 4 minutes to form a first PPTC element and a second PPTC element with a thickness of 0.42 mm. The first PPTC element was cut into a plurality of circular chips (hereinafter referred to as PPTC-1) with a diameter of 6.4 mm and the second PPTC element was cut into a plurality of 9.5 mm×11.5 mm chips (hereinafter referred to as PPTC-2), and each chip was irradiated with Co-60 gamma rays with a total radiation dose of 150 kGy.

[0050] The second conductive lead is welded to one side of a metal oxide varistor (MOV, purchased from Ceramate Technical Company, product model: 07D270K), and then one of the copper foils of PPTC-1 and one of the copper foils of PPTC-2 are respectively welded to the side of the MOV welded with the second conductive lead and the opposite side without the second conductive lead welded (i.e., the MOV is sandwiched between PPTC-1 and PPTC-2), and then the first conductive lead is welded to the copper foil of PPTC-1 opposite to the MOV, and the third conductive lead is welded to one of the copper foils of PPTC-2 to form a composite circuit protection device E1.

[0051] The hold current (i.e., the maximum current value during normal operation), trip current (i.e., the minimum current value required for the PPTC element to reach a high resistance state), rated voltage (i.e., the voltage applicable to the PPTC element when it is working) and withstand voltage (i.e., the maximum voltage that will not cause PPTC element failure or damage) of each PPTC-1 and each PPTC-2 were measured according to Underwriter Laboratories' safety standard for thermistor-type devices, UL 1434, 1998. In addition, the varistor voltage (i.e., the voltage at which the MOV triggers to work) and clamping voltage (i.e., the maximum voltage that the MOV can provide for limitation) of the MOV element were measured according to Underwriter Laboratories' safety standard for transient voltage surge suppressors, UL 1449, 2014. The property measurement results of PPTC-1, PPTC-2 and MOV are shown in Table 1.

[0052] Table 1

[0053]

[0054] a: Measured at 1mA.

[0055] b: In the pulse waveform (t p )8 / 20μs and pulse current (I p )Measured at 2.5A.

[0056] <Examples 2 to 8 (E2-E8)>

[0057] The process conditions of the composite circuit protection devices E2-E8 are similar to those of E1. The difference is that PPTC-1 is formed with a first through hole and / or PPTC-2 is formed with a second through hole and / or MOV is formed with a third through hole (as shown in Table 2). Each first through hole, each second through hole and each third through hole is formed with a circular cross section (diameter is 1.5 mm, circle area is 1.77 mm 2 ) is defined by the hole definition wall.

[0058] Specifically, in E2, after γ-ray irradiation, a first through hole is bored in the central portion of PPTC-1. In E3, before welding to PPTC-1 and PPTC-2, a third through hole is bored in the central portion of MOV. In E4, a first through hole is bored in the central portion of PPTC-1 and a third through hole is bored in the central portion of MOV. In E5, after γ-ray irradiation, a second through hole is bored in the central portion of PPTC-2. In E6, a first through hole is bored in the central portion of PPTC-1 and a second through hole is bored in the central portion of PPTC-2. In E7, a third through hole is bored in the central portion of MOV and a second through hole is bored in the central portion of PPTC-2. In E8, a first through hole is bored in the central portion of PPTC-1 and a third through hole is bored in the central portion of MOV and a second through hole is bored in the central portion of PPTC-2 (as shown in FIG. 1 ). Figure 3 shown).

[0059] <Comparative Examples 1 to 2 (CE1-CE2)>

[0060] The process conditions of the circuit protection devices of CE1 and CE2 are similar to those of E1 and E2, respectively. The difference is that CE1 and CE2 do not contain MOV and PPTC-2, and the first conductive lead and the second conductive lead are respectively welded to two copper foils of PPTC-1.

[0061] <Comparative Examples 3 to 4 (CE3-CE4)>

[0062] The process conditions of the circuit protection devices of CE3 and CE4 are similar to those of E1 and E3, respectively. The difference is that CE3 and CE4 do not contain PPTC-1 and PPTC-2, and the first conductive lead and the second conductive lead are respectively welded to two opposite surfaces of the MOV.

[0063] <Comparative Examples 5 to 6 (CE5-CE6)>

[0064] The process conditions of the circuit protection devices of CE5 and CE6 are similar to those of E1 and E5, respectively. The difference is that CE5 and CE6 do not contain PPTC-1 and MOV, and the first conductive lead and the second conductive lead are respectively welded to two copper foils of PPTC-2.

[0065] <Comparative Examples 7 to 10 (CE7-CE10)>

[0066] The process conditions of the composite circuit protection devices of CE7-CE10 are similar to those of E1, E5, E3 and E7, respectively. The difference is that CE7-CE10 does not contain PPTC-1, and the first conductive lead and the second conductive lead are respectively welded to two opposite surfaces of the MOV, and the third conductive lead is welded to one of the copper foils of the PPTC-2.

[0067] The structures of the (composite) circuit protection devices of E1-E8 and CE1-CE10 are summarized in Table 2.

[0068] Table 2

[0069]

[0070]

[0071] “--” means there is no such component.

[0072] Performance Testing

[0073] [Hold current test]

[0074] Ten (combined) circuit protection devices of E1-E8 and CE1-CE10 are taken as test samples, and a holding current test is performed to determine the maximum holding current of the test samples.

[0075] The holding current test is to apply 16V at 25℃ dc The DC voltage was kept constant without tripping, and each test sample was measured for 15 minutes. The test results are shown in Table 3.

[0076] [Time-to-trip test]

[0077] For the (compound) circuit protection devices of E1-E8 and CE1-CE10, 10 of each are taken as test samples and a tripping time test is performed to determine the tripping time of the test samples.

[0078] The trip time test is performed at 25°C with 16V dc The tripping time of each test sample was measured with a DC voltage of 8.5A and a tripping current of 8.5A. The test results are shown in Table 3.

[0079] Table 3

[0080]

[0081]

[0082] “N / A” means not applicable.

[0083] The results in Table 3 show that the test samples E1-E8 are dc The average maximum holding current is between 6.0A and 6.5A, which is higher than the test samples of CE1-CE2 and CE5-CE10.

[0084] [Surge immunity test]

[0085] Ten composite circuit protection devices of E1-E8 and CE1-CE10 are taken as test samples for surge immunity test.

[0086] The surge immunity test is based on a constant voltage (38V dc and 44V dc , greater than the varistor voltage of MOV) and constant current (0.5A and 10A) are used to connect the first conductive lead and the second conductive lead for 60 seconds and then close them. If neither the PPTC chip nor the MOV is burned or damaged, the test sample passes the surge immunity test, and the average time of the PPTC chip tripping is recorded (if there is a trip). If the PPTC chip or MOV is burned, the test sample is burned, and the average time of the burning is recorded. The results are shown in Table 4.

[0087] Table 4

[0088]

[0089]

[0090] The results in Table 4 show that the test samples of CE3-CE4 containing only MOV burned within 5s under a current of 0.5A and a voltage of at least 1.4 times the varistor voltage of MOV (generally MOV can withstand a voltage of 1.2 times its varistor voltage), or burned within 2.5s under an overcurrent and overvoltage of 10A, and the damage cannot be repaired. The test samples of CE1-CE2 containing only PPTC-1 and the test samples of CE5-CE6 containing only PPTC-2 burned under an overcurrent of 10A. The test samples of CE7-CE10 containing MOV and PPTC-2 also burned under overvoltage.

[0091] In contrast, all test samples of E1-E8 containing a combination of PPTC-1, MOV, and PPTC-2 (where the rated voltage of PPTC-1 is approximately 111% of the varistor voltage of MOV measured at 1 mA) passed the surge immunity test without burning out. In addition, compared to E1, the test samples of E2-E8 with perforations formed on the PPTC chips and / or MOVs improve heat transfer, further shortening the time for the PPTC chips to trip and preventing overcurrent from flowing through the MOV, thereby protecting the MOV from burning out. In other words, in the test samples of E1-E8, the PPTC chips tripped before the MOV burned out under overcurrent and voltage greater than the varistor voltage of the MOV.

[0092] In summary, since the PTC element can quickly trip to a high resistance state under the presence of overcurrent and overvoltage, the present invention can protect the varistor from burning due to overcurrent by connecting the varistor to two PTC elements. The composite circuit protection device of the present invention can therefore be reused without damage, showing its excellent tolerance and reliability, so the purpose of the present invention can be achieved.

[0093] The above descriptions are merely embodiments of the present invention and should not be used to limit the scope of the present invention. That is, any simple equivalent changes and modifications made according to the claims and description of the present invention still fall within the scope of the present invention.

Claims

1. A composite circuit protection device, characterized in that: It contains: The first PTC element comprises: a first PTC layer having two opposite surfaces, and A first electrode layer and a second electrode layer are respectively disposed on two opposite surfaces of the first PTC layer; The second PTC element comprises: a second PTC layer having two opposite surfaces, and A third electrode layer and a fourth electrode layer are respectively disposed on two opposite surfaces of the second PTC layer; A varistor connected to the second electrode layer of the first PTC element and the third electrode layer of the second PTC element; A first conductive lead connected to the first electrode layer of the first PTC element; A second conductive lead connected to the varistor; A third conductive lead connected to the fourth electrode layer of the second PTC element; and The third PTC element is connected to the third conductive lead.

2. The composite circuit protection device according to claim 1, characterized in that: The first PTC element has a rated voltage between 40% and 200% of a varistor voltage measured at 1 mA.

3. The composite circuit protection device according to claim 2, characterized in that: The first PTC element has a rated voltage between 110% and 200% of a varistor voltage measured at 1 mA.

4. The composite circuit protection device according to claim 1, characterized in that: The first PTC element or the second PTC element is tripped before the varistor burns out under the overcurrent and the voltage greater than the varistor voltage of the varistor.

5. The composite circuit protection device according to claim 1, characterized in that: The first PTC element or the second PTC element is tripped within 10 μs to 10 s under an overcurrent and a voltage greater than the varistor voltage.

6. The composite circuit protection device according to claim 1, characterized in that: The first PTC element or the second PTC element trips within 1 ms to 10 s under an overcurrent of not less than 0.5 A and a voltage greater than the varistor voltage.

7. The composite circuit protection device according to claim 1, characterized in that: The first PTC element or the second PTC element trips within 1 ms to 1 s under an overcurrent of not less than 10 A and a voltage greater than the varistor voltage.

8. The composite circuit protection device according to claim 1, characterized in that: The first PTC element has a first hole formed in the first PTC layer.

9. The composite circuit protection device according to claim 8, characterized in that: The first PTC layer of the first PTC element has a periphery defining a boundary of the first PTC layer and interconnecting two opposite surfaces of the first PTC layer, and the first hole is spaced apart from the periphery of the first PTC layer.

10. The composite circuit protection device according to claim 8, characterized in that: The first hole penetrates at least one of two opposite surfaces of the first PTC layer.

11. The composite circuit protection device according to claim 10, characterized in that: The first hole also penetrates at least one of the first electrode layer and the second electrode layer.

12. The composite circuit protection device according to claim 8, characterized in that: The second PTC element has a second hole formed in the second PTC layer.

13. The composite circuit protection device according to claim 12, characterized in that: The second PTC layer of the second PTC element has a periphery defining a boundary of the second PTC layer and interconnecting two opposite surfaces of the second PTC layer, and the second hole is spaced apart from the periphery of the second PTC layer.

14. The composite circuit protection device according to claim 12, characterized in that: The second hole penetrates at least one of the two opposite surfaces of the second PTC layer.

15. The composite circuit protection device according to claim 14, characterized in that: The second hole also penetrates at least one of the third electrode layer and the fourth electrode layer.

16. The composite circuit protection device according to claim 1, characterized in that: The varistor includes: a varistor layer having two opposing surfaces; a fifth electrode layer, disposed on one of two opposite surfaces of the varistor layer and connected to the second electrode layer of the first PTC element; and a sixth electrode layer, disposed on the other of the two opposite surfaces of the varistor layer, The second conductive lead is connected to the fifth electrode layer or the sixth electrode layer of the varistor.

17. The composite circuit protection device according to claim 16, characterized in that: The varistor has a third hole formed in the varistor layer.

18. The composite circuit protection device according to claim 17, characterized in that: The varistor layer of the varistor has a periphery defining a boundary of the varistor layer and interconnecting two opposite surfaces of the varistor layer, and the third hole is spaced apart from the periphery of the varistor layer.

19. The composite circuit protection device according to claim 18, characterized in that: The third hole penetrates at least one of the two opposite surfaces of the varistor layer.

20. The composite circuit protection device according to claim 19, characterized in that: The third hole also penetrates at least one of the fifth electrode layer and the sixth electrode layer.

21. The composite circuit protection device according to claim 1, characterized in that: The first PTC element and the second PTC element are both polymer PTC elements, and the first PTC layer and the second PTC layer are both PTC polymer layers.

22. The composite circuit protection device according to claim 1, characterized in that: The invention also comprises a packaging material, wherein the packaging material packages the first PTC element, the varistor, the second PTC element, the third PTC element, a part of the first conductive lead, a part of the second conductive lead and a part of the third conductive lead.

23. The composite circuit protection device according to claim 1, characterized in that: The device also includes a fourth conductive lead connected to a surface of the third PTC element opposite to the third conductive lead.

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