Light detection equipment

Abstract

The present invention relates to a light detection device. The light detection device may include: a photoelectric conversion region; a transfer transistor configured to transfer charges from the photoelectric conversion region to a charge-voltage conversion unit; a switch transistor configured to selectively add the capacitance of a capacitor to the capacitance of the charge-voltage conversion unit; and a wiring layer, the wiring layer including: a first electrode connected to the switch transistor; and a second electrode opposite to the first electrode, the second electrode including a first portion and a second portion, wherein the capacitor includes the first electrode and the second electrode, and wherein a first distance between the first portion of the second electrode and the first electrode is different from a second distance between the second portion of the second electrode and the first electrode.

Description

[0001] This application is a divisional application of a patent application with application number 201580005763.8 and application date of December 7, 2015, with invention name “Solid-state image sensor, imaging device and electronic device”. Technical Field

[0002] The present technology relates to a solid-state image sensor, an imaging device, and an electronic device, and more particularly, to a solid-state image sensor, an imaging device, and an electronic device capable of switching FD conversion efficiency in all pixels. Background Art

[0003] A solid-state image sensor (image sensor) having a feature of switching the conversion efficiency of a floating diffusion (FD) provided in each pixel has been proposed (refer to Patent Document 1).

[0004] Since the FD conversion efficiency is defined by a value proportional to the inverse of the parasitic capacitance of the FD, switching of the conversion efficiency is achieved by switching of the parasitic capacitance.

[0005] The technology according to Patent Document 1 is based on a typical complementary metal oxide semiconductor (CMOS) image sensor, and provides a gate for switching between a first FD having a first capacity and a second FD having a second capacity greater than the first capacity. In order to make the conversion efficiency higher, closing the gate minimizes the parasitic capacitance of the first FD, whereas in order to make the conversion efficiency lower, opening the gate connects the first FD and the second FD to each other, thereby maximizing the parasitic capacitance.

[0006] Furthermore, the technology of Patent Document 1 proposes combining pixels for image plane phase difference detection (ZAF) to switch the FD conversion efficiency.

[0007] In an image sensor with image plane phase difference detection, the image plane phase difference detection (ZAF) pixels for autofocus are embedded in the normal pixel array. Compared with normal pixels, ZAF pixels are provided with a light shielding wiring layer for shielding a portion of the incident light. Due to the light shielding performance, the area of ​​the light shielding wiring layer is larger than other normal wiring.

[0008] In the technology of Patent Document 1, the ZAF light shielding wiring layer is used to form a parasitic capacitance as a second capacity for switching the FD conversion efficiency, and the switching of the conversion efficiency is achieved by switching the utilization of the parasitic capacitance.

[0009] [Citation list]

[0010] [Patent Document]

[0011] Patent Document 1: Japanese Patent Application Laid-Open No. 2014-112580 Summary of the invention

[0012] [Problems to be solved by the invention]

[0013] In order to maximize the sensitivity in a normal pixel, optimization is performed by focusing a microlens provided on the pixel surface on the surface of a photodiode. In contrast, in a ZAF pixel, optimization is performed by focusing a microlens on the surface of a light shielding film due to the phase difference detection characteristics.

[0014] Note that since the light shielding wiring layer for ZAF is set at a position away from the surface of the photodiode, the optimal curvature of the microlens is different in the normal pixel and the ZAF pixel. Therefore, if an attempt is made to optimize the microlens in both pixels, it is necessary to produce microlenses with different curvatures for different pixels, which increases the number of processes and leads to high costs. If the number of processes is prioritized (prioritizing low cost) and microlenses with the same curvature are used for all pixels, at least one of the sensitivity characteristics of the normal pixel and the phase difference detection characteristics of the ZAF pixel will be sacrificed.

[0015] Furthermore, since the light shielding wiring layer for ZAF is used to form a parasitic capacitance to be switched, the same capacitance cannot be formed in a normal pixel that does not have a light shielding wiring layer. Therefore, the technology of Patent Document 1 can only be applied to ZAF pixels that are only part of a solid-state image sensor, and cannot be applied to normal pixels.

[0016] The present technology has been achieved in view of the foregoing circumstances, and in particular, the present technology is capable of switching the FD conversion efficiency in all pixels.

[0017] [Solution to the problem]

[0018] According to one aspect of the present technology, a solid-state image sensor is a front-illuminated solid-state image sensor, comprising: a photoelectric conversion unit configured to perform photoelectric conversion of incident light; a charge-voltage conversion unit configured to accumulate charges obtained by photoelectric conversion; a charge accumulation unit configured to increase the capacity of the charge-voltage conversion unit; and an additional capacitance unit configured to increase the capacity of the charge accumulation unit, wherein the additional capacitance unit is composed of a first electrode and a second electrode, the first electrode being formed by a wiring layer in which wiring electrically connected to terminals of the voltage conversion unit and the charge accumulation unit is formed, and the second electrode being formed by a metal layer arranged on a surface of a substrate on which the photoelectric conversion unit is formed, the surface of the substrate being closer to a light source of light, and the metal layer being arranged closer to the substrate than the wiring layer and opposite to the wiring layer.

[0019] Each pixel having the photoelectric conversion unit is provided with the charge accumulation unit and the additional capacitance unit, and when charge is accumulated in the charge-to-voltage conversion unit of a specified pixel, the charge accumulation unit arranged in the specified pixel can add the charge capacity including the additional capacity accumulated by the additional capacitance unit to the charge-to-voltage conversion unit.

[0020] A switching unit configured to switch to any one of a state in which the charge-voltage conversion portion and the charge accumulation portion are electrically connected to each other and a state in which the charge-voltage conversion portion and the charge accumulation portion are not electrically connected to each other may be further included.

[0021] The metal layer may be a light-shielding film made of metal.

[0022] The metal layer may be a light shielding film made of tungsten.

[0023] The light shielding film may be formed to constitute an image plane phase difference detection pixel.

[0024] When a polysilicon layer is provided on the surface of the substrate on the light source side, the light shielding film may be formed on the polysilicon on the substrate.

[0025] The light shielding film may be formed on a transfer gate composed of the polysilicon layer provided on a surface of the substrate on a light source side of light.

[0026] The light shielding film may shield any one of an upper portion, a lower portion, a left portion, and a right portion of the photoelectric conversion portion.

[0027] The wiring layer may be closer to the second electrode than a wiring layer of a general wiring.

[0028] The solid-state image sensor is of a global shutter type, and the solid-state image sensor may further include a storage unit configured to store a pixel signal of each pixel required for the global shutter type, and the light shielding film may shield the storage unit.

[0029] The first electrode may be disposed at a position opposite to the light shielding film on the memory cell.

[0030] An imaging device according to one aspect of the present technology is an imaging device including a front-illuminated solid-state image sensor, the imaging device including: a photoelectric conversion unit configured to perform photoelectric conversion of incident light; a charge-voltage conversion unit configured to accumulate charges obtained by photoelectric conversion; a charge accumulation unit configured to increase the capacity of the charge-voltage conversion unit; and an additional capacitance unit configured to increase the capacity of the charge accumulation unit, wherein the additional capacitance unit is composed of a first electrode and a second electrode, the first electrode being formed by a wiring layer in which wiring electrically connected to terminals of the voltage conversion unit and the charge accumulation unit is formed, and the second electrode being formed by a metal layer arranged on a surface of a substrate on which the photoelectric conversion unit is formed, the surface of the substrate being closer to a light source of light, and the metal layer being arranged closer to the substrate than the wiring layer and opposite to the wiring layer.

[0031] An electronic device according to one aspect of the present technology is an electronic device including a front-illuminated solid-state image sensor, the electronic device including: a photoelectric conversion unit configured to perform photoelectric conversion of incident light; a charge-voltage conversion unit configured to accumulate charges obtained by photoelectric conversion; a charge accumulation unit configured to increase the capacity of the charge-voltage conversion unit; and an additional capacitance unit configured to increase the capacity of the charge accumulation unit, wherein the additional capacitance unit is composed of a first electrode and a second electrode, the first electrode is formed by a wiring layer in which wiring electrically connected to terminals of the voltage conversion unit and the charge accumulation unit is formed, and the second electrode is formed by a metal layer arranged on a surface of a substrate on which the photoelectric conversion unit is formed, the surface of the substrate being closer to a light source of light, and the metal layer being arranged closer to the substrate than the wiring layer and opposite to the wiring layer.

[0032] In one aspect of the present technology, it includes a front-illuminated solid-state image sensor, in which incident light is photoelectrically converted by a photoelectric conversion unit, charges obtained by the photoelectric conversion are accumulated by a charge-voltage conversion unit, capacitance is increased to the charge-voltage conversion unit by a charge accumulation unit, capacitance is increased to the charge accumulation unit by an additional capacitance unit, the additional capacitance unit is composed of a first electrode and a second electrode, the first electrode is formed by a wiring layer in which wiring electrically connected to terminals of the voltage conversion unit and the charge accumulation unit is formed, the second electrode is formed by a metal layer disposed on a surface of a substrate on which the photoelectric conversion unit is formed, the surface of the substrate being closer to a light source of light, the metal layer being disposed closer to the substrate than the wiring layer and opposite to the wiring layer.

[0033] [Effects of the invention]

[0034] According to an aspect of the present technology, it is possible to switch FD conversion efficiency in all pixels of a solid-state image sensor. BRIEF DESCRIPTION OF THE DRAWINGS

[0035] Figure 1 is a diagram showing a configuration example of a solid-state image sensor.

[0036] Figure 2 It is a diagram for explaining a configuration example of each pixel on a substrate.

[0037] Figure 3 It is used to illustrate Figure 1 A diagram showing an example of the configuration of each pixel on a pixel array.

[0038] Figure 4 It is used to illustrate the formation of Figure 3 A diagram showing an example of the structure of a metal light-shielding film on a substrate.

[0039] Figure 5 is used to describe the formation of Figure 4 A diagram showing the configuration of the FD wiring layer on the layer consisting of the light-shielding film.

[0040] Figure 6 It is used to illustrate Figures 3 to 5 A cross-sectional view of the stack of layers.

[0041] Figure 7 is used to illustrate the formation of Figure 3 FIG. 1 is a diagram of a first variation of another configuration example of a metal light-shielding film on a substrate.

[0042] Figure 8 It is a diagram for explaining a second modification example which is a configuration example in which the FD wiring layer is formed in a layer closer to the substrate than the aforementioned FD wiring layer.

[0043] Fig. 9 It is used to illustrate when Figure 1 A diagram showing an example of the configuration of each pixel when the pixel array is a global shutter type.

[0044] Fig.10 It is used to illustrate the formation of Fig. 9 A diagram showing an example of the structure of a metal light-shielding film on a substrate.

[0045] Fig.11 is used to describe the formation of Fig.10 A diagram showing the configuration of the FD wiring layer on the layer consisting of the light-shielding film.

[0046] Fig.12 It is used to illustrate Figures 9 to 11 A cross-sectional view of the stack of layers.

[0047] Fig.13 is used to describe the formation of Fig.10 FIG. 1 is a diagram showing another configuration of the FD wiring layer on the layer consisting of the light-shielding film.

[0048] Fig.14 It is used to illustrate Fig.13 Figure 5. A cross-sectional view of the case.

[0049] Fig.15 It is a diagram for explaining the configuration of an imaging device and an electronic device including a solid-state image sensor to which the present technology is applied.

[0050] Fig.16 is a diagram showing a usage example of a solid-state image sensor. DETAILED DESCRIPTION

[0051] Embodiments to which the present technology is applicable will be described below with reference to the drawings.

[0052] <First embodiment>

[0053] <Configuration Example of Solid-State Image Sensor>

[0054] First, a configuration example of a solid-state image sensor to which the present technology is applied will be described. Figure 1 : is a diagram showing a configuration example of a solid-state image sensor to which the present technology according to the embodiment is applied.

[0055] The solid-state image sensor 11 is a front-illuminated image sensor constituted by a complementary metal oxide semiconductor (CMOS) image sensor or the like, and is configured to capture an image by receiving light from a subject, performing photoelectric conversion thereon, and generating an image signal.

[0056] Note that a front-illuminated image sensor is an image sensor having a structure in which a light receiving surface onto which light from a subject is incident (i.e., a microlens (on-chip lens) for focusing light and a wiring layer having wiring for driving transistors etc. for each pixel) is arranged on a photodiode that receives light from the subject.

[0057] The solid-state image sensor 11 includes a pixel array unit 21 , a vertical drive unit 22 , a column processing unit 23 , a horizontal drive unit 24 , a system control unit 25 , a pixel drive line 26 , a vertical signal line 27 , a signal processing unit 28 , and a data storage unit 29 .

[0058] In the solid-state image sensor 11 , a pixel array unit 21 is formed on a semiconductor substrate (chip) not shown, and a vertical drive unit 22 to a system control unit 25 are further integrated on the semiconductor substrate.

[0059] The pixel array unit 21 is composed of pixels having a photoelectric conversion element for generating and storing an amount of charge corresponding to the amount of light incident from a writing object. Figure 1 In the embodiment, pixels constituting the pixel array unit 21 are two-dimensionally arranged in the horizontal direction (row direction) and the vertical direction (column direction).

[0060] For example, in the pixel array unit 21 , the pixel driving line 26 is wired along the row direction for each pixel row composed of pixels arranged in the row direction, and the vertical signal line 27 is wired along the column direction for each pixel column composed of pixels arranged in the column direction.

[0061] The vertical driving unit 22 includes a shift register, an address decoder, and the like, and is configured to supply signals and the like to each pixel via the pixel driving line 26 to simultaneously drive all pixels of the pixel array unit 21 in row units and the like.

[0062] The column processing unit 23 reads out signals from pixels of each pixel column of the pixel array unit 21 via the vertical signal line 27 and then performs noise removal processing, correlated double sampling processing, analog / digital (A / D) conversion processing, etc., thereby generating pixel signals.

[0063] The horizontal driving unit 24 includes a shift register, an address decoder, etc., and is configured to sequentially select unit circuits corresponding to the pixel columns of the column processing unit 23. As a result of the selective scanning of the horizontal driving unit 24, the pixel signals subjected to the signal processing performed by the column processing unit 23 for each unit circuit are sequentially output to the signal processing unit 28.

[0064] The system control unit 25 includes a timing generator for generating various timing signals, and is configured to perform drive control of the vertical driving unit 22 , the column processing unit 23 , and the horizontal driving unit 24 based on the timing signals generated by the timing generator.

[0065] The signal processing unit 28 temporarily stores data in the data storage unit 29 as necessary, performs signal processing such as calculation processing on the pixel signal supplied from the column processing unit 23 , and outputs an image signal composed of the pixel signal.

[0066] <Pixel Circuit Configuration>

[0067] Next, the circuit configuration of each pixel of the above-mentioned pixel array unit 21 will be described. Figure 2 2 is a circuit diagram showing a circuit configuration example of one pixel provided in the pixel array unit 21 .

[0068] exist Figure 2 , a pixel of the pixel array unit 21 includes a photodiode 61, a transfer gate portion 62, a charge-voltage conversion portion 63, a capacity switch 64, a charge accumulation portion 65, a reset gate portion 66, an amplification transistor 67, and a selection transistor 68.

[0069] The photodiode 61 is a photoelectric conversion element constituted by, for example, a pn junction photodiode, and is configured to receive light from a writing object, generate a charge amount corresponding to the received light amount by photoelectric conversion, and store the generated charge.

[0070] The transfer gate portion 62 is provided between the photodiode 61 and the charge-voltage conversion portion 63 , and is configured to transfer the charge stored in the photodiode 61 to the charge-voltage conversion portion 63 according to a drive signal TRG applied to a gate electrode of the transfer gate portion 62 .

[0071] For example, in Figure 2 In the embodiment, the transmission gate portion 62, the capacity switch 64, the reset gate portion 66 and the selection transistor 68 are composed of n-channel MOS transistors.

[0072] Drive signals TRG, FDG, RST, and SEL are respectively supplied to the gate electrode of the transfer gate portion 62 to the selection transistor 68. These drive signals are pulse signals that are in an active state (ON state) at a high level and in an inactive state (OFF state) at a low level.

[0073] Therefore, for example, at the transfer gate portion 62 , when the drive signal TRG supplied to the gate electrode of the transfer gate portion 62 is in an active state to turn on the transfer gate portion 62 , the charge accumulated in the photodiode 61 is transferred to the charge-voltage conversion portion 63 .

[0074] The charge-voltage conversion portion 63 is a floating diffusion region (FD) that converts the charge transferred from the photodiode 61 via the transfer gate portion 62 into an electric signal such as a voltage signal and then outputs the resultant signal.

[0075] The charge-voltage conversion section 63 is connected to the reset gate section 66, and is also connected to the vertical signal line 27 via the amplification transistor 67 and the selection transistor 68. In addition, the charge-voltage conversion section 63 is also connected to the charge accumulation section 65 via the capacity switch 64. The charge accumulation section 65 is a floating diffusion region (FD) that converts the charge into an electrical signal such as a voltage signal, and also includes an additional capacitance section MIM described later. Note that the charge accumulation section 65 is a floating diffusion region (FD), but because the charge accumulation section 65 operates together with the capacitance including the additional capacitance section MIM described later, it is represented by a circuit symbol of a capacitor.

[0076] The capacity switch 64 is turned on or off according to the drive signal FDG, thereby switching the connection between the charge-voltage conversion section 63 and the charge accumulation section 65 to any one of an electrically connected state and an electrically non-connected state.

[0077] Specifically, the drive signal FDG is supplied to the gate electrode of the capacity switch 64 , and when the drive signal FDG is turned on, the potential right below the capacity switch 64 becomes deeper, and the charge-voltage conversion section 63 and the charge accumulation section 65 are electrically connected to each other.

[0078] Conversely, when the drive signal FDG is turned off, the potential immediately below the capacitance switch 64 becomes shallow, and the charge-voltage conversion section 63 and the charge accumulation section 65 are not electrically connected to each other.

[0079] Therefore, by turning the drive signal FDG on and off, the capacity can be added to the charge-voltage conversion unit 63 and the sensitivity of the pixel can be changed. Specifically, when the amount of change in the accumulated charge is represented by ΔQ and the amount of change in voltage and the capacitance when the amount of change in charge is ΔQ are represented by ΔV and C, respectively, the relationship ΔV=ΔQ / C holds.

[0080] The capacitance of the charge-voltage conversion unit 63 is C FD The capacity of the charge storage unit 65 is C FD2 When the driving signal FDG is in the ON state, the capacitance C in the pixel region where the signal level is read is C FD +C FD2 In contrast, when the drive signal FDG is turned off, the capacitor C becomes C FD , and thus improves the voltage sensitivity with respect to the charge change amount (voltage change amount: FD conversion efficiency).

[0081] As described above, in the solid-state image sensor 11, the sensitivity of the pixel is appropriately changed by turning on or off the drive signal FDG. For example, when the drive signal FDG is turned on, the charge accumulation section 65 is electrically connected to the charge-voltage conversion section 63, and therefore, a portion of the charge transferred from the photodiode 61 to the charge-voltage conversion section 63 is accumulated in the charge accumulation section 65 in addition to the charge-voltage conversion section 63.

[0082] The reset gate portion 66 is an element for initializing (resetting) each region from the charge-voltage conversion portion 63 to the charge accumulation portion 65 when necessary, and has a drain connected to a power supply of the power supply voltage VDD and a source connected to the charge-voltage conversion portion 63. A drive signal RST is applied to a gate electrode of the reset gate portion 66 as a reset signal.

[0083] When the drive signal RST enters an active state, the reset gate portion 66 becomes conductive, and the potential of the charge-voltage conversion portion 63 and the like is reset to the level of the power supply voltage VDD. In other words, the charge-voltage conversion portion 63 and the like are initialized.

[0084] The amplifier transistor 67 has a gate electrode connected to the charge-voltage conversion section 63 and a drain connected to a power supply of the power supply voltage VDD, and serves as an input unit of a source follower circuit that reads out the charge obtained by photoelectric conversion at the photodiode 61. Specifically, the amplifier transistor 67 has a source connected to the vertical signal line 27 via the selection transistor 68, thereby constituting a constant current source connected to one end of the vertical signal line 27 and a source follower circuit.

[0085] The selection transistor 68 is connected between the source of the amplifier transistor 67 and the vertical signal line 27, and the drive signal SEL is supplied as a selection signal to the gate electrode of the selection transistor 68. When the drive signal SEL enters an active state, the selection transistor 68 becomes a conductive state, and the pixel having the selection transistor 68 enters a selected state. When the pixel enters the selected state, the signal output from the amplifier transistor 67 is read out by the column processing unit 23 via the vertical signal line 27.

[0086] In addition, for pixels, as Figure 1 The pixel drive lines 26 in the vertical drive unit 22 are provided with a plurality of drive lines, for example, for each pixel row. Therefore, the drive signals TRG, FDG, RST, and SEL are supplied from the vertical drive unit 22 to the pixels via the drive lines serving as the pixel drive lines 26.

[0087] <Physical structure of pixels>

[0088] Next, refer to Figures 3 to 6 The physical structure of the above-mentioned pixel is described below. Figure 2 The components described and components corresponding thereto will be designated by the same names and reference numerals, and description thereof will be omitted as appropriate.

[0089] Figure 3 is a top view of the first layer of a pixel in which the element isolation layer, polysilicon and contacts are formed on the substrate. Figures 3 to 5 , the direction toward the drawing surface is the incident direction of the incident light, and Figure 3 The photodiode (PD) 61 in is the light receiving surface.

[0090] in addition, Figure 4 1 is a top view of a second layer which is an upper layer of the first layer (a layer on the light source side with respect to the incident direction of incident light) and is formed with a light shielding film. Hereinafter, the second layer will also be referred to as a light shielding film layer.

[0091] also, Figure 5 2 is a top view of a third layer which is an upper layer of the second layer and on which wiring for connecting contacts is formed. Hereinafter, the third layer will also be referred to as a wiring layer.

[0092] also, Figure 6AA' and BB' cross sections of a pixel in a state where the first to third layers are stacked are shown, wherein Figure 6 The upper right part shows the pixel Figure 6 Section A-A' on the upper left.

[0093] also, Figure 6 The lower right portion of FIG. 1 shows a side section of an image plane phase difference detection pixel (ZAF pixel), that is, Figure 6 Section B-B' at the lower left. Figure 6 The side section in Figure 3 The first layer shown as the bottom layer, Figure 4 The second layer shown in Figure 5 The third layer shown in FIG. 1 is stacked upward in sequence in the figure.

[0094] In addition, Figure 6 In the cross-sections at the upper right and lower right parts of the drawing, the direction from top to bottom in the drawing is the incident direction of the incident light. Figures 3 to 5 The black squares in the figure indicate the locations of the (well) contacts (electrodes). Figure 6 The circles with vertical lines in the figure indicate the positions of the contacts corresponding to the connection wiring.

[0095] In addition, Figures 3 to 6 The upper left portion of each figure shows a top view of the first layer of a pixel, Figures 3 to 6 The right part of each figure shows a top view of four pixels of 2×2 pixels in the horizontal direction and the vertical direction. Figures 3 to 6 Of the four pixels 51 - 1 to 51 - 4 on the right side of each of the figures, the lower right pixel 51 - 4 is a ZAF pixel, and the other pixels 51 - 1 to 51 - 3 are normal pixels.

[0096] First, refer to Figure 3 The upper left portion of illustrates the physical composition of the first layer of a pixel. Figure 3 The pixel 51 in FIG. 5 is surrounded by an element isolation layer D, and a photodiode 61 is provided in a region substantially in the lower half thereof.

[0097] exist Figure 3 A transfer gate portion (TRG) 62 is provided on the upper portion of the photodiode 61 in the embodiment, and the transfer gate portion 62 is opened and closed to transfer the charge accumulated in the photodiode 61 to a charge-voltage conversion portion 63 constituted by a floating diffusion region (floating diffusion (FD)).

[0098] exist Figure 3A capacity switch 64 for controlling the electrical connection between the charge accumulation portion 65 constituting the second floating diffusion region (FD) and the charge-voltage conversion portion 63 is provided on the left side of the charge-voltage conversion portion 63. Thus, the capacity switch 64 switches between on and off so that the charge accumulation portion 65 and the charge-voltage conversion portion 63 are electrically connected and not electrically connected to each other.

[0099] exist Figure 3 A reset gate portion 66 for discharging the charges accumulated in the charge accumulation portion 65 and the charge-voltage conversion portion 63 is provided on the right side of the charge-voltage conversion portion 63. Therefore, the capacity switch 64 switches between on and off so that the charge accumulation portion 65 and the charge-voltage conversion portion 63 are electrically connected and not electrically connected to each other.

[0100] exist Figure 3 An amplifier transistor 67 is provided on the right side of the reset gate portion 66 in FIG. Figure 5 and Figure 6 As shown, the amplifier transistor 67 is electrically connected via a wiring 91 indicated by a vertical line portion, amplifies the electric signal supplied from the charge-voltage conversion portion 63 , and then outputs the amplified signal to the selection transistor 68 .

[0101] exist Figure 3 A selection transistor 68 is provided on the right side of the amplification transistor 67 in FIG. When the drive signal SEL enters an active state, the selection transistor 68 becomes a conductive state, and a signal output from the amplification transistor 67 is output via the contact SO connected to the vertical signal line 27 .

[0102] Figure 3 The right side of FIG. 1 shows four pixels of 2×2 pixels (horizontal direction×vertical direction) as pixels 51-1 to 51-4, each of which is Figure 3 The pixels 51 are shown in the left portion of FIG. The pixels 51 are arranged in the horizontal direction and the vertical direction in this way, thereby forming the pixel array unit 21.

[0103] Next, refer to Figure 4 The second layer serving as a light-shielding film layer formed by stacking on the first layer on the light source side of incident light with respect to the light receiving surface is described.

[0104] Depend on Figure 4 The range indicated by the oblique lines in the right part of is a light shielding film 71. The light shielding film 71 is made of tungsten, for example. The light shielding film made of tungsten is a general structure for suppressing light incidence (smearing) on ​​the vertical transmission path in a charge coupled device (CCD) image sensor. However, although the light shielding film is used to suppress smearing in the CCD, the light shielding film 71 is also used to realize pixels for image plane phase difference detection.

[0105] Specifically, Figure 4The pixel 51-4 in the lower right part of the two vertical pixels × two horizontal pixels in the right part is a pixel for detecting image plane phase difference (ZAF pixel). The other pixels 51-1 to 51-3 are normal pixels in which the light shielding film 71 above the photodiode 61 has an opening. In contrast, the pixel for detecting image plane phase difference (ZAF pixel) has an arrangement in which a portion of the photodiode 61 is blocked by the light shielding film 71. Figure 4 , a configuration example in which the upper side of the photodiode 61 is shielded by the light shielding film 71 is shown.

[0106] In addition, since the light shielding film 71 forms the second layer composed of the metal layer formed between the first layer and the third layer, the light shielding film 71 is not provided at the position where the contact is formed to prevent the occurrence of an electrical short circuit.

[0107] Next, refer to Figure 5 The structure of the third layer will be described.

[0108] The third layer is composed of Figure 5 The FD wiring 91 indicated by the vertical line portion in FIG. 1 and the FD wiring layer in which the electrode 91a for forming the additional capacitance portion MIM to add additional capacity to the charge accumulation portion 65 (ie, the second FD) is formed. Figure 5 In the vertical line portion corresponding to Figure 3 and Figure 4 The circle at the position of the contact represented by the black square in the figure represents the place where the contact is electrically connected. In addition, in the third layer shown in the vertical line portion, the electrode 91a in a rectangular shape is paired with the light shielding film 71 in the second layer provided below the third layer at a position facing the electrode 91a, and together they form the additional capacitance part MIM. The capacity of the additional capacitance part MIM is added to the capacity of the charge accumulation part 65, and as described above, the FD conversion efficiency is thereby reduced.

[0109] Specifically, Figure 6 The electrode 91a and the light shielding film 71 are within the range of A2-A' and B2-B' surrounded by the dotted lines in the upper right and lower right parts of Figure 6 The electrodes 91a and 91b are opposite to each other in the vertical direction in the , and such a configuration forms an additional capacitance section MIM. In addition, the electrode 91a is connected via the contact 65a, thereby increasing the capacity of the charge accumulation section 65 of the floating diffusion layer (n+) in the first layer, and the capacity switch 64 is turned on, thereby connecting to the charge-voltage conversion section 63 as the floating diffusion region. This reduces the FD conversion efficiency.

[0110] In contrast, Figure 6In the range of A1-A2 and B1-B2 in the upper right and lower right parts of , since there is no light shielding film 71 and no additional capacitance section MIM is formed, the FD wiring 91 is connected to the charge-voltage conversion section 63 formed as the floating diffusion region (n+) in the first layer via the contact 63a. In this case, unless the capacity switch 64 is turned on, the charge-voltage conversion section 63 has only its own capacity, so the FD conversion efficiency does not decrease.

[0111] As a result, the charge-voltage conversion section 63 and the charge accumulation section 65 formed as described above are electrically connected and not electrically connected to each other through the capacity switch 64, and this can switch the FD conversion efficiency (sensitivity) of the pixel signal. In addition, with this configuration, since the FD conversion efficiency is switched depending on whether the sum of the capacities of the charge accumulation section 65 and the additional capacitance section MIM is added to the capacity of the charge-voltage conversion section 63, this allows the FD conversion efficiency to be uniformly switched in all pixels without distinguishing between normal pixels and pixels for image plane phase difference detection.

[0112] In addition, in a normal pixel, in order to maximize the sensitivity, for example, Figure 6 The curvature of the microlens ML shown in the upper right and lower right parts of , thereby focusing on the surface (Si surface) of the photodiode 61. In the case of the image plane phase difference detection pixel (ZAF pixel), focusing at the position (height) of the shading film 71 will maximize the characteristics of the image plane phase difference detection pixel. Therefore, if the shading film 71 and the surface (Si surface) of the photodiode 61 differ greatly in height, different curvatures are required to fit the curvature of the microlens for normal pixels and image plane phase difference detection pixels, so that the normal pixels and image plane phase difference detection pixels satisfy the above characteristics respectively. Therefore, it is necessary to increase the number of processes for processing, or to sacrifice any characteristics in order not to increase the number of processes.

[0113] However, if Figure 6 As shown in the upper right and lower right parts of , as a result of the shading film 71 being formed close to the photodiode 61 (as a result of using the shading film 71 to form pixels for image plane phase difference detection), the characteristics can be maximized using all microlenses ML having the same curvature, thereby suppressing the cost increase caused by the increase in the number of processes occurring when processing microlenses with different curvatures.

[0114] In addition, considering the oblique incidence of light, it is advantageous to form a light shielding film 71 directly on the photodiode 61 to form a pixel for detecting an image plane phase difference (ZAF pixel). Specifically, if the light shielding film 71 made of metal is formed in an upper layer at a height different from that of the photodiode 61, the oblique incidence of light can be unblocked by the light shielding film 71 and can pass through the gap between the light shielding film 71 and the Si surface and then enter the photodiode 61. In contrast, Figure 6 As shown in the upper right and lower right parts of , since the light shielding film 71 is formed directly on the photodiode 61 , oblique light does not enter the photodiode 61 .

[0115] As described above, a metal layer composed of the light shielding film 71 is not provided in the layer directly below the FD wiring 91 , but the electrode 91 a is provided only above the light shielding film 71 forming the additional capacitance portion MIM for adding additional capacity to the charge accumulation portion 65 .

[0116] With this configuration, the capacity of the additional capacitor section MIM is added to the charge capacity of the charge-voltage conversion section 63, thereby allowing the capacity of the charge accumulation section 65 to be set to a larger value, and the charge-voltage conversion section 63 and the charge accumulation section 65 are electrically connected and disconnected to each other via the capacity switch 64, which actually allows switching between floating diffusion regions having different diffusion capacitances.

[0117] As a result, the charge-voltage conversion section 63 and the charge accumulation section 65 are electrically connected to each other through the capacity switch 64, the capacity increases, and the FD conversion efficiency decreases. In contrast, the charge-voltage conversion section 63 and the charge accumulation section 65 are not electrically connected to each other through the capacity switch 64, the capacity decreases, and the conversion efficiency increases. As a result of switching the FD conversion efficiency in this way, the sensitivity can be switched.

[0118] In the case of a configuration in which the light shielding film 71 below the electrode 91a of the third layer covers the polysilicon gate, the capacity of the additional capacitance portion MIM can also be increased. Specifically, since the light shielding film 71 is formed in a concave and convex shape following the shape of the lower layer, the distance between the light shielding film 71 and the electrode 91a becomes smaller in the portion where the polysilicon gate exists. As a result, for example, Figure 6 As shown in the upper right and lower right parts of , in the case where the gate electrode of the transmission gate portion 62 is provided, the shorter the distance between the light shielding film 71 and the electrode 91a, the larger the capacity of the additional capacitance portion MIM. Although the polysilicon gate is used as an example in this article, any structure that rises from the surface of the substrate (Si) toward the upper layer can produce a similar effect. For example, oxide film element isolation such as Locos can be used.

[0119] In addition, since the shading film 71 is arranged not only in the normal pixel but also in the pixel for image plane phase difference detection (ZAF pixel), the structure around the charge-voltage conversion unit 63 is common in the normal pixel and the pixel for image plane phase difference detection, which makes the FD conversion efficiency of the normal pixel and the pixel for image plane phase difference detection basically the same.

[0120] Therefore, except for the portion of the photodiode 61 that blocks the image plane phase difference detection pixel (ZAF pixel), the normal pixel and the image plane phase difference detection pixel (ZAF pixel) have a common arrangement, which makes the conversion efficiency in all pixels the same. As a result, disadvantages that may occur in subsequent processing due to differences in conversion efficiency between pixels are prevented.

[0121] Furthermore, if the light shielding film 71 is provided only in the image plane phase difference detection pixel, the light shielding film 71 will be set to a smaller size because the number of image plane phase difference detection pixels is smaller than the number of normal pixels and the image plane phase difference detection pixels will therefore be scattered in the pixel array unit 21. Since the light shielding film 71 will be in an electrically floating state when the light shielding film 71 is set to a smaller size, the effect of generating a capacity for forming the charge accumulation portion 65 will not be able to occur. In order to prevent the light shielding film 71 from becoming electrically floating, the light shielding film 71 needs to be fixed to a power source, GND, etc. If the wiring arrangement is changed only in the image plane phase difference detection pixel, there is a concern that the capacity (conversion efficiency) generated by the charge-voltage conversion portion 63 and the charge accumulation portion 65 is different from the capacity of a normal pixel, which is not desirable. In order to prevent the above disadvantages, a shading film 71 is also provided in a normal pixel, so that it is only possible to extract to the outside of the pixel array through the shading film 71, and a certain potential is applied to the outside of the pixel array 21, so that the shading film 71 will not become an electrically floating state.

[0122] <First Modification>

[0123] It has been described above that in the formation of the image plane phase difference detection pixel, the light shielding film 71 is provided to shield the image plane phase difference detection pixel. Figure 7 However, as long as the image plane phase difference detection pixel can be formed, the light shielding film 71 can be provided in a manner that shields other parts of the photodiode 61. Specifically, as Figure 7 As shown in the upper right part of , a light shielding portion 71 may be provided so that the lower part of the photodiode 61 is shielded. Figure 7 As shown in the lower left and lower right parts of , the light shielding portion 71 may be provided so that the right and left parts of the respective photodiodes 61 are shielded.

[0124] <Second Modification>

[0125] Although the example in which the gate electrode of the transfer gate portion 62 is provided in the same metal wiring layer as the FD wiring 91 has been described above, for example, Figure 8As shown in the charge-voltage conversion unit 63 and the charge accumulation unit 65, the FD wiring layer 101 can be used as a wiring layer, and a general wiring 91 can be used instead of the above-mentioned FD wiring 91 for the gate electrode of the transmission gate unit 62, thereby forming an electrode 101a of the additional capacitance unit MIM formed in a layer close to the light shielding film 71.

[0126] exist Figure 8 The left part shows the Figure 6 The upper right portion of the figure shows a side section of a typical pixel, and the right portion shows the pixel corresponding to Figure 6 The side cross-section of the image plane phase difference detection pixel at the lower right part of shows an example in which a general wiring 91 is used instead of the above-mentioned FD wiring 91 and the FD wiring 101 is formed at a position closer to the light shielding film 71 than the above-mentioned FD wiring 91.

[0127] With this configuration, since the electrode 101a forming the additional capacitor portion MIM is arranged at a position closer to the light shielding film 71, the capacity of the additional capacitor portion MIM is increased, and together with the capacity of the charge accumulation portion 65 serving as the second floating diffusion region, a larger capacity is obtained, so that the FD conversion efficiency is further reduced, thereby allowing switching between the two FD conversion efficiencies by utilizing the larger difference between them.

[0128] Furthermore, like the FD wiring 101, without changing the distance between the other general wirings 91 and the light shielding film 71, only the FD wiring 101 can be wired at a position close to the light shielding film 71. This allows the capacity between the general wirings 91 other than the FD wiring 101 and the light shielding film 71 not to be changed. As a result, it is possible to increase only the capacity of the additional capacitance portion MIM while preventing the occurrence of failures such as an operation delay of a transistor caused by an increase in the capacity between the general wiring 91 and the light shielding film 71.

[0129] <Second Implementation Method>

[0130] Although an example of a typical front-illuminated CMOS image sensor has been described above, the image sensor may be a front-illuminated CMOS image sensor in the form of a so-called global shutter that is provided with a memory for each pixel and is configured to read out pixel signals in all pixels simultaneously.

[0131] Figures 9 to 12 It shows the corresponding Figures 3 to 6 Figure 1 shows the first to third layers of a front-illuminated CMOS image sensor in the form of a global shutter and its side cross-section. Figures 9 to 12 In, with Figures 3 to 6 Components having the same functions as those in the drawings will be designated by the same names and reference numerals, and description thereof will be omitted as appropriate.

[0132] therefore, Figures 9 to 12 and Figures 3 to 6 The difference is that in Figures 3 to 6 The pixel 51 is shown in pixel units, while Figures 9 to 12 The middle pixel is shown as pixel 151.

[0133] In addition, each pixel 151 is provided with a memory 171 ( Fig.12 ) a transfer gate portion (TRG2) 161 for opening and closing the gate and an overflow gate portion (OFG) 162 for resetting the photodiode 61, the memory simultaneously stores a signal of the charge accumulated by the photodiode (PD) 61 in a pixel unit.

[0134] The transfer gate portion 161 is configured to cover the memory 171. The transfer gate portion 161 and the overflow gate portion 162 are driven by unillustrated drive signals TRG2 and OFG, respectively, which are pulse signals in an active state (ON state) at a high level and in an inactive state (OFF state) at a low level.

[0135] In each pixel 151, Fig.10 In the illustrated pixels 151-1 to 151-4, the light shielding film 71 is formed as the second layer, that is, the upper layer of the first layer including the photodiode 61. Also in the second layer, the light shielding film 71 is not provided around the contact in terms of preventing short circuit. Note that the light shielding film 71 in the pixel 151 is made of tungsten, for example, and in a CMOS image sensor in the form of a global shutter, the light shielding film 71 is suppressed in the memory 171 ( Fig.12 ) (PLS = paraSitic light senSitivity: a phenomenon similar to tailing).

[0136] In addition, if Fig.11 As shown, the third layer composed of the FD wiring 91 is formed on the second layer composed of the light shielding film 71, and a part of the third layer forms an electrode 91a.

[0137] In this composition, Fig.12 In the range of C2-C' surrounded by the dotted line in the CC' section shown, the electrode 91a and the light shielding film 71 are opposite to each other, thereby forming an additional capacitance unit MIM. In addition, the electrode 91a is connected via the contact 65a, and the capacity of the additional capacitance unit MIM is thus increased to the charge accumulation unit 65 composed of the floating diffusion region (n+ layer) as the first layer.

[0138] In contrast, Fig.12In the range of C1-C2 shown, the FD wiring 91 is connected via the contact 63a, and the charge-voltage conversion section 63 is used as a floating diffusion region (n+ layer) as the first layer. However, in the charge-voltage conversion section 63, since the light shielding film 71 is not formed at a position opposite to the FD wiring 91, the additional capacitance section MIM is not formed, and the charge accumulation section 65 has only its own capacity.

[0139] The charge-voltage conversion section 63 and the charge accumulation section 65 formed as described above are electrically connected and not electrically connected to each other through the capacity switch 64 , and this can switch the FD conversion efficiency (sensitivity) of the pixel signal.

[0140] As a result, also in a global shutter type CMOS image sensor, switching of the FD conversion efficiency can be achieved in all pixels.

[0141] <Third Modification>

[0142] Although the example in which the light shielding film 71 and the electrode 91a provided in the third layer are opposed to each other to form the additional capacitance portion MIM so that the capacity of the charge accumulation portion 65 is increased has been described above, the electrode 91a may be provided in another region, for example, as long as the electrode 91a is opposed to the light shielding film 71. Fig.13 As shown, electrode 91b may be formed instead of electrode 91a.

[0143] Specifically, in the pixel 151 of the CMOS image sensor of the global shutter form, since the transfer gate portion 161 as the polysilicon gate (TRG2) on the memory 171 occupying a relatively large area exists on the photodiode 61, the electrode 91b is formed as a layer thereon.

[0144] In this composition, if Fig.14 As shown in the range of D2-D' surrounded by the dotted line in the D-D' section shown, the electrode 91b and the light shielding film 71 are opposite to each other, thereby forming an additional capacitance unit MIM. In addition, the electrode 91b is connected via the contact 65a, and the capacity is thus added to the capacity of the charge accumulation unit 65 composed of the floating diffusion region (n+ layer) as the first layer.

[0145] In contrast, Fig.14 In the range of D1-D2 shown, the FD wiring 91 is connected via the contact 63a, and the charge-voltage conversion section 63 of the first layer is used as a floating diffusion region (n+ layer). However, in the charge-voltage conversion section 63, since the light shielding film 71 is not formed at a position opposite to the FD wiring 91, the additional capacitance section MIM is not formed, and since the capacity does not increase when the charge accumulation section 65 is not connected, the charge-voltage conversion section 63 has only its own capacitance.

[0146] In addition, if Fig.14 As shown in FIG. 1 , when the electrode 91 b is provided on the transmission gate portion 171, the distance between the electrode 91 b and the light shielding film 71 is greater than Fig.12 As shown in the figure, the distance between the electrode 91a and the light shielding film 71 is close, and the additional capacity of the additional capacitance section MIM is also increased. As a result, the charge-voltage conversion section 63 and the charge accumulation section 65 formed as described above are electrically connected and not electrically connected to each other through the capacity switch 64, and this can switch the FD conversion efficiency (sensitivity) of the two types of pixel signals with large changes.

[0147] As a result, in a CMOS image sensor of the global shutter type in which the electrode 91 b is formed in this manner, switching of the FD conversion efficiency can also be achieved in all pixels.

[0148] <Application examples of electronic equipment>

[0149] The above-described solid-state image sensor is applicable to, for example, various electronic devices including imaging devices such as digital cameras and digital video cameras, portable phones having an imaging function, and other devices having an imaging function.

[0150] Fig.15 This is a diagram showing a configuration example of an imaging device as an electronic device to which the present technology is applied.

[0151] Fig.15 An imaging device 201 shown in FIG. 2 includes an optical system 202 , a shutter 203 , a solid-state image sensor 204 , a drive circuit 205 , a signal processing circuit 206 , a monitor 207 , and a memory 208 , and is capable of capturing still images and moving images.

[0152] The optical system 202 includes one or more lenses, and is configured to guide light (incident light) from a subject to be written to the solid-state image sensor 204 , and then focus the light onto a light receiving surface of the solid-state image sensor 204 .

[0153] The shutter 203 is arranged between the optical system 202 and the solid-state image sensor 204 , and controls a light irradiation period and a light shielding period of light to the solid-state image sensor 204 under the control of the drive circuit 205 .

[0154] The solid-state image sensor 204 is composed of the above-mentioned solid-state image sensor 11 or a package including the solid-state image sensor 11. The solid-state image sensor 204 accumulates signal charges for a certain period of time according to the light focused on the light receiving surface via the optical system 202 and the shutter 203. The signal charges accumulated in the solid-state image sensor 204 are transferred according to the drive signal (timing signal) supplied from the drive circuit 205.

[0155] The driving circuit 205 outputs a driving signal for controlling the transfer operation of the solid-state image sensor 204 and the shutter operation of the shutter 203 to drive the solid-state image sensor 204 and the shutter 203 .

[0156] The signal processing circuit 206 performs various signal processing on the signal charge output from the solid-state image sensor 204. An image (image data) obtained by the signal processing of the signal processing circuit 206 is supplied to a monitor 207 for display or to a memory 208 for storage (recording).

[0157] In the imaging device 201 having such a configuration, switching of the FD conversion efficiency can also be achieved in all pixels by applying the solid-state image sensor 11 instead of the aforementioned solid-state image sensor 204 .

[0158] <Examples of using solid-state image sensors>

[0159] Fig.16 1 is a diagram showing a usage example of the above-mentioned solid-state image sensor 11 .

[0160] The above-mentioned solid-state image sensor 11 can be used in various cases of sensing light such as visible light, infrared light, ultraviolet light, and X-rays, for example, as follows:

[0161] - devices for taking images for viewing, for example, digital cameras and portable devices with camera functions,

[0162] - Devices for traffic use, such as on-board sensors for imaging in front of, behind, around, inside, etc., of a car for safe driving such as automatic stopping and for recognizing the driver's status, monitoring cameras for monitoring running vehicles and roads, and distance-measuring sensors for measuring the distance between vehicles, etc.,

[0163] - devices for use with home appliances, such as televisions, refrigerators, and air conditioners, that image the user's gestures and operate the device according to the gestures,

[0164] - devices for medical and health care use, for example, endoscopes and devices for receiving infrared light for angiography,

[0165] - devices for security purposes, such as surveillance cameras for crime prevention and cameras for personal authentication,

[0166] - devices for use in cosmetic treatments, for example, skin testing devices configured to image the skin and microscopes for imaging the scalp,

[0167] - devices for sports use, such as action cameras and body-worn cameras for sports,

[0168] -Devices for agricultural use, such as cameras for monitoring the status of fields and crops.

[0169] The present technology may also have the following configurations.

[0170] (1) A front-illuminated solid-state image sensor, comprising: a photoelectric conversion unit configured to perform photoelectric conversion of incident light; a charge-voltage conversion unit configured to accumulate charges obtained by photoelectric conversion; a charge accumulation unit configured to increase capacitance to the charge-voltage conversion unit; and an additional capacitance unit configured to increase capacitance to the charge accumulation unit, wherein the additional capacitance unit is composed of a first electrode and a second electrode, the first electrode being formed by a wiring layer in which wiring electrically connected to terminals of the voltage conversion unit and the charge accumulation unit is formed, and the second electrode being formed by a metal layer disposed on a surface of a substrate on which the photoelectric conversion unit is formed, the surface of the substrate being closer to a light source of light, the metal layer being disposed closer to the substrate than the wiring layer and opposite to the wiring layer.

[0171] (2) A solid-state image sensor according to claim (1), wherein each pixel having the photoelectric conversion portion is provided with the charge accumulation portion and the additional capacitance portion, and when charge is accumulated in the charge-to-voltage conversion portion of a specified pixel, the charge accumulation portion provided in the specified pixel adds a charge capacity including the additional capacity accumulated by the additional capacitance portion to the charge-to-voltage conversion portion.

[0172] (3) The solid-state image sensor according to claim (2), further comprising a switching unit configured to switch to any one of a state in which the charge-voltage conversion portion and the charge accumulation portion are electrically connected to each other and a state in which the charge-voltage conversion portion and the charge accumulation portion are not electrically connected to each other.

[0173] (4) The solid-state image sensor according to (1), wherein the metal layer is a light-shielding film made of metal.

[0174] (5) The solid-state image sensor according to (4), wherein the metal layer is a light shielding film made of tungsten.

[0175] (6) The solid-state image sensor according to (4), wherein the light shielding film is formed to constitute an image plane phase difference detection pixel.

[0176] (7) The solid-state image sensor according to (4), wherein when a polysilicon layer is provided on a surface of the substrate on a light source side, the light shielding film is formed on the polysilicon on the substrate.

[0177] (8) The solid-state image sensor according to (7), wherein the light shielding film is formed on a transfer gate composed of the polysilicon layer provided on a surface of the substrate on a light source side.

[0178] (9) The solid-state image sensor according to (4), wherein the light shielding film shields any one of an upper portion, a lower portion, a left portion, and a right portion of the photoelectric conversion portion.

[0179] (10) The solid-state image sensor according to (4), wherein the wiring layer is closer to the second electrode than a wiring layer of general wiring.

[0180] (11) The solid-state image sensor according to claim (4), wherein the solid-state image sensor is of a global shutter form, and the solid-state image sensor further includes a storage unit configured to store pixel signals of each pixel required for the global shutter form, wherein the light-shielding film shields the storage unit.

[0181] (12) The solid-state image sensor according to (11), wherein the first electrode is provided at a position opposing a light shielding film on the memory cell.

[0182] (13) An imaging device including a front-illuminated solid-state image sensor, the imaging device comprising: a photoelectric conversion unit configured to perform photoelectric conversion of incident light; a charge-voltage conversion unit configured to accumulate charges obtained by photoelectric conversion; a charge accumulation unit configured to increase the capacity of the charge-voltage conversion unit; and an additional capacitance unit configured to increase the capacity of the charge accumulation unit, wherein the additional capacitance unit is composed of a first electrode and a second electrode, the first electrode being formed by a wiring layer in which wiring electrically connected to terminals of the voltage conversion unit and the charge accumulation unit is formed, and the second electrode being formed by a metal layer disposed on a surface of a substrate on which the photoelectric conversion unit is formed, the surface of the substrate being closer to a light source of light, the metal layer being disposed closer to the substrate than the wiring layer and opposite to the wiring layer.

[0183] (14) An electronic device including a front-illuminated solid-state image sensor, the electronic device comprising: a photoelectric conversion unit configured to perform photoelectric conversion of incident light; a charge-voltage conversion unit configured to accumulate charges obtained by photoelectric conversion; a charge accumulation unit configured to increase the capacity of the charge-voltage conversion unit; and an additional capacitance unit configured to increase the capacity of the charge accumulation unit, wherein the additional capacitance unit is composed of a first electrode and a second electrode, the first electrode being formed by a wiring layer in which wiring electrically connected to terminals of the voltage conversion unit and the charge accumulation unit is formed, and the second electrode being formed by a metal layer disposed on a surface of a substrate on which the photoelectric conversion unit is formed, the surface of the substrate being closer to a light source of light, and the metal layer being disposed closer to the substrate than the wiring layer and opposite to the wiring layer.

[0184] Reference numerals list

[0185] 11 Solid-state image sensor 21 Pixel array unit

[0186] 51 pixels 61 photodiodes

[0187] 62 transfer gate unit 63 charge-voltage conversion unit

[0188] 64 Capacity switch 65 Charge storage unit

[0189] 66 Reset gate portion 67 Amplifying transistor

[0190] 68 selection transistor 71 light shielding film

[0191] 91 FD wiring 91 electrode

[0192] 151 pixel 161 transmission gate portion

[0193] 162 Overflow gate section

Claims

1. A light detection device, comprising: Photoelectric conversion area; a transfer transistor configured to transfer the charge from the photoelectric conversion region to a charge-voltage conversion portion; a switching transistor configured to selectively add a capacitance of a capacitor to a capacitance of the charge-to-voltage conversion portion; as well as A wiring layer, the wiring layer comprising: a first electrode connected to the switching transistor; and a second electrode, the second electrode being opposite to the first electrode, the second electrode comprising a first portion and a second portion, wherein the capacitor comprises the first electrode and the second electrode, and A first distance between the first portion of the second electrode and the first electrode is different from a second distance between the second portion of the second electrode and the first electrode.

2. The light detection device according to claim 1, wherein The first electrode and the second electrode are located in different layers.

3. The light detection device according to claim 1, wherein The first distance is greater than the second distance.

4. The light detection device according to claim 2, wherein: The first electrode is disposed above the second electrode in a vertical direction.

5. The light detection device according to claim 1, wherein A contact region of a wiring connected to the charge-voltage conversion section is located between the switching transistor and the reset transistor.

6. The light detection device according to claim 1, wherein In a plan view, the first electrode includes a portion having a rectangular shape.

7. The light detection device according to claim 1, wherein The second electrode is connected to a predetermined potential.

8. A light detection device comprising: Photoelectric conversion area; a transfer transistor configured to transfer the charge from the photoelectric conversion region to a charge-voltage conversion portion; a switching transistor configured to selectively add a capacitance of a capacitor to a capacitance of the charge-to-voltage conversion portion; an amplifying transistor configured to output a pixel signal; as well as A wiring layer, the wiring layer comprising: a first electrode connected to the switching transistor; a second electrode, the second electrode being opposite to the first electrode; and a third electrode connected to the transfer transistor, wherein the capacitor comprises the first electrode and the second electrode, and The first electrode is different from the third electrode.

9. The light detection device according to claim 8, wherein A contact region of a wiring connected to the charge-voltage conversion section is located between the switching transistor and the reset transistor.

10. The light detection device of claim 8, further comprising a selection transistor.

11. The light detection device according to claim 9, wherein The switching transistor, the charge-voltage conversion section, the reset transistor, and the amplifier transistor all share the same well region.

12. The light detection device according to claim 9, wherein The switching transistor, the contact region connected to the wiring of the charge-voltage conversion section, the reset transistor, and the amplification transistor are arranged in this order.

13. The light detection device according to claim 8, wherein A portion of the first electrode has a rectangular shape in a plan view.

14. The light detection device according to claim 8, wherein The second electrode is connected to a predetermined potential.

15. A light detection device comprising: Photoelectric conversion area; a transfer transistor configured to transfer the charge from the photoelectric conversion region to a charge-voltage conversion portion; a switching transistor configured to selectively add a capacitance of a capacitor to a capacitance of the charge-to-voltage conversion portion; an amplifying transistor configured to output a pixel signal; as well as A wiring layer, the wiring layer comprising: a first electrode connected to the switching transistor; and a second electrode, the second electrode being opposite to the first electrode, wherein a contact region of the wiring connected to the charge-voltage conversion unit is located between the switch transistor and the reset transistor, The capacitor includes the first electrode and the second electrode.

16. The light detection device of claim 15, further comprising a selection transistor.

17. The light detection device according to claim 15, wherein The switching transistor, the charge-voltage conversion section, the reset transistor, and the amplifier transistor all share the same well region.

18. The light detection device according to claim 15, wherein The switching transistor, the contact region of the charge-voltage conversion portion, the reset transistor, and the amplifying transistor are sequentially arranged.

19. The light detection device according to claim 15, wherein A portion of the first electrode has a rectangular shape in a plan view.

20. The light detection device according to claim 15, wherein The second electrode is connected to a predetermined potential.

Images