Driving circuits for power semiconductor devices

Abstract

A drive circuit for a power semiconductor element has a gate drive voltage generator (30) which generates a gate drive voltage applied to a gate electrode of a switching element (1) based on an on / off drive timing signal input to an input terminal (11), wherein the switching element has a gate electrode for controlling a main current flowing between a first main electrode and a second main electrode, wherein the gate drive voltage generator (30) has a gate current limiting circuit (3) which is configured to have a current limiter (17) and a voltage limiter (56) connected in parallel, wherein the current limiter (17) limits the current, and the voltage limiter (56) limits the magnitude of a voltage applied to both ends of the current limiter (17).

Description

Technical Field

[0001] The present invention relates to a driving circuit for a power semiconductor element. Background Art

[0002] Power converters such as inverters used to drive electric motors perform power conversion by turning on and off power semiconductor elements, namely switching elements. Regarding the drive of the switching element, even if the same drive circuit state is maintained, the on-off state will change depending on the current value during on-off, so a design with a margin is required. In order to solve this problem and achieve low loss and low noise, it is necessary to control the trade-off relationship between the loss generated during on-off and the generation of noise or spike voltage through the drive circuit. In order to achieve an improvement in the compromise, it is necessary to control the gate current during on-off, and when the on-off state, such as the current value during on-off, changes, the gate voltage waveform is controlled in accordance with the transmission characteristics of the switching element, and the change in the gate current is controlled.

[0003] Patent Document 1: Japanese Patent Application Publication No. 2013-229654 Summary of the invention

[0004] In order to switch the gate resistor or power supply to control the gate current, multiple signals and switches for adjusting the timing are required, and the control circuit becomes complicated. In Patent Document 1, at the beginning of the on-off, the gate voltage is switched to the threshold voltage or a certain voltage that is set to control. However, when the temperature of the element or the current value at the time of on-off changes, the characteristics of the element change, and the size of the gate voltage that should be set changes, so there is a limit to shortening the delay time at on-off. In addition, corresponding to the delay time at the time of disconnection, a dead time is required to prevent short circuits, and the switching element needs to be reliably disconnected within the dead time. In addition, when an overcurrent is generated at the time of connection, the rise time of the gate voltage is limited, and the switching element operates in the active area for a long time, so the loss of the switching element becomes large. In order to prevent excessive temperature rise, large heat sink fins are required.

[0005] The present invention discloses a technology for solving the above-mentioned problems, and its object is to provide a driving circuit for a power semiconductor element with little change in switching loss or noise without performing complicated control with respect to changes in the current value or temperature of a switching element.

[0006] The driving circuit of the power semiconductor element disclosed in the present invention has a gate drive voltage generator, which generates a gate drive voltage applied to the gate electrode of the switching element based on the on / off drive timing signal input to the input terminal. The switching element has the gate electrode for controlling the main current flowing between the first main electrode and the second main electrode. The gate drive voltage generator has a gate current limiting circuit, which is configured to have a current limiter and a voltage limiter connected in parallel. The current limiter limits the current, and the voltage limiter limits the magnitude of the voltage applied to both ends of the current limiter.

[0007] Effects of the Invention

[0008] According to the power semiconductor element drive circuit disclosed in the present invention, it is possible to realize a power semiconductor element drive circuit with little change in switching loss or noise without performing complicated control with respect to changes in current value or temperature of a switching element. BRIEF DESCRIPTION OF THE DRAWINGS

[0009] Figure 1 This is a circuit diagram showing a configuration of a drive circuit for a power semiconductor element according to the first embodiment.

[0010] Figure 2 This is a circuit diagram showing another example of the voltage limiter in the driving circuit of the power semiconductor element according to the first embodiment.

[0011] Figure 3 This is a graph for explaining the operation of the driving circuit of the power semiconductor element according to the first embodiment.

[0012] Figure 4 This is a graph showing an example of the temperature characteristics of an IGBT.

[0013] Figure 5 This is a graph showing an example of the temperature coefficient of the breakdown voltage of a Zener diode.

[0014] Figure 6 This is a circuit diagram showing a configuration of a drive circuit for a power semiconductor element according to a second embodiment.

[0015] Figure 7 This is a circuit diagram showing a configuration of a drive circuit for a power semiconductor element according to a third embodiment.

[0016] Figure 8 This is a circuit diagram showing a configuration of a drive circuit for a power semiconductor element according to a fourth embodiment.

[0017] Fig. 9This is a graph for explaining the operation of the driving circuit of the power semiconductor element according to the fourth embodiment.

[0018] Fig.10 This is a circuit diagram showing a configuration of a drive circuit for a power semiconductor element according to a fifth embodiment.

[0019] exist Fig.11 middle, Fig.11 A and Fig.11 B is a diagram for explaining an example of a current source which is a gate voltage corrector of a driving circuit of a power semiconductor element according to the fourth, fifth, and sixth embodiments.

[0020] Fig.12 This is a first graph for explaining the operation of the driving circuit of the power semiconductor element according to the fifth embodiment.

[0021] Fig.13 This is a second graph for explaining the operation of the driving circuit of the power semiconductor element according to the fifth embodiment.

[0022] Fig.14 This is a third graph for explaining the operation of the driving circuit of the power semiconductor element according to the fifth embodiment.

[0023] Fig.15 This is a graph for explaining the operation of the driving circuit of the power semiconductor element according to the sixth embodiment.

[0024] Fig.16 This is a graph for explaining the effects brought about by the operation of the driving circuit of the power semiconductor element according to the sixth embodiment. DETAILED DESCRIPTION

[0025] Implementation method 1.

[0026] Figure 1 1 is a circuit diagram showing a driving circuit of a power semiconductor element according to Embodiment 1. In the present invention, as a power semiconductor element, the case where the switching element 1 is an IGBT is described as an example. In the case of an IGBT, a collector electrode (electrode) (also referred to as a collector) is provided as a first main electrode, and an emitter electrode (also referred to as an emitter) is provided as a second main electrode, and the current flowing between the collector and the emitter is controlled by applying a voltage to a gate electrode. As a switching element, it is not limited to an IGBT, and the technology disclosed in the present invention can also be applied to other switching elements such as MOSFET, which have a structure in which the current flowing between two main electrodes, i.e., a first main electrode and a second main electrode, is controlled by applying a voltage to a gate electrode.

[0027] In the driving circuit 2 of the power semiconductor element according to the first embodiment, in order to turn on and off the switching element 1, the charge of the gate electrode is charged and discharged corresponding to the driving timing signal input from the input terminal 11, and the voltage Vge of the gate terminal 101 is controlled. The gate driving voltage generator 30 of the driving circuit 2 has a gate current limiting circuit 3 and a driving voltage amplitude limiting circuit 4. The driving voltage amplitude limiting circuit 4 has: a first control power supply 7; a second control power supply 8; a diode 9 and a diode 10, which are used to limit the amplitude of the input signal within the amplitude of the first control power supply 7 and the second control power supply 8; a resistor R1, which limits the input current; and a buffer circuit 40, which receives the driving timing signal Vs and amplifies the signal. In addition, the driving circuit 2 has a gate resistor Rg and a discharge resistor R2 on the output side. The gate current limiting circuit 3 is arranged between the driving voltage amplitude limiting circuit 4 and the gate terminal 101 of the switching element 1, and includes: a current limiter 17 for limiting the gate current; a voltage limiter 56 connected in parallel with the current limiter 17; and a capacitor (hereinafter referred to as a gate capacitance adjuster) 13 for receiving the outputs of both the current limiter 17 and the voltage limiter 56 to adjust the gate current of the switching element 1. Here, the current limiter 17 is a resistor.

[0028] A driving timing signal Vs is input between the input terminal 11 and the emitter terminal 20 having the same potential as the second main electrode, i.e., the emitter electrode, and a voltage Vsg converted into the amplitude of the voltage of the first control power supply 7 and the second control power supply 8 by the driving voltage amplitude limiting circuit 4 is output from the driving voltage amplitude limiting circuit 4. Here, in the driving voltage amplitude limiting circuit 4, since the diodes 9 and 10 are provided and the resistor R1 is provided on the input side, when the amplitude of the driving timing signal Vs input to the input terminal 11 is larger than that of the first control power supply 7 and the second control power supply 8, the magnitude of the voltage input to the buffer circuit 40 is also limited, and the buffer circuit 40 is protected. As the buffer circuit 40, an amplifier such as an operational amplifier or an amplifier circuit using a transistor can be used.

[0029] The voltage limiter 56 is composed of a series connection body in which two Zener diodes, a Zener diode 5 and a Zener diode 6, are connected in series with opposite polarities to limit the range of the voltage applied to both ends of the current limiter 17. The output of the gate drive voltage generator 30 is connected to the gate terminal 101 via the gate resistor Rg. A discharge resistor R2 is connected between the gate electrode and the emitter electrode.

[0030] The current limiter 17 limits the amount of change in the potential Vg of the output of the gate drive voltage generator 30, which is the connection point 12 of the current limiter 17 and the voltage limiter 56, by limiting the current. In addition, the voltage limiter 56 limits the voltage range in which the current is limited by the current limiter 17. In the first embodiment, two Zener diodes 5 and 6 are connected in series with opposite polarities as the voltage limiter 56. With this structure, when a potential difference greater than or equal to the breakdown voltage of the Zener diode 5 and the Zener diode 6 is generated between the input side and the output side of the gate current limiting circuit 3, the gate capacitance adjuster 13 is rapidly charged by the voltage limiter 56. In the first embodiment, the breakdown voltage when the current flows from the input side to the output side of the gate current limiting circuit 3, that is, the breakdown voltage of the Zener diode 5, is set to Vz_5, and the breakdown voltage when the current flows from the output side to the input side of the gate current limiting circuit 3, that is, the breakdown voltage of the Zener diode 6, is set to Vz_6.

[0031] In the first embodiment, as the voltage limiter 56, the Zener diode 5 and the Zener diode 6 are connected in series with opposite polarities, thereby setting a structure capable of limiting the voltage regardless of the direction of the current. Figure 2 As shown in FIG. 1 , a circuit in which two series-connected bodies are connected in parallel in opposite directions is used as a voltage limiter 56, which can also achieve the following effect, that is, the voltage can be limited regardless of the direction of the current. The series-connected body is obtained by connecting a Zener diode and a diode in series in opposite polarities. However, Figure 1 The structure shown in which two Zener diodes are connected in series with their polarities facing opposite directions is a simple structure. In addition, as described later, it is preferred that the voltage limiter 56 is arranged in the same module as the switching element 1, or arranged in the same substrate in such a manner that the temperature is the same as that of the switching element 1, so that Figure 1 The structure of the voltage limiter shown is an effective structure.

[0032] exist Figure 1 In the circuit shown, a gate capacitance adjuster 13 and a gate resistor Rg are connected to limit the gate current, but these two are not necessary and may not be combined. Moreover, if the constant on the chip of the switching element 1 or in the element can be used, these two may not be included.

[0033] Figure 3 It is used for Figure 1Graphs showing changes in voltage and current of each part over time are provided to explain the operation of the circuit shown in FIG. In the graph on the top layer, the potential of the emitter terminal 20 of the switching element 1 is set to 0, and the output point 14 of the driving voltage amplitude limiting circuit 4, that is, the potential Vsg on the input side of the gate current limiting circuit 3, is represented by a single-point dashed line, the solid line represents the potential Vg of the output of the gate driving voltage generator 30, and the dotted line represents the voltage between the gate electrode and the emitter electrode of the switching element 1, that is, the gate voltage Vge. The second layer shows the current flowing between the first main electrode, that is, the collector, and the second main electrode, that is, the emitter, of the switching element 1, that is, the collector current Ic, the third layer shows the voltage Vce between the collector and the emitter of the switching element 1, and the fourth layer shows the gate current Ig of the switching element 1.

[0034] When an ON signal is input to the input terminal 11 as a driving timing signal, as shown by a single-dot chain line, a potential Vsg corresponding to the voltage of the first control power supply 7 is output to the input side of the gate current limiting circuit 3, that is, the output point 14 of the driving voltage amplitude limiting circuit 4. The value obtained by subtracting the breakdown voltage Vz_5 of the Zener diode 5 from the voltage of the first control power supply 7, that is, the value of the potential on the input side of the gate current limiting circuit 3 when the driving timing signal is ON is set as the first threshold voltage Vgmin, and the value of Vz_5 is set so that this Vgmin becomes the threshold voltage (threshold voltage) Vth of the switching element 1. With this setting, when the driving timing signal rises, as shown by a solid line, the potential Vg of the output of the gate driving voltage generator 30 rises to a potential that does not exceed the threshold voltage Vth of the switching element 1 through the Zener diode 5 and the Zener diode 6. That is, if the potential Vg of the output of the gate drive voltage generator 30 becomes the first threshold voltage Vgmin, the potential difference between the input side and the output side of the gate current limiting circuit 3 is less than or equal to the voltage Vz_5 set by the Zener diode 5, so the Zener diode 5 and the Zener diode 6 of the voltage limiter 56 are turned off, and the gate capacitance adjuster 13 is charged through the current limiter 17. At this time, the change of the potential Vg of the output of the gate drive voltage generator 30 is limited by the time constant of the current limiter 17 and the gate capacitance adjuster 13 composed of a resistor. If the potential Vg of the output of the gate drive voltage generator 30 is delayed and the gate voltage Vge becomes greater than or equal to Vth, the switching element 1 starts to turn on, and the transmitted current Ic increases with the rise of the gate voltage Vge. If Ic reaches the required current value, the switching element 1 transitions to the Miller period. As described above, when the driving timing signal is an on signal, that is, when it is on, when the output voltage Vg of the gate driving voltage generator 30 is less than or equal to the first threshold voltage Vgmin, the current does not flow through the current limiter 17, and the voltage limiter 56 limits the voltage across the current limiter 17 so that it becomes greater than or equal to the first threshold voltage Vgmin, and the current is limited by the current limiter 17. Thus, when the driving timing signal is an on signal, the voltage limiter 56 increases the output voltage Vg of the gate driving voltage generator 30 to the first threshold voltage Vgmin, and after Vg increases to the first threshold voltage Vgmin, the current flows through the current limiter 17, thereby increasing Vg.

[0035] The Miller period is a period during which the Vce of the switching element 1 changes, and its rate of change dVce / dt depends on the magnitude of the gate current (hereinafter referred to as the Miller current) during the Miller period. The gate voltage during the Miller period (hereinafter referred to as the Miller voltage Vm) is constant. As for Vm, according to the transmission characteristics of the switching element, the value of Vm changes according to the magnitude of the current Ic during on-off and the temperature of the element. However, since the rate of change dVg / dt of the potential Vg output by the gate drive voltage generator 30 is limited by the current limiter 17, even if the on-off current or the element temperature changes, the rate of change of the voltage difference between the Miller voltage Vm and the voltage Vg output by the gate drive voltage generator 30 does not change. Therefore, even if Vm changes, the magnitude of the gate current during the Miller period does not change, so the collector-emitter voltage Vce of the switching element 1 is controlled to become a constant voltage change rate.

[0036] The above description shows that the first threshold voltage Vgmin is equal to the threshold voltage Vth of the switching element 1, but the first threshold voltage Vgmin is not necessarily equal to the threshold voltage Vth, and can be set to be greater than or equal to the threshold voltage Vth. Alternatively, even if the first threshold voltage Vgmin is set lower than the threshold voltage Vth, the operation can be performed, but the delay time of the rise becomes larger. Therefore, in order to reduce the delay of switching, it is preferred to set the first threshold voltage Vgmin to a voltage value greater than or equal to the threshold voltage Vth. On the other hand, when the first threshold voltage Vgmin is set lower than the threshold voltage Vth, the rate of change di / dt of the current after the switching current just starts to flow can be suppressed to a small value. Therefore, the recovery current during switching can be suppressed to a small value, and the noise generated can be suppressed to a small value. In addition, since Vg only rises to a voltage value less than or equal to the threshold voltage Vth, it also has the effect of suppressing dVge / dt near the threshold voltage to a small value.

[0037] At the OFF time, that is, when the driving timing signal falls, since the charge is released from the gate electrode and the gate capacitance adjuster 13, current flows from the output side to the input side in the gate current limiting circuit 3. Therefore, the potential difference between the output side and the input side of the gate current limiting circuit 3 is limited by the breakdown voltage Vz_6 of the Zener diode 6 of the voltage limiter 56. The breakdown voltage Vz_6 of the Zener diode 6 is set to a voltage value that is a difference between the gate voltage Vgmax obtained according to the transmission characteristics of the switching element 1 corresponding to the maximum current value Icmax allowed by the switching element 1 and the output voltage Vsg of the driving voltage amplitude limiting circuit 4 when the driving timing signal is an OFF signal. Through this setting, when the driving timing signal falls, the potential Vg of the output of the gate driving voltage generator 30 instantly becomes Vgmax corresponding to the maximum current value allowed by the switching element 1. In the present invention, Vgmax is also referred to as the second threshold voltage.

[0038] After the potential Vg of the output of the gate drive voltage generator 30 becomes Vgmax, the Zener diode 5 and the Zener diode 6 of the voltage limiter 56 become OFF, so the charge of the gate electrode and the gate capacitance adjuster 13 is released through the current limiter 17. At this time, the rate of change dVg / dt of Vg is limited by the time constant of the current limiter 17 and the gate capacitance adjuster 13. If the gate voltage Vge becomes the Miller voltage Vm, the switching element 1 changes to the Miller period, but dVg / dt is limited by the current limiter 17 as in the ON state, so the gate current during the Miller period is controlled so that it does not change significantly even if the current value and element temperature of the switching element at the time of switching on and off change. Even if the gate voltage Vge becomes less than or equal to Vm, the rate of change Vgde / dt of the gate voltage Vge is controlled by the potential Vg of the output of the gate drive voltage generator 30, so the magnitude of di / dt of the current Ic at the time of switching on and off is limited. Since the di / dt of the switching element 1 is limited, the recovery noise when the recovery current flows through the diode of the switching element 1 is controlled not to change significantly. As described above, when the driving timing signal is an off signal, that is, when it is off, the voltage limiter 56 limits the voltage across the current limiter 17 so that the output voltage Vg of the gate drive voltage generator 30 is less than or equal to the second threshold voltage Vgmax and the current is limited by the current limiter 17. Thus, when the driving timing signal is an off signal, the voltage limiter 56 causes the output voltage Vg of the gate drive voltage generator 30 to drop to the second threshold voltage Vgmax, and after Vg drops to the second threshold voltage Vgmax, Vg is dropped by the current flowing through the current limiter 17.

[0039] The operation of the switching element 1 when the temperature changes will be described. Figure 4 FIG. 1 shows the transfer characteristics at different temperatures when the switching element 1 is an IGBT. Figure 4 As shown, if the element temperature rises, the threshold voltage Vth of the switching element 1 changes to a low voltage. It is necessary to adjust in a manner that the limited voltage range changes to the low voltage side so that even if the temperature rises, the range of the gate voltage Vge through which the switching element 1 can flow current will not deviate from the voltage range in which the rate of change dVg / dt of the potential Vg output of the gate drive voltage generator 30 is limited. The adjustment of the voltage range can be performed by utilizing the temperature characteristics of the breakdown voltage of the Zener diode. As the Zener diode 5 for utilizing the temperature characteristics, a Zener diode having a breakdown voltage Vz_5 greater than or equal to 5.6V is used. Figure 5 It is a graph showing the temperature characteristics of a Zener diode, that is, the relationship between the breakdown voltage of a Zener diode and the temperature coefficient of the breakdown voltage (the rate of change of the breakdown voltage relative to temperature changes). Figure 5 As shown, in a Zener diode having a breakdown voltage greater than or equal to 5.6V, the temperature coefficient of the breakdown voltage is positive. Therefore, the value obtained by subtracting the breakdown voltage Vz_5 of the Zener diode 5 from the value of the potential of the output point 14 of the driving voltage amplitude limiting circuit 4 when the driving timing signal is ON, that is, the first threshold voltage Vgmin, automatically changes to a low value as the temperature rises. That is, the temperature change of the first threshold voltage Vgmin has the same temperature change tendency as the temperature change of Vth. If there is no large temperature difference between the switching element 1 and the Zener diode 5, even if the temperature rises and the Vth of the switching element 1 decreases, the breakdown voltage Vz_5 also increases, so Vth will not deviate from the voltage range in which the gate voltage is limited. In the case where the change in Vth of the switching element 1 does not match the temperature change characteristics of the breakdown voltage if the Zener diode 5 is only one Zener diode, as the Zener diode 5, by setting a structure in which a plurality of Zener diodes with different breakdown voltages are connected in series, the temperature change characteristics of the Zener diode 5 can be adjusted to match the temperature change of Vth.

[0040] Next, the operation at OFF is described. As an example, assume that the device is OFF at 280A. In a large current region such as 280A, the Miller voltage Vm rises as the device temperature rises, while the threshold voltage Vth decreases. Therefore, if the second threshold voltage Vgmax does not change even if the temperature changes, then Figure 3 The delay time represented by tdmax in increases. In order to suppress the increase of the delay time, it is sufficient to increase the second threshold voltage Vgmax along with the temperature rise. By utilizing the temperature characteristics of the breakdown voltage of the Zener diode, the second threshold voltage Vgmax can be increased along with the temperature rise. As the Zener diode 6, a Zener diode with a positive temperature coefficient is used. For a Zener diode with a breakdown voltage greater than or equal to 5.6V, since the temperature coefficient of the breakdown voltage is positive, it has a characteristic that the breakdown voltage increases with the temperature rise. As a result, when the temperature rises, since the breakdown voltage of the Zener diode 6 increases, the value of the second threshold voltage Vgmax automatically increases, and the increase of the drive delay time tdmax is suppressed.

[0041] In the present embodiment, the voltage limiter 56 composed of the Zener diode 5 and the Zener diode 6 is preferably installed in the same module or on the same cooling base plate so that it becomes the same temperature as the switching element 1. However, even if the voltage limiter 56 is not installed in the same module or on the same cooling base plate as the switching element 1, it is sufficient to install it near them. If the voltage limiter 56 is installed near the module or the like on which the switching element 1 is installed, the temperature of the voltage limiter 56 also rises when the temperature of the switching element 1 rises due to the temperature of the environment of the module plate or the cooling base plate. In this way, by configuring the voltage limiter 56 at the same position where the environment of the temperature change of the voltage limiter 56 and the environment of the temperature change of the switching element 1 are the same, the temperature change tendencies of the two become the same. In the case where the temperature change of the voltage limiter 56 is smaller than the temperature change of the switching element 1, for example, a plurality of Zener diodes are configured in series to adjust the temperature change characteristics, or a Zener diode whose Vz_5 and Vz_6 change greatly under a slight temperature change can be selected. In this way, by adjusting the temperature characteristic of the voltage limiter 56 in consideration of the difference in temperature change between the switching element 1 and the voltage limiter 56 , the control range of dVge / dt can be prevented from deviating from the operating range of the switching element 1 .

[0042] As described above, according to the driving circuit of the power semiconductor element involved in the first embodiment, even if the temperature or current value of the switching element changes, complicated control is not performed, and the control range of dVge / dt changes automatically, so the change of the switching action is small. Therefore, for example, the margin of the dead time can be reduced, and the driving circuit of the power semiconductor element with less change in switching loss or noise can be realized.

[0043] Implementation method 2.

[0044] Figure 6 1 is a circuit diagram showing the structure of the driving circuit of the power semiconductor element involved in the second embodiment. The difference from the first embodiment is that the gate current limiting circuit 3 composed of the voltage limiter 56, the current limiter 17, and the gate capacitance adjuster 13 is connected to the input side of the driving voltage amplitude limiting circuit 4. The driving voltage amplitude limiting circuit 4 is controlled in such a way that the potential Vg of the output point 12 of the gate driving voltage generator 30 becomes the potential on the output side of the gate current limiting circuit 3. In the present second embodiment, the voltage gain of the buffer circuit 40 is set to 1 for explanation, but the gain may not be 1. By adjusting the amplitude of the signal input to the buffer circuit 40 by the gain of the buffer circuit 40, the breakdown voltage of the Zener diode 5 and the Zener diode 6 of the voltage limiter 56 is adjusted, so that the same voltage as that of the gate current limiting circuit 3 can be obtained. Figure 3The second embodiment is effective if it is applied to a case where the buffer circuit 40 has a frequency characteristic such as a high gain cannot be obtained in a high frequency region. In this case, Figure 6 As shown, the capacitor C1 is connected to the gate current limiting circuit 3. In the second embodiment, the details of the operation of the drive circuit 2 with respect to the characteristic change of the switching element 1 when it is turned on and when it is turned off are the same as those in the first embodiment.

[0045] Even if a driving signal with an amplitude equal to or greater than the voltage of the first control power supply 7 and the second control power supply 8 is input to the input terminal 11, the input amplitude is limited to the first control power supply 7 and the second control power supply 8 by the diode 9 and the diode 10. When the driving timing signal of ON is input, the voltage of the gate capacitance adjuster 13 is instantaneously increased to Vth by the Zener diode 5 and the Zener diode 6 of the voltage limiter 56. At this time, the gate capacitance adjuster 13 is charged by the current through the capacitor C1, so its rise becomes steep. The buffer circuit 40 performs current amplification to increase the potential Vg of the output point 12 of the gate drive voltage generator 30 to Vth. Thereafter, since the gate capacitance adjuster 13 is charged via the current limiter 17, the dv / dt of the gate capacitance adjuster 13 is controlled, and the buffer circuit 40 receives this voltage and increases the voltage Vg of the output point 12 of the gate drive voltage generator 30.

[0046] With this structure, when a signal with a large amplitude is input, dVge / dt is controlled even if there is a change in the transfer characteristics of the switching element 1. Therefore, as in the first embodiment, the gate drive voltage generator 30 controls the gate current so as to suppress the change in the trade-off relationship when the temperature or the on-off current changes. At this time, the potential difference between the potential Vg of the output point 12 of the gate drive voltage generator 30 and the potential Vge of the gate terminal 101 does not change significantly due to the magnitude of the current during on-off or the element temperature, so the temperature and current dependence of the magnitude of the gate current adjusted by the gate resistor Rg can be reduced. In addition, when the voltage Vg at the output point 12 of the gate drive voltage generator 30 rises, the capacitor C1 is connected in parallel with the current limiter 17, so that the high-frequency gain of the drive circuit 2 can be increased, and the frequency characteristics of the gain of the drive circuit 2 can be corrected.

[0047] Implementation method 3.

[0048] Figure 7: is a circuit diagram showing the structure of the driving circuit of the power semiconductor element according to the third embodiment. The difference from the first embodiment is that as the input voltage clamping circuit of the buffer circuit 40, a resistor R1 and a Zener diode 90 and a Zener diode 100 connected in series with opposite polarities are used, and as the current limiter 17 connected in parallel with the voltage limiter 56, a connection body formed by connecting two constant current diodes, a constant current diode 71 and a constant current diode 72, in series with opposite polarities is used.

[0049] Even if the amplitude of the driving timing signal Vs input to the input terminal 11 changes, the Zener diode 90 and the Zener diode 100 limit the amplitude of the signal input to the buffer circuit 40 in such a manner that it becomes constant. In addition, as the constant current values ​​of the two constant current diodes constituting the current limiter 17, constant current diodes of the same value are used. However, it is also possible to have a structure in which constant current diodes of different values ​​are used as the constant current values ​​of the constant current diode 71 for current limiting when ON and the constant current diode 72 for current limiting when OFF, thereby changing the switching speed when ON and when OFF. In addition, the gate current limiting circuit 3 is a structure in which the gate capacitance adjuster 13 is connected between the gate and the emitter of the switching element 1, but the gate capacitance adjuster 13 is a part that adjusts the speed when switching on and off, and it is also possible to have a structure in which the gate capacitance adjuster 13 is not provided and only the gate of the switching element 1 is charged. In addition, in Figure 7 In the embodiment, the buffer circuit 40 is configured to use an operational amplifier and to provide feedback to the output voltage of the operational amplifier. However, the output voltage of the buffer circuit 40 may be controlled by using a buffer circuit using complementary transistors or an amplifier circuit that amplifies an input signal. Figure 7 In the embodiment, as the voltage limiter 56, a structure is set to connect two Zener diodes, Zener diode 5 and Zener diode 6, in series with their polarities facing opposite directions. The Zener diode can also be set to the following structure, that is, not only an element with a breakdown voltage greater than or equal to 5.6V having a positive temperature coefficient of breakdown voltage, but also an element with a breakdown voltage less than or equal to 5.6V is combined, and the change of the breakdown voltage relative to the temperature change is adjusted to match the temperature change of the transfer characteristic of the switching element 1 through a plurality of Zener diodes.

[0050] In the third embodiment, when an ON signal is input to the input terminal 11 as the drive timing signal Vs, the buffer circuit 40 outputs the potential of the first control power supply 7. When the ON signal is input, the voltage of the gate capacitance adjuster 13 is instantaneously raised to the threshold voltage Vth of the switching element 1 by the Zener diode 5 and the Zener diode 6, and then the gate capacitance adjuster 13 is charged by the current limiter 17. In the third embodiment, since the magnitude of the gate current in the region greater than or equal to Vth is controlled by the current limiter 17, the gate current does not change due to the potential difference between the output Vsg of the buffer circuit 40 and the potential Vge of the gate terminal 101, and the switching speed is controlled to be constant. In the conventional constant current drive, when a negative bias is applied, or when Vth is large and the potential difference from the gate voltage at OFF to Vth is large, a delay time is generated from the input of the drive timing signal to the driving of the switching element. On the other hand, similarly to Embodiment 1 or Embodiment 2, in the present Embodiment 3, the output Vg of the gate drive voltage generator 30 also follows the change of the element characteristics in a manner that shortens the delay time, thereby being able to shorten the dead time required for switching on and off. By shortening the dead time, the error of the output voltage and current of the switching power supply caused by the dead time can be reduced. In addition, by setting the Zener diode 5 and the Zener diode 6 to each be a structure in which a plurality of Zener diodes are connected in series, the change of the breakdown voltage can be adjusted to match the temperature change of the transmission characteristics of the switching element 1. Thus, the gate current limiting circuit 3 that follows the temperature change can be formed by combining the Zener diode 5 and the Zener diode 6, the temperature characteristics of the switching element 1, or the difference in temperature change, etc. Figure 7 The structure in which the Zener diode 90 and the Zener diode 100 are provided at the input and the structure in which two constant current diodes are used as the current limiter 17 can also be applied to other embodiments.

[0051] Implementation method 4.

[0052] Figure 8 1 is a circuit diagram showing the structure of a driving circuit of a power semiconductor element according to Embodiment 4. In Embodiment 4, a gate voltage corrector 18 is connected in parallel with a gate resistor Rg. The gate voltage corrector 18 detects the output voltage Vg of the gate drive voltage generator 30, and outputs a correction current Iset corresponding to the magnitude thereof to correct the gate voltage. In terms of other structures, the gate current limiting circuit 3 is provided on the input side of the drive voltage amplitude limiting circuit 4, which is similar to Embodiment 4. Figure 6 The same as embodiment 2 shown.

[0053] Fig. 9 It is used for Figure 8Graphs showing changes in voltage and current of each part with time are shown to illustrate the operation of the circuit shown in FIG. In the operation at the time of ON and the time of OFF, the operation until the gate voltage reaches the Miller voltage is the same as that of the second embodiment. At the time of ON, if the potential Vg of the output of the gate drive voltage generator 30 becomes greater than or equal to the third threshold voltage Vgmax1, the gate voltage corrector 18 forcibly turns on the switching element 1, thereby outputting a correction current Iset1 in the direction of increasing the gate current. The third threshold voltage Vgmax1 is greater than or equal to the gate voltage corresponding to the maximum value of the collector current allowed determined by the specifications of the switching element 1, and is set to an operation time and current range in which the switching element 1 will not be damaged even if it operates in a saturated state during the period from the gate voltage Vge from Vth to Vgmax1. As a result, the emitter-collector voltage Vce can be lowered after a certain time in the case of overcurrent, etc., and a malfunction can be prevented from occurring due to loss caused by the switching element 1 operating in the active region when it is turned on and off.

[0054] When the gate drive voltage generator 30 is turned off, if the potential Vg of the output of the gate drive voltage generator 30 becomes less than or equal to the fourth threshold voltage Vgmin1, the gate voltage corrector 18 forcibly turns off the switch element 1, thereby outputting a correction current Iset2 in a direction that releases the charge of the gate electrode. The fourth threshold voltage Vgmin1 is set to be less than or equal to the threshold voltage Vth of the switch element 1. By reliably turning off the switch element 1 by relying on this voltage, the delay time tdmax of the drive can be shortened, and the dead time can be shortened. Considering that the potential difference between the potential Vge of the gate electrode and the potential Vg of the output of the gate drive voltage generator 30 becomes smaller, the switching will be delayed, so the pull-down amplitude of the gate voltage Vge is increased to reliably turn off the switch element 1. At this time, if the gate voltage Vge is pulled down sharply near Vth, the recovery noise will become larger, so considering the time of turning off, the fourth threshold voltage Vgmin1 is set to a voltage with a margin of less than or equal to Vth. Furthermore, the current change rate di / dt of Ic is limited by controlling Iset2 as the correction current so that the gate current Ig does not become excessive due to the recovery countermeasure, and dVge / dt near Vth is made smaller than a predetermined value. Thus, the peak value of the recovery current can be reduced, and the on-off noise can be suppressed. Since the change rate of Ig decreases near Vth in the IGBT as the switching element 1, as described in Embodiment 3, even if a constant current diode is used as the current limiter 17 to make the change rate dVge / dt of the gate voltage Vge constant, the peak value of the recovery current can be reduced. In addition, even when a MOSFET is used as the switching element 1, the gate voltage corrector 18 can be used to control Iset in such a way that the change rate dVge / dt of the gate voltage Vge near the threshold voltage Vth becomes small, thereby reducing the peak value of the abnormal voltage generated in the recovery current or the collector-emitter voltage Vce.

[0055] The gate voltage corrector 18 is not limited to the structure of the fourth embodiment, but can be applied to circuits of other embodiments. When applied, the effects of the third threshold voltage Vgmax1, the fourth threshold voltage Vgmin1, and the operation near Vth described above can be obtained.

[0056] Implementation method 5.

[0057] Fig.101 is a circuit diagram showing a driving circuit of a power semiconductor element according to Embodiment 5. The driving circuit of the power semiconductor element according to Embodiment 5 includes a current source 181 (also referred to as a gate voltage corrector 181) that controls the current flowing in the gate electrode based on external signals such as the temperature of the switching element 1, the magnitude of the on-off current, and the measurement result of the high-frequency current during on-off. The current source (gate voltage corrector) 181 may be provided at the same position as that in Embodiment 4. Figure 8 The gate voltage corrector 18 shown in the figure is located at the same position as the gate voltage corrector 18 shown in the figure. The gate voltage corrector 18 in the fourth embodiment is configured to control the current flowing in the gate electrode based on the output voltage of the gate drive voltage generator 30. As described above, the current source (gate voltage corrector) 181 in the fifth embodiment changes the output current based on external signals such as the temperature of the switching element 1, the magnitude of the on-off current, and the measurement result of the high-frequency current during on-off, thereby controlling the current flowing in the gate electrode. By changing the current of the current source 181, the change rate dVg / dt of the output voltage Vg of the gate drive voltage generator 30 can be adjusted.

[0058] The current source 181 may be any current source as long as it is a structure that can change the output current value, such as a photocoupler, a constant current source, a resistor connected to a voltage source, etc. As the current source 181, for example, a Fig.11 A current source having a structure in which a photocoupler 182 as shown in A supplies current. By passing current through the INPUT, the current can be taken out from the OUTPUT insulated from the INPUT side. In the case of outputting a negative current, the collector side of the phototransistor is set as the OUTPUT, and the negative power supply is connected to the emitter side. In addition, in order to be able to output both positive and negative currents, the above-mentioned photocoupler that outputs positive current and the photocoupler that outputs negative current can be connected in parallel. The above-mentioned current source can also be used as the gate voltage corrector 18 in embodiment 4. In addition, as described in embodiment 6 described later, in the case of setting the current source 181 as an AC current source, it is also possible to use Fig.11 The AC current source has a structure in which the transformer 183 as shown in B supplies current.

[0059] In embodiments 1 to 4, control is performed in the following manner, that is, even if the temperature of the switching element 1 or the magnitude of the on-off current changes and the Miller voltage changes, the gate current is controlled to be constant by controlling dVg / dt, so that the loss during on-off does not change. However, due to the control of dVg / dt, the delay time from the drive timing signal Vs to the on-off becomes a problem. For example, in the case where the switching element 1 is used for a switching power supply driven by a constant voltage, due to the change in the Miller voltage, there is a problem that the output voltage of the switching power supply has an error.

[0060] In the fifth embodiment, the output current is also limited by the current limiter 17, thereby limiting the change in the potential Vg of the gate capacitance adjuster 13, that is, the output 12, which is the connection point of the current limiter 17 and the voltage limiter 56. In addition, the voltage limiter 56 limits the voltage range of the current limiter 17 to limit the current to the gate capacitance adjuster 13. The voltage limiter 56 is composed of a series connection body in which two Zener diodes 5 and a Zener diode 6 are connected in series in opposite directions of polarity. With this structure, the voltage can be limited regardless of the direction of the current. In addition, as Figure 2 As shown in FIG. 1 , when a circuit in which two series-connected bodies are connected in parallel in opposite directions is used as a voltage limiter 56, the following effect can be achieved, that is, the voltage can be limited regardless of the direction of the current, wherein the series-connected body is a Zener diode and a diode connected in series in opposite polarities. However, as the voltage limiter 56, Fig.10 The structure shown in which two Zener diodes are connected in series with their polarities facing opposite directions is a simple structure. In addition, it is preferable that the voltage limiter 56 is arranged in the same module as the switching element 1, or arranged in the same substrate in such a manner that the temperature is the same as that of the switching element 1, so that Fig.10 The illustrated structure of the voltage limiter 56 is an effective structure.

[0061] exist Fig.10 In the circuit shown, a gate capacitance adjuster 13 and a gate resistor Rg are connected to limit the gate current, but these two are not necessary and may not be provided. Furthermore, these two may not be provided if the constants on the chip of the switching element 1 or in the element can be used.

[0062] Fig.12 Yes means Fig.10 The graph of the time variation of voltage and current in each part of the circuit shown. Fig.12In the topmost graph, the single-point dashed line is the potential Vsg at the output point 14 of the drive voltage amplitude limiting circuit 4, that is, the input side of the gate current limiting circuit 3, the solid line is the potential Vg at the output point 12 of the gate drive voltage generator 30, and the dotted line is the voltage Vge between the gate electrode and the emitter electrode of the switching element 1. Each potential is shown with reference to the potential of the emitter terminal 20 of the switching element 1. The second layer of the graph shows the current flowing between the first main electrode, that is, the collector, and the second main electrode, that is, the emitter, of the switching element 1, that is, the collector current Ic, the third layer of the graph shows the voltage Vce between the collector and the emitter of the switching element 1, and the fourth layer shows the gate current Ig of the switching element 1. Moreover, the fifth layer shows the current Is output by the current source 181.

[0063] When an ON signal is input to the input terminal 11 as the driving timing signal Vs, as shown by the single-dot chain line, a potential corresponding to the voltage Vcc of the first control power supply 7 is output at the output point 14 of the driving voltage amplitude limiting circuit 4. When the driving timing signal Vs is ON, the value obtained by subtracting the breakdown voltage Vz_5 of the Zener diode 5 from Vcc is set as the first threshold voltage Vgmin, and the value of Vz_5 is set so that this Vgmin is greater than or equal to the threshold voltage Vth of the switching element 1. By this setting, when the driving timing signal Vs is turned on, that is, when the driving timing signal Vs rises, as shown by the solid line, the output voltage Vg of the gate current limiting circuit 3 rises to a potential Vgmin greater than or equal to the threshold voltage Vth of the switching element 1 through the Zener diode 5 and the Zener diode 6. If the output voltage Vg of the gate current limiting circuit 3 is greater than or equal to the first threshold voltage Vgmin, the potential difference between the input side and the output side of the gate current limiting circuit 3 becomes less than or equal to the voltage Vz_5 set by the Zener diode 5, so the gate capacitance adjuster 13 is charged through the current limiter 17.

[0064] At this time, the change of the output voltage Vg of the gate current limiting circuit 3 is limited by the time constant of the current limiter 17 composed of a resistor and the gate capacitance adjuster 13. If the voltage between the gate terminal and the emitter terminal of the switching element 1, that is, the gate voltage Vge, is greater than or equal to the threshold voltage Vth, the switching element 1 begins to turn on, and the transmitted current Ic increases with the rise of the gate voltage Vge. If Ic reaches the required current value, the switching element 1 transitions to the Miller period. As described above, since the change rate dVge / dt of the gate voltage Vge is controlled, for example, the larger the current during on-off, the larger the Miller voltage Vm, and the longer the delay time Td from when the drive timing signal Vs becomes the on signal to when the actual on-off starts. On the contrary, at OFF, since the change rate dVge / dt of the gate voltage Vge is controlled, the delay time from when the disconnection signal is input becomes shorter under the above conditions.

[0065] As described above, since the Miller voltage Vm changes according to the current or temperature of the on / off condition, the delay time Td from when the drive timing signal Vs becomes the on signal to the actual on / off changes. Therefore, there is a problem that the on / off time specified by the drive timing signal Vs and the actual on / off time have a large difference. In order to solve this problem, in this embodiment, a current source 181 for adjusting dVge / dt is provided.

[0066] exist Fig.12 , the state where the value of the current Is of the current source 181 is set to negative when the Miller voltage is a certain value Vm is shown. With this setting, compared with the case where there is no current source 181, when it is on, the amount of charge per unit time charged to the gate electrode is reduced, so the rise becomes slower. On the other hand, when it is off, the amount of charge per unit time released from the gate electrode increases, so the fall becomes faster. In this example, by adjusting the current Is output by the current source 181, the delay time Td of on and off is the same when it is on and when it is off.

[0067] exist Fig.13 In the figure, it is shown that Fig.12 Compared with the state of , the Miller voltage becomes higher and becomes Vm2 due to the increase of on-off current or the change of temperature. Fig.13 In the figure, as the change of Vg, for comparison, Fig.12 The change of Vg in the state of is shown as Vg_c. When the Miller voltage rises, if the current value output by the current source 181 is not adjusted, the rise time becomes longer when it is ON, and conversely, the fall time becomes shorter when it is OFF. Fig.13 In, with Fig.12 Compared with the state of , the negative current value output from the current source 181 is reduced. By reducing the negative current value output from the current source 181, Fig.13 As shown in the figure, the change rate dVg / dt of Vg at the time of ON is larger than the change of Vg_c shown as a comparison, which can shorten the rise time and make the delay time Td at the time of ON shorter than that of Vg_c. Fig.11 When OFF, the rate of change of Vg dVg / dt is smaller than the rate of change of Vg_c shown as a comparison, and the rise time is increased, which can make the delay time at OFF and Fig.12 The status is the same.

[0068] exist Fig.14 In the figure, it is shown that Fig.12 Compared with the state of , the Miller voltage becomes lower and becomes Vm3 due to the reduction of on-off current or the change of temperature. Fig.14In the figure, as the change of Vg, for comparison, Fig.12 The change of Vg in the state of is shown as Vg_c. When the Miller voltage drops, if the current value output by the current source 181 is not adjusted, the rise time becomes shorter when ON, and conversely, the fall time becomes longer when OFF. Fig.14 In, with Fig.12 By increasing the negative current value output from the current source 181, the negative current value output from the current source 181 is increased. Fig.14 As shown, the change rate dVg / dt of Vg at the time of ON is smaller than the change rate of Vg_c shown as a comparison, and the rise time is increased, which can make the delay time Td at the time of ON shorter than that of Vg_c. Fig.12 When OFF, the rate of change of Vg dVg / dt is greater than the rate of change of Vg_c shown as a comparison, and the rise time is reduced, which can make the delay time at OFF and Fig.12 In this way, even if the Miller voltage changes, the delay time can be controlled by the current source 181 in the same manner.

[0069] Thus, in this embodiment, by changing the output current value of the current source 181 and adjusting dVg / dt, the problem of a large difference between the on-off time specified by the drive timing signal Vs and the actual on-off time can be solved. That is, when the magnitude of the Miller voltage changes due to a change in the temperature or current of the switching element, the output current value of the current source 181 is changed in accordance with the change in the temperature or current of the switching element so that the delay time at the time of ON and the delay time at the time of OFF are the same. Thus, the delay time caused by the change in the Miller voltage corresponding to the on-off current or the temperature of the switching element 1 can be adjusted, and the delay time of ON and OFF can be controlled to be consistent.

[0070] In addition, above, the output of the current source 181 is described only as a negative current value, but since the current source 181 is provided to control the charging and discharging of electric charges, it is not limited to negative, and sometimes there is a need to output a positive current value corresponding to the change of Vm, and sometimes it can be only negative or only positive.

[0071] Implementation method 6.

[0072] Fig.15 Graphs of waveforms of various parts show the operation of the driving circuit of the power semiconductor element according to Embodiment 6. Fig.10The difference between the sixth embodiment and the fourth and fifth embodiments is that the current source 181 does not change its magnitude in accordance with the timing of the on and off. The following describes the case where the gate capacitance adjuster 13 is connected, but the gate capacitance adjuster 13 may be omitted, and the output voltage Vg may be directly applied to the gate of the switching element 1. Fig.15 The graph shown on the left side is a graph when the current source 181 outputs a positive current. The current through the current source 181 increases the slope of the output voltage Vg of the gate current limiting circuit 3 when it is ON. Moreover, when the gate voltage Vge enters the Miller period, it is controlled in such a way that the potential difference ΔV1 between Vge and Vg becomes larger. Thus, a large Miller current is supplied, and the control is performed in such a way that the rate of change dVce / dt of the collector-emitter voltage during switching becomes larger. Therefore, the switching time during switching is shortened to reduce the loss, and a high-frequency current in the high-frequency band is generated during switching. On the other hand, as Fig.15 As shown in the graph on the right side of , if the current source 181 outputs a negative current, the change rate dVg / dt of Vg is limited so as to decrease, and the potential difference ΔV2 between Vge and Vg is controlled so as to decrease. Therefore, since the control is performed so as to decrease dVce / dt, the on-off noise generated at this time is limited to a low frequency band.

[0073] In this embodiment 6, the Fig.15 The action of the curve on the left and the action of the curve on the right. Fig.15 As shown in the Is curve diagram, the current source 181 alternately outputs positive current and negative current on the time axis, that is, the current source 181 uses an AC current source. The current source 181 alternately outputs positive current and negative current at a frequency slower than that of the drive timing signal Vs input to the input terminal 11. That is, the frequency of the AC output by the current source 181 is lower than the frequency of the drive timing signal Vs.

[0074] In the above, the ON state of switching is described as an example, but in the OFF state, the frequency of the switching noise in the OFF state is changed by changing the current output from the current source 181, which is the same as the ON state.

[0075] To illustrate the effect of applying this control, Fig.16 The frequency characteristics of the noise terminal voltage Op of the switching power supply are shown in FIG. When dVce / dt is controlled to a constant value as described in Embodiment 1, since the current dependency and temperature dependency of dVce / dt are reduced, a noise peak is generated at a specific frequency as shown by the curve of “dVce / dt: constant”. In contrast, by repeating Fig.15 The noise frequency band changes due to the movement of the left graph and the movement of the right graph. Fig.16 The noise peak can be dispersed as shown in the curve of "dVce / dt: variation". In the case of this control, the effect of the noise peak can be controlled by the frequency and magnitude of the alternating current output by the current source 181 and the repetition frequency when the frequency is varied. That is, by measuring the noise terminal voltage Op of the switching power supply and controlling the frequency of the alternating current output by the current source 181 based on the measured value, the frequency band in which the noise peak occurs can be adjusted to a desired frequency band.

[0076] Various illustrative embodiments and examples are described in the present invention, but the various features, methods and functions described in one or more embodiments are not limited to the application of specific embodiments, and can be applied to the embodiments alone or in various combinations. Therefore, countless variations that are not illustrated can be imagined within the scope of the technology disclosed in the present specification. For example, it includes the case where at least one structural element is deformed, added or omitted, and the case where at least one structural element is extracted and combined with the structural elements of other embodiments.

[0077] Description of the label

[0078] 1 switching element, 2 driving circuit, 3 gate current limiting circuit, 4 driving voltage amplitude limiting circuit, 5, 6 Zener diode, 7 first control power supply, 8 second control power supply, 11 input terminal, 12 output point of gate driving voltage generator, 13 gate capacitance adjuster, 17 current limiter, 18, 181 gate voltage corrector, 20 emitter terminal, 30 gate driving voltage generator, 56 voltage limiter, 101 gate terminal, 182 photocoupler, 183 transformer, Vgmin first threshold voltage, Vgmax second threshold voltage, Vgmax1 third threshold voltage, Vgmin1 fourth threshold voltage, Vth threshold voltage.

Claims

1. A drive circuit for a power semiconductor element, comprising a gate drive voltage generator, the gate drive voltage generator generating a gate drive voltage applied to a gate electrode of a switching element based on an on / off drive timing signal input to an input terminal, the switching element having the gate electrode for controlling a main current flowing between a first main electrode and a second main electrode, The driving circuit of the power semiconductor element is characterized in that: The gate drive voltage generator has a gate current limiting circuit, which is configured by connecting a current limiter and a voltage limiter in parallel, wherein the current limiter limits the current, and the voltage limiter limits the magnitude of the voltage applied to both ends of the current limiter. When the driving timing signal becomes an on signal, the voltage limiter causes the output voltage of the gate driving voltage generator to rise to a first threshold voltage. After the output voltage of the gate drive voltage generator rises to the first threshold voltage, the output voltage of the gate drive voltage generator is increased by the current flowing in the current limiter, When the driving timing signal becomes an off signal, the voltage limiter reduces the output voltage of the gate current limiting circuit to a second threshold voltage corresponding to the maximum current value allowed by the switching element. After the output voltage of the gate driving voltage generator drops to the second threshold voltage, the output voltage of the gate driving voltage generator drops by the current flowing in the current limiter.

2. The driving circuit of the power semiconductor element according to claim 1, characterized in that: The first threshold voltage is a voltage value greater than or equal to a threshold voltage of the switching element.

3. The driving circuit of the power semiconductor element according to claim 1 or 2, characterized in that: The slope of the voltage limited by the voltage limiter relative to the temperature of the temperature change is positive.

4. The driving circuit of the power semiconductor element according to claim 1 or 2, characterized in that: The voltage limiter is a connection body in which two Zener diodes are connected in series with opposite polarities.

5. The driving circuit of the power semiconductor element according to claim 4, characterized in that: The Zener diode of at least one polarity is composed of a plurality of Zener diodes connected in series.

6. The driving circuit of the power semiconductor element according to claim 3, characterized in that: The voltage limiter and the switch element are arranged in the same temperature change environment.

7. The driving circuit of the power semiconductor element according to claim 4, characterized in that: The voltage limiter and the switch element are arranged in the same temperature change environment.

8. The driving circuit of the power semiconductor element according to claim 5, characterized in that: The voltage limiter and the switch element are arranged in the same temperature change environment.

9. The driving circuit of the power semiconductor element according to claim 1 or 2, characterized in that: The current limiter is a connection body in which two constant current diodes are connected in series with opposite polarities.

10. The driving circuit of the power semiconductor element according to claim 1 or 2, characterized in that: The gate drive voltage generator includes a drive voltage amplitude limiting circuit including a first control power supply that limits the value of the gate drive voltage when turned on and a second control power supply that limits the value of the gate drive voltage when turned off.

11. The driving circuit of the power semiconductor element according to claim 1 or 2, characterized in that: A capacitor is connected between the output side of the gate current limiting circuit and the second main electrode.

12. The driving circuit of the power semiconductor element according to claim 1 or 2, characterized in that: A gate voltage corrector is provided, which controls a current flowing in the gate electrode.

13. The driving circuit of the power semiconductor element according to claim 12, characterized in that: The gate voltage corrector corrects the voltage of the gate electrode by controlling a current flowing in the gate electrode based on an output voltage of the gate driving voltage generator.

14. The driving circuit of the power semiconductor element according to claim 13, characterized in that: After the drive timing signal becomes a turn-on signal, the gate voltage corrector causes current to flow through the gate electrode in such a manner that the voltage of the gate electrode becomes a voltage that forcibly turns on the switching element when the output voltage of the gate drive voltage generator is greater than or equal to a third threshold.

15. The driving circuit of the power semiconductor element according to claim 13, characterized in that: After the drive timing signal becomes a disconnection signal, the gate voltage corrector causes current to flow through the gate electrode in such a manner that the voltage of the gate electrode becomes a voltage that forcibly disconnects the switching element when the output voltage of the gate drive voltage generator is less than or equal to a fourth threshold.

16. The driving circuit of the power semiconductor element according to claim 14, characterized in that: After the drive timing signal becomes a disconnection signal, the gate voltage corrector causes current to flow through the gate electrode in such a manner that the voltage of the gate electrode becomes a voltage that forcibly disconnects the switching element when the output voltage of the gate drive voltage generator is less than or equal to a fourth threshold.

17. The driving circuit of the power semiconductor element according to claim 12, characterized in that: The gate voltage corrector changes an output current value in accordance with a change in the Miller voltage of the switching element.

18. The driving circuit of the power semiconductor element according to claim 12, characterized in that: The gate voltage corrector changes an output current value based on at least one of a temperature of the switching element and a value of the main current of the switching element.

19. The driving circuit of the power semiconductor element according to claim 12, characterized in that: The gate voltage corrector is an alternating current source capable of outputting positive and negative currents.

20. The driving circuit of the power semiconductor element according to claim 19, characterized in that: The switching element is connected as a switching element constituting a switching power supply, and at least one of a frequency and a current value of the AC current source is determined based on a noise terminal voltage of the switching power supply.

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