A configuration method for heterogeneous FPGA array

Abstract

The present invention relates to a configuration method for a heterogeneous FPGA array, and belongs to the technical field of FPGA array configuration. The method performs the following steps: 1) programmable control broadcasts configuration information; 2) programmable logic units receive configuration information, store and process it; 3) after the output control unit receives configuration end information sent by all programmable logic units in the current FPGA array, it processes the configuration end information and sends the processed configuration end information to the configuration controller; 4) the configuration controller ends the configuration process of the current programmable logic unit and starts the configuration process of the next programmable logic unit. For different programmable logic units, the configuration capacity size and the start and end process are only controlled by the programmable logic unit, and the configuration controller does not need to care, and the configuration controller can flexibly realize the configuration of programmable logic units and FPGA arrays with different configuration capacity sizes.

Description

Technical Field

[0001] The present invention relates to a configuration method for a heterogeneous FPGA array, belonging to the technical field of FPGA array configuration. Background Art

[0002] FPGA is widely used in various fields such as data centers, communications, aerospace, national defense, automobiles, and consumer electronics. Different application fields have different requirements for the resources of FPGA, such as the number of programmable logic units, the requirements for functional units such as CPUs, etc. FPGA manufacturers need to provide multiple series of FPGAs to meet the application requirements of users. FPGA is composed of programmable logic. As Figure 1 shown, the programmable logic units are functional units such as DSP, CLB, PCIE, and PLL. By programming and configuring the programmable logic units, the user logic functions can be realized. The functions and quantities of the programmable logic units determine the functions and capacities of an FPGA product. After the FPGA is powered on, the configuration controller downloads the bitstream with user functions compiled by the software into the FPGA. This process is that the configuration controller writes the configuration data into different programmable logic units. The functional diversity of the programmable logic units determines the differences in the configuration data and the amount of configuration data of the programmable logic units. The configuration controller needs to write different amounts of configuration data for different programmable logic units, which poses requirements for the configuration process of the configuration controller to handle various programmable logic units. Summary of the Invention

[0003] The technical problem to be solved by the present invention is to propose a method for implementing the configuration of a heterogeneous FPGA array using a general configuration controller.

[0004] To solve the above technical problem, the technical solution proposed by the present invention is: a configuration method for a heterogeneous FPGA array, which performs the following steps:

[0005] 1) The configuration controller broadcasts the configuration information and the logical unit address to all programmable logic units;

[0006] 2) The programmable logic unit receives the configuration information, stores it, and processes it;

[0007] The configuration information at least includes address information and data information;

[0008] The programmable logic unit will continuously receive the configuration information until the configuration of the current programmable logic unit is completed; at this time, the programmable logic unit will send a configuration end message to the output control unit;

[0009] 3) After the output control unit receives the configuration end information sent by all programmable logic units in the current FPGA array, it processes the configuration end information and sends the processed configuration end information to the configuration controller;

[0010] 4) The configuration controller ends the configuration process of the current programmable logic unit, updates the programmable logic unit address information in the configuration information, and starts the configuration process of the next programmable logic unit.

[0011] An improvement of the above technical solution is that if the configuration controller still does not receive the configuration end information sent by the output control unit after waiting for N cycles, the configuration controller will actively update the programmable logic unit address information in the current configuration information.

[0012] The beneficial effect of the present invention is that for different programmable logic units, the configuration capacity size and the start and end processes are only controlled by the programmable logic unit, and the configuration controller does not need to care, and it flexibly realizes the configuration of the configuration controller for programmable logic units with different configuration capacity sizes and FPGA arrays. Description of the Drawings

[0013] Figure 1 is a schematic diagram of the FPGA structure in a configuration method of a heterogeneous FPGA array according to Embodiment 1 of the present invention.

[0014] Figure 2 is a schematic flowchart of a configuration method of a heterogeneous FPGA array according to Embodiment 1 of the present invention.

[0015] Figure 3 is a schematic diagram of continuously configuring multiple different logic units in a configuration method of a heterogeneous FPGA array according to Embodiment 1 of the present invention. Detailed Embodiment

[0016] Embodiment 1

[0017] A configuration method of a heterogeneous FPGA array, as Figure 2 shown, performs the following steps:

[0018] 1) The programmable control broadcasts configuration information;

[0019] 2) The programmable logic unit receives the configuration information, stores it and processes it;

[0020] The configuration information at least includes address information and data information;

[0021] The programmable logic unit will continuously receive the configuration information until it is sufficient to complete the configuration of the current programmable logic unit; at this time, the programmable logic unit will send configuration end information to the output control unit;

[0022] 3) After the output control unit receives the configuration end information sent by all programmable logic units in the current FPGA array, it processes the configuration end information and sends the processed configuration end information to the configuration controller;

[0023] 4) The configuration controller ends the configuration process of the current programmable logic unit and starts the configuration process of the next programmable logic unit.

[0024] Before starting the configuration process of the next programmable logic unit in step 4), the configuration controller needs to update at least the programmable logic unit address information in the configuration information.

[0025] If after waiting for N cycles, the configuration controller still does not receive the configuration end information sent by the output control unit, the configuration controller will actively update the programmable logic unit address information in the current configuration information. N can be defined according to the tolerable configuration time.

[0026] From Figure 3 it can be seen that when configuring an FGPA with multiple programmable logic units as shown in Figure 1 , the configuration controller does not need to care about the type of the currently configured programmable logic unit and the size of the configuration data sent. It only updates the programmable logic unit address and other information in the configuration information according to the configuration end information fed back by the output control unit, so as to realize the programmable logic unit to identify, obtain and store the configuration data. The size of the configuration data of the programmable logic unit and the start and end processes are completely controlled by the programmable logic unit. Therefore, for different programmable logic units, the configuration capacity size and the start and end processes are only controlled by the programmable logic unit, and the configuration controller does not need to care, and flexibly realizes the configuration of the programmable logic unit with different configuration capacity sizes by the configuration controller.

[0027] In addition to the above embodiments, the present invention may have other embodiments. For those skilled in the art, any technical solutions formed by making any modifications, equivalent replacements, improvements, etc. within the spirit and principle of the present invention shall be included within the protection scope of the present invention.

Claims

1. A method for configuring a heterogeneous FPGA array, characterized in that Follow these steps: 1) Programmable control broadcast configuration information; 2) The programmable logic unit receives, stores and processes the configuration information; The configuration information includes at least address information and data information; The programmable logic unit will continue to receive the configuration information until it is sufficient to complete the configuration of the current programmable logic unit; at this time, the programmable logic unit will send configuration end information to the output control unit; 3) After receiving the configuration end information sent by all programmable logic units in the current FPGA array, the output control unit processes the configuration end information and sends the processed configuration end information to the configuration controller; 4) The configuration controller ends the configuration process of the current programmable logic unit and starts the configuration process of the next programmable logic unit.

2. The method for configuring a heterogeneous FPGA array according to claim 1, wherein: Step 2) The programmable logic unit controls the process of receiving configuration information and ending configuration.

3. The method for configuring a heterogeneous FPGA array according to claim 1, wherein: Before starting the next programmable logic unit configuration process in step 4), the configuration controller at least updates the programmable logic unit address information in the configuration information.

4. The method for configuring a heterogeneous FPGA array according to claim 1, wherein: If the configuration controller still does not receive the configuration end information sent by the output control unit after waiting for N cycles, the configuration controller will actively update the programmable logic unit address information in the current configuration information.

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