A multi-mode energy management system and method

Abstract

The present invention relates to a multi-mode energy management system and method, wherein the system comprises a first energy management circuit, a second energy management circuit, a third energy management circuit and a fourth energy management circuit; the input end of the first energy management circuit is used to access a high-level DC source, the input end of the second energy management circuit is used to access a low-level DC source, the input end of the third energy management circuit is used to access a high-level AC source, the input end of the fourth energy management circuit is used to access a low-level AC source, and the output end of the first energy management circuit, the output end of the second energy management circuit, the output end of the third energy management circuit and the output end of the fourth energy management circuit are all used to connect a load. The present invention can collect, convert and store electrical energy from a variety of different modes of energy, can effectively collect extremely weak currents and voltages, and can stably and effectively charge energy storage elements through energy management, thereby driving the load to work stably.

Description

Technical Field

[0001] The present invention relates to the field of energy management, and in particular to a multi-mode energy management system and method. Background Art

[0002] Energy issues have always been a worldwide concern. With the development of various industrial activities and the needs of life, large-scale energy exploitation has led to the rapid consumption of the world's energy reserves. The most consumed energy is fossil energy. This non-renewable energy pollutes the environment greatly, and the reserves are limited, which makes the future of mankind worrying. Therefore, the concept of sustainable development has been proposed and widely recognized. An important way to develop the concept of sustainability is to collect energy and achieve regeneration, thereby achieving sustainable energy supply. This energy source is extensive, renewable and pollution-free. The types of electrical signals generated by renewable green energy are diverse, and can be divided into high-level DC source, low-level DC source, high-level AC source, and low-level AC source. They are greatly affected by the external environment, and the output is unstable and unsustainable. How to effectively manage the energy of different green energy sources has always been a bottleneck problem that restricts technological breakthroughs in the industry. Summary of the invention

[0003] The technical problem to be solved by the present invention is to provide a multi-mode energy management system and method, which can effectively manage the energy of different green energy sources.

[0004] The technical solution of the present invention to solve the above technical problems is as follows:

[0005] In a first aspect, the present invention provides a multi-mode energy management system, comprising a first energy management circuit, a second energy management circuit, a third energy management circuit and a fourth energy management circuit; the input end of the first energy management circuit is used to connect to a high-level DC source, the input end of the second energy management circuit is used to connect to a low-level DC source, the input end of the third energy management circuit is used to connect to a high-level AC source, the input end of the fourth energy management circuit is used to connect to a low-level AC source, and the output end of the first energy management circuit, the output end of the second energy management circuit, the output end of the third energy management circuit and the output end of the fourth energy management circuit are all used to connect to a load.

[0006] In a second aspect, the present invention further provides a multi-mode energy management method for controlling the working state of the multi-mode energy management system supplying power to a load, so that the multi-mode energy management system operates in a multi-mode composite working state or a multi-mode power flow optimization working state;

[0007] The control process of the multi-mode composite working state includes the following steps: controlling any one or more power sources among a high-level DC source, a low-level DC source, a high-level AC source and a low-level AC source to supply power to a load; wherein the high-level DC source supplies power to the load through a first energy management circuit, the low-level DC source supplies power to the load through a second energy management circuit, the high-level AC source supplies power to the load through a third energy management circuit, and the low-level AC source supplies power to the load through a fourth energy management circuit;

[0008] The control process of the multi-mode power flow optimization working state includes the following steps:

[0009] S1, continuously enabling the low-level DC source so that the low-level DC source charges the energy storage element B2 through the second energy management circuit;

[0010] S2, determine whether there is a power signal input in the second control circuit; if so, execute S3-S5 in sequence; if not, execute S6-S10 in sequence;

[0011] S3, determining whether the voltage output by the high-level DC source is greater than the voltage output by the energy storage element B2; if so, executing S4; if not, executing S5;

[0012] S4, using the second control circuit to turn on the high-level DC source, so that the high-level DC source charges the energy storage element C7 in the first energy management circuit, and the energy storage element C7 supplies power to the load;

[0013] S5, using the second control circuit to turn on the energy storage element B2, and the energy storage element B2 supplies power to the load;

[0014] S6, determining whether the strain value output by the strain detection circuit is greater than a preset strain threshold; if so, executing S7; if not, executing S8;

[0015] S7, using the first control circuit to turn on the first controllable switch to enable the high-level AC source, and the high-level AC source supplies power to the load through the third energy management circuit;

[0016] S8: Determine whether the acceleration value detected by the acceleration detection circuit is greater than a preset acceleration threshold; if so, execute S9; if not, execute S10;

[0017] S9, using the first control circuit to turn on the second controllable switch to enable the low-level AC source, and allowing the low-level AC source to charge the energy storage element B2 through the fourth energy management circuit, and the energy storage element B2 supplies power to the load;

[0018] S10, using the first control circuit to turn off the first controllable switch and the second controllable switch, and using the energy storage element B2 to supply power to the load.

[0019] The beneficial effects of the present invention are: the present invention can collect, convert and store electric energy from a variety of different modes of green energy, can effectively collect extremely weak currents and voltages, and through energy management can stably and effectively charge energy storage elements, thereby driving the load to work stably. BRIEF DESCRIPTION OF THE DRAWINGS

[0020] Figure 1 is a structural block diagram of a multi-mode energy management system in Embodiment 1;

[0021] Figure 2 is a schematic diagram of a specific structure of a first energy management circuit;

[0022] Figure 3 is a schematic diagram of a specific structure of a second energy management circuit;

[0023] Figure 4 is a schematic diagram of a specific structure of a third energy management circuit;

[0024] Figure 5 is a schematic diagram of a specific structure of a fourth energy management circuit;

[0025] Figure 6 is a structural block diagram of a multi-mode energy management system in Embodiment 2;

[0026] Figure 7 for Figure 6 Schematic diagram of the specific structure of the middle part circuit;

[0027] Figure 8 It is a schematic diagram of the specific structure of the power multiplexing circuit;

[0028] Fig. 9 Control block diagram for optimizing operating conditions for multi-mode power flow;

[0029] Fig.10 Detailed control flow chart for optimizing operating states for multi-mode power flow;

[0030] Fig.11 It is the energy consumption test curve chart;

[0031] Fig.12 This is the energy harvesting test curve in high-level power mode;

[0032] Fig.13 This is a graph of energy harvesting test in low-level power mode. DETAILED DESCRIPTION

[0033] The principles and features of the present invention are described below in conjunction with the accompanying drawings. The examples given are only used to explain the present invention and are not used to limit the scope of the present invention.

[0034] Embodiment 1:

[0035] like Figure 1 As shown, a multi-mode energy management system includes a first energy management circuit, a second energy management circuit, a third energy management circuit and a fourth energy management circuit; the input end of the first energy management circuit is used to connect to a high-level DC source, the input end of the second energy management circuit is used to connect to a low-level DC source, the input end of the third energy management circuit is used to connect to a high-level AC source, the input end of the fourth energy management circuit is used to connect to a low-level AC source, and the output end of the first energy management circuit, the output end of the second energy management circuit, the output end of the third energy management circuit and the output end of the fourth energy management circuit are all used to connect to a load.

[0036] Among them, the high-level DC source, the low-level DC source, the high-level AC source and the low-level AC source are renewable green energy sources; the high-level DC defined here is a DC level with a voltage greater than or equal to 2.0 volts, and the low-level DC is a DC level with a voltage greater than 0 and less than 2.0 volts; the high-level AC is an AC level with an AC voltage amplitude greater than or equal to 2.0 volts, and the low-level AC is an AC level with an AC voltage amplitude greater than 0 and less than 2.0 volts.

[0037] The multi-mode energy management system is located in the middle reaches, and its function is to effectively pick up, convert, store and distribute the electric energy generated by the upstream power supply (including high-level DC source, low-level DC source, high-level AC source and low-level AC source), so that the output voltage of the system is a standard DC level regardless of the DC source and AC source input conditions, so as to continuously and stably supply the downstream loads, which mainly include load sensors, chips and wireless transmission modules. The main applications of the multi-mode energy management system include but are not limited to uninterrupted and sustainable power supply in the following scenarios: wearable devices, human health implant monitoring, livestock and poultry precision breeding, plant or crop status monitoring, wildlife tracking and protection, remote area civil infrastructure monitoring, special energy in extreme climate areas, aerospace exploration, harsh industrial site detection, etc.

[0038] Based on the multi-mode energy management system in this embodiment, it can operate in a multi-mode composite working state, that is, any one or more power sources among a high-level DC source, a low-level DC source, a high-level AC source and a low-level AC source supply power to the load; wherein the high-level DC source supplies power to the load through a first energy management circuit, the low-level DC source supplies power to the load through a second energy management circuit, the high-level AC source supplies power to the load through a third energy management circuit, and the low-level AC source supplies power to the load through a fourth energy management circuit.

[0039] In addition, in this specific embodiment, the output end of the first energy management circuit is connected to the load through a diode D100, the output end of the second energy management circuit is connected to the load through a diode D200, the output end of the third energy management circuit is connected to the load through a diode D300, and the output end of the fourth energy management circuit is connected to the load through a diode D400. At the output end of the system, due to the presence of four diodes (D100-D400), the reverse flow of the output voltages of different power supplies is blocked, and the currents provided by all power supplies flow to the load.

[0040] In this specific embodiment, Figure 2 As shown, the first energy management circuit includes a first chip U1 of model S6AE103A, and also includes a charge transfer circuit with the energy storage element C7; the negative electrode of the high-level DC source is grounded, and the positive electrode of the high-level DC source is connected to the VDD pin of the first chip U1 through a diode D1, and the VDD pin of the first chip U1 is also grounded through a capacitor C1; the ENA_COMP pin, STBY_LDO pin, ENA_LDO pin, VIN_LDO pin and AGND pin of the first chip U1 are all grounded; VOUT1 of the first chip U1 is connected to one end of the resistor R1, and the other end of the resistor R1 is the output end of the first energy management circuit; the SET_VOUTFB pin of the first chip U1 is grounded through resistors R2, R3 and R4 in turn, the SET_VOUTH pin of the first chip U1 is grounded through the resistors R3 and R4 in turn, and the SET_VOUTL pin of the first chip U1 is grounded through the resistor R4; the CIN0 pin of the first chip U1 The first chip U1 is connected to the ground through the capacitor C9, the CIN1 pin of the first chip U1 is grounded through the capacitor C10 and the capacitor C11 respectively, the CIN2 pin of the first chip U1 is connected to the moving end of the timing switch SW1, one static end of the timing switch SW1 is grounded through the capacitor C12, and the other static end of the timing switch SW1 is grounded through the capacitor C13 and the capacitor C14 respectively; the VINT pin of the first chip U1 is connected to the INT pin of the first chip U1, and the VINT pin of the first chip U1 is also grounded through the capacitor C8; the charge transfer circuit includes a diode D2, a capacitor C3, a capacitor C4, a capacitor C5, a capacitor C6 and an energy storage element C7; the VSTORE2 pin of the first chip U1 is grounded through the energy storage element C7, the VSTORE2 pin of the first chip U1 is also connected to the VSTORE1 pin of the first chip U1 through the diode, and the VSTORE1 pin of the first chip U1 is also grounded through the capacitor C3, the capacitor C4, the capacitor C5 and the capacitor C6 respectively.

[0041] In this embodiment, the resistor and capacitor are of 0603 chip type, the energy storage element C7 can be of DMS3R3224 type, and the parameter value is 220mF; the diode D1 can be of 1SS417 type; the decoupling capacitor (capacitor C1) has a parameter value of 10μF; the bypass capacitor (capacitor C8) has a parameter value of 1μF; the timing switch SW1 can be of SSAJ120100 type; the current measuring resistor (resistor R1) has a parameter value of 0Ω; the voltage regulating resistors (resistors R2, R3 and R4) have parameter values ​​based on the resistor R1. The upper and lower limits of the output voltage VDD at one end are calculated: the upper limit of the output voltage: V_h = [57.5 × (R3 + R4)] / [11.1 × (R2 + R3 + R4)], the lower limit of the output voltage: V_l = (57.5 × R4) / [11.1 × (R2 + R3 + R4)]; the parameter values ​​of the timing setting capacitors (capacitor C9, capacitor C10, capacitor C11, capacitor C12, capacitor C13 and capacitor C14) are calculated according to the time interval requirements of the system data transmission: timing T0: T0 = 0.5455 × C9 × 10 9 +0.01327, timing T1: T1 = 0.5455 × (C10 + C11) × 10 9 +0.01327, timing T2 (timing switch SW1 lower position): T2 = 0.5455 × C12 × 10 9 +0.01327, timing T3 (timing switch SW1 upper position): T3 = 0.5455 × (C13 + C14) × 10 9 +0.01327.

[0042] In this specific embodiment, Figure 3As shown, the second energy management circuit includes a second chip U2 of model LTC3109, and also includes a capacitor C15, a micro-transformer MT1, a micro-transformer MT2 and an output level switching switch SW2; the capacitor C15 is connected between the positive and negative electrodes of the low-level DC source, the negative electrode of the low-level DC source is connected to the VINA pin of the second chip U2, the positive electrode of the low-level DC source is connected to one end of the primary coil of the micro-transformer MT1, the other end of the primary coil of the micro-transformer MT1 is connected to the SWA pin of the second chip U2, one end of the secondary coil of the micro-transformer MT1 is grounded, and the other end of the secondary coil of the micro-transformer MT1 is respectively connected to the C1A pin and the C2A pin of the second chip U2 through the pump capacitor CP1 and the pump capacitor CP2; the VINB pin of the second chip U2 is connected to the positive electrode of the low-level DC source; one end of the primary coil of the micro-transformer MT2 is connected to the negative electrode of the low-level DC source, and the other end of the primary coil of the micro-transformer MT2 is connected to the SWA pin of the second chip U2; The output level switching switch SW2 is connected to the SWB pin of the second chip U2, one end of the secondary coil of the micro-transformer MT2 is grounded, and the other end of the secondary coil of the micro-transformer MT2 is connected to the C1B pin and the C2B pin of the second chip U2 through the pump capacitor CP3 and the pump capacitor CP4 respectively; the moving end of the output level switching switch SW2 is grounded, one static end of the output level switching switch SW2 is connected to the VS2 pin of the second chip U2, and the other static end of the output level switching switch SW2 is connected to the VS1 pin and the VAUX pin of the second chip U2 respectively, and the VS1 pin and the VAUX pin of the second chip U2 are also grounded through the capacitor C16; the VSTORE pin of the second chip U2 is grounded through the resistor R5 and the capacitor C17 in turn; the VOUT pin of the second chip U2 is connected to one end of the resistor R6, the other end of the resistor R6 is the output end of the second energy management circuit, the other end of the resistor R6 is grounded through the capacitor C19, the VLDO pin of the second chip U2 is grounded through the capacitor C18, and the GND pin of the second chip U2 is grounded.

[0043] In this embodiment, the model of the micro-transformer MT1 and the micro-transformer MT2 can be LPR6235, and the parameter value is 7.5μH; the model of the pump capacitor CP1, the pump capacitor CP2, the pump capacitor CP3 and the pump capacitor CP4 are all 0603 chips, and the parameter values ​​of the pump capacitor CP1 and the pump capacitor CP3 are 1nF, and the parameter values ​​of the pump capacitor CP2 and the pump capacitor CP4 are 470pF; the model of the energy storage capacitor (capacitor C17) can be TPSV108M006R0050, and the parameter value is 1000μF; the energy storage capacitor (capacitor C1 9) can be TPSV477M010R0100, with a parameter value of 470μF; the decoupling capacitor (capacitor C15 and capacitor C18) and bypass capacitor (capacitor C16) are 0603 chips, with a parameter value of 47μF for capacitor C15, 2.2μF for capacitor C18, and 1μF for capacitor C16; the output level switch SW2 can be SSAJ120100; the current measuring resistor (resistor R5 and resistor R6) is 0603 chip, with a parameter value of 0Ω for resistor R5 and resistor R6. When the output level switch SW2 is in the left position, the system output voltage VDD (resistance VDD output at the other end of resistor R6) is 3.3V; when the output level switch SW2 is in the right position, the system output voltage VDD (resistance VDD output at the other end of resistor R6) is 5V.

[0044] In this specific embodiment, Figure 4 As shown, the third energy management circuit includes a third chip U3 of model LTC3588-1; the two ends of the high-level AC source are respectively connected to the PZ1 pin and the PZ2 pin of the third chip U3, a capacitor C20 is connected between the VIN pin and the CAP pin of the third chip U3, the VIN pin of the third chip U3 is also grounded through a capacitor C21, the VIN2 pin and the D1 pin of the third chip U3 are both grounded through a capacitor C22, the D0 pin and the GND pin of the third chip U3 are grounded, the VOUT pin of the third chip U3 is the output end of the third energy management circuit, the VOUT pin of the third chip U3 is grounded through a capacitor C23, and the SW pin of the third chip U3 is connected to the VOUT pin of the third chip U3 through an inductor L1; the negative electrode of the energy storage element B2 is grounded, and the positive electrode of the energy storage element B2 is connected to the VIN pin of the third chip U3 through a diode D3.

[0045] In this embodiment, the model of diode D3 can be IR05H40CSPTR; the model of capacitor C20 and capacitor C22 is 0603 patch, the parameter value of capacitor C20 is 1μF, and the parameter value of capacitor C22 is 4.7μF; the model of energy storage capacitor (capacitor C21 and capacitor C23) is 1206 patch, the parameter value of capacitor C21 is 100μF, and the parameter value of capacitor C23 is 47μF; the model of inductor L1 can be SRR1260, and the parameter value is 10μH; the model of energy storage element B2 can be LIR2032. The output voltage VDD of the system (the voltage output by the output end of the third energy management circuit) is 3.3V.

[0046] In this specific embodiment, Figure 5As shown, the fourth energy management circuit includes a second chip U2 with a model number of LTC3109 and a fourth chip U4 with a model number of LTC4070, and also includes a micro-transformer MT3, a micro-transformer MT4, an output level switching switch SW3 and a field effect transistor T1; the negative electrode of the low-level AC source is connected to the VINA pin of the second chip U2, the positive electrode of the low-level AC source is connected to one end of the primary coil of the micro-transformer MT3, the other end of the primary coil of the micro-transformer MT3 is connected to the SWA pin of the second chip U2, and one end of the secondary coil of the micro-transformer MT3 is connected to the SWA pin of the second chip U2. The other end of the secondary coil of the micro-transformer MT3 is connected to the C1A pin and the C2A pin of the second chip U2 through the pump capacitor CP5 and the pump capacitor CP6 respectively; the VINB pin of the second chip U2 is connected to the positive electrode of the low-level AC source; one end of the primary coil of the micro-transformer MT4 is connected to the negative electrode of the low-level AC source, and the other end of the primary coil of the micro-transformer MT4 is connected to the SWB pin of the second chip U2; one end of the secondary coil of the micro-transformer MT4 is grounded, and the other end of the secondary coil of the micro-transformer MT4 is respectively connected to the C1A pin and the C2A pin of the second chip U2 through the pump capacitor CP5 and the pump capacitor CP6; the VINB pin of the second chip U2 is connected to the positive electrode of the low-level AC source; one end of the primary coil of the micro-transformer MT4 is connected to the negative electrode of the low-level AC source, and the other end of the primary coil of the micro-transformer MT4 is connected to the SWB pin of the second chip U2; The pump capacitors CP7 and CP8 are connected to the C1B pin and C2B pin of the second chip U2 respectively; the moving end of the output level switching switch SW3 is grounded, one static end of the output level switching switch SW3 is connected to the VS1 pin of the second chip U2, and the other static end of the output level switching switch SW3 is respectively connected to the VS2 pin and the VAUX pin of the second chip U2, and the VS2 pin and the VAUX pin of the second chip U2 are also grounded through the capacitor C24; the VLDO pin of the second chip U2 is grounded through the capacitor C25, and the second chip U2 The GND pin of the second chip U2 is grounded; the VOUT pin of the second chip U2 is connected to one end of the resistor R7, the other end of the resistor R7 is the output end of the fourth energy management circuit, the other end of the resistor R7 is connected to the drain of the field effect transistor T1 through the resistor R8, the gate of the field effect transistor T1 is connected to the LBO pin of the fourth chip U4, the source of the field effect transistor T1 is respectively connected to the NTC pin and the VCC pin of the fourth chip U4, the negative electrode of the energy storage element B2 is grounded, and the positive electrode of the energy storage element B2 is connected to the VCC pin of the fourth chip U4 through the resistor R9.

[0047] In this embodiment, the model of the micro-transformer MT3 and the micro-transformer MT4 can be LPR6235, and the parameter value is 12.5μH; the model of the pump capacitor CP5, the pump capacitor CP6, the pump capacitor CP7 and the pump capacitor CP8 are all 0603 patches, the parameter values ​​of the pump capacitor CP5 and the pump capacitor CP7 are 1nF, and the parameter values ​​of the pump capacitor CP6 and the pump capacitor CP8 are 470pF; the model of the decoupling capacitor (capacitor C25) and the bypass capacitor (capacitor C24) are all The output level switch SW3 is a 0603 chip, the parameter value of the capacitor C25 is 2.2μF, and the parameter value of the capacitor C24 is 1μF; the model of the output level switch SW3 can be SSAJ120100; the model of the current measuring resistor (resistor R7 and resistor R8) is a 0603 chip, and the parameter value of the resistor R7 and resistor R8 is 0Ω; the model of the 2.5V P-type metal oxide semi-conductor field effect transistor (field effect transistor T1) can be FDG3289; the model of the energy storage element B2 can be LIR2032. When the output level switch SW3 is in the left position, the output voltage VDD of the system (the voltage outputted by the output end of the fourth energy management circuit) is 4.1V; when the output level switch SW3 is in the right position, the output voltage VDD of the system is 5V.

[0048] Embodiment 2:

[0049] Based on the first embodiment, Figure 6 As shown, a multi-mode energy management system of the present invention also includes a strain detection circuit, an acceleration detection circuit, a first control circuit, a second control circuit, a first controllable switch, a second controllable switch and an energy storage element B2; the strain detection circuit and the acceleration detection circuit are both connected to the input end of the first control circuit, the controlled end of the first controllable switch and the controlled end of the second controllable switch are both connected to the output end of the first control circuit, the high-level AC source and the third energy management circuit are respectively connected to the two ends of the first controllable switch, and the low-level AC source and the fourth energy management circuit are respectively connected to the two ends of the second controllable switch; the low-level DC source is connected to the energy storage element B2 through the second energy management circuit, and the energy storage element B2 is also connected to the third energy management circuit and the fourth energy management circuit respectively; the energy storage element B2 and the high-level DC source are connected to the input end of the second control circuit, the output end of the second control circuit is connected to the first energy management circuit, and the first energy management circuit is provided with an energy storage element C7.

[0050] In this specific embodiment, the second energy management circuit is connected to the strain detection circuit and the acceleration detection circuit respectively, and is used to supply power to the strain detection circuit and the acceleration detection circuit.

[0051] like Figure 7 As shown, the first control circuit includes a fifth chip U5 of model nRF51822, and also includes a fifth chip peripheral component, which is not shown here. For details, see Figure 7 (The fifth chip peripheral components include capacitors C32-C42, resistors R21, inductors L2-L4, crystal oscillator X1 and antenna ANT1); the strain detection circuit includes a strain sensor S1, three resistors (see Figure 7 resistors R17, R18, and R19) and an operational amplifier (see Figure 7 The operational amplifier AMP1 in the embodiment, a resistor R20 is also connected between the two input terminals of the operational amplifier AMPI), the strain sensor S1 and the three resistors are connected end to end in sequence to form a bridge circuit, the bridge circuit is connected to the operational amplifier, and the output terminal of the operational amplifier is connected to the P0.00 pin of the fifth chip U5; the acceleration detection circuit includes an accelerometer S2 of model ADXL335 (the accelerometer S2 is also provided with capacitors C28-C31 on the periphery), the XOUT pin, YOUT pin and ZOUT pin of the accelerometer S2 are respectively connected to the P0.01 pin, P0.02 pin and P0.03 pin of the fifth chip U5; the first controllable switch includes a controllable switch SW4 and a controllable switch SW5, and the controlled end (ON / OFF pin) of the controllable switch SW4 and the controlled end of the controllable switch SW5 are respectively connected to the P0.01 pin, P0.02 pin and P0.03 pin of the fifth chip U5 The two ends of the high-level AC source are respectively connected to the input end (IN pin) of the controllable switch SW4 and the input end (IN pin) of the controllable switch SW5, and the output end (OUT pin) of the controllable switch SW4 and the output end (OUT pin) of the controllable switch SW5 are both connected to the third energy management circuit; the second controllable switch includes a controllable switch SW6 and a controllable switch SW7, and the controlled end of the controllable switch SW6 and the controlled end of the controllable switch SW7 are respectively connected to the P0.10 pin and the P0.11 pin of the fifth chip U5; the two ends of the low-level AC source are respectively connected to the input end of the controllable switch SW6 and the input end of the controllable switch SW7, and the output end of the controllable switch SW6 and the output end of the controllable switch SW7 are both connected to the fourth energy management circuit. Among them, the strain sensor S1 detects strain, and the accelerometer S2 detects vibration acceleration. If the set threshold is reached, the fifth chip U5 enables the ultra-low loss switch SW4 / SW5 or SW6 / SW7, so that the high-level AC source or the low-level AC source is connected to the third energy management circuit or the fourth energy management circuit respectively.

[0052] The second control circuit includes a sixth chip U6 of model TPS2120, and also includes peripheral components of the sixth chip, which are not shown here. For details, see Figure 7 (The peripheral components of the sixth chip include capacitor C43 and resistors R22-R26); the negative electrode of the energy storage element B2 is grounded, the positive electrode of the energy storage element B2 is connected to the IN1 pin of the sixth chip U6, the negative electrode of the high-level DC source is grounded, the positive electrode of the high-level DC source is connected to the IN2 pin of the sixth chip U6, and the OUT pin of the sixth chip U6 is connected to the first energy management circuit.

[0053] In this embodiment, the voltage divider resistors (resistors R22, R23, R24 and R25) and the current limiting resistor (resistor R26) may be 0603 chips, with parameter values ​​of 23.7 kΩ for R22 and R24, 5 kΩ for R23 and R25, and 51 kΩ for R26; the bypass capacitor (capacitor C43) may be 0603 chips, with parameter value of 0.01 μF for C43; the ultra-low loss switches (controllable switches SW4, SW5, SW6 and SW7) may be SIP32 431; the model of the strain sensor (strain sensor S1) can be BF350-3AA; the model of the resistor R17, the resistor R18, the resistor R19 and the resistor R20 can be 0603 patch, the parameter value of R17 is 270Ω, R18 and R19 are 100kΩ, and R20 is 205Ω; the model of the operational amplifier AMP1 can be AD627R; the model of the accelerometer S2 can be ADXL335; the model of the capacitor C28, the capacitor C30, the capacitor C31 and the capacitor C32 can be 0603 patch, and the parameter value is 0.1μF; the decoupling capacitor (capacitor C32, capacitor C33, capacitor C34, capacitor C39 and capacitor C42) can be a 0402 patch, and the parameter values ​​of C32, C33, C39 and C42 are 100nF, and C34 is 47nF; the bypass capacitor (capacitor C35) can be a 0402 patch, and the parameter value is 2.2nF; the voltage divider capacitor (capacitor C40 and capacitor C41) can be a 0402 patch, and the parameter value is 12pF; the pull-down resistor (resistor R21) can be a 0402 patch, The parameter value is 1kΩ; the model of crystal oscillator X1 can be CX2520DB; the model of high-frequency isolation inductor (inductor L2 and inductor L3) can be 0402 chip, the parameter value of L2 is 4.7nH, and the parameter value of L3 is 10nH; the model of antenna ANT can be 17488910245; the model of impedance matching network capacitor and inductor devices (capacitor C36, capacitor C37 and inductor L4) can be 0402 chip, the parameter value of C36 is 2.2pF, C37 is 1pF, C38 is 1.5pF, and inductor L4 is 3.3nH.

[0054] Embodiment three:

[0055] Based on Example 2, a multi-mode energy management system of the present invention also includes a power multiplexing circuit; the low-level DC source is connected to the energy storage element B2 through the second energy management circuit, the energy storage element B2 and the high-level DC source are connected to the input end of the power multiplexing circuit, and the output end of the power multiplexing circuit is connected to the first energy management circuit.

[0056] Due to the instability of green energy, the present invention proposes Figure 8 The power multiplexing circuit shown is used to select the optimal energy supply path to achieve stable and uninterrupted energy supply.

[0057] like Figure 8As shown, the power multiplexing circuit includes an operational amplifier comparator OP AMP1, a P-type metal oxide semi-conductor field effect transistor P1, a P-type metal oxide semi-conductor field effect transistor P2, a P-type metal oxide semi-conductor field effect transistor P3, a P-type metal oxide semi-conductor field effect transistor P4, an N-type metal oxide semi-conductor field effect transistor N1, an N-type metal oxide semi-conductor field effect transistor N2 and an N-type metal oxide semi-conductor field effect transistor N3; the negative electrode of the energy storage element B2 is grounded, the positive electrode of the energy storage element B2 is connected to the positive input terminal of the operational amplifier comparator OP AMP1 through a resistor R10, and the operational amplifier comparator OP The positive input terminal of AMP1 is also grounded through a resistor R11, the output terminal of the operational amplifier comparator OPAMP1 is connected to the gate of the N-type metal oxide semiconductor field effect transistor N1, the source of the N-type metal oxide semiconductor field effect transistor N1 is grounded, and a diode D6 is connected between the source and the drain of the N-type metal oxide semiconductor field effect transistor N1; the positive electrode of the energy storage element B2 is also connected to the drain of the P-type metal oxide semiconductor field effect transistor P1, and the gate of the P-type metal oxide semiconductor field effect transistor P1 is connected to the positive electrode of the P-type metal oxide semiconductor field effect transistor P1 through a resistor R13. On the drain of the N-type MOSFET N1, a resistor R12 is connected between the gate and source of the P-type MOSFET P1, and a diode D4 is connected between the drain and source of the P-type MOSFET P1; the gate of the P-type MOSFET P2 is connected to the drain of the N-type MOSFET N1 through a resistor R13, a capacitor C26 is connected between the gate and source of the P-type MOSFET P2, and the P-type MOSFET A diode D5 is connected between the drain and source of P2, and the drain of the P-type metal oxide semiconductor field effect transistor P2 is connected to the first energy management circuit; the negative electrode of the high-level DC source is grounded, and the positive electrode of the high-level DC is connected to the drain of the P-type metal oxide semiconductor field effect transistor P3, a diode D7 is connected between the drain and source of the P-type metal oxide semiconductor field effect transistor P3, a resistor R14 is connected between the gate and source of the P-type metal oxide semiconductor field effect transistor P3, and the P-type metal oxide semiconductor field effect transistor P The gate of the P-type MOSFET P4 is connected to the drain of the N-type MOSFET N2 through a resistor R15; a diode D8 is connected between the drain and source of the P-type MOSFET P4, a capacitor C27 is connected between the gate and source of the P-type MOSFET P4, the gate of the P-type MOSFET P4 is connected to the drain of the N-type MOSFET N2 through a resistor R15, and the drain of the P-type MOSFET P4 is connected to the first energy management circuit;The source of the N-type MOSFET N2 is grounded, a diode D9 is connected between the source and drain of the N-type MOSFET N2, the gate of the N-type MOSFET N2 is connected to the positive electrode of the high-level DC through a resistor R16, the gate of the N-type MOSFET N2 is also connected to the drain of the N-type MOSFET N3, the source of the N-type MOSFET N3 is grounded, a diode D10 is connected between the source and drain of the N-type MOSFET N3, and the gate of the N-type MOSFET N3 is connected to the output end of the operational amplifier comparator OP AMP1. ;

[0058] exist Figure 8 In the embodiment, the low-level DC source is in a continuously enabled state, and the positive and negative electrodes of the low-level DC source are connected to the second energy management circuit to charge the energy storage element B2. The high-level DC source and the energy storage element B2 are connected to the power multiplexing circuit. The power multiplexing circuit can select a power source with more energy according to the output voltage of the energy storage element B2 and the high-level DC source, and then connect it to the first energy management circuit. The power multiplexing circuit has a comparator followed by inverter logic to ensure that only one group of power sources (i.e., the energy storage element B2 or the high-level DC source) is connected to the first energy management circuit.

[0059] Embodiment 4:

[0060] A multi-mode energy management method, used to control the working state of the multi-mode energy management system described in the second embodiment to supply power to a load, so that the multi-mode energy management system operates in a multi-mode composite working state or a multi-mode power flow optimization working state;

[0061] The control process of the multi-mode composite working state includes the following steps, controlling any one or multiple power sources among a high-level DC source, a low-level DC source, a high-level AC source and a low-level AC source to supply power to a load; wherein the high-level DC source supplies power to the load through a first energy management circuit, the low-level DC source supplies power to the load through a second energy management circuit, the high-level AC source supplies power to the load through a third energy management circuit, and the low-level AC source supplies power to the load through a fourth energy management circuit; the multi-mode energy management system can operate in any single power supply mode, and can also operate in any combination of two or more power supply modes.

[0062] like Fig. 9 As shown, the control process of the multi-mode power flow optimization working state includes the following steps:

[0063] S1, continuously enabling the low-level DC source so that the low-level DC source charges the energy storage element B2 through the second energy management circuit;

[0064] S2, determine whether there is a power signal input in the second control circuit; if so, execute S3-S5 in sequence; if not, execute S6-S10 in sequence;

[0065] S3, determining whether the voltage output by the high-level DC source is greater than the voltage output by the energy storage element B2; if so, executing S4; if not, executing S5;

[0066] S4, using the second control circuit to turn on the high-level DC source, so that the high-level DC source charges the energy storage element C7 in the first energy management circuit, and the energy storage element C7 supplies power to the load;

[0067] S5, using the second control circuit to turn on the energy storage element B2, and the energy storage element B2 supplies power to the load;

[0068] S6, determining whether the strain value output by the strain detection circuit is greater than a preset strain threshold; if so, executing S7; if not, executing S8;

[0069] S7, using the first control circuit to turn on the first controllable switch to enable the high-level AC source, and the high-level AC source supplies power to the load through the third energy management circuit;

[0070] S8: Determine whether the acceleration value detected by the acceleration detection circuit is greater than a preset acceleration threshold; if so, execute S9; if not, execute S10;

[0071] S9, using the first control circuit to turn on the second controllable switch to enable the low-level AC source, and allowing the low-level AC source to charge the energy storage element B2 through the fourth energy management circuit, and the energy storage element B2 supplies power to the load;

[0072] S10, using the first control circuit to turn off the first controllable switch and the second controllable switch, and using the energy storage element B2 to supply power to the load.

[0073] Combined with the specific structures of each circuit disclosed in the second embodiment, the control process of the multi-mode power flow optimization working state is specifically as follows: Fig.10As shown, the system of the present invention continuously enables the low-level DC source, and the low-level DC source charges the energy storage element B2 through the second energy management circuit; when there is a signal at the input end (pin IN1 or pin IN2) of the sixth chip U6, a judgment is made. If the output voltage V1 of the high-level DC source is greater than or equal to the output voltage V2 of the energy storage element B2, the sixth chip U6 chooses to turn on the high-level DC source, and the high-level DC source charges the energy storage element C7 through the first energy management circuit, and the energy storage element C7 then supplies power to the load; if the output voltage V1 of the high-level DC source is less than the output voltage V2 of the energy storage element B2, the sixth chip U6 chooses to turn on the energy storage element B2, and the energy storage element B2 then supplies power to the load; if there is no input signal at the input end (pin IN1 and pin IN2) of the sixth chip U6, the strain value detected by the strain sensor S1 is judged. If the strain value detected by the strain sensor S1 is greater than or equal to the preset strain threshold, that is, |ε|≥ε_T, the fifth chip U5 selects to turn on the controllable switches SW4 and SW5, the system enables the high-level AC source, and the high-level AC source supplies power to the load through the third energy management circuit; if the strain value detected by the strain sensor S1 is less than the preset strain threshold, further judgment is performed. If the acceleration amplitude detected by the accelerometer S2 is greater than or equal to the preset acceleration amplitude threshold, that is, |a_i|≥a_T (i=x, y, z), the fifth chip U5 selects to turn on the controllable switches SW6 and SW7, the system enables the low-level AC source, and the low-level AC source charges the energy storage element B2 through the fourth energy management circuit, and the energy storage element B2 then supplies power to the load; if the acceleration amplitude detected by the accelerometer S2 is less than the preset acceleration amplitude threshold, the fifth chip U5 selects to turn off the controllable switches SW5, SW6, SW7 and SW8, and the energy storage element B2 supplies power to the load.

[0074] Below, the present invention is specifically tested in combination with the above embodiments:

[0075] (1) Energy consumption test:

[0076] The low loss of a multi-mode energy management system of the present invention is mainly achieved through a charge transfer circuit. Figure 2As shown, the charge transfer circuit includes a diode D2, an energy storage element C7, and an energy storage capacitor (capacitor C3, capacitor C4, capacitor C5, and capacitor C6). The energy storage element C7 is a supercapacitor, and its equivalent series resistance is generally large (about 200Ω), while the energy storage capacitor (capacitor C3, capacitor C4, capacitor C5, and capacitor C6) is an ordinary energy storage capacitor, and its equivalent series resistance is very small (about 1mΩ). The unidirectional conduction diode D2 ensures that the charge can only flow from the energy storage element C7 to the ordinary energy storage capacitor (capacitor C3, capacitor C4, capacitor C5, and capacitor C6), while the loss when supplying power to the load is borne by the ordinary energy storage capacitor (capacitor C3, capacitor C4, capacitor C5, and capacitor C6), thereby greatly reducing the internal high loss problem caused by the large equivalent series resistance of the supercapacitor (energy storage element C7). Fig.11 The test comparison results of the multi-mode energy management system with and without charge transfer circuits are shown in Figure 1. Compared with the multi-mode energy management system without charge transfer circuits, the multi-mode energy management system with charge transfer circuits has a voltage drop of only 0.15V at the output end when the load is performing wireless data communication, while the voltage drop of the multi-mode energy management system without charge transfer circuits is greater than 2V. It can be seen that the multi-mode energy management system of the present invention can work stably with low loss. In this embodiment, the model of diode D2 can be PMEG3010EJ; the model of energy storage element C7 can be DMS3R3224, and the parameter value is 220mF; the model of capacitor C3, capacitor C4, capacitor C5 and capacitor C6 can be 1206 patch, and the parameter value is 100μF.

[0077] (2) Energy harvesting test in high-level power mode:

[0078] Fig.12 Energy harvesting test results for a multi-mode energy management system operating in high-level power mode. Fig.12 (a) shows the effective collection current of the energy management system when the green energy source is a high-level DC source (the input voltage supplied to the multi-mode energy management system is 3V), that is, the input current supplied by the green energy source to the multi-mode energy management system. Here, a photovoltaic thin-film battery is taken as an example, and its current value input to the multi-mode energy management system varies with the illuminance. Under the condition of illuminance of 70Lx, its current value is about 40μA. Fig.12 (b) shows that the green energy source is a high-level DC source (the input voltage supplied to the multi-mode energy management system is 3V), which supplies the charging current to the energy storage element C7 after passing through the multi-mode energy management system (showing the test results of 600ms). Fig.12(c) shows that the green energy source is a high-level DC source (the input voltage supplied to the multi-mode energy management system is 3V). After passing through the multi-mode energy management system, the charging current supplied to the energy storage element C7 is used. Here, a photovoltaic thin-film battery is taken as an example. It can be seen that the charging cycle within 6ms varies with the light intensity, but no matter how the light intensity changes, the charging current amplitude can be greater than 1.0mA, which can ensure the stable operation of the energy storage element C7. The test results show that the multi-mode energy management system of the present invention can effectively collect extremely weak currents (on the order of μA), and after energy management, it can stably and effectively charge the energy storage element, thereby driving the load to work stably.

[0079] (3) Energy harvesting test in low-level power mode

[0080] Fig.13 Energy harvesting test results for a multi-mode energy management system operating in low-level power mode. Fig.13 (a) shows the input current of the multi-mode energy management system when the green energy source is a low-level DC source (the input voltage supplied to the multi-mode energy management system is 0.06V, as shown by the solid line), that is, the input current supplied by the green energy source to the multi-mode energy management system. Fig.13 (b) shows the output voltage and output current supplied to the load after the multi-mode energy management system when the green energy source is a low-level DC source (the input voltage supplied to the multi-mode energy management system is 0.06V). The results show that the multi-mode energy management system of the present invention can effectively collect extremely weak voltages (on the order of mV), and after being picked up, converted, stored and distributed by the multi-mode energy management system, it can output a high-level DC voltage and meet the instantaneous large current required by the load (such as Fig.13 (b) The test results show that the instantaneous load current can reach 13.5 mA). In this test embodiment, the load is a Bluetooth wireless data communication module with an instantaneous power consumption of up to 50 mW.

[0081] To sum up, the multi-mode energy management system of the present invention can effectively manage four types of green energy, namely, high-level DC source, low-level DC source, high-level AC source and low-level AC source, so that it can operate in a multi-mode composite working state or a multi-mode power flow optimization working state. It can effectively collect extremely weak current and voltage while having low loss, and then output continuous and stable power supply for load operation.

[0082] The above description is only a preferred embodiment of the present invention and is not intended to limit the present invention. Any modifications, equivalent substitutions, improvements, etc. made within the spirit and principle of the present invention should be included in the protection scope of the present invention.

Claims

1. A multi-mode energy management system, characterized in that: It includes a first energy management circuit, a second energy management circuit, a third energy management circuit and a fourth energy management circuit; the input end of the first energy management circuit is used to connect to a high-level DC source, the input end of the second energy management circuit is used to connect to a low-level DC source, the input end of the third energy management circuit is used to connect to a high-level AC source, the input end of the fourth energy management circuit is used to connect to a low-level AC source, and the output end of the first energy management circuit, the output end of the second energy management circuit, the output end of the third energy management circuit and the output end of the fourth energy management circuit are all used to connect to a load; The multi-mode energy management system further includes a strain detection circuit, an acceleration detection circuit, a first control circuit, a second control circuit, a first controllable switch, a second controllable switch and an energy storage element B2; The strain detection circuit and the acceleration detection circuit are both connected to the input end of the first control circuit, the controlled end of the first controllable switch and the controlled end of the second controllable switch are both connected to the output end of the first control circuit, the high-level AC source and the third energy management circuit are respectively connected to the two ends of the first controllable switch, and the low-level AC source and the fourth energy management circuit are respectively connected to the two ends of the second controllable switch; the low-level DC source is connected to the energy storage element B2 through the second energy management circuit, and the energy storage element B2 is also connected to the third energy management circuit and the fourth energy management circuit respectively; the energy storage element B2 and the high-level DC source are connected to the input end of the second control circuit, and the output end of the second control circuit is connected to the first energy management circuit, and the first energy management circuit is provided with an energy storage element C7; The first control circuit includes a fifth chip U5 of model nRF51822; the strain detection circuit includes a strain sensor S1, three resistors and an operational amplifier, the strain sensor S1 and the three resistors are connected end to end in sequence to form a bridge circuit, the bridge circuit is connected to the operational amplifier, and the output end of the operational amplifier is connected to the P0.00 pin of the fifth chip U5; the acceleration detection circuit includes an accelerometer S2 of model ADXL335, the XOUT pin, YOUT pin and ZOUT pin of the accelerometer S2 are respectively connected to the P0.01 pin, P0.02 pin and P0.03 pin of the fifth chip U5; the first controllable switch includes a controllable switch SW4 and a controllable switch SW5, the controlled end of the controllable switch SW4 and the controlled end of the controllable switch SW5 are respectively connected to the P0.08 pin and the P0.09 pin of the fifth chip U5; the two ends of the high-level AC source are respectively connected to the input end of the controllable switch SW4 and the input end of the controllable switch SW5 The output end of the controllable switch SW4 and the output end of the controllable switch SW5 are both connected to the third energy management circuit; the second controllable switch includes a controllable switch SW6 and a controllable switch SW7, and the controlled end of the controllable switch SW6 and the controlled end of the controllable switch SW7 are respectively connected to the P0.10 pin and the P0.11 pin of the fifth chip U5; the two ends of the low-level AC source are respectively connected to the input end of the controllable switch SW6 and the input end of the controllable switch SW7, and the output end of the controllable switch SW6 and the output end of the controllable switch SW7 are both connected to the fourth energy management circuit; the second control circuit includes a sixth chip U6 of model TPS2120, the negative electrode of the energy storage element B2 is grounded, the positive electrode of the energy storage element B2 is connected to the IN1 pin of the sixth chip U6, the negative electrode of the high-level DC source is grounded, the positive electrode of the high-level DC source is connected to the IN2 pin of the sixth chip U6, and the OUT pin of the sixth chip U6 is connected to the first energy management circuit; The multi-mode energy management system also includes a power multiplexing circuit; the low-level DC source is connected to the energy storage element B2 through the second energy management circuit, the energy storage element B2 and the high-level DC source are connected to the input end of the power multiplexing circuit, and the output end of the power multiplexing circuit is connected to the first energy management circuit; the power multiplexing circuit includes an operational amplifier comparator OP AMP1, a P-type metal oxide semiconductor field effect transistor P1, a P-type metal oxide semiconductor field effect transistor P2, a P-type metal oxide semiconductor field effect transistor P3, a P-type metal oxide semiconductor field effect transistor P4, an N-type metal oxide semiconductor field effect transistor N1, an N-type metal oxide semiconductor field effect transistor N2 and an N-type metal oxide semiconductor field effect transistor N3; the negative electrode of the energy storage element B2 is grounded, the positive electrode of the energy storage element B2 is connected to the positive input end of the operational amplifier comparator OP AMP1 through a resistor R10, the positive input end of the operational amplifier comparator OP AMP1 is also grounded through a resistor R11, and the operational amplifier comparator OP The output end of AMP1 is connected to the gate of the N-type MOSFET N1, the source of the N-type MOSFET N1 is grounded, and a diode D6 is connected between the source and drain of the N-type MOSFET N1; the positive electrode of the energy storage element B2 is also connected to the drain of the P-type MOSFET P1, the gate of the P-type MOSFET P1 is connected to the drain of the N-type MOSFET N1 through a resistor R13, and the A resistor R12 is connected between the gate and source of the P-type MOSFET P1, and a diode D4 is connected between the drain and source of the P-type MOSFET P1; the gate of the P-type MOSFET P2 is connected to the drain of the N-type MOSFET N1 through a resistor R13, a capacitor C26 is connected between the gate and source of the P-type MOSFET P2, and a diode D4 is connected between the drain and source of the P-type MOSFET P2. The drain of the P-type MOSFET P2 is connected to the first energy management circuit; the negative electrode of the high-level DC source is grounded, the positive electrode of the high-level DC is connected to the drain of the P-type MOSFET P3, a diode D7 is connected between the drain and source of the P-type MOSFET P3, a resistor R14 is connected between the gate and source of the P-type MOSFET P3, and the gate of the P-type MOSFET P3 is connected through a resistor R15 is connected to the drain of the N-type MOSFET N2; a diode D8 is connected between the drain and source of the P-type MOSFET P4, a capacitor C27 is connected between the gate and source of the P-type MOSFET P4, the gate of the P-type MOSFET P4 is connected to the drain of the N-type MOSFET N2 through a resistor R15, and the drain of the P-type MOSFET P4 is connected to the first energy management circuit;The source of the N-type MOSFET N2 is grounded, a diode D9 is connected between the source and drain of the N-type MOSFET N2, the gate of the N-type MOSFET N2 is connected to the positive electrode of the high-level DC through a resistor R16, the gate of the N-type MOSFET N2 is also connected to the drain of the N-type MOSFET N3, the source of the N-type MOSFET N3 is grounded, a diode D10 is connected between the source and drain of the N-type MOSFET N3, and the gate of the N-type MOSFET N3 is connected to the output end of the operational amplifier comparator OP AMP1. ; 2. The multi-mode energy management system according to claim 1, characterized in that: The first energy management circuit includes a first chip U1 of model S6AE103A, and also includes a charge transfer circuit with the energy storage element C7; the negative electrode of the high-level DC source is grounded, and the positive electrode of the high-level DC source is connected to the VDD pin of the first chip U1 through a diode D1, and the VDD pin of the first chip U1 is also grounded through a capacitor C1; the ENA_COMP pin, STBY_LDO pin, ENA_LDO pin, VIN_LDO pin and AGND pin of the first chip U1 are all grounded; VOUT1 of the first chip U1 is connected to one end of the resistor R1, and the other end of the resistor R1 is the output end of the first energy management circuit; the SET_VOUTFB pin of the first chip U1 is grounded through resistors R2, R3 and R4 in turn, the SET_VOUTH pin of the first chip U1 is grounded through the resistors R3 and R4 in turn, and the SET_VOUTL pin of the first chip U1 is grounded through the resistor R4; the CIN0 pin of the first chip U1 The first chip U1 is grounded through capacitor C9, the CIN1 pin of the first chip U1 is grounded through capacitors C10 and C11 respectively, the CIN2 pin of the first chip U1 is connected to the moving end of the timing switch SW1, one static end of the timing switch SW1 is grounded through capacitor C12, and the other static end of the timing switch SW1 is grounded through capacitors C13 and C14 respectively; the VINT pin of the first chip U1 is connected to the INT pin of the first chip U1, and the VINT pin of the first chip U1 is also grounded through capacitor C8; the charge transfer circuit includes a diode D2, a capacitor C3, a capacitor C4, a capacitor C5, a capacitor C6 and an energy storage element C7; the VSTORE2 pin of the first chip U1 is grounded through the energy storage element C7, the VSTORE2 pin of the first chip U1 is also connected to the VSTORE1 pin of the first chip U1 through the diode, and the VSTORE1 pin of the first chip U1 is also grounded through the capacitor C3, the capacitor C4, the capacitor C5 and the capacitor C6 respectively.

3. The multi-mode energy management system according to claim 1, characterized in that: The second energy management circuit includes a second chip U2 with model number LTC3109, and also includes a capacitor C15, a micro-transformer MT1, a micro-transformer MT2 and an output level switching switch SW2; the capacitor C15 is connected between the positive and negative electrodes of the low-level DC source, the negative electrode of the low-level DC source is connected to the VINA pin of the second chip U2, the positive electrode of the low-level DC source is connected to one end of the primary coil of the micro-transformer MT1, the other end of the primary coil of the micro-transformer MT1 is connected to the SWA pin of the second chip U2, one end of the secondary coil of the micro-transformer MT1 is grounded, and the The other end of the secondary coil is connected to the C1A pin and the C2A pin of the second chip U2 through the pumping capacitor CP1 and the pumping capacitor CP2 respectively; the VINB pin of the second chip U2 is connected to the positive electrode of the low-level DC source; one end of the primary coil of the micro-transformer MT2 is connected to the negative electrode of the low-level DC source, the other end of the primary coil of the micro-transformer MT2 is connected to the SWB pin of the second chip U2, one end of the secondary coil of the micro-transformer MT2 is grounded, and the other end of the secondary coil of the micro-transformer MT2 is connected to the C1A pin and the C2A pin of the second chip U2 through the pumping capacitor CP3 and the pumping capacitor CP4 respectively. B pin and C2B pin; the moving end of the output level switching switch SW2 is grounded, one static end of the output level switching switch SW2 is connected to the VS2 pin of the second chip U2, and the other static end of the output level switching switch SW2 is respectively connected to the VS1 pin and the VAUX pin of the second chip U2, and the VS1 pin and the VAUX pin of the second chip U2 are also grounded through the capacitor C16; the VSTORE pin of the second chip U2 is grounded through the resistor R5 and the capacitor C17 in turn; the VOUT pin of the second chip U2 is connected to one end of the resistor R6, the other end of the resistor R6 is the output end of the second energy management circuit, the other end of the resistor R6 is grounded through the capacitor C19, the VLDO pin of the second chip U2 is grounded through the capacitor C18, and the GND pin of the second chip U2 is grounded.

4. The multi-mode energy management system according to claim 1, characterized in that: The third energy management circuit includes a third chip U3 with model number LTC3588-1; the two ends of the high-level AC source are respectively connected to the PZ1 pin and the PZ2 pin of the third chip U3, a capacitor C20 is connected between the VIN pin and the CAP pin of the third chip U3, the VIN pin of the third chip U3 is also grounded through a capacitor C21, the VIN2 pin and the D1 pin of the third chip U3 are both grounded through a capacitor C22, the D0 pin and the GND pin of the third chip U3 are grounded, the VOUT pin of the third chip U3 is the output end of the third energy management circuit, the VOUT pin of the third chip U3 is grounded through a capacitor C23, and the SW pin of the third chip U3 is connected to the VOUT pin of the third chip U3 through an inductor L1; the negative pole of the energy storage element B2 is grounded, and the positive pole of the energy storage element B2 is connected to the VIN pin of the third chip U3 through a diode D3.

5. The multi-mode energy management system according to claim 1, characterized in that: The fourth energy management circuit includes a second chip U2 with a model number of LTC3109 and a fourth chip U4 with a model number of LTC4070, and also includes a micro-transformer MT3, a micro-transformer MT4, an output level switching switch SW3 and a field effect transistor T1; the negative electrode of the low-level AC source is connected to the VINA pin of the second chip U2, the positive electrode of the low-level AC source is connected to one end of the primary coil of the micro-transformer MT3, the other end of the primary coil of the micro-transformer MT3 is connected to the SWA pin of the second chip U2, one end of the secondary coil of the micro-transformer MT3 is grounded, and the secondary line of the micro-transformer MT3 is connected to the ground. The other end of the coil is connected to the C1A pin and the C2A pin of the second chip U2 through the pumping capacitor CP5 and the pumping capacitor CP6 respectively; the VINB pin of the second chip U2 is connected to the positive electrode of the low-level AC source; one end of the primary coil of the micro-transformer MT4 is connected to the negative electrode of the low-level AC source, the other end of the primary coil of the micro-transformer MT4 is connected to the SWB pin of the second chip U2, one end of the secondary coil of the micro-transformer MT4 is grounded, and the other end of the secondary coil of the micro-transformer MT4 is connected to the C1A pin and the C2A pin of the second chip U2 through the pumping capacitor CP7 and the pumping capacitor CP8 respectively. B pin and C2B pin; the moving end of the output level switching switch SW3 is grounded, one static end of the output level switching switch SW3 is connected to the VS1 pin of the second chip U2, and the other static end of the output level switching switch SW3 is respectively connected to the VS2 pin and the VAUX pin of the second chip U2, and the VS2 pin and the VAUX pin of the second chip U2 are also grounded through capacitor C24; the VLDO pin of the second chip U2 is grounded through capacitor C25, and the GND pin of the second chip U2 is grounded; the second chip U2 The VOUT pin is connected to one end of the resistor R7, the other end of the resistor R7 is the output end of the fourth energy management circuit, the other end of the resistor R7 is connected to the drain of the field effect transistor T1 through the resistor R8, the gate of the field effect transistor T1 is connected to the LBO pin of the fourth chip U4, the source of the field effect transistor T1 is respectively connected to the NTC pin and the VCC pin of the fourth chip U4, the negative electrode of the energy storage element B2 is grounded, and the positive electrode of the energy storage element B2 is connected to the VCC pin of the fourth chip U4 through the resistor R9.

6. The multi-mode energy management system according to any one of claims 1 to 5, characterized in that: The output end of the first energy management circuit is connected to the load through a diode D100, the output end of the second energy management circuit is connected to the load through a diode D200, the output end of the third energy management circuit is connected to the load through a diode D300, and the output end of the fourth energy management circuit is connected to the load through a diode D400.

7. A multi-mode energy management method, characterized in that: Used to control the working state of the multi-mode energy management system according to any one of claims 1 to 5 supplying power to a load, so that the multi-mode energy management system operates in a multi-mode composite working state or a multi-mode power flow optimization working state; The control process of the multi-mode composite working state includes the following steps: controlling any one or more power sources among a high-level DC source, a low-level DC source, a high-level AC source and a low-level AC source to supply power to a load; wherein the high-level DC source supplies power to the load through a first energy management circuit, the low-level DC source supplies power to the load through a second energy management circuit, the high-level AC source supplies power to the load through a third energy management circuit, and the low-level AC source supplies power to the load through a fourth energy management circuit; The control process of the multi-mode power flow optimization working state includes the following steps: S1, continuously enabling the low-level DC source so that the low-level DC source charges the energy storage element B2 through the second energy management circuit; S2, determine whether there is a power signal input in the second control circuit; if so, execute S3-S5 in sequence; if not, execute S6-S10 in sequence; S3, determining whether the voltage output by the high-level DC source is greater than the voltage output by the energy storage element B2; if so, executing S4; if not, executing S5; S4, using the second control circuit to turn on the high-level DC source, so that the high-level DC source charges the energy storage element C7 in the first energy management circuit, and the energy storage element C7 supplies power to the load; S5, using the second control circuit to turn on the energy storage element B2, and the energy storage element B2 supplies power to the load; S6, determining whether the strain value output by the strain detection circuit is greater than a preset strain threshold; if so, executing S7; if not, executing S8; S7, using the first control circuit to turn on the first controllable switch to enable the high-level AC source, and the high-level AC source supplies power to the load through the third energy management circuit; S8: Determine whether the acceleration value detected by the acceleration detection circuit is greater than a preset acceleration threshold; if so, execute S9; if not, execute S10; S9, using the first control circuit to turn on the second controllable switch to enable the low-level AC source, and allowing the low-level AC source to charge the energy storage element B2 through the fourth energy management circuit, and the energy storage element B2 supplies power to the load; S10, using the first control circuit to turn off the first controllable switch and the second controllable switch, and using the energy storage element B2 to supply power to the load.

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