Circuit solving method, device, electronic device and storage medium

Abstract

The present application provides a circuit solving method, device, electronic device and storage medium, the method comprising: obtaining a circuit diagram corresponding to the circuit to be simulated; mapping the circuit diagram to a preset circuit solving model to obtain an equivalent model of the circuit diagram; wherein the circuit solving model is a topological structure compiled by FPGA; and determining the circuit solving result of the circuit to be simulated according to the equivalent model of the circuit diagram. The method provided by the above scheme obtains an equivalent model corresponding to the circuit diagram by mapping the circuit diagram corresponding to the current circuit to be simulated to a topological structure that has been compiled by FPGA, without the need to separately compile the circuit diagram by FPGA, thereby saving the time cost of circuit solving.

Description

Technical Field

[0001] The present application relates to the field of power simulation technology, and in particular to a circuit solving method, device, electronic device and storage medium. Background Art

[0002] With the development of power grid technology, especially with the development of AC / DC hybrid power grid, new requirements have been put forward for circuit simulation technology, such as real-time simulation of power systems, to achieve accurate real-time simulation of power systems to meet the needs of fast power grid solution and hardware-in-the-loop debugging of power grid control and protection equipment.

[0003] In the prior art, circuit solving is usually performed using simulation software / devices based on state variable analysis and response parameter discrete methods. Specifically, the solver is constructed using a field programmable gate array (FPGA), such as products such as EHS real-time simulators.

[0004] However, if circuit solving is performed based on existing technologies, each simulation of different circuits requires time-consuming FPGA compilation, which increases the time cost of circuit solving. Summary of the invention

[0005] The present application provides a circuit solving method, device, electronic device and storage medium to solve the defects of the prior art such as high time cost requirements.

[0006] The first aspect of the present application provides a circuit solving method, comprising:

[0007] Obtain a circuit diagram corresponding to the circuit to be simulated;

[0008] Mapping the circuit diagram into a preset circuit solving model to obtain an equivalent model of the circuit diagram; wherein the circuit solving model is a topological structure compiled by FPGA;

[0009] According to the equivalent model of the circuit diagram, a circuit solution result of the circuit to be simulated is determined.

[0010] Optionally, the circuit solution model is a topological structure consisting of multiple nodes and multiple line segments.

[0011] Optionally, mapping the circuit diagram into a preset circuit solution model includes:

[0012] Acquire attribute information of each electrical component in the circuit diagram;

[0013] The connection relationship of each electrical component in the circuit diagram and the attribute information of each electrical component are mapped into the circuit solution model.

[0014] Optionally, the attribute information of the electrical component includes at least the category and value of the electrical component.

[0015] Optionally, mapping the connection relationship of the electrical components in the circuit diagram and the attribute information of the electrical components into the circuit solution model includes:

[0016] According to the topological structure of the circuit diagram, a target node and a target line segment are extracted from the circuit solution model; wherein the target node corresponds to a circuit node, and the target line segment corresponds to a circuit branch;

[0017] Mapping the connection relationship of each electrical component in the circuit diagram and the attribute information of each electrical component to the corresponding target node and target line segment;

[0018] Other nodes and other line segments in the circuit solution model are eliminated.

[0019] Optionally, the removing other nodes and other line segments in the circuit solution model includes:

[0020] The preset on-state switch or off-state switch is mapped to the other line segment.

[0021] Optionally, determining a circuit solution result of the circuit to be simulated according to the equivalent model of the circuit diagram includes:

[0022] Calculating electrical values ​​of an equivalent model of the circuit diagram;

[0023] According to the electrical value of the equivalent model, a circuit solution result of the circuit to be simulated is determined.

[0024] A second aspect of the present application provides a circuit solving device, comprising:

[0025] An acquisition module, used for acquiring a circuit diagram corresponding to the circuit to be simulated;

[0026] A mapping module, used for mapping the circuit diagram into a preset circuit solving model to obtain an equivalent model of the circuit diagram; wherein the circuit solving model is a topological structure compiled by FPGA;

[0027] A solution module is used to determine a circuit solution result of the circuit to be simulated according to an equivalent model of the circuit diagram.

[0028] Optionally, the circuit solution model is a topological structure consisting of multiple nodes and multiple line segments.

[0029] Optionally, the mapping module is specifically used to:

[0030] Acquire attribute information of each electrical component in the circuit diagram;

[0031] The connection relationship of each electrical component in the circuit diagram and the attribute information of each electrical component are mapped into the circuit solution model.

[0032] Optionally, the attribute information of the electrical component includes at least the category and value of the electrical component.

[0033] Optionally, the mapping module is specifically used to:

[0034] According to the topological structure of the circuit diagram, a target node and a target line segment are extracted from the circuit solution model; wherein the target node corresponds to a circuit node, and the target line segment corresponds to a circuit branch;

[0035] Mapping the connection relationship of each electrical component in the circuit diagram and the attribute information of each electrical component to the corresponding target node and target line segment;

[0036] Other nodes and other line segments in the circuit solution model are eliminated.

[0037] Optionally, the mapping module is specifically used to:

[0038] The preset on-state switch or off-state switch is mapped to the other line segment.

[0039] Optionally, the solution module is specifically used for:

[0040] Calculating electrical values ​​of an equivalent model of the circuit diagram;

[0041] According to the electrical value of the equivalent model, a circuit solution result of the circuit to be simulated is determined.

[0042] A third aspect of the present application provides an electronic device, comprising: at least one processor and a memory;

[0043] The memory stores computer-executable instructions;

[0044] The at least one processor executes the computer-executable instructions stored in the memory, so that the at least one processor performs the method described in the first aspect and various possible designs of the first aspect.

[0045] A fourth aspect of the present application provides a computer-readable storage medium, wherein the computer-readable storage medium stores computer-executable instructions. When a processor executes the computer-executable instructions, the method described in the first aspect and various possible designs of the first aspect are implemented.

[0046] The technical solution of this application has the following advantages:

[0047] The present application provides a circuit solving method, device, electronic device and storage medium, the method comprising: obtaining a circuit diagram corresponding to the circuit to be simulated; mapping the circuit diagram to a preset circuit solving model to obtain an equivalent model of the circuit diagram; wherein the circuit solving model is a topological structure compiled by FPGA; and determining the circuit solving result of the circuit to be simulated according to the equivalent model of the circuit diagram. The method provided by the above scheme obtains an equivalent model corresponding to the circuit diagram by mapping the circuit diagram corresponding to the current circuit to be simulated to a topological structure that has been compiled by FPGA, without the need to separately compile the circuit diagram by FPGA, thereby saving the time cost of circuit solving. BRIEF DESCRIPTION OF THE DRAWINGS

[0048] In order to more clearly illustrate the embodiments of the present application or the technical solutions in the prior art, the drawings required for use in the embodiments or the description of the prior art will be briefly introduced below. Obviously, the drawings described below are some embodiments of the present application, and a person skilled in the art can also obtain other drawings based on these drawings.

[0049] Figure 1 A schematic diagram of the structure of the circuit solving system based on the embodiment of the present application;

[0050] Figure 2 A schematic diagram of a flow chart of a circuit solving method provided in an embodiment of the present application;

[0051] Figure 3 A schematic diagram of the structure of an exemplary circuit solution model provided in an embodiment of the present application;

[0052] Figure 4 A schematic diagram of the structure of an exemplary equivalent model provided in an embodiment of the present application;

[0053] Figure 5 A schematic diagram of the structure of a circuit solving device provided in an embodiment of the present application;

[0054] Figure 6 A schematic diagram of the structure of an electronic device provided in an embodiment of the present application.

[0055] The above drawings have shown clear embodiments of the present application, which will be described in more detail below. These drawings and text descriptions are not intended to limit the scope of the present disclosure in any way, but to illustrate the concepts of the present application to those skilled in the art by referring to specific embodiments. DETAILED DESCRIPTION

[0056] In order to make the purpose, technical solution and advantages of the embodiments of the present application clearer, the technical solution in the embodiments of the present application will be clearly and completely described below in conjunction with the drawings in the embodiments of the present application. Obviously, the described embodiments are part of the embodiments of the present application, not all of the embodiments. Based on the embodiments in the present application, all other embodiments obtained by ordinary technicians in this field without creative work are within the scope of protection of this application.

[0057] In addition, the terms "first", "second", etc. are used for descriptive purposes only and should not be understood as indicating or implying relative importance or implicitly indicating the number of technical features indicated. In the description of the following embodiments, the meaning of "multiple" is more than two, unless otherwise clearly and specifically defined.

[0058] In the prior art, circuit solving is usually performed using simulation software / devices based on state variable analysis and response parameter discrete methods. Specifically, solvers are constructed using field programmable gate arrays (FPGAs), such as EHS real-time simulators and other products. However, if circuit solving is performed based on the prior art, each simulation of different circuits requires time-consuming FPGA compilation, which increases the time cost of circuit solving.

[0059] In response to the above problems, the circuit solving method, device, electronic device and storage medium provided in the embodiments of the present application map the circuit diagram corresponding to the current circuit to be simulated to a topological structure that has been compiled by FPGA, so as to obtain an equivalent model corresponding to the circuit diagram, without the need to perform FPGA compilation on the circuit diagram separately, thereby saving the time cost of circuit solving.

[0060] The following specific embodiments may be combined with each other, and the same or similar concepts or processes may not be described in detail in some embodiments. The embodiments of the present invention will be described below in conjunction with the accompanying drawings.

[0061] First, the structure of the circuit solving system on which this application is based is described:

[0062] The circuit solving method, device, electronic device and storage medium provided in the embodiments of the present application are suitable for real-time simulation of electromagnetic transient calculation of circuits and power systems, and are particularly suitable for real-time simulation of large-scale power systems such as AC / DC power grids and flexible DC transmission. Figure 1 The figure is a schematic diagram of the structure of the circuit solving system based on the embodiment of the present application, which mainly includes a circuit to be simulated, a data acquisition device and a circuit solving device. Specifically, the data acquisition device is used to collect the circuit diagram corresponding to the current circuit to be simulated, and send the circuit diagram to the circuit solving device, which performs circuit solving according to the obtained circuit diagram and generates the corresponding circuit solving result.

[0063] The embodiment of the present application provides a circuit solving method for performing circuit simulation calculation. The execution subject of the embodiment of the present application is an electronic device, such as a server, a desktop computer, a notebook computer, a tablet computer, and other electronic devices that can be used for circuit simulation calculation.

[0064] like Figure 2 FIG. 1 is a flow chart of a circuit solving method provided in an embodiment of the present application, and the method includes:

[0065] Step 201, obtaining a circuit diagram corresponding to a circuit to be simulated.

[0066] Specifically, each branch in the circuit to be simulated can be drawn as an abstract line segment to form a set of circuit nodes and branches, and the formed set is also the circuit diagram corresponding to the circuit to be simulated.

[0067] Step 202 , mapping the circuit diagram into a preset circuit solving model to obtain an equivalent model of the circuit diagram.

[0068] Among them, the circuit solution model is a topological structure compiled by FPGA.

[0069] It should be noted that the embodiment of the present application constructs a solver by a field programmable gate array (FPGA) to achieve parallel calculation of a large amount of data and tasks with the help of FPGA, thereby improving the circuit operation step length. However, when the solver is used to solve the circuit, it is necessary to compile the circuit to be simulated by FPGA in advance. Therefore, the embodiment of the present application uses the topological structure compiled by FPGA to generate an equivalent model corresponding to the circuit to be simulated, saving the process of FPGA compiling the circuit diagram of the circuit to be simulated, that is, saving the time cost of circuit solving.

[0070] The circuit solution model is a topological structure composed of multiple nodes and multiple line segments.

[0071] Specifically, the circuit solution model is a topological structure composed of a fixed number of points and lines, and the circuit solution model can be in any shape, such as a sphere, a plane, and a solid shape. By mapping the node and branch information in the circuit diagram of the circuit to be simulated to the circuit solution model one by one, the equivalence of the circuit solution model and the circuit to be simulated is achieved, that is, an equivalent model of the circuit diagram of the circuit to be simulated is obtained.

[0072] Step 203: Determine the circuit solution result of the circuit to be simulated according to the equivalent model of the circuit diagram.

[0073] Specifically, a solver constructed by a field programmable gate array (FPGA) is used to perform simulation calculations on an equivalent model corresponding to the circuit to be simulated, thereby obtaining a circuit solving result of the circuit to be simulated.

[0074] Specifically, in one embodiment, the electrical magnitude of the equivalent model of the circuit diagram may be calculated; and the circuit solution result of the circuit to be simulated may be determined according to the electrical magnitude of the equivalent model.

[0075] Specifically, the electrical value of the equivalent model can be calculated by using methods such as the node method, branch current method, mesh method, and loop method, and the obtained electrical value is determined as the circuit solution result of the circuit to be simulated. The specific simulation calculation process can refer to the prior art, and the embodiments of this application are not limited thereto.

[0076] On the basis of the above embodiments, since the circuit solution result obtained in the embodiment of the present application is specifically the simulation calculation result of the equivalent model after mapping, therefore, in order to ensure the reliability of the circuit solution result, as an implementable method, in one embodiment, the circuit diagram is mapped to a preset circuit solution model, including:

[0077] Step 2021, obtaining attribute information of each electrical component in the circuit diagram;

[0078] Step 2022, mapping the connection relationship of each electrical component in the circuit diagram and the attribute information of each electrical component into the circuit solution model.

[0079] The attribute information of the electrical component at least includes the category and value of the electrical component.

[0080] It should be noted that electrical components can be classified into resistors, capacitors, inductors, power supplies, switching elements, nonlinear elements, etc. or a combination of several of the above components, where power supplies include uncontrollable power supplies and controllable power supplies. Taking resistors as an example, the corresponding value specifically refers to the resistance value of the resistor.

[0081] Specifically, in one embodiment, target nodes and target line segments can be extracted from the circuit solution model according to the topological structure of the circuit diagram; wherein the target nodes correspond to circuit nodes, and the target line segments correspond to circuit branches; the connection relationship of each electrical component in the circuit diagram and the attribute information of each electrical component are mapped to the corresponding target nodes and target line segments; and other nodes and other line segments in the circuit solution model are eliminated.

[0082] It should be noted that if the topology of the currently used circuit solution model is simple and insufficient to describe the current circuit to be simulated, you can replace the circuit solution model with another type of topology and try again until you select an available circuit solution model.

[0083] Specifically, the electrical value of the circuit to be simulated can be calculated based on the connection relationship of the electrical components corresponding to each target node and target line segment in the circuit diagram and the attribute information of each electrical component. In addition, the relationship between nodes and branches in the preset circuit solution model is fixed, and the components connected to each node and their connections are determined, which saves the circuit traversal process, reduces the circuit association matrix and operation links, thereby reducing the mathematical calculation amount of circuit solution, improving the circuit solution rate, helping to increase the simulation step length, and saving circuit simulation time.

[0084] Specifically, in one embodiment, in order to prevent other nodes and other line segments in the circuit solving model from affecting the circuit solving result, the preset on-state switch or off-state switch may be mapped to other line segments.

[0085] Specifically, by mapping the closed-state switches or the open-state switches on the idle segments (other segments), these idle segments are equivalent to the open-state switches or the open-state switches, so as to achieve the effect of eliminating these idle segments.

[0086] For example, in order to facilitate those skilled in the art to better understand the circuit solving method provided in the embodiment of the present application, Figure 3 As shown, it is a schematic diagram of the structure of an exemplary circuit solution model provided in an embodiment of the present application, such as Figure 4 , which is a schematic diagram of an exemplary equivalent model provided in an embodiment of the present application. Figure 4 The equivalent model shown is obtained by Figure 4 The circuit diagram in is mapped to Figure 3 The circuit shown is obtained by solving the model.

[0087] Specifically, the cube (circuit solution model) contains 12 lines and 8 points, which represent 12 components and 8 nodes respectively. According to the circuit equivalence principle, the circuit diagram on the left is mapped to the cube on the right. There are many mapping results that meet the circuit equivalence. This embodiment provides one of the mapping results.

[0088] The details are as follows:

[0089] Point b of the cube corresponds to node 1 of the actual circuit, and e, f, and g of the cube correspond to nodes 2, 3, and 4 of the circuit diagram. Lines ef, fg, bf, ae, and cg are considered as components R1, R2, L1, V1, and C1 in the circuit diagram; in order to be equivalent to the circuit, ab and bc are equivalent to wires or closed switches, and the rest of the lines are equivalent to broken wires or open switches.

[0090] At this point, every node and element of the actual circuit is reflected in the cube. After setting the remaining lines of the cube to the switch state or split state, the current cube circuit (equivalent model) is completely equivalent to the actual circuit (circuit to be simulated). By solving the fixed cube, the actual circuit can be solved.

[0091] It should be noted that, for the circuit solution model provided in the embodiment of the present application, as long as it contains enough nodes, lines and complexity, theoretically any actual circuit can be mapped and solved therein.

[0092] The circuit solving method provided in the embodiment of the present application obtains the circuit diagram corresponding to the circuit to be simulated; maps the circuit diagram to a preset circuit solving model to obtain an equivalent model of the circuit diagram; wherein the circuit solving model is a topological structure compiled by FPGA; and determines the circuit solving result of the circuit to be simulated according to the equivalent model of the circuit diagram. The method provided by the above scheme obtains the equivalent model corresponding to the circuit diagram by mapping the circuit diagram corresponding to the current circuit to be simulated to a topological structure compiled by FPGA, without the need to compile the circuit diagram by FPGA separately, thus saving the time cost of circuit solving. Moreover, since the topological structure of the circuit solving model is fixed, the association matrix and operation links of the circuit are reduced, thereby reducing the amount of mathematical calculations for circuit solving, improving the circuit solving rate, and further saving the time cost of circuit solving.

[0093] An embodiment of the present application provides a circuit solving device for executing the circuit solving method provided in the above embodiment.

[0094] like Figure 5 , which is a schematic diagram of the structure of a circuit solving device provided in an embodiment of the present application. The circuit solving device 50 comprises an acquisition module 501 , a mapping module 502 and a solving module 503 .

[0095] Among them, the acquisition module is used to obtain the circuit diagram corresponding to the circuit to be simulated; the mapping module is used to map the circuit diagram to a preset circuit solution model to obtain an equivalent model of the circuit diagram; wherein the circuit solution model is a topological structure compiled by FPGA; the solution module is used to determine the circuit solution result of the circuit to be simulated based on the equivalent model of the circuit diagram.

[0096] Specifically, in one embodiment, the circuit solving model is a topological structure consisting of a plurality of nodes and a plurality of line segments.

[0097] Specifically, in one embodiment, the mapping module is specifically used to:

[0098] Obtain the attribute information of each electrical component in the circuit diagram;

[0099] The connection relationship of each electrical component in the circuit diagram and the attribute information of each electrical component are mapped into the circuit solution model.

[0100] Specifically, in one embodiment, the attribute information of the electrical component includes at least the category and value of the electrical component.

[0101] Specifically, in one embodiment, the mapping module is specifically used to:

[0102] According to the topological structure of the circuit diagram, the target node and the target line segment are extracted from the circuit solution model; wherein the target node corresponds to the circuit node, and the target line segment corresponds to the circuit branch;

[0103] Mapping the connection relationship of each electrical component in the circuit diagram and the attribute information of each electrical component to the corresponding target node and target line segment;

[0104] Eliminate other nodes and other line segments in the circuit solution model.

[0105] Specifically, in one embodiment, the mapping module is specifically used to:

[0106] Map the preset on-state switch or off-state switch to other line segments.

[0107] Specifically, in one embodiment, the solution module is specifically used to:

[0108] Calculate the electrical quantities of the equivalent model of the circuit diagram;

[0109] According to the electrical value of the equivalent model, the circuit solution result of the circuit to be simulated is determined.

[0110] Regarding the circuit solving device in this embodiment, the specific manner in which each module performs operations has been described in detail in the embodiment of the method, and will not be elaborated here.

[0111] The circuit solving device provided in the embodiment of the present application is used to execute the circuit solving method provided in the above embodiment. Its implementation method and principle are the same and will not be repeated here.

[0112] An embodiment of the present application provides an electronic device for executing the circuit solving method provided in the above embodiment.

[0113] like Figure 6 , which is a schematic diagram of the structure of an electronic device provided in an embodiment of the present application. The electronic device 60 includes: at least one processor 61 and a memory 62;

[0114] The memory stores computer-executable instructions; at least one processor executes the computer-executable instructions stored in the memory, so that the at least one processor executes the circuit solving method provided in the above embodiment.

[0115] An electronic device provided in an embodiment of the present application is used to execute the circuit solving method provided in the above embodiment. Its implementation method and principle are the same and will not be repeated here.

[0116] An embodiment of the present application provides a computer-readable storage medium, in which computer-executable instructions are stored. When a processor executes the computer-executable instructions, the circuit solving method provided in any of the above embodiments is implemented.

[0117] The storage medium containing computer executable instructions in the embodiment of the present application can be used to store computer executable instructions of the circuit solving method provided in the aforementioned embodiment. Its implementation method and principle are the same and will not be repeated here.

[0118] In the several embodiments provided in the present application, it should be understood that the disclosed devices and methods can be implemented in other ways. For example, the device embodiments described above are only schematic. For example, the division of the units is only a logical function division. There may be other division methods in actual implementation, such as multiple units or components can be combined or integrated into another system, or some features can be ignored or not executed. Another point is that the mutual coupling or direct coupling or communication connection shown or discussed can be through some interfaces, indirect coupling or communication connection of devices or units, which can be electrical, mechanical or other forms.

[0119] The units described as separate components may or may not be physically separated, and the components shown as units may or may not be physical units, that is, they may be located in one place or distributed on multiple network units. Some or all of the units may be selected according to actual needs to achieve the purpose of the solution of this embodiment.

[0120] In addition, each functional unit in each embodiment of the present application may be integrated into one processing unit, or each unit may exist physically separately, or two or more units may be integrated into one unit. The above-mentioned integrated unit may be implemented in the form of hardware or in the form of hardware plus software functional units.

[0121] The above-mentioned integrated unit implemented in the form of a software functional unit can be stored in a computer-readable storage medium. The above-mentioned software functional unit is stored in a storage medium, including a number of instructions for a computer device (which can be a personal computer, a server, or a network device, etc.) or a processor to perform some steps of the method described in each embodiment of the present application. The aforementioned storage medium includes: U disk, mobile hard disk, read-only memory (ROM), random access memory (RAM), disk or optical disk and other media that can store program code.

[0122] Those skilled in the art can clearly understand that for the convenience and simplicity of description, only the division of the above-mentioned functional modules is used as an example for illustration. In actual applications, the above-mentioned functions can be assigned to different functional modules as needed, that is, the internal structure of the device is divided into different functional modules to complete all or part of the functions described above. The specific working process of the device described above can refer to the corresponding process in the aforementioned method embodiment, and will not be repeated here.

[0123] Finally, it should be noted that the above embodiments are only used to illustrate the technical solutions of the present application, rather than to limit it. Although the present application has been described in detail with reference to the aforementioned embodiments, those skilled in the art should understand that they can still modify the technical solutions described in the aforementioned embodiments, or replace some or all of the technical features therein with equivalents. However, these modifications or replacements do not cause the essence of the corresponding technical solutions to deviate from the scope of the technical solutions of the embodiments of the present application.

Claims

1. A circuit solving method, characterized in that: include: Obtain a circuit diagram corresponding to the circuit to be simulated; Mapping the circuit diagram into a preset circuit solving model to obtain an equivalent model of the circuit diagram; wherein the circuit solving model is a topological structure compiled by FPGA; Determining a circuit solution result of the circuit to be simulated according to the equivalent model of the circuit diagram; The circuit solution model is a topological structure composed of a fixed number of nodes and multiple line segments; the circuit solution model is a spherical, flat or solid shape; Mapping the circuit diagram into a preset circuit solution model includes: Acquire attribute information of each electrical component in the circuit diagram; Mapping the connection relationship of each electrical component in the circuit diagram and the attribute information of each electrical component into the circuit solution model; The step of mapping the connection relationship of the electrical components in the circuit diagram and the attribute information of the electrical components into the circuit solution model includes: According to the topological structure of the circuit diagram, a target node and a target line segment are extracted from the circuit solution model; wherein the target node corresponds to a circuit node, and the target line segment corresponds to a circuit branch; Mapping the connection relationship of each electrical component in the circuit diagram and the attribute information of each electrical component to the corresponding target node and target line segment; Eliminate other nodes and other line segments in the circuit solution model; The removing of other nodes and other line segments in the circuit solution model includes: The preset on-state switch or off-state switch is mapped to the other line segment.

2. The method according to claim 1, characterized in that: The attribute information of the electrical component at least includes the category and value of the electrical component.

3. The method according to claim 1, characterized in that Determining a circuit solution result of the circuit to be simulated according to the equivalent model of the circuit diagram includes: Calculating electrical values ​​of an equivalent model of the circuit diagram; According to the electrical value of the equivalent model, a circuit solution result of the circuit to be simulated is determined.

4. A circuit solving device, characterized in that: include: An acquisition module, used for acquiring a circuit diagram corresponding to the circuit to be simulated; A mapping module, used for mapping the circuit diagram into a preset circuit solving model to obtain an equivalent model of the circuit diagram; wherein the circuit solving model is a topological structure compiled by FPGA; A solution module, used for determining a circuit solution result of the circuit to be simulated according to an equivalent model of the circuit diagram; The circuit solution model is a topological structure composed of a fixed number of nodes and multiple line segments; the circuit solution model is a spherical, flat or solid shape; The mapping module is used to: Acquire attribute information of each electrical component in the circuit diagram; Mapping the connection relationship of each electrical component in the circuit diagram and the attribute information of each electrical component into the circuit solution model; The mapping module is specifically used for: According to the topological structure of the circuit diagram, a target node and a target line segment are extracted from the circuit solution model; wherein the target node corresponds to a circuit node, and the target line segment corresponds to a circuit branch; Mapping the connection relationship of each electrical component in the circuit diagram and the attribute information of each electrical component to the corresponding target node and target line segment; Eliminate other nodes and other line segments in the circuit solution model; The mapping module is specifically used for: The preset on-state switch or off-state switch is mapped to the other line segment.

5. An electronic device, characterized in that: include: at least one processor and memory; The memory stores computer-executable instructions; The at least one processor executes the computer-executable instructions stored in the memory, so that the at least one processor performs the method according to any one of claims 1 to 3.

6. A computer-readable storage medium, characterized in that: The computer-readable storage medium stores computer-executable instructions, and when a processor executes the computer-executable instructions, the method according to any one of claims 1 to 3 is implemented.

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