Semiconductor mask reshaping using a sacrificial layer

Abstract

The present disclosure provides methods and related apparatuses for mask reconstruction in an etching process. The method involves depositing a sacrificial layer on a mask layer. The sacrificial layer can be used to protect portions of the mask layer during reformation by suppressing etching of the mask layer or deposition thereon. After the mask reformation process, an etching process identical to that used for etching the target material can be utilized to remove the sacrificial layer.

Description

[0001] Cross - reference to related applications

[0002] The PCT application form is filed simultaneously with this specification as part of this application. Each application for which this application claims the benefit or priority as identified in the PCT application form filed simultaneously is incorporated herein by reference in its entirety and for all purposes Background of the invention

[0003] Plasma etching processes for target materials to form patterned structures use a patterned mask layer to etch the underlying target material. Mask selectivity (which is the ratio of the etching rate between the target material and the mask layer) is an important factor in the etching process because the mask should be etched at a lower rate than the target material. The thickness and shape of the mask layer are also important factors affecting the etching process of the target material. The thickness of the mask layer is partly defined by the mask selectivity, and the shape of the mask layer causes ion scattering, sputtering, and redeposition behavior.

[0004] The etching process of the target material may also remove mask material or deform the mask layer. The interaction between the etching chemical and the mask material may change the thickness and shape of the patterned mask layer before the target layer is fully etched. If the etching process continues with a deformed mask, the shape change of the patterned mask layer may affect the etching process and cause an undesired effect on the final etching characteristics of the target material. Summary of the invention

[0005] Methods and systems for re - shaping a mask layer during an etching process of a target material are disclosed herein. A sacrificial layer is used to re - shape the mask layer by suppressing the deposition or etching of the mask material. Then, the sacrificial layer is removed during a subsequent etching process of the target material.

[0006] In one aspect of the embodiments herein, a method of re - shaping a mask layer includes: providing a substrate to a processing chamber, the substrate including a patterned mask layer disposed on a target layer to be etched, the target layer including a first material having a first etching rate with respect to a first etching chemical, and the patterned mask layer including a second material having a second etching rate with respect to the first etching chemical, wherein the first etching rate is higher than the second etching rate; depositing a sacrificial layer on the patterned mask layer, the sacrificial layer including a third material having a third etching rate with respect to the first etching chemical, the third etching rate being higher than the second etching rate; and etching the patterned mask layer with a second etching chemical, wherein the sacrificial layer inhibits the etching of the patterned mask layer covered by the sacrificial layer.

[0007] In various implementations, the first material and the third material are similar. In some such cases, the third material has a chemical composition that is at least 50%, at least 75%, or at least 90% atomically identical to the first material.

[0008] In some embodiments, the third etch rate differs from the first etch rate by within a range of ±50% or ±10% (the third etch rate is the same as the first etch rate within 50%, inclusive, or 10%, inclusive). In some cases, the etch rate of the second material relative to the second etch chemical is higher than the etch rates of the first material and the third material relative to the second etch chemical.

[0009] In certain embodiments, the second material is deposited on the patterned mask layer before depositing the sacrificial layer. In certain embodiments, the second material is deposited on the patterned mask layer after depositing the sacrificial layer.

[0010] In some embodiments, the second material is a silicon oxide-based or silicon nitride-based material, and the first material and the third material are silicon-based materials. In other embodiments, the second material is a silicon oxynitride-based material, and the first material and the third material are carbon-based materials. In some implementations, the second material is a carbon-based material, and the first material and the third material are silicon oxide-based or silicon oxynitride-based materials. In various embodiments, the second material is a silicon-based material, and the first material and the third material are silicon oxide-based or silicon nitride-based materials. In various embodiments, the second material is a silicon oxide-based or silicon nitride-based material, and the first material and the third material are tungsten-based materials.

[0011] In certain embodiments, the sacrificial layer is deposited by plasma enhanced chemical vapor deposition (PECVD) processing. In some embodiments, the sacrificial layer is deposited by high density plasma chemical vapor deposition (HDP-CVD) processing. In some embodiments, the deposition step and the etch step are performed in the same processing chamber.

[0012] These and other features of the disclosed embodiments will be described in detail below with reference to the related drawings. BRIEF DESCRIPTION OF THE DRAWINGS

[0013] Figure 1 A flowchart showing the operations for an exemplary embodiment is shown.

[0014] Figure 2 Shows a diagram of an exemplary embodiment.

[0015] Figure 3 Shows another diagram of an exemplary embodiment.

[0016] Figure 4 And 5 Is a schematic diagram of an example of a processing chamber for performing a method according to the disclosed embodiments. Detailed Description

[0017] In the following description, numerous specific details are set forth to provide a thorough understanding of the presented embodiments. The disclosed embodiments may be practiced without some or all of these specific details. In other instances, well-known processing operations are not described in detail to avoid unnecessarily obscuring the disclosed embodiments. Additionally, while the disclosed embodiments will be described in conjunction with specific embodiments, it should be understood that the specific embodiments are not intended to limit the disclosed embodiments.

[0018] The plasma etching process of the target material uses a patterned mask layer above the target material. The patterned mask layer may also be referred to as a mask layer, a patterned mask, or a mask. Various techniques capable of achieving specific patterning can be utilized to deposit the material forming the mask layer. The mask layer serves as a shield for the underlying film layer during the etching process, and the etching process removes the material not protected by the mask layer. After the target material has been etched sufficiently, the mask layer can be removed in a subsequent process, leaving the target material etched according to the pattern.

[0019] An important characteristic of the mask is its etching selectivity with respect to the target material. Etching selectivity is the ratio of the etching rates between two different materials for a given etching chemical. In this discussion, the etching selectivity can be the ratio between the target material and the mask material for a specific etching chemical. The mask can have one etching rate for a given etching chemical and a higher or lower etching rate for different etching chemicals. The target material also has different etching rates for various etching chemicals. In the etching process, the target material generally has a higher etching rate than the mask material for a selected etching chemical, i.e., the target material has a high etching selectivity with respect to the mask material. The high etching selectivity enables the use of a thin mask layer when etching a much thicker target layer because the mask material is etched at a much slower rate than the target material. For a specific combination of mask material, target material, and etching chemical, the etching selectivity can be 5:1, 10:1, 20:1, or higher.

[0020] During an etching process, a mask layer may be deformed in various ways. In some cases, the etching process causes the mask layer to become faceted, which may lead to ion scattering, resulting in undesired etching of the sidewalls of the structure being etched. In some cases, the mask layer is etched sufficiently to expose the underlying layer, which would be etched if the process continues.

[0021] The etching process may also cause sputter redeposition of the mask material. When the mask material is etched, the removed material may be deposited back onto the substrate in an undesired manner. The mask material may be redeposited in a non-selective manner, increasing the mask critical dimension and reducing the space above the feature to be etched. This can clog the gaps and prevent ions from properly etching the target material, or cause non-uniform etching of the target material. Improperly etched features may result in local critical dimension variability, line edge roughness, insufficient feature depth, and reduced process yield.

[0022] The mask layer can be reshaped to avoid undesired results and improve yield. Some schemes for reshaping the mask layer include selective etching of the mask layer and deposition of additional material, which can be the same or different material as the mask material. Etching the mask layer may reduce the mask critical dimension, but it reduces the mask thickness and poses a selectivity challenge because the mask thickness may not be sufficient to complete the etching process, which is undesirable. Mask material deposition increases the mask thickness, but it may also increase the mask critical dimension, which is undesirable.

[0023] Another method of creating a reshaped mask layer is to deposit a sacrificial layer on the mask layer. The sacrificial layer can be used to protect the mask layer during reshaping by inhibiting etching or deposition of the mask layer. Directional deposition of the sacrificial layer can be used to protect the top and sidewalls of the mask layer and at the same time enable etching of the exposed mask. The sacrificial material has a high etching selectivity relative to the mask for at least one etching chemical. After mask reshaping, the same etching process used to etch the target material is used to remove the sacrificial layer.

[0024] Figure 1 A program flowchart is provided for performing the operations of the method according to the disclosed embodiments. Figure 1 The method shown can be performed as part of a process for etching a target material. It begins at operation 102, in which a semiconductor substrate including a target layer and a patterned mask layer is provided to a processing chamber. The semiconductor substrate may be in the processing chamber from a previous operation or may be introduced into the processing chamber.

[0025] The semiconductor substrate can be silicon or other semiconductor wafers (e.g., 200 - mm wafers, 300 - mm wafers, or 450 - mm wafers), including wafers with one or more layers of material (e.g., dielectric, conductive, or semiconductor materials) deposited thereon. In certain embodiments, the semiconductor substrate includes a capping layer of silicon (such as amorphous silicon) or a capping layer of germanium. The semiconductor substrate can also include a patterned mask layer pre - deposited and patterned on the semiconductor substrate.

[0026] The mask layer can be any suitable material, including organic or inorganic hard masks. Examples of organic masks include doped or undoped amorphous carbon (also known as ashing - hard masks or AHMs) and organosiloxane materials. Examples of inorganic mask materials include polycrystalline and amorphous silicon (poly - Si, a - Si), silicon oxide (SiO), silicon nitride (SiN), silicon oxynitride (SiON), silicon carbonitride (SiCN), titanium nitride (TiN), tungsten (W), and other metals that can be selectively removed after feature etching. The mask can be doped, such as boron - doped AHM. In certain embodiments, the mask can be a metal mask (MHM), examples of which include metals (such as aluminum (Al) and tungsten (W)), metal nitrides (such as TiN and tantalum nitride (TaN)), and metal oxides (such as aluminum oxide (Al2O3)). In certain embodiments, the mask can be a ceramic hard mask (CHM).

[0027] In certain embodiments, the layer on the substrate can be patterned. The substrate can have "features" such as vias or contact holes, which can have one or more of the following characteristics: narrow and / or recessed openings, constrictions within the feature, or high aspect ratios. The features can be formed in one or more of the above - mentioned layers by etching the substrate. An example of a feature is a hole or via in the semiconductor substrate or a layer on the substrate. Another example is a trench in the substrate or layer. In many embodiments, the feature can have an underlying layer, such as a barrier layer or an adhesion layer. Non - limiting examples of underlying layers include dielectric layers and conductive layers, such as silicon oxide, silicon nitride, silicon carbide, metal oxides, metal nitrides, metal carbides, and metal layers.

[0028] The processing chamber itself can be an etching chamber in which plasma etching of the underlying material is performed. Examples of the chamber are described below with reference to Figure 4 and 5 description.

[0029] In operation 104, a sacrificial material is deposited on the patterned mask layer. The sacrificial material is typically deposited "preferentially" for specific regions of the patterned mask layer. For example, in some embodiments, the sacrificial material is preferentially deposited over features of the patterned mask layer, while significantly less sacrificial material is deposited on the sidewalls of the patterned mask layer. The choice of deposition location of the sacrificial material depends on how the re-shaped mask layer is to be formed, as further discussed below. The deposition of the sacrificial material is further discussed below.

[0030] In operation 106, the mask layer is re-shaped. In some embodiments, operation 106 involves exposing the mask layer and the sacrificial material to a plasma etch. The pre-deposited sacrificial material protects the mask layer during the etch process. The sacrificial material acts as an individual mask for the etched mask layer; inhibiting the etching of the covered regions of the mask layer. The etch chemical used to etch the mask layer should be selective for the mask relative to the sacrificial material, such that the etch rate of the mask is higher than the etch rate of the sacrificial material. The etch process removes the mask material where the sacrificial material was not deposited. Thus, if the sacrificial material substantially covers the top of the patterned mask but not the sidewalls, the etch process will remove the sidewall mask material but will not reduce the mask thickness.

[0031] In some embodiments, operation 106 involves depositing additional mask material, thereby increasing the thickness or critical dimension of the mask. The critical dimension of the mask is the width of an individual mask feature. A smaller or reduced critical dimension of the mask can lead to faceting of the mask feature and deflection of the etch ions, while a larger or increased critical dimension of the mask can lead to clogging at the top of the etched feature. In some embodiments, additional mask material can be deposited by an ion-driven deposition process. This can involve applying a voltage bias to the substrate during a plasma deposition process to deposit the additional mask material on the sacrificial layer. Some mask materials can also be deposited at the bottom of the target layer features; the thickness of any such material is small enough so as not to substantially affect subsequent target etching.

[0032] In an alternative embodiment, additional mask material is deposited by a selective deposition process, where the additional mask material is chemically selective for the mask relative to the sacrificial layer. The mask material does not deposit, or deposits in significantly lesser amounts, on the sacrificial material, thereby increasing only the mask dimensions where the sacrificial material was not deposited. Thus, if the sacrificial material substantially covers the top of the patterned mask but not the sidewalls, the deposition process will increase the sidewall thickness and critical dimension, but will not increase the mask thickness.

[0033] After reshaping the mask layer, in operation 108, the target layer is etched. In some embodiments, the target material and the sacrificial layer have similar or the same etch rate for the etch chemistry used in the etch process for the target material. The similar etch rate of the target layer and the sacrificial layer is such that the etch selectivity of the sacrificial layer relative to the target layer is 1:1 - 2:1. In some embodiments, the etch rate of the sacrificial layer is within 50% of the etch rate for the target layer, or within 90% of the etch rate for the target layer. In some embodiments, this enables removal of the sacrificial material without a separate etch step for the sacrificial layer; it is removed as an effect of etching the target layer. This reduces the total time to complete the etching of the target layer. In some embodiments, a separate etch process may be performed prior to operation 108 to remove the sacrificial layer. When the sacrificial material is removed, the mask material deposited thereon during operation 106 may be removed. The additional mask material may be thin enough to be removed during the target etch process. Alternatively, a separate etch process may be performed.

[0034] In some embodiments, the sacrificial material is deposited and the mask layer is reshaped after some etch process has been performed on the target layer and the mask layer has been deformed. In other embodiments, the sacrificial material is deposited and the mask layer is reshaped before any etch process is performed on the target layer. In some embodiments, the reshaping process is performed cyclically, depositing the sacrificial material and reshaping the mask layer after one or more etch processes have been performed on the target layer. Operations 104 - 108 may be repeated as needed until the target layer has been sufficiently etched.

[0035] In some embodiments, additional mask material is deposited before depositing any sacrificial material in operation 104. This can increase the thickness and critical dimension of the mask layer. In cases where the mask thickness is to be increased during the reshaping process, this intermediate step enables increasing the mask thickness before depositing the sacrificial material. Subsequently, the sacrificial material can be used as a mask to maintain the mask thickness during mask reshaping in operation 106.

[0036] In some embodiments, the deposited sacrificial material has etch by-products or residues similar to the target layer. As described above, Figure 1The processing of can omit the etching of the independent sacrificial material and remove the sacrificial material during the etching process of the target layer. By appropriately selecting the sacrificial material, the by-products and residues generated by etching the sacrificial material are the same as or similar to those of the target layer and can be removed by the same process. This can save time and reduce defects compared to using different materials removed by a third etching chemical or a separate cleaning operation.

[0037] In some embodiments, the sacrificial material is the same material as the target material or similar to the target material. The similarity is defined as sharing at least 50% molar percentage of the chemical composition. In some embodiments, these materials share at least 75% molar percentage of the chemical composition, or at least 90% molar percentage of the chemical composition. For example, if the target material is doped silicon, the sacrificial material can be doped or undoped silicon.

[0038] As shown in Table 1 below, examples of sacrificial layers that can be used for specific target layer and mask layer combinations, as well as the relevant etching chemicals, are presented.

[0039]

[0040] In some embodiments, both the sacrificial material and the target material are silica-based materials. In some embodiments, both the sacrificial material and the target material are silicon nitride-based materials. In some embodiments, both the sacrificial material and the target material are silicon oxynitride-based materials. In some embodiments, both the sacrificial material and the target material are carbon-based materials. In some embodiments, both the sacrificial material and the target material are elemental metal-based materials. In some embodiments, both the sacrificial material and the target material are tungsten-based materials. In some embodiments, both the sacrificial material and the target material are dielectric-based materials. In some embodiments, both the sacrificial material and the target material are oxide-based materials. In some embodiments, both the sacrificial material and the target material are nitride-based materials.

[0041] As used herein, if an element or compound accounts for at least 50% molar percentage of a material, then the material is "based on" that element or compound. In some embodiments, two materials can have at least 75% or 90% molar percentage of the same element or compound.

[0042] Figure 1An example of the method is high aspect ratio carbon etching. The target material is amorphous carbon, and the mask material is SiO2, SiN, SiON, or Si. The typical target layer thickness is 100 nm to 3 µm, while the mask layer thickness is 20 nm - 200 nm, and the critical dimension of the feature pitch is 20 nm - 300 nm. A selectivity of 10:1 or higher is required. The shape of the mask has a great influence on profile control, etch front depth variation, and the local critical dimension uniformity and roundness of the mask opening pits. Due to the high aspect ratio of the mask width compared to the feature depth, high ion energy etching is used, and mask faceting due to mask material sputtering is a common side effect. The faceted mask can result in a larger "bent" shape due to ion scattering, and the sputtered mask redeposited on adjacent features can cause mask critical dimension growth (and pitch critical dimension reduction), which can lead to "clogging" of the top opening of the feature. For line / space or hole / post patterns, any randomly clogged gaps can lead to not-open issues, local CD variability, and line edge roughness / roundness degradation.

[0043] Deposit a sacrificial layer containing amorphous carbon on the mask. Then, etch the mask to trim the sidewalls of the mask. The result is a reduction in the mask critical dimension, which enables the target layer etching process to continue with a reduced chance of defects occurring.

[0044] The following refers to Figure 2 and 3 to discuss Figure 1 specific examples of the method. First, Figure 2 shows an exemplary embodiment of a side view of a semiconductor substrate during mask reformation during an etching process. In operation 200, a target layer 201 with a patterned mask layer 205 thereon is provided to the processing chamber. (As described above, what is provided to the processing chamber can include a substrate introduced into the chamber and a substrate held there from a previous operation). At this stage, the patterned mask layer 205 has a uniform shape, which is obtained by methods well known to those skilled in the art for generating a patterned mask layer. In particular, the mask sidewall 206 has a vertical profile.

[0045] At operation 210, the target layer 201 has been etched to depth 211. Due to the high etch selectivity of the patterned mask layer 205 relative to the target layer 201, the target layer 201 is etched at a high rate while the patterned mask layer 205 is etched at a much lower rate. The etch process also deforms the patterned mask into a mask body 215, resulting in a reduced thickness and a mushroom effect that increases the mask critical dimension, which leads to a mask sidewall 216. The mushroom effect of the mask body 215 and the mask sidewall 216 or the necking effect of the feature spacing inhibits the etch process from etching within the well region, which is undesirable.

[0046] In some embodiments, at operation 220, additional mask material is deposited on the mask body 215 to increase its thickness. Since the patterned mask layer 205 is deformed, the mask thickness may be insufficient to provide the desired etch selectivity. The thickness can be increased by depositing additional mask material, but the material deposits conformally, increasing the size of the mushroom and further exacerbating the necking problem. Depositing the additional mask material produces a grown mask 225, which further increases the mask critical dimension, resulting in a mask sidewall 226. In some embodiments, operation 220 may be omitted and operation 230 may be performed after operation 210.

[0047] At operation 230, a sacrificial layer 238 is deposited. The sacrificial layer 238 may be preferentially deposited such that there is more deposition on the top than the sides of the grown mask 225. Since the mask material has a high etch selectivity relative to the sacrificial material, the sacrificial layer 238 protects and maintains the thickness of the patterned mask while the etch process trims the sides of the grown mask 225. In some embodiments, the sacrificial material for the sacrificial layer 238 is the same material that composes the target layer 201. In other embodiments, the sacrificial material may not be the same material but has etch by-products similar to the target layer 201. In embodiments where operation 220 is omitted, the sacrificial layer 238 is deposited on the mask body 215.

[0048] At operation 240, the grown mask 225 is etched. The mask sidewall 246 of the patterned mask layer is etched back to the desired critical dimension. Since the sacrificial layer 238 has a low etch selectivity relative to the mask material, the sacrificial layer 238 is retained along with the thickness of the grown mask 225. In embodiments where operation 220 is omitted, instead, the mask body 215 is etched.

[0049] At operation 250, the etching process of the substrate continues to a second depth 251. Since the sacrificial material 238 has an etching rate and residues similar to those of the target layer 201 being etched, continuing to etch the target layer 201 may remove the sacrificial material 238. No separate process is required to remove the sacrificial material or any residues resulting from its etching because the residues from the sacrificial material are of the same type as the etched substrate layer. The mask is also re-shaped into a re-shaped mask 255, which is the same as or similar to the patterned mask layer 205 in operation 200. In embodiments where operation 220 is omitted, the re-shaped mask 255 may have a smaller thickness than the patterned mask layer 205 in operation 200.

[0050] In some embodiments, operations 210-250 may be repeated multiple times. As described above, when etching features, the mask layer may deform and become fixed, and when etching to additional depths, the mask layer will deform again and become fixed again. Operations 210-250 may be repeated as needed until the features are etched sufficiently.

[0051] Figure 3 Another embodiment of the present invention is shown, which relates to faceting of the patterned mask layer. Similar to the above, in operation 300, a semiconductor substrate is provided into the processing chamber. In this example, in operation 310, the target material is etched to a depth 311, and the patterned mask layer is etched directionally at the top corners and sidewalls, resulting in a faceted mask 315.

[0052] Faceting is not desirable because it may cause ion deflection during the etching process. The deflected ions may strike the sidewalls of the features being etched, thereby etching the sidewalls. Sidewall 313 shows what may occur during an etching process with a faceted mask. Sidewall 313 is curved inward, which increases the volume of the etched feature and reduces the material separating the features. The curved sidewalls may affect downstream operations, requiring additional materials beyond what was originally planned to fill the etched features. The curved sidewalls may also reduce the ability of the insulating material to electrically isolate the features, thereby hindering normal operation and reducing the overall yield of the wafer. The degree of sidewall etching may vary depending on the degree of mask faceting.

[0053] In some embodiments, the sidewalls are not etched during operation 310. Sidewall etching is shown in this example to illustrate what may occur when the etching process continues after the mask becomes faceted. In some embodiments, the sidewalls are not etched during operations 310-340 because the mask is modified according to the present disclosure before sidewall etching occurs.

[0054] At operation 320, a sacrificial layer 328 is deposited. The sacrificial layer 328 may be preferentially deposited such that more deposition occurs on top of the patterned mask layer than on the sides. The sacrificial layer 328 serves as a barrier layer for additional mask material deposition. Mask material will not be deposited over the sacrificial layer 328 or will be removed when the underlying sacrificial layer 328 is removed.

[0055] Operations 330A and 330B are alternative methods for depositing additional mask material. In some embodiments, operation 330A or 330B is performed, while in other embodiments, both operations may be performed. In operation 330A, additional mask material is deposited by a selective deposition process that selectively deposits on the faceted mask 315 to form a mask 335. The sacrificial layer 328 inhibits deposition over the faceted mask 315, where the sacrificial layer 328 covers the patterned mask layer such that deposition occurs only on the sidewalls of the faceted mask 315. This operation increases the critical dimension of the mask without increasing its thickness.

[0056] In operation 330B, additional mask material is deposited by an ion-driven deposition process to form a mask 335. The ion-driven deposition process deposits on the sacrificial layer 328, creating a cap 339. The ion-driven deposition process preferentially deposits on the top surface of the sacrificial layer 328; deposition conditions can be controlled to avoid encapsulating the sacrificial layer 328. The sacrificial layer 328 serves as an intermediate layer between the cap 339 and the mask 335.

[0057] In operation 340, the target material is etched to a second depth 341. Due to similar etch rates and residues, the sacrificial layer 328 is removed via the etching process of the target material. In some embodiments, no separate process is used to remove the sacrificial layer, reducing complexity and increasing process time. The cap 339 may be thin enough to be removed during the target etching process or may be removed via a separate process. The remaining mask 335 continues to serve as a protective layer over the target material, as it did in operation 300.

[0058] In some embodiments, operations 310 - 340 may be repeated multiple times. As described above, when etching features, the mask layer may deform and become fixed, and after etching to an additional depth, the mask layer will deform and become fixed again. Operations 310 - 340 may be repeated as needed until the features are sufficiently etched.

[0059] Deposition of Sacrificial Material

[0060] According to many embodiments, the deposition of the sacrificial material can be plasma deposition, which includes plasma enhanced chemical vapor deposition (PECVD) processing or high density plasma chemical vapor deposition (HDP-CVD) processing. In embodiments where the etching process is performed in a capacitively coupled plasma etching apparatus, the PECVD process can be advantageously performed, while in embodiments where the etching process is performed in an inductively coupled plasma etching apparatus, the HDP-CVD process can be advantageously performed.

[0061] Various processing conditions can be adjusted to provide directional deposition during plasma deposition so that the material does not deposit on the sidewalls of the mask. The dwell time (flow rate) and plasma power during the deposition process are also appropriately adjusted to increase directional deposition.

[0062] In the process of depositing a silicon-based sacrificial material, any suitable silicon-containing precursor can be used, including silane (e.g., SiH4), polysilane (H3Si-(SiH2) n -SiH3) (where n > ≥ 1), organosilane, halosilane, and aminosilane. Organosilanes can be used, such as methylsilane, ethylsilane, isopropylsilane, tert-butylsilane, dimethylsilane, diethylsilane, di-tert-butylsilane, allylsilane, sec-butylsilane, thexylsilane, isopentylsilane, tert-butyl disilane, di-tert-butyl disilane, etc. Halosilanes contain at least one halogen group and may or may not contain hydrogen and / or carbon groups. Examples of halosilanes are iodosilane, bromosilane, chlorosilane, and fluorosilane. Specific chlorosilanes are tetrachlorosilane (SiCl4), trichlorosilane (HSiCl3), dichlorosilane (H2SiCl2), monochlorosilane (ClSiH3), chloropropenylsilane, chloromethylsilane, dichloromethylsilane, chlorodimethylsilane, chloroethylsilane, tert-butylchlorosilane, di-tert-butylchlorosilane, chloroisopropylsilane, chlorosec-butylsilane, tert-butyldimethylchlorosilane, thexyldimethylchlorosilane, etc. Aminosilanes contain at least one nitrogen atom bonded to a silicon atom, but may also contain hydrogen, oxygen, halogen, and carbon. Examples of aminosilanes are mono-, di-, tri-, and tetra-aminosilanes (H3Si(NH2), H2Si(NH2)2, HSi(NH2)3, and Si(NH2)4, respectively), and substituted mono-, di-, tri-, and tetra-aminosilanes, such as tert-butylaminosilane, methylaminosilane, tert-butylsilylamine, bis(tert-butylamino)silane (SiH2(NHC(CH3)3)2 (BTBAS), tert-butylsilylcarbamate, SiH(CH3)-(N(CH3)2)2, SiHCl-(N(CH3)2)2, (Si(CH3)2NH)3, etc.

[0063] The deposited film can be amorphous, and its film composition depends on the specific precursors and co-reactants used, where organosilanes produce a-SiC:H films, while aminosilanes produce a-SiN:H or a-SiCN:H films.

[0064] In the process of depositing carbon-based films, any suitable carbon-containing precursor can be used. In some embodiments, a hydrocarbon precursor of the chemical formula C x H y can be used, where X is an integer between 2 and 10, and Y is an integer between 2 and 24. Examples include methane (CH4), acetylene (C2H2), ethylene (C2H4), propylene (C3H6), butane (C4H 10 ), cyclohexane (C6H 12 ), benzene (C6H6), and toluene (C7H8).

[0065] In some embodiments, the sacrificial material can be doped or contain materials such as boron or phosphorus. Additional dopants include arsenic, sulfur, and selenium. In this way, the etch selectivity to the mask layer can be improved. For example, for doped dielectrics (especially silica-based dielectrics), the process gas can include dopant precursors, such as boron-containing gases, phosphorus-containing gases, carbon-containing gases, or mixtures thereof. In a specific embodiment, the gas includes one or more boron-containing reactants and one or more phosphorus-containing reactants, and the dielectric film includes borophosphosilicate glass (BPSG) doped with phosphorus and boron. Examples of suitable boron and phosphorus precursor gases include borane (BH3), diborane (B2H6), triborane (B3H7), and phosphine (PH3). Examples of arsenic-containing, sulfur-containing, and selenium-containing gases include hydrogen selenide (H2Se), arsine (ASH3), and hydrogen sulfide (H2S).

[0066] If the sacrificial material contains nitrogen oxides (such as silicon oxynitride), the deposition gas can include nitrogen-containing reactants such as N2, NH3, NO, N2O, and mixtures thereof. Examples of the deposited films include boron-doped silicon, silicon boride, silicon boride carbon, etc.

[0067] A metal-containing film may also be deposited. Examples of metal-containing films that can be formed include oxides and nitrides of aluminum, titanium, hafnium, tantalum, tungsten, manganese, magnesium, strontium, etc., and elemental metal films. Exemplary precursors may include metal alkylamines, metal alkoxides, metal alkoxamides, metal halides, metal β-diketones, metal carbonyl compounds, organometallic compounds, etc. Suitable metal-containing precursors contain the metal desired to be incorporated into the film. For example, a tantalum-containing layer can be deposited by reacting pentakis(dimethylamido)tantalum with ammonia or other reducing agents as co-reactants. Other examples of metal-containing precursors that can be used include trimethylaluminum, tetraethoxytitanium, tetra-dimethyl-amido-titanium, tetra(ethylmethylamido)hafnium, bis(cyclopentadienyl)manganese, and bis(n-propylcyclopentadienyl)magnesium, etc.

[0068] Example

[0069] The following examples are provided to further illustrate aspects of the various embodiments. The examples are provided by way of illustration and to more clearly show the aspects, and are not limiting.

[0070] A carbon-based sacrificial material can be used to protect the SiO2 mask for the etching process of the carbon-based target layer. One exemplary deposition involves using a transformer-coupled plasma (TCP) etching reactor for HDP-CVD processing with CH3F / CH2F2 / O2 process gases. The pressure is 30 mT, the plasma power is 2500 W, and the bias voltage is 50 V. Mask modification can involve etching in the TCP reactor with CF4 / CHF3 / O2 etching gases. The pressure is 10 mT, the plasma power is 600 W, and the bias voltage is 400 V.

[0071] Mask deposition can be performed by ion-driven deposition or selective deposition processes. Exemplary ion-driven deposition involves using a transformer-coupled plasma (TCP) etching reactor for HDP-CVD processing with SiCl4 / Cl2 / O2 process gases. The pressure is 50 mT, the plasma power is 2500 W, and the bias voltage is 50 V. One exemplary selective deposition involves using a transformer-coupled plasma (TCP) etching reactor for HDP-CVD processing with SiCl4 / Cl2 / O2 process gases. The pressure is 8 mT, the plasma power is 325 W, and the bias voltage is 100 V.

[0072] Device

[0073] In some embodiments, directional deposition is performed in an etching device. For example, the above methods can be performed in an inductively coupled plasma etching device or a capacitively coupled plasma etching device.

[0074] According to some embodiments herein, Figure 4A cross-sectional view schematically showing an inductively coupled plasma etching apparatus 400. Kiyo, manufactured by Lam Research Corp., Fremont, California, is an example of a suitable reactor that can be used to implement the techniques described herein. The inductively coupled plasma etching apparatus 400 includes a total etching chamber structurally defined by a chamber wall 401 and a window 411. The chamber wall 401 can be made of stainless steel or aluminum. The window 411 can be made of quartz or other dielectric materials. An optional internal plasma grid 450 divides the total etching chamber into an upper sub-chamber 402 and a lower sub-chamber 403. In most embodiments, the plasma grid 450 can be removed to utilize the chamber space formed by the sub-chambers 402 and 403. A chuck 417 is positioned in the lower sub-chamber 403 near the bottom inner surface. The chuck 417 is configured to receive and hold a semiconductor wafer 419 on which an etching process is performed. The chuck 417 can be an electrostatic chuck for supporting the wafer 419 when the wafer 419 is present. In some embodiments, an edge ring (not shown) surrounds the chuck 417 and has an upper surface substantially in the same plane as the top surface of the wafer 419 (when the wafer is above the chuck 417). The chuck 417 also includes electrostatic electrodes for clamping and releasing the wafer. A filter and a DC clamp power source (not shown in the figure) can be provided for this purpose. Other control systems can also be provided to lift the wafer 419 away from the chuck 417. The chuck 417 can be charged with an RF power source 423. The RF power source 423 is connected to a matching circuit 421 through a connection member 427. The matching circuit 421 is connected to the chuck 417 through a connection member 425. In this way, the RF power source 423 is connected to the chuck 417. TM The reactor is an example of a suitable reactor that can be used to implement the techniques described herein. The inductively coupled plasma etching apparatus 400 includes a total etching chamber structurally defined by a chamber wall 401 and a window 411. The chamber wall 401 can be made of stainless steel or aluminum. The window 411 can be made of quartz or other dielectric materials. An optional internal plasma grid 450 divides the total etching chamber into an upper sub-chamber 402 and a lower sub-chamber 403. In most embodiments, the plasma grid 450 can be removed to utilize the chamber space formed by the sub-chambers 402 and 403. A chuck 417 is positioned in the lower sub-chamber 403 near the bottom inner surface. The chuck 417 is configured to receive and hold a semiconductor wafer 419 on which an etching process is performed. The chuck 417 can be an electrostatic chuck for supporting the wafer 419 when the wafer 419 is present. In some embodiments, an edge ring (not shown) surrounds the chuck 417 and has an upper surface substantially in the same plane as the top surface of the wafer 419 (when the wafer is above the chuck 417). The chuck 417 also includes electrostatic electrodes for clamping and releasing the wafer. A filter and a DC clamp power source (not shown in the figure) can be provided for this purpose. Other control systems can also be provided to lift the wafer 419 away from the chuck 417. The chuck 417 can be charged with an RF power source 423. The RF power source 423 is connected to a matching circuit 421 through a connection member 427. The matching circuit 421 is connected to the chuck 417 through a connection member 425. In this way, the RF power source 423 is connected to the chuck 417.

[0075] A coil 433 is located above the window 411. The coil 433 is made of a conductive material and includes at least one full turn. The exemplary coil 433 shown in Figure 5 includes three turns. The cross-section of the coil 433 is shown symbolically, with a coil having an "X" symbol indicating that the coil extends rotationally into the page, and conversely, a coil having a "●" symbol indicating that the coil extends rotationally out of the page. An RF power source 441 is configured to provide RF power to the coil 433. Generally, the RF power source 441 is connected to a matching circuit 439 through a connection member 445. The matching circuit 439 is connected to the coil 433 through a connection member 443. In this way, the RF power source 441 is connected to the coil 433. An optional Faraday shield 449 is positioned between the coil 433 and the window 411. The Faraday shield 449 is held in a spaced-apart relationship relative to the coil 433. The Faraday shield 449 is disposed directly above the window 411. The coil 433, the Faraday shield 449, and the window 411 are each configured to be substantially parallel to each other. The Faraday shield can prevent metal or other substances from depositing on the dielectric window of the plasma chamber 401.

[0076] Processing gas can be supplied via the main injection port 460 located in the upper chamber and / or via the side injection port 470 (sometimes referred to as STG). During operation of the working plasma process, a vacuum pump (e.g., a single- or two-stage mechanical dry pump and / or a turbomolecular pump 440) can be used to evacuate the processing gas from the processing chamber 424 and to maintain the pressure within the processing chamber 400 by means of a flow-limiting device (e.g., a throttle valve (not shown) or a pendulum valve (not shown)) utilizing closed-loop control.

[0077] During operation of the device, one or more reactant gases can be supplied via the injection ports 460 and / or 470. In some embodiments, gas can be supplied only via the main injection port 460 or only via the side injection port 470. In certain cases, the injection ports can be replaced by a showerhead. The Faraday shield 449 and / or the optional grid 450 can include internal channels and holes that permit the delivery of the processing gas to the interior of the chamber. Either or both of the Faraday shield 449 and the optional grid 450 can serve as a showerhead for the delivery of the processing gas.

[0078] RF power is supplied from the RF power source 441 to the coil 433 to cause an RF current to flow through the coil 433. The RF current flowing through the coil 433 generates an electromagnetic field around the coil 433. This electromagnetic field generates an induced current within the upper sub-chamber 402. During the etching process, the physical and chemical interactions of the generated ions and radicals with the wafer 419 selectively etch the features of the wafer.

[0079] If a plasma grid is used such that both an upper sub-chamber 402 and a lower sub-chamber 403 exist, the induced current acts on the gas present in the upper sub-chamber 402 to generate an electron-ion plasma within the upper sub-chamber 402. The optional internal plasma grid 450 limits the amount of hot electrons in the lower sub-chamber 403. In some embodiments, the device is designed and operated such that the plasma present in the lower sub-chamber 403 is an ion-ion plasma.

[0080] Both the upper electron-ion plasma and the lower ion-ion plasma can contain cations and anions, but the ion-ion plasma will have a greater ratio of anions to cations. Volatile by-products can be removed from the lower sub-chamber 403 through the port 422.

[0081] The chuck 417 disclosed herein can be operated at an elevated temperature in the range between about 30°C and about 250°C. The temperature will depend on the etching process operation and the particular formulation. In some embodiments, the chamber 401 can also be operated at a pressure in the range between about 1 mTorr and about 95 mTorr. In some embodiments, the pressure can be higher, as disclosed above.

[0082] Chamber 401 can be coupled to a facility (not shown) when installed in a cleanroom or a manufacturing facility. The facility includes ducts that provide process gases, vacuum, temperature control, and environmental particle control. These facilities are coupled to chamber 401 when installed in the target manufacturing facility. Additionally, chamber 401 can be coupled onto a transfer chamber, enabling the transfer of semiconductor wafers in and out of chamber 401 by a robot using typical automation.

[0083] In some embodiments, system controller 430 (which can include one or more physical or logical controllers) controls some or all of the operations of the etch chamber. The controller is further described below.

[0084] Figure 5 FIG. is a schematic diagram of an example of a capacitively coupled plasma etch apparatus according to many embodiments. Plasma etch chamber 500 includes an upper electrode 502 and a lower electrode 504 between which a plasma can be generated. A substrate 599 having a patterned hard mask film thereon as described above can be disposed on lower electrode 504 and held in place by an electrostatic chuck (ESC). Other clamping mechanisms can also be employed. Plasma etch chamber 500 can include a plasma confinement ring 506 that keeps the plasma above the substrate and away from the chamber walls. Other plasma confinement structures (such as side plates serving as inner walls) can be used. In some embodiments, the plasma etch chamber may not include any such plasma confinement structure.

[0085] In Figure 5 the example of, plasma etch chamber 500 includes two RF sources, where RF source 510 is connected to upper electrode 502 and RF source 512 is connected to lower electrode 504. Each of RF sources 510 and 512 can include one or more sources of any suitable frequency (including 2 MHz, 13.56 MHz, 27 MHz, and 60 MHz). Gases can be introduced into the chamber from one or more gas sources 514, 516, and 518. For example, gas source 514 can include a deposition or etch gas as described above. The gas can be introduced into the chamber via inlet 520, and excess gas and reaction by-products are exhausted through exhaust pump 522.

[0086] An example of a plasma etch chamber that can be used is Flex TM Reactive Ion Etch tool, which can be purchased from Lam Research Corp. of Fremont, California. Further descriptions of plasma etch chambers can be found in U.S. Patent Nos. 6,841,943 and 8,552,334, the entire disclosures of which are incorporated herein by reference.

[0087] Returning to Figure 5, enabling the controller 430 to be connected to RF sources 510 and 512, valves associated with gas sources 514, 516, and 518, and an exhaust pump 522. In some embodiments, the controller 430 controls all activities of the plasma etching chamber 500.

[0088] The following discussion of the controller 430 may apply, as appropriate, to Figure 4 and 5 the controller 430 in. The controller 430 may execute control software that is stored in a mass storage device, loaded into a memory device, and executed on a processor. Alternatively, the control logic may be hard-coded in the controller 430. Application-specific integrated circuits, programmable logic devices (e.g., field-programmable gate arrays or FPGAs), etc. may be used for these purposes. In the following discussion and Figure 4 and Figure 5 the discussion of the controller in, wherever "software" or "code" is used, functionally equivalent hard-coded logic may be used instead.

[0089] The control software may include instructions for controlling the application timing and / or amplitude of any one or more of the following chamber operating conditions: gas mixing and / or composition, chamber pressure, chamber temperature, wafer / wafer support temperature, bias applied to the wafer, frequency and power applied to a coil or other plasma generating component, wafer position, wafer movement speed, and other parameters of a specific process performed by the tool. The control software may be configured in any suitable manner. For example, subroutines or control objects for various processing tool components may be written to control the operation of the processing tool components required to perform the processing of various processing tools. The control software may be encoded in any suitable computer-readable programming language.

[0090] In some embodiments, the control software may include input / output control (IOC) sequence instructions for controlling the various parameters described above. In some embodiments, other computer software and / or programs stored on a mass storage device and / or memory device associated with the controller 430 may be employed. Examples of programs or portions of programs for this purpose include a process gas control program, a pressure control program, and an RF source control program.

[0091] The process gas control program may include program code for controlling gas composition (e.g., deposition and process gases as described herein) and flow rate and optionally for flowing gas into the chamber prior to deposition to stabilize the pressure in the chamber. The pressure control program may include program code for controlling the pressure inside the chamber by adjusting, for example, a throttle valve in the chamber's exhaust system, the gas flow into the chamber, etc. The RF source control program may include program code for setting the RF power level applied to an electrode according to the embodiments herein.

[0092] In some embodiments, there may be a user interface associated with the controller 430. The user interface may include a display screen, a graphical software display of the device and / or the processing station, and user input devices (such as pointing devices, keyboards, touchscreens, microphones, etc.).

[0093] In some embodiments, the parameters adjusted via the controller 430 may relate to processing conditions. Non-limiting examples include process gas composition and flow rate, temperature, pressure, plasma conditions (such as RF bias power level), pressure, temperature, etc. These parameters can be provided to the user in the form of a recipe, and the recipe can be input using the user interface.

[0094] Signals for monitoring the process can be provided via analog and / or digital input connections of the system controller 430 from various process tool sensors. Signals for controlling the process can be output via analog and digital output connections of the plasma etching chamber. Non-limiting examples of sensors that can be monitored include mass flow controllers, pressure sensors (such as pressure gauges), thermocouples, etc. Appropriately programmed feedback and control algorithms can be used together with data from these sensors to maintain processing conditions.

[0095] The controller 430 can provide program instructions for performing the above-described directional deposition process and subsequent etching process. These program instructions can control various processing parameters, such as RF bias power level, pressure, temperature, etc. The instructions can control the parameters to directionally deposit the mask growth film according to the various embodiments described herein.

[0096] The controller 430 generally includes one or more memory devices and one or more processors, which are configured to execute instructions so that the device performs the method according to the disclosed embodiments. A machine-readable medium containing instructions for controlling the processing operations according to the disclosed embodiments can be connected to the controller 430, as described above.

[0097] In some implementations, the controller 430 can be or can form part of a system controller that is part of a system, which can be part of the above examples. Such systems can include semiconductor processing equipment, which includes one or more processing tools, one or more chambers, one or more platforms for processing, and / or specific processing components (wafer chucks, gas flow systems, etc.). These systems can be integrated with electronics for controlling their operations before, during, and after the processing of semiconductor wafers or substrates. The electronics can be referred to as a "controller" that can control various components or sub-components of one or more systems. Depending on the processing conditions and / or system type, the system controller can be programmed to control any of the processes disclosed herein, including controlling the delivery of processing gases, temperature settings (e.g., heating and / or cooling), pressure settings, vacuum settings, power settings, radio frequency (RF) generator settings, RF matching circuit settings, frequency settings, flow rate settings, fluid delivery settings, position and operation settings, wafer transfer into and out of the tool and other transfer tools and / or load locks connected to or interfacing with a particular system.

[0098] Broadly speaking, a system controller can be defined as electronics having various integrated circuits, logic, memory, and / or software for receiving instructions, issuing instructions, controlling operations, enabling cleaning operations, enabling endpoint measurements, etc. The integrated circuits can include chips in the form of firmware that stores program instructions, digital signal processors (DSPs), chips defined as application specific integrated circuits (ASICs), and / or one or more microprocessors, or microcontrollers that execute program instructions (e.g., software). The program instructions can be instructions delivered to the system controller in the form of various individual settings (or program files), which define operation parameters for performing a specific process on or with respect to a semiconductor wafer or system. In some embodiments, the operation parameters can be part of a recipe defined by a processing engineer to complete one or more processing steps during the fabrication of one or more layers, materials, metals, oxides, silicon, silicon dioxide, surfaces, circuits, and / or die of a wafer.

[0099] In some implementations, the system controller can be part of a computer that is integrated with, coupled to, otherwise networked to the system, or a combination thereof. For example, the system controller can be in the "cloud" or in all or part of a wafer fab host system, which can allow remote access to wafer processing. The computer can implement remote access to the system to monitor the current progress of manufacturing operations, examine the history of past manufacturing operations, study trends or performance criteria from multiple manufacturing operations, to change the parameters of the current process, set the process steps to follow the current process, or initiate a new process. In some examples, a remote computer (e.g., a server) can provide a process recipe to the system via a network, which can include a local network or the Internet. The remote computer can include a user interface that enables the input or programming of parameters and / or settings, which are then conveyed from the remote computer to the system. In some examples, the system controller receives instructions in the form of data that specify the parameters for each process step to be performed during one or more operations. It should be understood that the parameters can be specific to the type of process to be performed and the type of tool that the system controller is configured to interface with or control. Thus, as described above, the system controller can be distributed, for example, by including one or more discrete controllers that are networked together and work towards a common purpose (e.g., the processing and control described herein). An example of a distributed controller for such a purpose is one or more integrated circuits on a chamber that communicate with one or more integrated circuits located remotely (e.g., at the platform level or as part of a remote computer), which are combined to control the processing on the chamber.

[0100] In some embodiments, PECVD deposition can use remote radical-assisted plasmas or microwave plasmas. Such deposition can be performed in an etch chamber configured with a remote or microwave plasma generator, or can be performed in a deposition chamber that is connected to the etch chamber under vacuum. Similarly, in some embodiments, remote radical-assisted plasmas or microwave plasmas can be utilized to perform processing operations.

[0101] Exemplary process parameters are provided below. The exemplary pressure range is from 5 mT to 1000 mT, and in some embodiments is between 40 mT and 100 mT. In one processing operation, the exemplary pressure can be in the range of 5 mT to 300 mT.

[0102] Exemplary plasma powers for inductively coupled plasma sources (such as transformer coupled plasma (TCP) sources available from Lam Research, Fremont, California) are from 10 W to 1200 W, from 20 W to 500 W, or from 50 W to 300 W. Exemplary plasma powers for deposition operations are in the range of 20 W to 200 W. Exemplary plasma powers for processing operations are in the range of 20 W to 1200 W.

[0103] Exemplary bias voltages are in the range of 0 V to -500 V, 0 V to -80 V, such as -50 V. The bias voltage can also be expressed in amplitude, such as 0 to 500 V, 0 to 80 V, or 0 to 50 V. Exemplary flow rates during the deposition step are in the range of 1 sccm to 2000 sccm, 1 to 300 sccm, or 100 sccm. Exemplary flow rates during the processing step are in the range of 1 sccm to 2000 sccm, 1 to 500 sccm, or 300 sccm. Exemplary substrate temperatures are in the range of 40 °C to 250 °C or 60 °C to 120 °C. In some embodiments, the deposition and processing exposure times can be in the range of 0.5 s to 20 s, or 3 s to 10 s, or 4 s to 6 s, where the processing time for multi-cycle processing is taken as an example. In certain examples, 10 to 100 cycles are performed.

[0104] Conclusion

[0105] Although the above embodiments have been described in some detail for the purpose of clear understanding, it will be apparent that certain changes and modifications can be practiced within the scope of the appended claims. It should be noted that there are many alternative ways of implementing the processes, systems, and devices of the embodiments of the present invention. Therefore, the embodiments of the present invention should be regarded as illustrative rather than restrictive, and the embodiments are not limited to the details given herein.

Claims

1. A method for reshaping a mask layer during an etching process of a target layer, comprising: Providing a substrate to a processing chamber, the substrate comprising a patterned mask layer disposed on a target layer to be etched, the target layer comprising a first material having a first etching rate with respect to a first etching chemical, and the patterned mask layer comprising a second material having a second etching rate with respect to the first etching chemical, wherein the first etching rate is higher than the second etching rate; Depositing a sacrificial layer on a portion of the patterned mask layer, the sacrificial layer comprising a third material having a third etching rate with respect to the first etching chemical, the third etching rate being higher than the second etching rate; and Etching the patterned mask layer with a second etching chemical, wherein the sacrificial layer inhibits etching of the portion of the patterned mask layer covered by the sacrificial layer, Among them, The first material, the second material, and the third material are selected from one of the following combinations: The second material is a SiO2-based or SiN-based material, and the first material and the third material are silicon-based materials; The second material is a SiON-based material, and the first material and the third material are carbon-based materials; The second material is a carbon-based material, and the first material and the third material are SiO2-based or SiON-based materials; The second material is a silicon-based material, and the first material and the third material are SiO2-based or SiN-based materials; or The second material is a SiO2-based or SiN-based material, and the first material and the third material are tungsten-based materials.

2. The method according to claim 1, wherein the third material has a chemical composition that is at least 50% mole percentage the same as that of the first material.

3. The method according to claim 2, wherein the third material has a chemical composition that is at least 75% mole percentage the same as that of the first material.

4. The method according to claim 2, wherein the third material has a chemical composition that is at least 90% mole percentage the same as that of the first material.

5. The method according to claim 1, wherein the difference between the third etching rate and the first etching rate is within a range of ±50%.

6. The method according to claim 5, wherein the difference between the third etching rate and the first etching rate is within a range of ±10%.

7. The method according to claim 1, wherein the etching rate of the second material with respect to the second etching chemical is higher than the etching rates of the first material and the third material with respect to the second etching chemical.

8. The method according to claim 1, further comprising: depositing an additional second material on the patterned mask layer before depositing the sacrificial layer.

9. The method according to claim 1 further comprising: depositing an additional second material on the patterned mask layer after depositing the sacrificial layer.

10. The method according to claim 1, wherein the deposition on the patterned mask layer comprises: plasma enhanced chemical vapor deposition process.

11. The method according to claim 1, wherein the deposition on the patterned mask layer comprises: high density plasma chemical vapor deposition process.

12. The method according to claim 1, wherein the deposition and the etching are carried out in the same processing chamber.

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