Independent graphics card management method, independent graphics card and electronic equipment

Abstract

The application provides an independent graphics card management method, an independent graphics card and an electronic device. The method comprises: a first programmable management module performing graphics card service management, comprising obtaining a command from a host memory through a host bus interface, interpreting the command into an instruction, and controlling a sub-engine in the independent graphics card to execute the instruction; and a second programmable management module performing graphics card system management, comprising managing power-on initialization, reset and working performance dynamic adjustment of the sub-engine in the independent graphics card, and managing power-on initialization of graphics card memory. The method simplifies hardware logic, the two management modules have clear division of labor, service management and system management are isolated, and the system is safer and more stable.

Description

Technical Field

[0001] This application belongs to the field of computer technology, specifically relating to a method for managing discrete graphics cards, a discrete graphics card, and an electronic device. Background Technology

[0002] refer to Figure 1 In traditional discrete graphics cards, the management module manages the various sub-engines within the graphics card using a fixed pipeline. The tasks performed by the management module include: receiving register instructions from the host processor (register instructions contain only simple command information, such as starting rendering); reading command blocks from the host memory (a large amount of information required for graphics rendering by the discrete graphics card comes from command blocks, which contain commands such as how many triangles to render and the positions of the triangles; one command block stores one command); interpreting the read commands into instructions and sending them to each sub-engine; scheduling the execution order of tasks in each sub-engine; managing the power-on initialization and dynamic power adjustment of each sub-engine; and handling interrupt requests from each sub-engine.

[0003] The management methods described above have several drawbacks: First, the hardware logic is complex, requiring the execution of a large number of conditional statements, which necessitates compensation from the host-side processor, resulting in significant performance loss; second, it cannot quickly adapt to updates to the sub-engine algorithms. Summary of the Invention

[0004] The purpose of this application is to provide a discrete graphics card management method, a discrete graphics card, and an electronic device to address the shortcomings of the prior art, so as to at least partially solve the deficiencies existing in the prior art.

[0005] To solve the above-mentioned technical problems, this application adopts the following technical solution: a method for managing a discrete graphics card, comprising: a first programmable management module performing graphics card service management, including obtaining commands from host memory through a host bus interface, interpreting the commands into instructions, and controlling the sub-engine in the discrete graphics card to execute the instructions; and a second programmable management module performing graphics card system management, including managing the power-on initialization, reset, and dynamic performance adjustment of the sub-engine in the discrete graphics card, and managing the power-on initialization of the graphics card memory.

[0006] To solve the above-mentioned technical problems, this application adopts the following technical solution: a discrete graphics card, including a first programmable management module, a second programmable management module, multiple sub-engines, and graphics card memory; the first programmable management module is used for graphics card service management, including obtaining commands from host memory through a host bus interface, interpreting the commands into instructions, and controlling the sub-engines in the discrete graphics card to execute the instructions; the second programmable management module is used for graphics card system management, including managing the power-on initialization, reset, and dynamic performance adjustment of the sub-engines in the discrete graphics card, and managing the power-on initialization of the graphics card memory.

[0007] To solve the above-mentioned technical problems, this application adopts the following technical solution: an electronic device, including the aforementioned independent graphics card, and including a host processor and host memory, wherein the host processor is used to write commands to the host memory for interpretation by the first programmable management module.

[0008] Compared with existing technologies, the advantages of this application are as follows: the first programmable management module and the second programmable management module are isolated from each other, and each is responsible for different types of management tasks (one handles tasks issued by the host processor and schedules each sub-engine to execute the task; the other manages the working status of each functional module inside the discrete graphics card), which simplifies the hardware logic of both modules, reduces the performance requirements of the host processor, and improves the overall performance of the machine. If the algorithm of a certain sub-engine is updated, only the control logic of the first control module needs to be updated. Since the control logic of the first control module is relatively simple, the complexity of updating its control logic is reduced. Attached Figure Description

[0009] Figure 1 This is a structural block diagram of an electronic device that includes a discrete graphics card in the prior art.

[0010] Figure 2 This is a structural block diagram of an electronic device including a discrete graphics card provided in an embodiment of this application. Detailed Implementation

[0011] In this application, it should be understood that terms such as “comprising” or “having” are intended to indicate the presence of the disclosed features, figures, steps, behaviors, components, parts or combinations thereof in this specification, but do not preclude the possibility of the presence of one or more other features, figures, steps, behaviors, components, parts or combinations thereof.

[0012] It should also be noted that, unless otherwise specified, the embodiments and features described in this application can be combined with each other. This application will now be described in detail with reference to the accompanying drawings and embodiments.

[0013] The present application will be further described below with reference to the embodiments shown in the accompanying drawings.

[0014] refer to Figure 2 The discrete graphics card provided in the embodiments of this application has two independent programmable management modules, namely a first programmable management module 1 and a second programmable management module 2. The two modules split the tasks performed by the traditional discrete graphics card programmable management module.

[0015] based on Figure 2 As shown in the structure, embodiments of this application provide a method for managing a discrete graphics card, including: a first programmable management module 1 performing graphics card service management, including obtaining commands from host-side memory 6 through a host bus interface, interpreting the commands into instructions, and controlling the sub-engine in the discrete graphics card to execute the instructions; and a second programmable management module 2 performing graphics card system management, including managing the power-on initialization, reset, and dynamic performance adjustment of the sub-engine in the discrete graphics card, and managing the power-on initialization of graphics card memory 34.

[0016] In this paper, "sub-engine" refers to the hardware modules in a discrete graphics card that perform different types of tasks. Sub-engine 31, for example, is the graphics rendering sub-engine (also called GPU), which can be used for 3D image rendering. Sub-engine 32, for example, is the video encoding / decoding sub-engine, which can be used for video encoding / decoding. Sub-engine 33, for example, is the display control sub-engine, which can be used to transfer display data from the frame buffer in the graphics card memory 34 to the video encoding / decoding sub-engine for video encoding. These are all common functional modules in discrete graphics cards, and this application does not limit the functions and structures of these modules.

[0017] The various functional modules (i.e., sub-engines) within the discrete graphics card communicate with each other via the graphics card's internal bus 4.

[0018] Specifically, simply put, a command might be: Draw 100 triangles. The first programmable management module 1 parses this command into instructions. For example, the first programmable management module 1 performs a write operation on a specific register of the graphics rendering sub-engine, writing the value 100. Thus, the graphics rendering sub-engine draws 100 triangles. Of course, a single command can also be translated into multiple instructions. Alternatively, the first programmable management module 1 can also write specific instructions into the graphics card memory 34. A sub-engine then reads the instructions from a specific area of ​​the graphics card memory 34.

[0019] The second programmable management module 2 adjusts the operating frequency and / or operating voltage of each sub-engine according to the busy level of each sub-engine.

[0020] For example, if the load on a sub-engine increases, its operating voltage and operating frequency will be increased; if the load on a sub-engine decreases, its operating frequency and operating voltage will be decreased.

[0021] If an error occurs in a sub-engine, that sub-engine needs to be reset. If the second programmable management module 2 receives an error interrupt from a sub-engine, it determines whether the sub-engine needs to be reset based on the error interrupt.

[0022] The second programmable management module 2 also initializes the settings for each sub-engine and the graphics card memory 34. Specifically, it sets the working state of each sub-engine and specific registers in the display memory.

[0023] For example, setting the enable register of a certain sub-engine to 1 enables that sub-engine.

[0024] For example, configuring the working area memory address register of a certain sub-engine allows that sub-engine to have a working area in the graphics card memory 34.

[0025] For example, configuring the interrupt signal enable register of a certain sub-engine enables that sub-engine to report an interrupt request to the second programmable management module 2.

[0026] Typically, the state of a sub-engine after reset is the same as the state after initialization.

[0027] For example, configuring the graphics card memory to its own operating frequency and setting memory training parameters.

[0028] It can be observed that the business management of each sub-engine is handled by the first programmable management module 1, while system management tasks unrelated to business are handled by the second programmable management module 2.

[0029] Any commands issued by the host processor 5 to the discrete graphics card are sent to the first programmable management module 1; the second programmable management module 2 does not communicate with the host processor 5. The second programmable management module 2 is self-consistent and self-managed. The first programmable management module 1 and the second programmable management module 2 are isolated from each other, each responsible for different types of management tasks (one handles tasks issued by the host processor 5 and schedules the execution of these tasks by various sub-engines; the other manages the working status of the various functional modules within the discrete graphics card). This simplifies their hardware logic, reduces the performance requirements of the host processor 5, and improves the overall system performance. If a sub-engine algorithm is updated, only the control logic of the first programmable management module 1 needs to be updated. Since the control logic of the first programmable management module 1 is relatively simple, the complexity of updating its control logic is reduced. Similarly, updating the control logic of the second programmable management module 2 is also simpler.

[0030] In some embodiments, the commands obtained from the host memory 6 are interpreted by the first programmable management module 1 into instructions, including task instructions and synchronization instructions.

[0031] Task instructions are commands that require the sub-engine to perform specific tasks. For example, a task instruction might be to command the GPU to draw a red triangle.

[0032] Synchronization instructions control the synchronization of the pace of each sub-engine. For example, a synchronization instruction might instruct the video encoding sub-engine to wait for the GPU to finish rendering a frame of image before starting video encoding for that frame.

[0033] In some embodiments, the host memory 6 stores a command queue, and the first programmable management module 1 periodically retrieves commands from the command queue; or, the host memory 6 stores multiple command queues, and the first programmable management module 1 retrieves commands from each command queue in turn and periodically.

[0034] The command queue consists of commands written by the graphics card driver in the host processor 5 to the host memory 6, which are used by the GPU to render multiple consecutive frames of images.

[0035] The command queue is a first-in-first-out structure. The host processor 5 writes commands to the command queue, and the first programmable management module 1 reads the commands in the command queue through the PCIe bus 7. The first programmable management module 1 does not need to store these commands.

[0036] The discrete graphics card can execute commands in multiple command queues in a granular manner, such as in the order of command queue A -> command queue B -> command queue C -> command queue A. The first programmable management module 1 performs context switching when switching queues.

[0037] The write operations of the host processor to the command queue and the read operations of the first control module do not affect each other, thus providing the working performance of the discrete graphics card.

[0038] In some embodiments, the second programmable management module 2 receives an error interrupt sent by a sub-engine and performs a reset operation on the sub-engine that issued the error interrupt or performs a reset operation on all sub-engines based on the error interrupt.

[0039] That is, the second programmable management module 2 determines whether to reset a single sub-engine or all sub-engines based on the severity of the error interruption.

[0040] In some embodiments, the first programmable management module 1 receives a reset command from the second programmable management module 2 and performs a reset operation on itself.

[0041] That is, the second programmable management module 2 can also control the first programmable management module 1 to reset when an error occurs. The security and stability of the discrete graphics card are guaranteed.

[0042] In some embodiments, the first programmable management module 1 receives a shutdown command from the host processor 5 and shuts down the first programmable management module 1.

[0043] The first programmable management module 1 is only responsible for managing specific discrete graphics card services. If the graphics card driver running on the host processor 5 determines that there are no services to be executed on the current discrete graphics card, the host processor 5 can shut down the first programmable management module 1.

[0044] The second programmable management module 2 needs to be constantly in operation to ensure that the discrete graphics card is always in standby mode.

[0045] In this way, power consumption is reduced while ensuring the performance of the discrete graphics card.

[0046] Specifically, both the first programmable management module 1 and the second programmable management module 2 are microprocessor units (MCUs). Since the MCU is programmable, the control logic of both the first programmable management module 1 and the second programmable management module 2 can be dynamically updated, and the complexity of the update is reduced.

[0047] Based on the same inventive concept as the foregoing embodiments, embodiments of this application also include a discrete graphics card, see reference. Figure 2 It includes a first programmable management module 1, a second programmable management module 2, multiple sub-engines, and graphics card memory 34; the first programmable management module 1 is used for graphics card service management, including obtaining commands from host memory 6 through the host bus interface, interpreting the commands into instructions, and controlling the sub-engines in the discrete graphics card to execute the instructions corresponding to the commands; the second programmable management module 2 is used for graphics card system management, including managing the power-on initialization, reset, and dynamic performance adjustment of the sub-engines in the discrete graphics card, and managing the power-on initialization of graphics card memory 34.

[0048] In some embodiments, the commands obtained from the host memory 6 are interpreted by the first programmable management module 1 into instructions, including task instructions and synchronization instructions.

[0049] In some embodiments, the host-side memory 6 stores a command queue, and the first programmable management module 1 is specifically used to: periodically retrieve commands from the command queue; or, the host-side memory 6 stores multiple command queues, and the first programmable management module 1 is specifically used to retrieve commands from each command queue in turn and periodically.

[0050] In some embodiments, the second programmable management module 2 is specifically used to: receive an error interrupt sent by a sub-engine, and perform a reset operation on the sub-engine that issued the error interrupt or perform a reset operation on all sub-engines according to the error interrupt.

[0051] In some embodiments, the second programmable management module 2 is specifically used to: adjust the operating frequency and / or operating voltage of each sub-engine according to the busy level of each sub-engine.

[0052] In some embodiments, the first programmable management module 1 is specifically used to: receive a reset instruction from the second programmable management module 2 to perform a reset operation, and / or receive a shutdown instruction from the host processor 5 to shut down the first programmable management module 1.

[0053] In some embodiments, the first programmable management module 1 and the second programmable management module 2 are both microprocessor units (MCUs).

[0054] Embodiments of this application also provide an electronic device, including the aforementioned discrete graphics card, and including a host processor 5 and a host memory 6, wherein the host processor 5 is used to write commands to the host memory 6 for interpretation by the first programmable management module 1.

[0055] This electronic device is, for example, a personal computer or a game console.

[0056] In some embodiments, the host processor 5 writes commands to the command queue in the host memory 6. The two operations of the host processor 5 writing instructions to the command queue and the first programmable management module 1 reading instructions from the command queue are asynchronous.

[0057] The various embodiments in this application are described in a progressive manner. The same or similar parts between the various embodiments can be referred to each other. Each embodiment focuses on describing the differences from other embodiments.

[0058] The scope of protection of this application is not limited to the embodiments described above. Obviously, those skilled in the art can make various modifications and variations to this application without departing from the scope and spirit of this application. If such modifications and variations fall within the scope of the claims of this application and their equivalents, then the intent of this application also includes such modifications and variations.

Claims

1. A method for managing a discrete graphics card, characterized in that, include: The first programmable management module performs graphics card service management, including obtaining commands from host memory through the host bus interface, interpreting the commands into instructions, and controlling the sub-engine in the discrete graphics card to execute the instructions. The second programmable management module manages the graphics card system, including managing the power-on initialization, reset, and dynamic performance adjustment of the sub-engines in the independent graphics card, and managing the power-on initialization of the graphics card memory. The first programmable management module and the second programmable management module are isolated from each other and are responsible for different types of management tasks respectively; The first programmable management module receives a reset command from the second programmable management module and performs a reset operation on itself so that the second programmable management module can perform graphics card system management.

2. The method according to claim 1, characterized in that, The commands obtained from the host memory are interpreted into instructions by the first programmable management module, including task instructions and synchronization instructions.

3. The method according to claim 1, characterized in that, The second programmable management module receives the error interrupt sent by the sub-engine and performs a reset operation on the sub-engine that issued the error interrupt or performs a reset operation on all sub-engines according to the error interrupt.

4. The method according to claim 1, characterized in that, The second programmable management module adjusts the operating frequency and / or operating voltage of each sub-engine according to the busy level of each sub-engine.

5. The method according to claim 1, characterized in that, The first programmable management module receives a shutdown command from the host processor and shuts down the first programmable management module.

6. The method according to claim 1, characterized in that, Both the first programmable management module and the second programmable management module are microprocessor units (MCUs).

7. A discrete graphics card, characterized in that, The system includes a first programmable management module, a second programmable management module, multiple sub-engines, and graphics card memory. The first programmable management module is used for graphics card service management, including obtaining commands from host memory via the host bus interface, interpreting the commands into instructions, and controlling the sub-engines in the discrete graphics card to execute the instructions. The second programmable management module is used for graphics card system management, including managing the power-on initialization, reset, and dynamic performance adjustment of the sub-engines in the discrete graphics card, and managing the power-on initialization of the graphics card memory. The first programmable management module and the second programmable management module are isolated from each other and are responsible for different types of management tasks. Specifically, the first programmable management module receives a reset command from the second programmable management module and performs a reset operation on itself so that the second programmable management module can perform graphics card system management.

8. The discrete graphics card according to claim 7, characterized in that, The commands obtained from the host memory are interpreted into instructions by the first programmable management module, including task instructions and synchronization instructions.

9. The discrete graphics card according to claim 7, characterized in that, The second programmable management module is specifically used to: receive error interrupts sent by the sub-engines, and perform a reset operation on the sub-engine that issued the error interrupt or perform a reset operation on all sub-engines according to the error interrupt.

10. The discrete graphics card according to claim 7, characterized in that, The second programmable management module is specifically used to adjust the operating frequency and / or operating voltage of each sub-engine according to the busy level of each sub-engine.

11. The discrete graphics card according to claim 7, characterized in that, The first programmable management module is specifically used to: receive a shutdown command from the host processor and shut down the first programmable management module.

12. The discrete graphics card according to claim 7, characterized in that, Both the first programmable management module and the second programmable management module are microprocessor units (MCUs).

13. An electronic device, characterized in that, Includes a discrete graphics card according to any one of claims 7 to 12, and includes a host-side processor and host-side memory, wherein the host-side processor is used to write commands to the host-side memory for interpretation by the first programmable management module.

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