A fast restart system for hardware simulation accelerator and control method thereof

Abstract

The present invention provides a fast restart system for a hardware emulation accelerator and a control method thereof. The system includes a control module, a threshold monitoring module, a NAND logic circuit, a first MOS transistor, a discharge circuit, and a target discharge voltage module. The control module outputs an enable signal to the target discharge voltage module. The control module and the threshold monitoring module respectively output a startup signal and a voltage monitoring signal to two signal input terminals of the NAND logic circuit. The signal output terminal of the NAND logic circuit is connected to the gate of the first MOS transistor. The target discharge voltage module is connected to the source of the first MOS transistor. The discharge circuit is connected between the drain of the first MOS transistor and ground. The technical solution of the present invention can achieve a fast restart of the hardware emulation accelerator.

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