Multi-stage pulse shaping network

Abstract

In a discrete power modulation system, a circuit includes a multi-stage pulse shaping network (PSN) having a first PSN stage whose input is configured to receive a variable bias power signal from a power management circuit (PMC) and whose output is coupled to one or more second PSN stages, each of which has an output configured to couple to a supply (or bias) terminal of a corresponding one of one or more radio frequency amplifiers. This arrangement is suitable for use in transmit systems in mobile handsets operating according to fifth-generation (5G) communications and other connectivity protocols (e.g., 802.11a / b / g / n / ac / ax / ad / ay), and is suitable for use in multiple simultaneous transmit systems including multiple-input multiple-output (MIMO), uplink carrier aggregation (ULCA), and beamforming.

Description

Technical Field

[0001] The subject matter disclosed herein relates generally to radio frequency (RF) circuits and, more particularly, to devices, systems, and techniques used in operating power-modulated transmitters. Background Art

[0002] As is known in the art, a radio frequency (RF) transmitter is a device that generates RF signals. An RF transmitter may be included, for example, as part of a radio communication system that uses electromagnetic waves (radio waves) to transmit information over a distance.

[0003] It is also known that in RF communication transmitters (e.g., RF communication transmitters suitable for use in mobile devices such as cellular telephones), a trade-off must often be made between energy efficiency and linearity. Therefore, it would be desirable to provide systems and techniques that allow a user to transmit data-bearing RF signals that have both high efficiency and high linearity. Summary of the Invention

[0004] According to the concepts, systems, apparatus and techniques described herein, in a power modulation system, a circuit includes: a multi-stage first pulse shaping network (PSN) having a first PSN stage (e.g., so-called stage A) having an input configured to be coupled to a power management circuit (PMC) and having an output, and one or more second PSN stages (e.g., one or more so-called stages B) each having an input configured to be coupled to the output of the first PSN stage and having an output configured to be coupled to a supply terminal of a radio frequency (RF) amplifier.

[0005] With this particular arrangement, a circuit is provided that is capable of controlling receive band noise and out-of-band emissions of a power modulated transmitter (i.e., both analog and digital power modulated transmitters) while maintaining linearity and efficiency. Furthermore, as will be apparent from the following description herein, circuits provided in accordance with the concepts and technologies described herein can also accommodate a number of RF amplifiers (e.g., RF power amplifiers) that are spaced (e.g., physically remote) from a PMC in a cost-effective mobile device form factor.

[0006] In an embodiment, the first PSN stage includes a passive LC filter. In an embodiment, the first PSN stage is implemented using parasitic elements. For example, the first PSN stage may be implemented using parasitic inductance, capacitance, and / or resistance characteristics of a PMC and / or an electrical signal path providing an electrical connection between the first PSN stage and the second PSN stage (e.g., a signal path providing an electrical connection between a so-called A stage and one or more so-called B stages).

[0007] According to another aspect of the concepts, systems, devices and techniques described herein, in a power modulation system, a reconfigurable filter circuit having first and second terminals includes two or more signal paths, each of the two or more signal paths includes at least one reactive element, and at least one of the two or more signal paths includes a switching element configured to selectively couple at least one of the at least one reactive element between a reference potential and at least one of the first and second terminals of the reconfigurable filter circuit.

[0008] With this particular arrangement, a reconfigurable filter circuit is provided that is configured to provide a plurality of filter characteristics at a power supply voltage terminal (i.e., a bias terminal) of an RF amplifier. By placing a plurality of switches in an open or closed position in each of the two or more signal paths, one of a plurality of different filter characteristics over a predetermined RF frequency band can be provided. The plurality of switches can be independently operated to provide the desired filter characteristics. For example, with N reconfigurable configurable signal paths (N being an integer greater than or equal to 1 and corresponding to the number of switchable signal paths in the reconfigurable filter circuit), the reconfigurable filter circuit is capable of providing 2 N This arrangement therefore enables selection of one of a plurality of desired filter characteristics over a predetermined RF frequency band.

[0009] In an embodiment, a filter characteristic provided by the reconfigurable filter circuit, coupled to the RF amplifier, can be selected in response to a varying impedance of a load coupled to an RF output port of the RF amplifier. Thus, the reconfigurable filter circuit enables dynamic selection of one of a plurality of desired filter characteristics across a predetermined RF frequency band. In an embodiment, at least one of the at least two or more signal paths includes a switch element having a first terminal coupled to one of the reactive elements and a second terminal coupled to a reference potential.

[0010] By providing a switch element coupled between a reactive element and a reference potential or one of the reconfigurable filter terminals, the characteristic impedance of the reactive element can be switched in and out of the filter circuit (thereby making the filter circuit reconfigurable). In one embodiment, by placing the switch in a first switch position (e.g., a closed position, such that the switch provides a low impedance signal path between the reactive element and the reference potential), the reconfigurable filter circuit is provided with a first filter characteristic, and by placing the switch in a second, different switch position (e.g., an open position, such that the switch provides a high impedance signal path between the reactive element and the reference potential), the reconfigurable filter circuit is provided with a second, different filter characteristic.

[0011] In an embodiment, at least one of the at least two or more signal paths comprises a switch element having a first terminal coupled to one of the first and second terminals of the reconfigurable filter circuit and a second terminal coupled to the first terminal of one of the reactive elements.

[0012] By providing a switch element coupled between one of the reconfigurable filter circuit terminals and a reactive element, the characteristic impedance of the reactive element can be switched in and out of the filter circuit (thereby making the filter circuit reconfigurable). In one embodiment, by placing the switch in a first switch position (e.g., a closed position, such that the switch provides a low impedance signal path between the reactive element and one of the reconfigurable filter circuit terminals), the reconfigurable filter circuit is provided with a first filter characteristic, and by placing the switch in a second, different switch position (e.g., an open position, such that the switch provides a high impedance signal path between the reactive element and one of the reconfigurable filter circuit terminals), the reconfigurable filter circuit is provided with a second, different filter characteristic.

[0013] In an embodiment, the second terminal of one of the reactive elements is coupled to a reference potential (e.g., ground). In an embodiment, the reactive elements may include one or more capacitive and / or inductive and / or resistive elements. In an embodiment, the switching element may include one or more of the following: a transistor (e.g., a field effect transistor); a diode; or any other circuit element capable of effectively electrically connecting or disconnecting (or otherwise electrically isolating) one or more reactive elements from the reconfigurable filter circuit. In an embodiment, the reactive elements may include one or more elements having capacitive impedance characteristics within a predetermined frequency range and / or one or more elements having inductive impedance characteristics within a predetermined frequency range. In an embodiment, the reactive elements may include one or more capacitors and / or inductors. In an embodiment, the reconfigurable filter circuit may include one or more resistive elements coupled in series or in parallel with one or more capacitive and / or inductive elements.

[0014] The power modulation system is applicable to any type of power modulation (analog or digital).In an embodiment, the power modulation system is provided as a discrete power modulation system. BRIEF DESCRIPTION OF THE DRAWINGS

[0015] The foregoing features will be more fully understood through the following description of the accompanying drawings, in which:

[0016] Figure 1 is a block diagram of an exemplary embodiment of a radio frequency (RF) transmitter including a power management circuit (PMC) having a single output and a multi-stage (or split) pulse shaping network (PSN);

[0017] Figure 2 is a block diagram of another exemplary embodiment of an RF transmitter including a single-output PMC having a multi-stage (or split) PSN coupled thereto;

[0018] Figure 3 is a block diagram of an exemplary RF transmitter having an alternative embodiment of a single-output PMC and a multi-stage PSN coupled to multiple RF amplifiers;

[0019] Figure 4 is a block diagram of an exemplary RF transmitter having an alternative embodiment of a multi-output PMC and a multi-stage PSN coupled to multiple RF amplifiers;

[0020] Figure 5 is a block diagram of an exemplary embodiment of a multi-level PSN;

[0021] Figure 6 is a block diagram of an alternative embodiment of a multi-level PSN;

[0022] Figure 7 is a block diagram of an alternative embodiment of a multi-level PSN;

[0023] Figure 8 is a schematic diagram of an exemplary filter circuit suitable for use in a multi-stage PSN having a branch having a shunt capacitor coupled in series with a resistive element between a filter terminal and a reference potential;

[0024] Figure 8A is a schematic diagram of an exemplary filter circuit suitable for use in a multi-stage PSN having a branch having a shunt capacitor coupled in series with an inductive element between a filter terminal and a reference potential;

[0025] Figure 8B is a schematic diagram of an exemplary filter circuit suitable for use in a multi-stage PSN, the filter circuit having parallel inductive and capacitive paths coupled between filter terminals;

[0026] Figure 8C is a schematic diagram of an exemplary filter circuit suitable for use in a multi-stage PSN, the filter circuit having a shunt capacitor coupled in series with a switch between a filter terminal and a reference potential;

[0027] Figure 8D is a schematic diagram of an exemplary filter circuit suitable for use in a multi-stage PSN, the filter circuit having a shunt capacitor coupled in series with a switch between a filter terminal and a reference potential;

[0028] Figure 8E is a block diagram of an exemplary PSN;

[0029] Figure 9is a block diagram of an exemplary integrated circuit (IC) having a separate PSN;

[0030] Figure 9A is a block diagram of an exemplary IC with a separate PSN;

[0031] Figure 10 is a block diagram of an exemplary hybrid circuit having a PMC coupled to a multi-stage PSN;

[0032] Figure 10A is a block diagram of an alternative exemplary hybrid circuit having a PMC coupled to a multi-stage PSN;

[0033] Figure 11 is a block diagram of an exemplary circuit having a PMC module and an RF amplifier module, wherein at least one of the modules comprises at least a portion of a multi-stage PSN; and

[0034] Figure 11A is a schematic diagram of a portion of an RF amplifier module including a portion of a multi-stage PSN. DETAILED DESCRIPTION

[0035] Now refer to Figure 1 An exemplary radio frequency (RF) transmission system 10 capable of achieving both high efficiency and high linearity includes a discrete power modulation system 12 that supplies a bias voltage signal to a bias (or power) terminal 23 of a radio frequency amplifier 24 .

[0036] The discrete power modulation system 12 includes a controller 14 that includes control logic circuitry 16 (or more simply, control logic 16). The control logic 16 may receive or otherwise obtain transmit data to be transmitted into a wireless channel. This transmit data may be in any format (e.g., a binary bit stream; I and Q data; etc.). The control logic 16 may then use this data, along with other possible factors, to provide a signal to a digital-to-RF modulator 18, which receives the signal provided thereto and generates a corresponding RF signal to be transmitted.

[0037] In some embodiments, the goal may be to generate an RF transmit signal that includes an accurate representation of the transmit data. The transmit data within the RF transmit signal may be represented using any of several different modulation and coding schemes (MCSs). MCSs may include, for example, binary phase shift keying (BPSK), quadrature phase shift keying (QPSK), quadrature amplitude modulation (e.g., QAM, 16QAM, 64QAM, 128QAM, etc.), orthogonal frequency division multiplexing (OFDM), and the like. Some of these MCSs have a higher peak-to-average power ratio.

[0038] MCS with high peak-to-average power ratios typically require highly linear power amplification (e.g., via a Figure 1 In various embodiments described herein, a transmit system and technique are described that can provide efficient power amplification with sufficient linearity to support an MCS having a high peak-to-average power ratio and / or having stringent error vector magnitude (EVM) requirements.

[0039] like Figure 1 As shown, control logic 16 acquires transmit data (e.g., I and Q data of a data stream to be transmitted from RF transmitter 10 (i.e., transmit data)) and uses this data to provide input information to a digital-to-RF modulator 18 and power management circuitry 20. In one possible approach, control logic 16 may provide separate I and Q data to the digital-to-RF modulator. The digital-to-RF modulator may then use this I and Q information to modulate an RF carrier to generate a corresponding RF signal at its output. As is well known, I and Q data typically represent amplitude and phase. Thus, I and Q may, for example, have corresponding amplitudes A and phases θ.

[0040] Thus, the RF signal output by the digital-to-RF modulator in response to data provided thereto (e.g., I and Q data) may be an RF signal having an amplitude A and a phase θ. In some embodiments, the input information provided to the digital-to-RF modulator may be in a format other than I and Q. For example, in one possible approach, the controller 14 may transmit amplitude and phase (A, θ) information to the digital-to-RF modulator. As described above, in some embodiments, the input information provided to the digital-to-RF modulator may vary sample by sample.

[0041] Regardless of the format in which the digital-to-RF modulator 18 receives the data provided to it, the digital-to-RF modulator 18 provides an RF signal to an input 24a of an RF amplifier 24. Those skilled in the art will understand how to select the characteristics of the RF amplifier 24 to suit the needs of a particular application. In some applications (e.g., mobile phone applications), the RF amplifier 24 comprises an RF power amplifier. The RF amplifier 24 receives the RF signal provided to it and provides an amplified version of the RF signal at its output. For example, the output of the RF amplifier 24 can be coupled to the input of another RF circuit or an antenna.

[0042] As described above, the power management circuit (PMC) receives information (e.g., a control signal) provided to it from the control logic 16 and, in response, provides a variable power supply bias voltage (i.e., a bias voltage signal) to the RF amplifier 24 (e.g., an RF power amplifier). In an embodiment, the variable power supply bias voltage is provided in pulses, with each pulse having one of several discrete voltage levels. That is, the PMC provides one of a plurality of discrete bias voltages to the bias terminal of the RF amplifier. These discrete voltage supply levels provided by the PMC can be predetermined or can be adjusted over time based on the desired average transmit power level or other factors.

[0043] Transitions between pulses of different voltage levels (i.e., transitions from one voltage level to another) can induce undesirable frequency components in the varying power supply bias voltage signal V(t) (i.e., the bias voltage signal). This variable power supply bias voltage is provided to the bias (or power supply) terminal 23 of the amplifier 24 via a multi-stage pulse shaping network (PSN) 22. The multi-stage PSN is used to filter out or otherwise remove undesirable frequency components from the bias voltage signal. The filtered bias voltage signal is then provided to the supply terminal 25 of the RF amplifier 24.

[0044] As also described above, the PMC provides a variable power supply bias voltage V(t) to the RF amplifier based on a control signal from the control logic 16. The PMC can be configured to selectively supply one of a plurality of discrete voltages to the RF amplifier, and can supply the discrete voltage to the RF amplifier via the PSN.

[0045] For reasons that will become apparent from the description provided below, the multi-stage PSN includes multiple stages that are spaced apart (i.e., physically spaced apart), which may include, for example, lossless filter elements, including inductors and capacitors, and may also include lossy elements, such as resistors and ferrite beads. The multi-stage PSN is used to provide shaping and / or bandwidth limiting for voltage transitions between discrete voltage levels and may provide damping for oscillations that may otherwise occur. In embodiments, the multi-stage PSN may be selected to provide a desired filter response characteristic.

[0046] Significantly, and as will become apparent from the description provided below, the multi-stage PSN is physically divided into multiple stages. This approach allows the multi-stage PSN to provide appropriately filtered bias signals to multiple amplifiers without duplicating all PSN components with each additional amplifier. The multi-stage PSN 22 is provided with desired stopband and rejection band frequency characteristics, as well as desired passband frequency and rise time characteristics.

[0047] Such a multi-level PSN arrangement is suitable for use in transmission systems in mobile phones operating according to fifth-generation (5G) communications and other connection protocols such as 802.11a / b / g / n / ac / ax / ad / ay. Such a multi-level PSN arrangement is also suitable for use in 5G multiple-input multiple-output (MIMO) uplink carrier aggregation (ULCA) and beamforming systems.

[0048] Now refer to Figure 2 , RF transmitting circuit 30 includes PMC 20 '(which can be combined with the above Figure 1 The PMC 20 is the same as or similar to the PMC 20 described above, the PMC 20' having a module configured to receive (eg, from a controller such as the one described above in conjunction with Figure 1 The controller 14 (e.g., controller 14) described above is provided with an input of information (e.g., a control signal) and responsive thereto provides a variable power supply bias voltage (e.g., a bias signal having one of a plurality of discrete different voltage levels at a particular point in time) to an RF amplifier 24' having an RF input 24a', an RF output 24b', and a power supply terminal 25'.

[0049] A variable power supply bias voltage is provided to the amplifier 24' by a multi-stage PSN 22' which can be combined with the above Figure 1 In this exemplary embodiment, the multi-stage PSN 22' includes a first PSN stage 32 (at Figure 2 designated as "PSN Class A" in the ) and a second PSN Class 34 physically separated from PSN Class A (in Figure 2 designated as "PSN Grade B").

[0050] By physically dividing the PSN 22' into multiple levels, it is not necessary to Figure 2 The first PSN level (ie, Figure 2 In one embodiment, the multi-level PSN method is used to place components of a PSN circuit in a level A). This method enables the flexibility of placing larger PSN components on a substrate (e.g., a printed circuit board (PCB)) in areas of the substrate that can better accommodate larger circuit structures. That is, the multi-level PSN method allows PSN components that require an area or volume (commonly referred to as space or available area) that is larger than the area or volume required by most of the other components that make up the PMC to be physically located in an area of ​​the PCB that can accommodate such components. In addition, the multi-level PSN method allows the use of parasitic elements (e.g., parasitic inductors), which allows the size of circuit components to be reduced (and ideally, the elimination of circuit components). For a PSN provided according to the multi-level PSN technology described herein, this achieves space savings and also reduces costs.

[0051] Utilizing this multi-stage PSN approach, the receive baseband (RxBN) and out-of-band emissions of a discrete power supply modulated transmitter can be controlled while maintaining linearity and efficiency, while also accommodating an amplifier (e.g., RF PA) that is physically far away from the IC or PMC on a PCB or any type of substrate in a cost-effective manner and suitable for mobile device form factors.

[0052] In some embodiments, one or more RF amplifiers may be used to generate a transmit signal in an RF transmitter. For example, Figure 3 is a block diagram illustrating an RF transmitter including a plurality of power amplifiers according to an embodiment.

[0053] Now refer to Figure 3 , PMC 36 has a module configured to receive (e.g., from a source such as the one described above) Figure 1 The controller 14 is a controller of the embodiment of the present invention. ...

[0054] A variable power supply bias voltage is provided to the amplifiers 42a-42N via the multi-stage PSN 30. In this exemplary embodiment, the multi-stage PSN 30 includes a first PSN stage 38 ( Figure 3 designated as "PSN-Class A" in the Figure 3 In this exemplary embodiment, the number of second PSN stages 40 matches the number of amplifiers 42 (i.e., there is a 1:1 correspondence between the number of PSN second stages and the number of amplifiers receiving voltage supply signals via PSN 30).

[0055] Using this approach, the RxBN and out-of-band emissions of a discrete supply modulated transmitter can be controlled while maintaining linearity and efficiency while also accommodating multiple amplifiers 42 that are physically remote from the PMC in a cost-effective manner suitable for mobile device form factors.

[0056] Furthermore, the characteristics of each second PSN stage 40 may be matched to the characteristics of the RF amplifier to which the PSN is coupled. Of course, it will be appreciated that in other embodiments, a single second PSN stage may be coupled to multiple RF amplifiers 40.

[0057] By physically dividing the multi-stage PSN, the components of the first PSN stage (i.e., stage A) do not need to be replicated for each amplifier. Thus, the multi-stage PSN serves multiple amplifiers 42a-42n while having only multiple second stages. By not having to replicate the entire PSN for each amplifier, this approach saves available area on the PCB (or similarly, can reduce the size of the PCB required to accommodate the PMC, PSN, and amplifiers (and associated circuitry)).

[0058] Thus, utilizing this multi-stage PSN approach, the receive baseband (RxBN) and out-of-band emissions of a discrete power supply modulated transmitter can be controlled while maintaining linearity and efficiency, while also accommodating multiple amplifiers (e.g., RF PAs) that are physically located far away from the PMC in a cost-effective manner suitable for mobile device form factors.

[0059] Now see Figure 4 , a portion of the transmitting circuit includes a PMC 44, which has a configuration (e.g., from a combination of Figure 1 1 . The PMC 44 receives a control signal from the control logic circuit 16 (described above). The PMC 44 has multiple outputs (i.e., the PMC 44 is a multi-output PMC). In this exemplary embodiment, to facilitate clarity in the text and figures, the PMC 44 is illustrated as a dual-output PMC. Those skilled in the art will of course recognize that the PMC 44 can have any number of outputs, and that the particular number of outputs selected for the PMC 44 depends on a variety of factors, including, but not limited to, the number of amplifiers receiving signals from the PMC 44 and the requirements of a particular application.

[0060] In this exemplary embodiment, each output 44a, 44b of the PMC 44 is coupled to a corresponding first PSN stage 46a, 46b. The output of each first PSN stage 46a, 46b is coupled to a corresponding one of the second PSN stages 48a, 48b, 48c, 48d. The outputs of the second PSN stages 48a-48d are coupled to the bias terminals of RF amplifiers 50a, 50b, 52a, 52b, respectively.

[0061] therefore, Figure 4A transmit circuit is shown that includes a plurality (here, four) of RF amplifiers 50a, 50b, 52a, 52b and includes a PMC 44 that provides a variable power supply bias voltage (e.g., selected ones of a plurality of power supply bias voltages in the case of power supply modulation) to bias terminals of the amplifiers 50a, 50b, 52a, 52b via a bias supply signal path having respective ones of a pair of multi-stage PSNs 45a, 45b coupled thereto. In this exemplary embodiment, the first PSN 45a includes a first PSN stage 46a (at Figure 4 designated as "PSN Class A1" in the Figure 4 The second PSN 45b includes the first PSN level 46b (designated as "PSN level A1B1" and "PSN level A1B2" in Figure 4 designated as "PSN Class A2" in the Figure 4 designated as "PSN Grade A2B1" and "PSN Grade A2B2" in the .

[0062] It should be understood that the electrical characteristics of the second PSN stages 48a, 48b are selected or configured to work with the electrical characteristics of the first PSN stage 46a and the corresponding RF amplifier to which the second stage is coupled, while the electrical characteristics of the second PSN stages 48c, 48d are selected or configured to work with the electrical characteristics of the first PSN stage 46b and the corresponding RF amplifier to which the second stage is coupled. Therefore, although the characteristics of the first PSN stages A1, A2 may be different and the characteristics of the second PSN stages A1B1, A1B2, A2B1, A2B2 may be different, the first and second stages cooperate to provide appropriate and desired filtering to the variable power supply bias voltage provided to the amplifiers 50a, 50b, 52a, 52b.

[0063] In general, it is desirable to provide a PSN having at least one, or ideally all, of the following qualities / characteristics: a desired amount of signal attenuation in the receive band (i.e., achieving a desired amount of attenuation from input to output at a desired offset frequency); a desired unloaded voltage step response (i.e., achieving a desired peak output voltage in response to a voltage step at the input, assuming the PSN is unloaded (i.e., the PA is not biased)); a desired loaded voltage step response (i.e., achieving a desired peak output voltage in response to a voltage step at the input, assuming the PSN is loaded (i.e., the PA is biased)); a desired AC output impedance (i.e., achieving a desired output voltage change in response to a varying AC load current for a fixed input voltage at a desired frequency); a desired DC output impedance (i.e., achieving a desired output voltage change in response to a varying DC load current for a fixed input voltage); and a desired maximum inrush current (i.e., achieving a desired peak current that the PMIC must provide to the PSN during a voltage step). PSNs with other qualities / characteristics may also be desirable.

[0064] It should be understood that, although only two first stages and four second stages are shown in this exemplary embodiment, in other embodiments, the PMC can be coupled to more than two first stages, and each first stage can be coupled to more than two second stages. In general, a PMC can be provided with N outputs (where N is an integer greater than or equal to 1), so that the PMC can be coupled to at least up to N first PSN stages, and each of the N first PSN stages can be coupled to up to M second stages (where M is an integer greater than or equal to 1). Furthermore, each of these second PSN stages can be coupled to P amplifiers (where P is an integer greater than or equal to 1).

[0065] Despite Figure 4 In the exemplary embodiment described in , the number of second PSN stages 48 matches the number of amplifiers 50 (i.e., there is a 1:1 correspondence between the number of second PSN stages and the number of amplifiers receiving voltage supply signals via PSN 30), in some embodiments, one or more of the second PSN stages may be coupled to more than one RF amplifier.

[0066] Now refer to Figure 5 The combined multi-stage PSN 60 includes combined stages (Stage A and Stage B). These stages are constructed using series and parallel impedances formed using resistors, inductors, capacitors, and / or magnetic and / or ferrite beads. Depending on the system constraints, several different types of stages can be used individually or in cascade to meet the requirements.

[0067] Now refer to Figure 6 , the multi-level PSN 64 includes a first PSN level 66 (at Figure 6designated as "PSN Class A" in the Figure 6 In this exemplary embodiment, the second PSN stages 68a, 68b have the same or similar electrical characteristics and are configured to couple to RF amplifiers having similar electrical characteristics. Of course, in embodiments where the RF amplifiers are not well matched (e.g., the electrical characteristics of the RF amplifiers 50a, 50b are different from each other), the electrical characteristics of the second PSN stages (e.g., PSN stages 68a, 68b) will also be different from each other, thereby achieving the same electrical characteristics as the corresponding RF amplifiers (e.g., Figure 4 The desired performance of the RF amplifiers 50a, 50b) in FIG.

[0068] Thus, in an embodiment, the choice of electrical characteristics (and thus components) provided to the PSN stage depends on the electrical characteristics of the PA to which the second PSN stage is coupled or the requirements of the frequency band in which the PA operates.

[0069] It should be understood that the PMC and the first PSN stage (eg, PSN stage A) may be located considerably away from the second PSN stage (eg, PSN stage B) and the RF amplifier (eg, PA) receiving the variable supply bias voltage.

[0070] Now refer to Figure 7 , a portion of the transmit circuitry 70 includes a first circuit corresponding to the power management circuitry 72, the first circuit being provided as an integrated circuit (PMIC) having at least a portion of a first stage of a multi-stage PSN provided as a component thereof (i.e., at least a portion of the first PSN stage is incorporated into a PMC circuit, for example, by utilizing parasitic elements associated with the PMC and / or a signal path coupling the second PSN stage to the PMC). Thus, at least a portion of the first stage of the multi-stage PSN (ideally, the entire first stage of the multi-stage PSN) is incorporated (or integrated) with at least a portion of the PMC.

[0071] The circuit portion 70 also includes a pair of second circuits 74a, 74b corresponding to a number of RF amplifiers (which may be, for example, RF power amplifiers) having at least a portion of a second stage of a multi-stage PSN integrated therewith (i.e., at least a portion of the second PSN stage is incorporated into each RF amplifier). Figure 7 As shown, each of the second stages of the multi-stage PSN is at least partially integrated with a corresponding one of one or more RF amplifiers (e.g., by utilizing parasitic elements associated with the RF amplifier and / or a signal path coupling the second PSN stage to the RF amplifier).

[0072] It should be noted that although Figure 7In the exemplary embodiment of FIG, only two RF amplifiers are shown, but any number of RF amplifiers may be used. It should also be noted that the integrated PMC and PSN stage A can be located at a considerable distance from the integrated PSN stage B and RF amplifier. Therefore, as shown and described, the inductive and capacitive parasitic characteristics (sometimes referred to as parasitic elements) caused by the interconnect structure between stages A and B (as well as the structure within the PMC and RF amplifier) ​​can be designed into the overall impedance characteristics and / or response characteristics of the PSN.

[0073] exist Figure 7 In the exemplary embodiment shown in , the first and second stages of the PSN are absorbed (e.g., by using parasitic inductors and capacitors) into the corresponding PMC and RF amplifier circuits (thus, the filtering characteristics / functions performed by the PSN are similarly absorbed into the corresponding PMC and RF amplifier circuits). Thus, the multi-stage PSN approach described herein achieves a modular solution for PMCs and PAs that can consolidate PSN stages, thereby further reducing the materials required to fabricate the RF transmit circuit as an IC.

[0074] Now see Figure 8-8E , shows a series of filter circuits suitable for use in each stage of a multi-stage PSN. Figure 8C 、 8D As described in 8E, the PSN stage can be made reconfigurable using switches to adjust the electrical characteristics of the filter for different usage scenarios.

[0075] Now refer to Figure 8 , a passive filter circuit 80 having first and second terminals 80a, 80b includes an inductor L coupled in series (i.e., the inductor L is coupled in series between the terminals 80a, 80b of the filter circuit 80). A first terminal of a capacitor C is coupled to the first of the first and second terminals of the inductor L, and a second terminal of the capacitor C is coupled to a first terminal of a resistor R. A second terminal of the resistor R is coupled to a reference potential (illustrated here as ground). After reading the disclosure provided herein, one of ordinary skill in the art will also recognize that the reference potential V REF Can correspond to ground or some positive or negative potential (e.g., any positive or negative voltage). Select the particular reference potential V to be used. REF To suit the needs of specific applications.

[0076] Now refer to Figure 8AThe passive filter circuit 82 having first and second terminals 82a, 82b includes a series-coupled inductor L1 (i.e., the inductor L1 is coupled in series between the terminals 82a, 82b of the filter circuit 82). A first terminal of a capacitor C1 is coupled to the first of the first and second terminals of the inductor L1, and a second terminal of the capacitor C1 is coupled to a first terminal of a second inductor L2. A second terminal of the inductor L2 is coupled to a reference potential V REF .

[0077] Now refer to Figure 8B The passive filter circuit 84 includes a pair of signal paths coupled in parallel between first and second filter terminals 84a and 84b. The first of the parallel signal paths includes an inductor L3 having a first terminal coupled to the first filter terminal 84a and a second terminal coupled to the second filter terminal 84b. The second of the parallel signal paths includes a capacitor C2 having a first terminal coupled to the first filter terminal 84a and a second terminal coupled to the first terminal of a resistor R1. The second terminal of the resistor R1 is coupled to the second filter terminal 84b.

[0078] Now refer to Figure 8C The reconfigurable filter circuit 89 having first and second terminals 89a, 89b includes a series-coupled inductor L5 (i.e., the inductor L5 is coupled in series between the terminals 89a, 89b of the filter circuit 89) and a shunt-coupled capacitor C6. The first terminal of the capacitor C6 can be coupled to the first or second terminal of the inductor L5. The second terminal of the capacitor C6 is coupled to a reference potential V via a switch S3. REF The reconfigurable filter circuit 89 thus comprises at least one switchable signal path (ie, a signal path comprising the switching element S3). Figure 8C In the exemplary embodiment of the present invention, the reconfigurable filter circuit 89 includes a terminal coupled to the capacitor C6 and a reference potential V REF Of course, one of ordinary skill in the art will recognize that the positions of capacitor C6 and switch S3 can be reversed (i.e., the first terminal of switch S3 can be coupled to the first or second terminal of inductor L5, the second terminal of switch S3 can be coupled to the first terminal of capacitor C6, and the second terminal of capacitor C6 can be coupled to the reference potential V REF After reading the disclosure provided herein, one of ordinary skill in the art will also recognize that the reference potential V REF Can correspond to ground or some positive or negative potential (e.g., any positive or negative voltage). Select the particular reference potential V to be used. REF To suit the needs of specific applications.

[0079] In a practical system, the switches may be switched between their "on" and "off" states on a time scale consistent with the time required to determine the load impedance and / or performance characteristics of the RF amplifier and / or the performance characteristics of the RF transmit system employed over a period of time (thus, this may be considered a relatively slow time scale compared to the switching speed of the switches). In embodiments, the switches may be switched between their "on" and "off" states in response to average characteristics of any or all of: (1) the load impedance characteristics; and / or (2) the performance characteristics of the RF amplifier and / or (3) the performance characteristics of the RF transmit system. In some embodiments, the switches may be switched between their "on" and "off" states in response to substantially instantaneous impedance changes (i.e., the switch state may be changed as quickly as the impedance change can be identified), rather than switching on a slower time scale (i.e., slower relative to the instantaneous time scale, such as in response to the average characteristics).

[0080] Now refer to Figure 8D , a reconfigurable filter circuit 86 having first and second terminals 86a, 86b includes an inductor L4 coupled in series (i.e., the inductor L4 is coupled in series between the terminals 86a, 86b of the filter circuit 86). A first terminal of a resistor R2 is coupled to the first of the first and second terminals of the inductor L4. A second terminal of the resistor R2 is coupled to a variable capacitance network 88 capable of providing a variable capacitance. The variable capacitance network 88 includes at least one switchable signal path (i.e., a switching path including a switching element). Figure 8D In the exemplary embodiment of the present invention, the variable capacitance network includes three signal paths, two of which are switchable signal paths. These switchable signal paths (e.g., switchable elements S1, S2) can be configured according to the above combination. Figure 8C Any technology described is switched.

[0081] Specifically, the network 88 includes a resistor R2 coupled to a reference potential V REF (Here, the reference potential corresponds to ground) between one or more capacitors (in this exemplary embodiment, three capacitors C3, C4, and C5 are shown). At least one capacitor in network 88 is coupled to a switch. The switch can be arranged (i.e., provided on either side of the capacitor) so that it operates to connect or disconnect conduction between the resistor and the capacitor or between the capacitor and the reference potential VREF.

[0082] In this exemplary embodiment, a pair of switches S1 and S2 are coupled in series between respective capacitors C3 and C5 and a reference potential. In response to a switch providing a low-impedance signal path between the capacitor and the reference potential (i.e., in response to the switch being "closed"), the reconfigurable filter circuit 86 has a first filter characteristic. In response to a switch providing a high-impedance signal path between the capacitor and the reference potential (i.e., in response to the switch being "open"), the reconfigurable filter circuit 86 has a second, different filter characteristic.

[0083] Typically, each switchable signal path having 2 states (ie, on and off) provides two different filter characteristics. Typically, for N switchable signal paths each having 2 states, 2 N Different filter characteristics are possible.

[0084] If coupled to an RF amplifier (e.g., Figure 1 If the impedance of the RF load at the output of the RF amplifier 24 changes or is continuously changing, the operating characteristics of the RF amplifier will also change (i.e., the changing load impedance affects the operation of the RF amplifier, thereby affecting the performance of the RF amplifier). By using a reconfigurable filter circuit, the filtering and / or impedance characteristics of the reconfigurable filter circuit can be changed to achieve or maintain the desired performance of the RF amplifier (e.g., in response to the changing RF load characteristics).

[0085] As above combined Figure 8C As noted, in a practical system, the switches may be switched between their "on" and "off" states on a time scale consistent with the time required to determine the load impedance characteristics and / or performance characteristics of the RF amplifier and / or the performance characteristics of the RF transmit system employed over a period of time (and thus, this may be considered a relatively slow time scale compared to the switching speed of the switches). In embodiments, the switches may be switched between their "on" and "off" states in response to average characteristics of any or all of: (1) the load impedance characteristics; and / or (2) the performance characteristics of the RF amplifier and / or (3) the performance characteristics of the RF transmit system. In some embodiments, the switches may be switched between their "on" and "off" states in response to substantially instantaneous impedance changes (i.e., the switch state may be changed as quickly as the impedance change can be identified), rather than switching on a slower time scale (i.e., slower relative to the instantaneous time scale, such as in response to the average characteristics).

[0086] Despite Figure 8DIn the exemplary embodiment of , the network 88 includes three capacitors coupled in parallel, one of which is directly coupled to a reference potential (illustrated here as ground) and two of which are coupled to the reference potential (illustrated here as ground) through switches, but a person skilled in the art will recognize that the reconfigurable filter circuit 86 may be provided according to a wide range of other circuit implementations.

[0087] For example, and with reference Figure 8E The reconfigurable filter circuit 90, having first and second terminals 90a, 90b, includes a plurality of impedance elements 92, 94 having a plurality of switched impedance elements 95a-95n coupled thereto. Each of the switched impedance elements 95a-95n includes at least one impedance element 96, 100, 104, which may include, for example, lossless elements (including inductors and capacitors) and may also include lossy elements (such as resistors and ferrite beads). The switched impedance elements 95a-95n also include a switch element 98, 102, 106 that is capable of switching at least one of the impedance elements 96, 100, 104 in a manner that changes the impedance presented by the PSN stage (of which the reconfigurable filter circuit 90 is a part).

[0088] It will be appreciated that, in general, at least one switching element is configured to selectively couple at least one reactive element between a reference potential and at least one of the first and second terminals of the reconfigurable filter circuit. For example, in an embodiment, the reactive element and the switching element (e.g., Figure 8D The elements 96, 98 in FIG. 1 are positioned such that a switching element (e.g., switching element 98) has a first terminal coupled to one of the first and second filter terminals and a second terminal coupled to a first terminal of the reactive element (e.g., reactive element 96). A second terminal of the reactive element (e.g., reactive element 96) is coupled to a reference potential. Figure 10 and 10A An example of such a configuration is shown in .

[0089] It should be further understood that by placing a switch in each of two or more signal paths, one of a plurality of different filtering characteristics over a predetermined RF band can be provided. These switches can be independently operated to provide the desired filter characteristics. For example, using N switchable signal paths (N being an integer greater than or equal to 1), the reconfigurable filter circuit can provide up to 2 N Different filter characteristics.

[0090] In an embodiment, at least one of the at least two or more signal paths comprises a switch element having a first terminal coupled to one of the first and second terminals of the reconfigurable filter circuit and a second terminal coupled to the first terminal of one of the reactive elements.

[0091] By providing a switch element coupled between one of the reconfigurable filter circuit terminals and the reactive element, the characteristic impedance of the reactive element can be switched in and out of the filter circuit (thereby making the filter circuit reconfigurable). In one embodiment, by placing the switch in a first switch position (e.g., a closed position, such that the switch provides a low-impedance signal path between the reactive element and one of the reconfigurable filter circuit terminals), a reconfigurable filter circuit having a first filter characteristic is provided, and by placing the switch in a second, different switch position (e.g., an open position, such that the switch provides a high-impedance signal path between the reactive element and one of the reconfigurable filter circuit terminals), a reconfigurable filter circuit having a second, different filter characteristic within a desired frequency band is provided.

[0092] In an embodiment, a second terminal of one of these reactive elements is coupled to a reference potential V REF (For example, it can be ground).

[0093] Now refer to Figure 9 , a multiple-input multiple-output (MIMO) transmit circuit implemented as an integrated circuit (i.e., a monolithic integrated circuit) 110 includes a pair of RF power amplifiers 114a, 114b having RF inputs to which RF signals are provided via signal paths 112a, 112b. The transmit circuit 110 also includes a PMC 116 having an input (the PMC 116 may be functionally the same as or similar to any of the PMCs described above) configured to receive (e.g., from a PMC such as described above in conjunction with a PMC). Figure 1 The PMC is configured to receive information (e.g., control signals) provided thereto by the controller 14 (e.g., a controller). In response to such control signals, the PMC is configured to provide variable power supply bias voltage signals via the first stage of the PSN (PSN stage A) 118. The first PSN stage 118 appropriately processes these signals (e.g., via filtering or partial filtering operations) and provides the appropriately processed power supply bias voltage signals to the respective second PSN stages (PSN stage B) 122a, 122b along signal paths 120a, 120b. The second PSN stages 122a, 122b further process the signals provided thereto (e.g., via filtering or partial filtering operations) and provide the appropriately processed (e.g., appropriately filtered) power supply bias voltage signals to the power supply terminals of the respective RF amplifiers 114a, 114b.

[0094] As described above, the respective RF amplifiers 114a, 114b receive RF signals along the respective RF signal paths 112a, 112b, amplify those signals, and provide the amplified RF signals to the respective ones of the antennas 115a, 115b via which the RF transmit signals are transmitted.

[0095] It should be noted that the PMC 116 and PSN stage A 118 are located at a considerable distance from the PSN stages B 122a, 122b and the associated PAs 114a, 114b. Figure 9 In the exemplary embodiment of FIG. 1 , the PMC 116 and PSN stage A 118 are positioned at one end of the IC 110 , while the PSN stages B 122 a , 122 b and associated PAs 114 a , 114 b are positioned at a substantially opposite end of the IC 110 .

[0096] As described above, by physically dividing the PSN into multiple levels (here, two levels including the first level 118 and the second level 122a, 122b), components of the first PSN level (i.e., Level A) do not need to be replicated. This approach reduces the amount of area required on the IC to accommodate the PSN and can provide flexibility to place relatively large PSN components (i.e., PSN components that require a larger amount of available area on the integrated circuit (IC)) in areas of the IC that can better accommodate larger circuit structures.

[0097] Furthermore, utilizing this multi-stage PSN approach, the receive baseband (RxBN) and out-of-band emissions of a discrete power supply modulated transmitter can be controlled while maintaining linearity and efficiency, while also accommodating multiple RF amplifiers (e.g., multiple RF PAs) that are physically remote from the PMC on the IC in a cost-effective manner and suitable for mobile device form factors.

[0098] It should be understood that although Figure 9 The embodiment of the present invention is illustrated as an integrated circuit, but the circuit can also be implemented using a mixture (ie, a combination) of discrete circuit elements and integrated circuits. Figure 10-11 Examples of such embodiments are described.

[0099] Now refer to Figure 9A , among which, Figure 9Similar elements are provided with similar reference numerals, and the transmit circuit implemented as integrated circuit 110' includes curved signal paths 120a', 120b'. In some embodiments, it may be desirable or even necessary (e.g., due to circuit layout constraints or other factors) to include relatively long signal paths having curved or other non-linear shapes. Signal paths having lengths that cause parasitic inductance and / or capacitance and / or resistance (sometimes simply referred to as "parasitics") are sometimes referred to as "long" signal paths. Long signal paths having curved or other shapes may be particularly prone to generating parasitic inductance and / or capacitance and / or resistance. The effects of such parasitics may be further increased or enhanced in the presence of long signal paths, and may be even further increased in the presence of long curved signal paths.

[0100] As mentioned above, the PMC 116 and PSN Stage A 118 are located at a considerable distance from the PSN Stage B 122a', 122b' and the associated PAs 114a', 114b'. Figure 9A In the exemplary embodiment of FIG1 , PMC 116 and PSN stage A 118 are positioned at one end of IC 110, while PSN stages B 122a', 122b' and associated PAs 114a', 114b' are positioned at a substantially opposite end of IC 110. Therefore, the length of signal paths 122a', 122b' is significant, and parasitic effects may be present due to the shape and / or physical length of such signal paths between the first and second PSN stages. As described above, such parasitic inductances and / or capacitances may be utilized in the design of PSN stages, such as the first and / or second PSN stages.

[0101] Thus, in this embodiment, the impedance characteristics of the first PSN stage 118 and / or the second PSN stage 122a', 122b' may incorporate parasitic effects due to one or both of the signal paths 122a', 122b'.

[0102] Now refer to Figure 10 , a PMC 132 has been provided on a substrate 130, which PMC 132 may be the same as or similar to any of the PMCs described above. In an embodiment, the substrate may be provided as a printed circuit board (PCB) provided from any suitable single or multi-layer dielectric material (e.g., a glass fiber reinforced epoxy resin based material or a low temperature or low temperature co-fired ceramic (LTCC) material having a conductive layer provided therein or on an exposed surface thereof).

[0103] exist Figure 10 In an exemplary embodiment, the PMC is implemented as an integrated circuit disposed in an IC package, which may be, for example, a lead frame package, a substrate package, a wafer level package, or any other type of IC package known to those skilled in the art.

[0104] The PMC includes an input 132a coupled to an input signal path 134 provided on the PCB (e.g., etched or otherwise provided as part of the PCB using known additive or subtractive processes). The PMC input 132a is configured to receive a signal from a controller (e.g., as described above in conjunction with Figure 1 The PMC 132 receives control signals from the controller 14 described above. The PMC 132 also includes an output 132b coupled to a power supply bias voltage signal path 136. The signal path 136 can be etched or otherwise provided as part of the PCB using additive or subtractive processes known to those skilled in the art. As described above, the power supply bias voltage is provided at the PMC output 132b.

[0105] The first PSN stage 138a of the PSN 138 is coupled to the power supply voltage signal path. The first PSN stage can be implemented using discrete components electrically coupled to each other and to the power supply voltage signal path. The second PSN stage 138b is coupled to the power supply voltage signal path. The second PSN stage can be implemented using discrete components electrically coupled to each other and to the power supply voltage signal path. Thus, Figure 10 The circuit of represents a hybrid circuit implementation, which may include both integrated circuits (eg, PMC and RF amplifier) ​​and discrete components (eg, first and second PSN stages).

[0106] In an embodiment, the first PSN level is physically adjacent to the PMC. Figure 11 As shown and described above, the first PSN stage can be included as part of a PMC module (e.g., a single package including the PMC and the first PSN stage, regardless of how the PCM or first PSN stage is implemented). In this exemplary embodiment, the first PSN stage 138a includes a reconfigurable filter circuit 139 that operates in a manner similar to that described above in conjunction with the Figure 8C The reconfigurable filter circuit 88.

[0107] In an embodiment, the second PSN stage is physically adjacent to the amplifier bias terminal. Figure 11 As shown, the second PSN stage can be included as part of an amplifier module (e.g., a single package including an RF amplifier and a second stage PSN). Although the first PSN stage 138a includes active components (i.e., switches), the second PSN stage includes only passive components and is implemented as described above in conjunction with Figure 8 The circuit 80.

[0108] The power supply voltage signal path 136 is coupled to a power supply terminal 140 a (or a bias terminal) of an RF amplifier 140 disposed on the PCB. Therefore, a power supply voltage signal is provided from the PMC to the RF amplifier bias terminal through the power supply voltage signal path 136 .

[0109] The RF amplifier has an RF input 141a coupled to an RF input signal path 142 provided on the PCB and an RF output 141b coupled to an RF output signal path 144 provided on the PCB. The RF amplifier may be the same as or similar to any of the RF amplifiers described above.

[0110] Now refer to Figure 10A , among which, Figure 10 Like elements in FIG. 1 are provided with like reference numerals. In this exemplary embodiment, the first PSN stage 138a' includes all passive components, while the second PSN stage 138b' includes active components (ie, switches).

[0111] It will be further appreciated that in some applications it may be desirable to provide both the first and second PSN stages with all passive components. In other applications it may be desirable to provide both the first and second PSN stages with at least one active component (e.g., at least one switchable element, such as a switch comprising a transistor or a diode).

[0112] Now refer to Figure 11 , substrate 150 (which may be a combination of the above Figure 9-10A A PMC module 152 is provided on a substrate (of any type described above). The PMC module 152 includes a PMC and a first PSN stage (i.e., the PMC module is a single package that includes the PMC and at least a portion of the first PSN stage, regardless of how the PMC or the first PSN stage is implemented). In an embodiment, one or both or portions of the PMC and the first PSN stage may be implemented as an integrated circuit or may be implemented using discrete components (i.e., discrete circuit components).

[0113] The PMC module 152 includes an input signal path 154 coupled to the PCB (e.g., etched or otherwise provided as part of the PCB using known additive or subtractive processes) and configured to receive data from a controller (e.g., as described above in conjunction with Figure 1 The PMC module also includes an input 152a that receives a control signal from the controller 14. The PMC module also includes an output 152b that is coupled to a supply voltage signal path 156 (e.g., etched or otherwise provided as part of the PCB using known additive or subtractive processes) and provides a supply bias voltage at the output as described above.

[0114] Also disposed on the substrate is an RF amplifier module 158 that includes an RF amplifier and a portion of a second PSN stage (ie, a single package that includes an RF amplifier and at least a portion of a second PSN stage, regardless of how the RF amplifier or second PSN stage are implemented).

[0115] exist Figure 11 In the exemplary embodiment of FIG, the first portion 159 of the second PSN stage includes a capacitor 160 and an inductor 161 coupled in series between the supply voltage signal path 156 and a reference potential (here illustrated as ground), and the second PSN stage portion 159 is coupled to the bias terminal 158a of the adjacent RF amplifier module 158. The second portion of the second PSN stage is provided as part of the RF amplifier module, thereby Figure 11 Not visible in.

[0116] It should be understood that, in embodiments, the entire second PSN stage may be provided as part of the switch module. In embodiments, one or both of the RF amplifier and the second PSN stage (including all or part of the second PSN stage) may be implemented as an integrated circuit or may be implemented using discrete components (i.e., discrete circuit components).

[0117] from Figure 11A As can be more clearly understood, in an embodiment, the RF amplifier module 158′ includes a switch, which forms a switchable signal path portion of the second PSN stage 159′ together with the capacitor 165 and the resistor 167. Therefore, in this embodiment, the second PSN stage 159′ includes the capacitor 160′ and the switchable signal path portion including the capacitor 165, the resistor 167, and the switch 163, and a portion of the second PSN stage is implemented as the switch module (i.e., implemented as part of the switch module).

[0118] Therefore, it should also be appreciated that a similar approach can be used for the first PSN level. That is, in embodiments where the first PSN level includes switches, all or some of one or more switches can be implemented as (i.e., as part of) the PMC module.

[0119] It should also be understood that the supply voltage signal path (e.g., Figure 10 、 10A Path 136 or Figure 11 The path 156 in FIG1 may have the impedance characteristics of an inductor (i.e., the supply voltage signal path may appear electrically as a distributed inductive element). Therefore, any inductive characteristics of the supply voltage signal path may be absorbed or at least accounted for in the component selection for the first and second PSN stages.

[0120] In the above description, various concepts, circuits and techniques are discussed in the context of a discrete power modulation system for use with an RF transmitter for transmitting signals via a wireless medium. The concepts, circuits and techniques described herein are suitable for use in handsets (e.g., mobile phones) that operate according to 5G communication protocols and other connection protocols (e.g., 802.11a / b / g / n / ac / ax / ad / ay), and are also suitable for use in multi-transmitter applications, including but not limited to MIMO, uplink carrier aggregation (ULCA) and beamforming applications. It will be understood that these concepts, circuits and techniques also have applications in other contexts. For example, in some embodiments, the features described herein can be implemented within a transmitter or driver for wired communications. In some other embodiments, the features described herein can be implemented within other types of systems that require high efficiency and high linearity amplification for signals carrying data.

[0121] Having described exemplary embodiments of the concepts described, it will now be apparent to those skilled in the art that other embodiments incorporating the concepts herein may also be used. The embodiments contained herein should not be limited to the disclosed embodiments, but should be limited only by the spirit and scope of the appended claims. All publications and references cited herein are expressly incorporated herein by reference in their entirety.

Claims

1. A multi-stage pulse shaping network configured to be coupled to respective bias terminals of at least one radio frequency amplifier and configured for use in a discrete power supply modulation system, the multi-stage pulse shaping network comprising: (a) a first pulse shaping network stage having an input configured to be coupled to a power management circuit and having an output; (b) one or more second pulse shaping network stages, each of the one or more second pulse shaping network stages being physically spaced apart and remote from the first pulse shaping network stage, and each of the one or more second pulse shaping network stages having an input configured to be coupled to the output of the first pulse shaping network stage and having an output configured to be coupled to the bias terminal of at least one of the at least one RF amplifier; as well as (c) one or more signal paths, each of the one or more signal paths having a first end coupled to the output of the first pulse shaping network stage and having a second end coupled to the input of at least one of the one or more second pulse shaping network stages, wherein the first pulse shaping network stage and the one or more second pulse shaping network stages are together configured to filter signals resulting from transitions between discrete voltage levels received from the power management circuit.

2. The multi-stage pulse shaping network according to claim 1, wherein: The first pulse shaping network stage comprises a passive LC filter.

3. The multi-stage pulse shaping network according to claim 1, wherein: The first pulse shaping network stage is implemented by utilizing parasitic inductance and / or capacitance characteristics and / or resistance characteristics of at least one of the following: (a) the power management circuit; or (b) at least one of the one or more signal paths coupled between the output of the first pulse shaping network stage and the input of at least one of the one or more second pulse shaping network stages.

4. The multi-stage pulse shaping network according to claim 1, wherein: The first pulse shaping network stage is implemented using parasitic inductance and / or capacitance characteristics and / or resistance characteristics of at least: (a) the power management circuit; (b) at least one of the one or more signal paths coupled between the output of the first pulse shaping network stage and the input of at least one of the one or more second pulse shaping network stages; (c) at least one of the at least one radio frequency amplifier; as well as (d) Passive components comprising said first pulse shaping network stage.

5. The multi-stage pulse shaping network according to claim 1, wherein: At least one of the first pulse shaping network stages and at least one of the one or more second pulse shaping network stages include a reconfigurable filter circuit.

6. The multi-stage pulse shaping network according to claim 5, wherein: The reconfigurable filter circuit includes a switch element coupled between one or more reactive elements and a reference potential, so that characteristic impedances of the one or more reactive elements can be switched in and out of the reconfigurable filter circuit.

7. The multi-stage pulse shaping network according to claim 5, wherein: The reconfigurable filter circuit includes a switch element coupled between a reactive element and a reference potential, such that: In response to the switch being in a first switch state, the switch provides a low impedance signal path between the reactive element and the reference potential, so that the reconfigurable filter circuit is provided with a first filter characteristic; and In response to the switch being in a second, different switch state, the switch provides a high impedance signal path between the reactive element and the reference potential such that the reconfigurable filter circuit is provided with a second, different filter characteristic within a desired frequency band.

8. The multi-stage pulse shaping network according to claim 6, wherein: The one or more reactive elements include one or more capacitive and / or inductive elements.

9. The multi-stage pulse shaping network according to claim 6, wherein: The reconfigurable filter circuit includes one or more resistive elements coupled in series or in parallel with one or more capacitive and / or inductive and / or resistive elements.

10. The multi-stage pulse shaping network of claim 1 , further comprising a plurality of second pulse shaping network stages, each of the plurality of second pulse shaping network stages being physically spaced apart and remote from the first pulse shaping network stage, and each of the second pulse shaping network stages having an input configured to be coupled to an output of the first pulse shaping network stage and having an output configured to be coupled to a supply terminal of a corresponding one of a plurality of RF amplifiers.

11. The multi-stage pulse shaping network according to claim 1, wherein: The first pulse shaping network stage is positioned physically adjacent to the power management circuit, and at least one of the one or more second pulse shaping network stages is positioned physically adjacent to at least one of the at least one radio frequency amplifier.

12. The multi-stage pulse shaping network according to claim 1, wherein: At least one of the first pulse shaping network stage or the one or more second pulse shaping network stages is provided entirely by parasitic effects from one of: (1) Parasitic effects from the power management circuit; (2) parasitic effects from the signal path electrically coupling the first pulse shaping network stage to at least one of the one or more second pulse shaping network stages; (3) parasitic effects from a signal path electrically coupling at least one of the first pulse shaping network stage or the one or more second pulse shaping network stages to at least one of the at least one radio frequency amplifier; as well as (4) Parasitic effects from at least one of the at least one radio frequency amplifier.

13. The multi-stage pulse shaping network according to claim 1, wherein: At least one of the first pulse shaping network stage or the one or more second stages includes series and parallel impedances formed using two or more of resistors, inductors, capacitors, magnetic beads, and / or ferrite beads.

14. The multi-stage pulse shaping network according to claim 1, wherein: The first pulse shaping network stage is a first of a plurality of first pulse shaping network stages, and the multi-stage pulse shaping network further includes a plurality of second pulse shaping network stages, each of the plurality of second pulse shaping network stages being coupled to one or more first pulse shaping network stages.

15. The multi-stage pulse shaping network according to claim 14, wherein: At least one of the first pulse shaping network stage or the plurality of second pulse shaping network stages includes at least one switch to adjust electrical characteristics of the corresponding pulse shaping network stage.

16. The multi-stage pulse shaping network of claim 1, wherein: The first pulse shaping network stage is a first of a plurality of first pulse shaping network stages, and the multi-stage pulse shaping network further includes a plurality of second pulse shaping network stages, each of the plurality of first pulse shaping network stages being coupled to two or more of the plurality of second pulse shaping network stages.

17. The multi-stage pulse shaping network of claim 16, wherein: At least one of the plurality of first pulse shaping network stages or the plurality of second pulse shaping network stages includes at least one switch to adjust electrical characteristics of the corresponding pulse shaping network stage.

18. A discrete power supply modulation system for providing a varying power supply bias voltage to a power supply terminal of a radio frequency amplifier, the discrete power supply modulation system comprising: a power management circuit having an input and an output; A radio frequency amplifier having radio frequency input, radio frequency output and power supply terminals; a single-stage pulse shaping network having an input coupled to the power management circuit and having an output coupled to the supply terminal of the radio frequency amplifier; a signal path electrically coupling the input of the single-stage pulse shaping network to the output of the power management circuit and electrically coupling the output of the single-stage pulse shaping network to the supply terminal of the radio frequency amplifier, wherein the single-stage pulse shaping network incorporates at least some parasitic impedance elements from at least one of: (1) the power management circuit; (2) electrically coupling the single-stage pulse shaping network to the signal path of the power supply terminal of the radio frequency amplifier; and (3) the radio frequency amplifier, Wherein the single-stage pulse shaping network is configured to filter a signal resulting from transitions between discrete voltage levels received from the power management circuit.

19. The discrete power supply modulation system according to claim 18, wherein: The single-stage pulse shaping network also includes a reconfigurable filter.

20. A radio frequency transmission system comprising: a radio frequency amplifier having a radio frequency input, a radio frequency output, and a power supply terminal configured to receive a power supply bias voltage signal; A discrete power supply modulation system having an input configured to receive an input voltage and having an output coupled to the power supply terminal of the radio frequency amplifier, the output of the discrete power supply modulation system being configured to provide a power supply bias voltage signal to the power supply terminal of the radio frequency amplifier, the discrete power supply modulation system comprising: Power management circuit; a single-stage pulse shaping network having an input coupled to the power management circuit and having an output coupled to the supply terminal of the radio frequency amplifier; a first signal path electrically coupling the output of the power management circuit to the input of the single-stage pulse shaping network; a second signal path electrically coupling the output of the single-stage pulse shaping network to the supply terminal of the radio frequency amplifier, wherein the single-stage pulse shaping network includes parasitic elements provided from one or more of: (1) one or more parasitic elements from the power management circuit; (2) one or more parasitic elements from the first signal path electrically coupling the output of the power management circuit to the input of the single-stage pulse shaping network; (3) one or more parasitic elements from the second signal path electrically coupling the output of the pulse shaping network to the supply terminals of the radio frequency amplifier; and (4) one or more parasitic elements from the radio frequency amplifier, The single-stage pulse shaping network and the second signal path are together configured to filter a signal resulting from transitions between discrete voltage levels received from the power management circuit.

21. The radio frequency transmission system according to claim 20, wherein: The single-stage pulse shaping network is provided entirely by parasitic elements provided by one or more of the following: (1) one or more parasitic elements from the power management circuit; (2) one or more parasitic elements from the first signal path; (3) one or more parasitic elements from the second signal path; as well as (4) One or more parasitic elements from the RF amplifier.

22. The radio frequency transmission system according to claim 20, wherein: The power supply terminal of the radio frequency amplifier is configured to accept one of: an AC power bias voltage; and a DC power bias voltage.

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