Trigger Circuit, Method for Configuring Initial Value of Trigger Circuit, and Integrated Circuit

Abstract

The present invention provides a trigger circuit, a method for configuring an initial value of the trigger circuit, and an integrated circuit. The trigger circuit includes a trigger and a first circuit. The trigger has an initial value setting pin, and an output end of the trigger is connected to a data input end of the first circuit. The first circuit includes a control input end, and an input end of the first circuit is an output end of the trigger circuit. The first circuit is configured to determine an output according to input data at the data input end and input data at the control input end so as to cooperate with the initial value setting pin to configure the initial value of the trigger circuit. In the trigger circuit of the present invention, the first circuit operates on the data path of the trigger, and can configure the initial value of the trigger circuit by controlling the input data at the data input end of the first circuit, without changing the circuit of the trigger itself, making the circuit design more flexible and easy to test.

Description

Technical Field

[0001] The present invention relates to the field of circuits, and more particularly, to a flip-flop circuit, a method for configuring an initial value of a flip-flop circuit, and an integrated circuit. Background Art

[0002] In a circuit system, there are two types of circuits. One is a combinational logic circuit, whose output is determined at least according to the current input and is independent of the previous state, and does not have a storage function. The other is a sequential logic circuit, which can store data for subsequent use, such as a flip-flop, a register (composed of multiple D flip-flops).

[0003] A flip-flop is a storage unit circuit that is triggered only when a clock pulse arrives. After the flip-flop is powered on and before the pulse arrives, the output value of the flip-flop at this time is its initial value. In the related art, the initial value of the flip-flop can be configured through the initial value setting pin of the flip-flop. However, once the initial value is set, it cannot be changed, making the circuit design not flexible enough. Summary of the Invention

[0004] The flip-flop circuit provided by the present invention mainly solves the technical problem that the initial value of the flip-flop in the related art cannot be changed after being set.

[0005] To solve the above technical problem, an embodiment of the present invention provides a flip-flop circuit, including: a flip-flop and a first circuit; the flip-flop includes an initial value setting pin, the output end of the flip-flop is connected to the data input end of the first circuit, the first circuit further includes a control input end, and the output end of the first circuit is the output end of the flip-flop circuit; the first circuit is configured to determine an output according to the input data at the data input end and the input data at the control input end, so as to cooperate with the initial value setting pin to configure the initial value of the flip-flop circuit.

[0006] Optionally, the logical relationship between the output data of the flip-flop circuit and the input data of the flip-flop circuit is the same as the logical relationship between the output data and the input data of the flip-flop.

[0007] Optionally, the first circuit includes: a first exclusive-OR logic circuit, the first input end and the second input end of the first exclusive-OR logic circuit are respectively the data input end and the control input end of the first circuit, and the output end of the first exclusive-OR logic circuit is the output end of the first circuit; the first exclusive-OR logic circuit is configured to perform an exclusive-OR logic operation on the input data received at the data input end of the first circuit and the input data received at the control input end of the first circuit to determine the output;

[0008] Or, a first exclusive-NOR logic circuit, wherein the first input terminal and the second input terminal of the first exclusive-NOR logic circuit are respectively the data input terminal and the control input terminal of the first circuit, and the output terminal of the first exclusive-NOR logic circuit is the output terminal of the first circuit; the first exclusive-NOR logic circuit is configured to perform an exclusive-NOR logic operation on the input data received by the data input terminal of the first circuit and the input data received by the control input terminal of the first circuit to determine the output.

[0009] Optionally, the flip-flop circuit further includes a second circuit, the data input terminal of the second circuit is the input terminal of the flip-flop circuit, the output terminal of the second circuit is connected to the input terminal of the flip-flop, and the second circuit further includes a control input terminal. The second circuit is configured to determine the output according to the input data of its data input terminal and the input data of its control input terminal, so as to cooperate with the first circuit to make the logical relationship between the output data of the flip-flop circuit and the input data of the flip-flop circuit the same as the logical relationship between the output data and the input data of the flip-flop.

[0010] Optionally, the flip-flop is a D flip-flop, and the second circuit includes: a second exclusive-OR logic circuit, wherein the first input terminal and the second input terminal of the second exclusive-OR logic circuit are respectively the data input terminal and the control input terminal of the second circuit, and the output terminal of the second exclusive-OR logic circuit is the output terminal of the second circuit; the second exclusive-OR logic circuit is configured to perform an exclusive-OR logic operation on the input data received by the data input terminal of the second circuit and the input data received by the control input terminal of the second circuit to determine the output;

[0011] Or, a second exclusive-NOR logic circuit, wherein the first input terminal and the second input terminal of the second exclusive-NOR logic circuit are respectively the data input terminal and the control input terminal of the second circuit, and the output terminal of the second exclusive-NOR logic circuit is the output terminal of the second circuit; the second exclusive-NOR logic circuit is configured to perform an exclusive-NOR logic operation on the input data received by the data input terminal of the second circuit and the input data received by the control input terminal of the second circuit to determine the output.

[0012] Optionally, the control input terminal of the first circuit is connected to the control input terminal of the second circuit to receive the same input data.

[0013] Optionally, the initial value setting pin of the flip-flop includes a set pin or a reset pin.

[0014] On the other hand, the present invention further provides a method for configuring the initial value of a flip-flop circuit, the flip-flop circuit including a flip-flop, and the method for configuring the initial value of the flip-flop circuit includes:

[0015] Determine the initial value of the flip-flop;

[0016] Obtain first control data, and process the output data of the flip-flop according to the first control data to determine first output data;

[0017] Use the first output data as the output data of the flip-flop circuit.

[0018] Optionally, before processing the output data of the flip-flop according to the first control data to determine the output, it further includes:

[0019] Obtain second control data;

[0020] Process the input data of the flip-flop circuit according to the second control data to obtain second output data;

[0021] Use the second output data as the input data of the flip-flop, so that the logical relationship between the output data and the input data of the flip-flop circuit is the same as the logical relationship between the output data and the input data of the flip-flop.

[0022] Optionally, the flip-flop is a D flip-flop; the processing of the output data of the flip-flop according to the first control data to determine the output includes:

[0023] Perform an exclusive OR logic operation or an equivalence logic operation on the first control data and the output data of the flip-flop to determine the output;

[0024] The processing of the input data of the flip-flop circuit according to the second control data to obtain second output data includes:

[0025] Perform an exclusive OR logic operation or an equivalence logic operation on the second control data and the input data of the flip-flop circuit to determine the output.

[0026] On the other hand, the present invention also provides an integrated circuit including any one of the above-mentioned flip-flop circuits.

[0027] Advantageous effects:

[0028] The flip-flop circuit provided by the present invention includes a flip-flop and a first circuit. The output terminal of the flip-flop is connected to the data input terminal of the first circuit. The first circuit determines the output according to the input data at its data input terminal and the input data at its control input terminal. Since the output terminal of the first circuit is the output of the flip-flop circuit, it is possible to configure the initial value of the flip-flop circuit by controlling the input data at the data input terminal of the first circuit. Since the first circuit is arranged outside the structure of the flip-flop itself, the initial value of the flip-flop can be changed through the cooperation of the first circuit. Moreover, the first circuit operates on the data path of the flip-flop, without modifying the circuit of the flip-flop and without affecting the operation of the flip-flop, and the timing is stable. A circuit that is easy to configure the initial value of the flip-flop is realized, improving the flexibility of circuit design. BRIEF DESCRIPTION OF THE DRAWINGS

[0029] Figure 1 It is a schematic structural diagram of a flip-flop circuit provided in Embodiment 1 of the present invention;

[0030] Figure 2a It is a schematic diagram of a flip-flop provided in Embodiment 1 of the present invention;

[0031] Figure 2b It is a schematic diagram of another flip-flop provided in Embodiment 1 of the present invention;

[0032] Figure 3 It is a schematic structural diagram of another flip-flop circuit provided in Embodiment 1 of the present invention;

[0033] Figure 4 It is a schematic circuit diagram of the flip-flop circuit provided in Embodiment 1 of the present invention;

[0034] Figure 5 It is a schematic circuit diagram of the flip-flop circuit provided in Embodiment 2 of the present invention;

[0035] Figure 6 It is another schematic circuit diagram of the flip-flop circuit provided in Embodiment 2 of the present invention;

[0036] Figure 7 It is another schematic circuit diagram of the flip-flop circuit provided in Embodiment 2 of the present invention;

[0037] Figure 8 It is a schematic flowchart of a method for configuring the initial value of the flip-flop circuit provided in Embodiment 3 of the present invention;

[0038] Figure 9 It is a schematic flowchart of a method for configuring the initial value of the flip-flop circuit provided in Embodiment 3 of the present invention;

[0039] Figure 10It is a refined flowchart diagram of the method for configuring the initial value of the trigger circuit provided in the fourth embodiment of the present invention. Detailed implementation manners

[0040] In order to make the objectives, technical solutions and advantages of the present invention clearer and more understandable, the embodiments of the present invention will be further described in detail below through specific implementation manners in combination with the accompanying drawings. It should be understood that the specific embodiments described herein are only used to explain the present invention and are not used to limit the present invention.

[0041] Embodiment 1:

[0042] As Figure 1 shown, Figure 1 It is a schematic structural diagram of the trigger circuit provided in this embodiment. The trigger circuit in this embodiment includes a trigger 100 and a first circuit 200 provided on the data path of the trigger 100.

[0043] Among them, the trigger 100 has an initial value setting pin. The data input end of the first circuit 200 is connected to the output end of the trigger 100, receives the data output by the output end of the trigger 100, and the first circuit 200 can process the received data and obtain the processed output as the output data of the trigger circuit in this embodiment. In this embodiment, the first circuit 200 further includes a control input end, and the first circuit 200 determines the output according to the input data at the data input end and the input data at the control input end to cooperate with the initial value setting pin to configure the initial value of the trigger circuit.

[0044] It should be noted that the trigger 100 in this embodiment refers to the circuit part that can implement the basic trigger function. It can be an integrated trigger chip or composed of multiple units or components that cooperate to implement the trigger function. Usually, the initial value of the trigger 100 can be set through the initial value setting pin, and it includes two initial values, namely "0" or "1". However, in some implementation manners, the initial value of the trigger 100 itself can be fixedly configured, that is, the trigger 100 will only have one possible initial value, which makes the initial value of the trigger 100 stable and known. Therefore, technicians can configure the first circuit 200 according to the fixed initial value to achieve a stable function.

[0045] The flip - flop 100 has an initial - value setting pin, and its own initial value can be set through the initial - value setting pin. The initial value of the flip - flop 100 itself can be either "1" or "0". The initial - value setting pin can be two, or there can be only one. The initial value of the flip - flop 100 itself can be fixed in the following ways including but not limited to: If the initial - value setting pin of the flip - flop 100 includes a set pin and a reset pin, one of the set end (i.e., one end of the set pin) or the reset end (i.e., one end of the reset pin) of the flip - flop 100 can be fixed to "0". In this way, there can only be one case of the initial value of the flip - flop 100 itself. For example, if the set end of the flip - flop 100 is fixed to "0", when the reset end is "1", the initial value of the flip - flop 100 is "0", and when the reset end is "0", the flip - flop 100 enters the normal working state, so that the initial value of the flip - flop 100 can always be only "0". Similarly, if the reset end of the flip - flop 100 is fixed to "0", when the set end is "1", the initial value of the flip - flop 100 is "1", and when the set end is "0", the flip - flop 100 enters the normal working state, thus the initial value of the flip - flop 100 can always be only "1". Fixing the initial value of the flip - flop 100 can avoid the situation of timing conflicts when the flip - flop 100 is set and reset, and improve the stability and reliability of the operation and timing of the flip - flop circuit.

[0046] In some embodiments, the initial - value setting pin of the flip - flop 100 includes a set pin or a reset pin. In the related art, the flip - flop 100 includes a set pin and a reset pin. In this embodiment, by removing the set pin or the reset pin of the flip - flop 100, the initial value of the flip - flop 100 itself can only be set to one of "0" or "1" and cannot be changed. For example, if the set pin of the flip - flop 100 is removed, the initial value of the flip - flop 100 cannot be set to "1".

[0047] It should be noted that the set pin and the reset pin of the flip - flop 100 are the pins corresponding to the set end and the reset end of the D - type flip - flop 100. In this embodiment, removing the set pin or the reset pin can mean not effectively controlling the set pin or the reset pin of the flip - flop 100. The set pin or the reset pin that is not effectively controlled (e.g., floating) will not change its potential state, thus achieving a fixed potential at a certain end. Further, a flip - flop 100 with only one of the set pin or the reset pin can be used, and the initial value of such a flip - flop 100 itself is also fixed. As Figure 2a shown, it is a schematic diagram of the pins of a flip - flop 100. Taking the D - type flip - flop as an example, this flip - flop 100 has a reset pin and no set pin, so its initial value can always only be set to "0". Figure 2aThe reset pin of the flip-flop 100 shown is active low. In some embodiments, it can also be a flip-flop 100 with an active high reset pin as shown in Figure 2b It can be understood that the pins of the flip-flop 100 will occupy a part of the circuit area. Therefore, only using one of the set pin or the reset pin can not only simplify the circuit layout but also reduce the area occupied by the flip-flop 100 to a certain extent.

[0048] It can be understood that the above fixed configuration of the initial value of the flip-flop 100 can be carried out during the circuit design. As described above, it can be achieved through the overall circuit design. For example, one of the set pin or the reset pin is left floating, so that the initial value of the flip-flop 100 itself can only be "1" or "0", or the selection of the pin for setting the initial value of the flip-flop 100 itself is made; but in some embodiments, it can also be achieved by controlling the signal. For example, it is fixedly set that the initial value setting pin of the flip-flop 100 can only receive a signal for setting the initial value of the flip-flop 100 to "1" or "0" during the initial state.

[0049] The flip-flop 100 being in the initial state means the state before the flip-flop 100 starts normal operation according to the timing when it is just powered on. The value output by the flip-flop 100 at this time is its own initial value. In this embodiment, this initial value has been preset and is known. When the flip-flop 100 is in the initial state, because of its own initial value, that is, the data output by the flip-flop 100 at this time is known, thus, according to the configuration of the first circuit 200, the data output by the flip-flop 100 can be processed to obtain the desired initial value.

[0050] In this embodiment, the logical relationship between the output data and the input data of the trigger circuit is consistent with the logical relationship between the output data and the input data of the trigger 100. That is to say, the overall logic of the trigger circuit is still equivalent to the logic of a trigger. When the trigger 100 is in the initial state, its output data is fixed and independent of the input data of the trigger 100, and the output data of the trigger circuit is also independent of its input data. When the trigger 100 is working properly, the output of the trigger 100 at this time is related to the data input at its input terminal. The output data of the first circuit 200 is related to the input data of the trigger circuit, and the relationship between the two is the same. For example, if the trigger 100 receives the same data as the input data of the trigger circuit, the value of its output data will change. Then, when the trigger circuit receives this input data, the value of the output data of the trigger circuit will also change. Taking the D trigger as an example, for instance, the trigger circuit in this embodiment receives the input data "1". Since the output data at the output terminal is also "1" when the D trigger receives "1", at this time, the output data of the first circuit 200 is also "1". If the trigger circuit receives the input data "0", since the D trigger will output "0" when it receives "0", at this time, the output data of the first circuit 200 is also "0". However, it should be noted that in some implementation processes, the output data of the trigger circuit may be inverted. Since it is easy to foresee that only the data is inverted, it can also be considered that the trigger circuit realizes the function of a trigger, that is, it realizes the same or similar logic.

[0051] In some embodiments, the first circuit 200 determines an output based on the input data received at its data input terminal and the input data at its control input terminal. The data input terminal of the first circuit 200 is connected to the output terminal of a flip-flop, and its output terminal is the output terminal of the flip-flop circuit. That is to say, the first circuit 200 obtains the output data of the flip-flop circuit based on the output data of the output terminal of the flip-flop and the input data at its control input terminal. It can be understood that when the flip-flop circuit is in its initial state, the output data of the flip-flop circuit at this time is its initial value. Exemplarily, the control input terminal of the first circuit 200 can be connected to a first external data input source, and the first external data input source sends data to the first circuit 200, that is, the input data at the control input terminal of the first circuit 200 can be controlled through the first external data input source. For the first external data input source, it can be other circuits, chips, or controllers, etc., which can control the input data at the control input terminal of the first circuit 200, and the input data at this control input terminal is allowed to be changed automatically or manually. It should be noted that for the flip-flop circuit, its data is represented by high and low levels, and can usually also be represented as "0" or "1", with the low level being "0" and the high level being "1". Therefore, as an example, the first circuit 200 determines an output based on the input data received at its data input terminal and the input data at its control input terminal, which can be to determine whether to change the input data received at the data input terminal according to the input data at the control input terminal to obtain the finally processed data. Since the data of the flip-flop only includes two cases of "0" or "1", changing the input data received at the data input terminal is equivalent to flipping it. For example, when the input data received at the data input terminal is "0", after changing the input data received at this data input terminal, its value becomes "1".

[0052] Therefore, in some implementation processes, the output of the first circuit 200 can be controlled by setting the value of the input data at the control input terminal. At this time, the first circuit 200 is used to output the data obtained after processing the input data at its data input terminal and the input data at its control input terminal.

[0053] In some embodiments, the first circuit 200 includes a first exclusive - OR logic circuit. The first input terminal and the second input terminal of the first exclusive - OR logic circuit are respectively the data input terminal and the control input terminal of the first circuit 200, and the output terminal of the first exclusive - OR logic circuit is the output terminal of the first circuit 200. The first exclusive - OR logic circuit is used to perform an exclusive - OR logic operation on the input data received at the data input terminal of the first circuit 200 and the input data received at the control input terminal of the first circuit 200 to determine the output. Alternatively, the first circuit 200 includes a first exclusive - NOR logic circuit. The first input terminal and the second input terminal of the first exclusive - NOR logic circuit are respectively the data input terminal and the control input terminal of the first circuit, and the output terminal of the first exclusive - NOR logic circuit is the output terminal of the first circuit. The first exclusive - NOR logic circuit is used to perform an exclusive - NOR logic operation on the input data received at the data input terminal of the first circuit and the input data received at the control input terminal of the first circuit to determine the output.

[0054] It can be understood that the first exclusive - OR logic circuit, or the first exclusive - NOR logic circuit, can be an ordinary circuit structure with corresponding logic operation capabilities, or an integrated chip, etc. When the first circuit 200 includes the first exclusive - OR logic circuit, or the first exclusive - NOR logic circuit, a change in the value of any one of the input data at the data input terminal or the control input terminal of the first circuit 200 will affect the final output result. However, when the flip - flop 100 is in the initial state, the output result of the flip - flop 100 itself will not change, and its initial - value - setting pin is set and known. Therefore, the input data at the control input terminal of the first circuit 200 can configure the first circuit 200. By changing the input data at the control input terminal of the first circuit 200, regardless of the initial value of the flip - flop 100 itself, the flip - flop circuit can output any initial value. It should also be noted that some flip - flops 100 may have more than one output terminal. As Figures 2a - 2b shown, it may additionally include an output terminal for the inverted value. For such flip - flops 100, the first circuit 200 can be connected to any one of the output terminals, and the basic idea of the circuit implementation is the same. In some embodiments, if the first circuit is connected to the output terminal for the inverted value, an additional inversion process can also be performed in the first circuit.

[0055] In this embodiment, the first circuit 200 operates on the data path of the flip - flop 100, which also means that the digital implementation process of the flip - flop circuit in this embodiment is more user - friendly.

[0056] In some embodiments, the flip - flop circuit further includes a second circuit 300, as Figure 3As shown, the second circuit 300 is also disposed on the data path of the flip-flop 100. When the flip-flop circuit includes the second circuit 300, the data input terminal of the second circuit 300 is the input terminal of the flip-flop circuit, the output terminal of the second circuit 300 is connected to the input terminal of the flip-flop, and the second circuit further includes a control input terminal, and the input data of its control input terminal changes with the change of the input data of the control input terminal of the first circuit 200. The second circuit 300 is configured to determine an output according to the input data of its data input terminal and the input data of its control input terminal, so as to cooperate with the first circuit 200 to make the logical relationship between the output data and the input data of the flip-flop circuit the same as the logical relationship between the output data and the input data of the flip-flop, so that the logical function of the flip-flop circuit is the same as that of the flip-flop 100 adopted thereby, facilitating design.

[0057] Exemplarily, the control input terminal of the second circuit 300 is connected to a second external data input source, and the second external data input source sends data to the second circuit 300, that is, the input data of the control input terminal of the second circuit 300 can be controlled through the second external data input source. As an example, the second circuit 300 determines an output according to the input data received by its data input terminal and the input data of its control input terminal, which may be that the second circuit 300 determines whether to change the input data of the flip-flop circuit according to the input data received by its control input terminal to obtain the finally processed data, and the data received by the input terminal of the flip-flop 100 is the data obtained after being processed by the second circuit 300. In this embodiment, since the data of the flip-flop 100 only includes two cases of "0" or "1", changing the input data of the flip-flop circuit is equivalent to flipping it. For example, when the input data of the flip-flop circuit is "0", after changing the input data of the flip-flop circuit, its value is "1". The second external data input source may be other circuits, chips or controllers, etc., which can control the input data of the control input terminal of the second circuit 300, and the input data of the control input terminal is allowed to be changed automatically or manually.

[0058] Therefore, in some implementation processes, the output of the second circuit 300 can be controlled by setting the input data of its control input terminal. The second circuit 300 is configured to output the input data of the flip-flop 100 obtained after being processed according to the input data of its control input terminal and the input data of its data input terminal (that is, the input data of the flip-flop circuit at this time).

[0059] In some embodiments, the control input terminal of the first circuit is connected to the control input terminal of the second circuit to receive the same data. It should be noted that in other specific embodiments, the input data of the control input terminal of the first circuit 200 and the input data of the control input terminal of the second circuit 300 may also be different. And the data source providing the input data of the control input terminal of the first circuit 200 and the input data of the control input terminal of the second circuit 300 may be the same data source or different data sources. For example, the above-mentioned first external data input source and second external data input source may be different external data input sources or the same external data input source. Different external data input sources may output the same data, and the same external data input source may also output two different data.

[0060] In some embodiments, the second circuit 300 may include a second exclusive OR logic circuit. The first input terminal and the second input terminal of the second exclusive OR logic circuit are respectively the data input terminal and the control input terminal of the second circuit, and the output terminal of the second exclusive OR logic circuit is the output terminal of the second circuit; the second exclusive OR logic circuit is used to perform an exclusive OR logic operation on the input data received by the data input terminal of the second circuit and the input data received by the control input terminal of the second circuit to determine the output;

[0061] Alternatively, a second exclusive NOR logic circuit, the first input terminal and the second input terminal of the second exclusive NOR logic circuit are respectively the data input terminal and the control input terminal of the second circuit, and the output terminal of the second exclusive NOR logic circuit is the output terminal of the second circuit; the second exclusive NOR logic circuit is used to perform an exclusive NOR logic operation on the input data received by the data input terminal of the second circuit and the input data received by the control input terminal of the second circuit to determine the output. It can be understood that the second exclusive OR logic circuit, or the second exclusive NOR logic circuit can be a general circuit structure with corresponding logic operation capabilities, or an integrated chip, etc. After the input data received by the data input terminal of the second circuit and the input data received by the control input terminal of the second circuit are respectively subjected to an exclusive OR logic operation, or an exclusive NOR logic operation, the output of the second circuit 300 is obtained, that is, the input data of the flip-flop 100 is obtained. When the second circuit 300 is a second exclusive OR logic circuit or a second exclusive NOR logic circuit, any change in the value of the input data received by the data input terminal of the second circuit and the input data received by the control input terminal of the second circuit will affect the data received by the input terminal of the flip-flop 100.

[0062] It should also be noted that in some embodiments, according to the type of the flip-flop 100, the flip-flop 100 may have multiple input terminals to receive multiple data inputs. Correspondingly, the flip-flop circuit also receives multiple data inputs. At this time, the connection between the output terminal of the second circuit 300 and the input terminal of the flip-flop may include:

[0063] Receive all the input data of the trigger circuit, or receive some of the input data of the trigger circuit. That is, for the case where the trigger circuit has multiple input data, the second circuit 300 can also process the multiple input data of the trigger circuit according to the input data at the control input terminal, and use the processed data as the input data of the trigger 100, so as to cooperate with the first circuit to make the logical relationship between the output data and the input data of the trigger circuit consistent with the logical relationship between the output data and the input data of the trigger.

[0064] It can be understood that the trigger circuit in this embodiment is a 1-bit trigger circuit, but it can be extended to a multi-bit bus and can also be implemented by a parameterizable general module to simplify the use.

[0065] Please refer to Figure 4 , Figure 4 which is a circuit schematic diagram of the trigger circuit in this embodiment. The trigger circuit includes a trigger 100 and a first circuit 200. Among them, the trigger 100 is represented by an electrical symbol in Figure 4 and it can be an integrated chip or a circuit that implements the corresponding function. Figure 4 Taking the JK trigger as an example in Figure 4In it, Data_in1 and Data_in2 respectively represent the two input terminals of the JK flip-flop. The first circuit 200 is an exclusive-OR logic circuit. Its first input terminal receives the data from the output terminal of the flip-flop 100, and its second input terminal receives the control data sent by the first external input source. Assume that the initial value of the flip-flop 100 is set to "1". When the flip-flop 100 is in the initial state, the data output from the output terminal of the flip-flop 100 is "1". By setting the control data sent by the first external input source to "1", the initial value of the flip-flop circuit can be set to "0"; by setting the control data sent by the first external input source to "0", the initial value of the flip-flop circuit can be set to "1". When the flip-flop circuit enters the normal working state, the output data of the flip-flop 100 can be deduced based on the input data at the control input terminal of the first circuit. When the control data sent by the first external input source is "0", the output value of the flip-flop circuit is the same as the output data at the output terminal of the flip-flop 100. When the control data sent by the first external input source is "1", the output data of the flip-flop circuit is the inverse of the output data at the output terminal of the flip-flop 100. Only by relying on the value of the control data sent by the first external input source can the value of the output data of the flip-flop circuit be obtained. In this embodiment, the control data sent by the first external input source can also be statically configured so that the control data sent by the first external input source is not changed during the normal working state. In this way, the control data sent by the first external input source will not affect the flip-flop circuit after it enters the normal working state.

[0066] As Figure 4 For the flip-flop 100 shown in , it only has a reset pin. In some implementation processes, flip-flops 100 with a reset pin or a set pin are used. These flip-flops 100 can only implement one of the functions of setting to "0" or setting to "1". When there is a change in requirements during the design or use process and it is necessary to make the originally set-to-"0" flip-flop 100 also implement the function of setting to "1", the conversion between the set and reset functions can be achieved by changing the input data at the control input terminal of the first circuit 200. Therefore, the flip-flop 100 is not limited to only one of the above functions. The first circuit 200 is arranged at the output terminal of the flip-flop 100. In some implementation processes, the output of the flip-flop circuit can be changed at any time by changing the input data at the control input terminal of the first circuit 200. It is not affected by the timing and does not change the working state of the flip-flop 100. Among them, the change of the input data at the control input terminal of the first circuit 200 can be controlled by software or other programmable methods within the chip.

[0067] The flip - flop circuit in this embodiment includes a flip - flop 100 and a first circuit 200. The flip - flop 100 has an initial - value - setting pin. The data input terminal of the first circuit 200 is connected to the output terminal of the flip - flop 100 to receive the output of the flip - flop 100. The first circuit 200 further includes a control input terminal, and the output terminal of the first circuit 200 is the output terminal of the flip - flop circuit. The first circuit 200 is used to determine the output according to the input data at the data input terminal and the input data at the control input terminal, so as to cooperate with the initial - value - setting pin to configure the initial value of the flip - flop circuit. Through the processing of the first circuit 200, the output of the flip - flop circuit is changed, so that the initial value of the flip - flop circuit can be configured in cooperation with the initial - value - setting pin. The first circuit 200 operates on the data path of the flip - flop 100, without the need to change the circuit structure of the flip - flop 100 itself, does not affect the operation of the flip - flop 100, and has stable timing. The initial value of the flip - flop circuit in this embodiment can be configured and changed after the design is completed, improving the flexibility of circuit design.

[0068] Embodiment Two:

[0069] This embodiment further describes the flip - flop circuit of the present invention in conjunction with the accompanying drawings.

[0070] Please refer to Figure 5 , Figure 5 which shows a schematic structural diagram of a flip - flop circuit. In this flip - flop circuit, the pin of the set terminal (i.e., the set pin) of the flip - flop 100 is removed. Therefore, only the reset pin is used, which means that the initial value of the flip - flop 100 itself can always be set to 0. Removing the set pin simplifies the possible circuit layout of the flip - flop 100 and can achieve a smaller area occupation in some implementation processes. At the same time, having only the set pin or the reset pin makes the circuit testing simpler, which is conducive to improving the ATPG coverage rate.

[0071] The first circuit 200 includes a first exclusive - OR logic circuit. The first input terminal and the second input terminal are respectively the data input terminal and the control input terminal of the first circuit 200. Its first input terminal and second input terminal respectively receive the data at the output terminal of the flip - flop 100 and receive control data, and this control data can be sent by a first external data source.

[0072] Also connected to Figure 4Different from the trigger circuit shown, the trigger circuit in this embodiment further includes a second circuit 300. The second circuit 300 includes a second exclusive-OR logic circuit, and the second circuit 300 is disposed on the data path of the trigger 100. Specifically, it is arranged before the input end of the trigger 100. The data input end of the second circuit 300 serves as the input end of the trigger circuit to receive the input data of the trigger circuit. In this embodiment, the control input end of the first circuit is connected to the control input end of the second circuit, and the input data of the control input end of the first circuit 200 is the same as the input data of the control input end of the second circuit 300. After the second circuit 300 performs an exclusive-OR logic operation on the input data of its control input end and the input data of the trigger circuit, the obtained data is input into the input end of the trigger 100.

[0073] The process of using the trigger circuit of this embodiment will be described in detail below.

[0074] When using the trigger circuit of this embodiment, if the initial value of the trigger circuit is to be configured as "1", the input data of the control input end of the first circuit 200 is set to "1". Since the initial value of the trigger 100 is "0", after the first circuit 200 performs an exclusive-OR logic operation, it outputs "1", that is, the desired configured initial value is obtained. When the input data of the control input end of the first circuit 200 and the input data of the control input end of the second circuit 300 are "1", if the trigger 100 enters the normal working state, the second circuit 300 inverts the input data of the trigger circuit, and the input received at the input end of the trigger 100 is the result of inverting the input data of the trigger circuit. The data output from the output end of the trigger 100 is also the result of inverting the input data of the trigger circuit. The data input end of the first circuit 200 receives the data output from the output end of the trigger 100 and also performs an exclusive-OR logic operation with the input data of the control input end of the first circuit 200. At this time, the input data of the control input end of the first circuit 200 is "1", and the result of the exclusive-OR logic operation of the first circuit 200 is the inversion of the input data of its data input end. Therefore, the value output by the first circuit 200 is the same as the input data of the trigger circuit.

[0075] Similarly, to configure the initial value of the trigger circuit to "0", the input data at the control input of the first circuit 200 is set to "0". Since the initial value of the trigger 100 is "0", the first circuit 200 performs an exclusive-OR logic operation and outputs "0". When the input data at the control input of the first circuit 200 is "0", if the trigger 100 enters the normal working state, the processed data output by the second circuit 300 is the same as the input data of the trigger circuit. The input received at the input terminal of the trigger 100 is the same as the input data of the trigger circuit, and the data output at the output terminal of the trigger 100 is also the same as the input data of the trigger circuit. After the first circuit 200 performs an exclusive-OR logic operation on the input data at the control input of the first circuit 200 and the data output at the output terminal of the trigger 100, the output result is still the same value as the input data of the trigger circuit. It can be seen that due to the cooperation of the second circuit 300, the change in the input data at the control input of the first circuit 200 does not affect the final output result of the trigger circuit.

[0076] It can be seen that for the trigger circuit provided in this embodiment, the second circuit 300 processes the data to be input into the trigger 100, so as to cooperate with the first circuit 200 to make the logical relationship between the output data and the input data of the trigger circuit consistent with the logical relationship between the output data and the input data of the trigger 100. When the input data at the control input of the first circuit 200 is "1", both the first circuit 200 and the second circuit 300 invert the input data at their respective data inputs once, and the final output result is the same as the output result when the trigger 100 receives the input data of the trigger circuit. The data path of the trigger circuit is consistent with the data path of the trigger 100. When the input data at the control input of the first circuit 200 is "0", in this case, the exclusive-OR logic circuits in this embodiment have only two data inputs, so logically it has no effect. The outputs of the first circuit 200 and the second circuit 300 are the same as the input data at their data receiving ends.

[0077] The flip-flop circuit provided in this embodiment, the first circuit 200 and the second circuit 300 respectively include a first exclusive-OR logic circuit and a second exclusive-OR logic circuit. The first circuit 200 enables the initial value of the flip-flop circuit to be configured according to the input data at the control input terminal of the first circuit 200. The second circuit 300 receives the input data of the flip-flop circuit and performs an exclusive-OR operation on the input data of the flip-flop circuit according to the value of the input data at the control input terminal of the second circuit 300, so that the flip-flop circuit can achieve the same functional effect as the flip-flop 100 in both cases where the input data at the control input terminal of the first circuit 200 is "0" or "1". The flip-flop circuit provided in this embodiment has a simple structure, is easy to expand, realizes stable timing, and has the function of a configurable initial value that is easy to test and use.

[0078] This embodiment also provides a flip-flop circuit, please refer to Figure 6 . The pin of the reset terminal of the flip-flop 100 is removed. Therefore, only the pin of the set terminal is used, which means that the initial value of the flip-flop 100 itself can only be set to 1 all the time. The first circuit 200 and the second circuit 300 respectively include a first equivalence logic circuit and a second equivalence logic circuit. The usage process of this flip-flop circuit is similar to the flip-flop circuit described above in this embodiment. If it is necessary to set the initial value of the flip-flop circuit to "1", the value of the input data at the control input terminal of the first circuit 200 should be "1"; when the value of the input data at the control input terminal of the first circuit 200 is set to "0", it means that the initial value of the flip-flop circuit is set to "0".

[0079] This embodiment also provides a flip-flop circuit, please refer to Figure 7 . In this flip-flop circuit, the pin of the reset terminal of the flip-flop 100 is removed, and only the pin of the set terminal is used. The initial value of the flip-flop 100 itself can only be set to 1 all the time. Among them, the first circuit 200 includes a first equivalence logic circuit, and the second circuit 300 includes a second exclusive-OR logic circuit. In this embodiment, the input data at the control input terminal of the first circuit 200 is opposite to the input data at the control input terminal of the second circuit 300. It can be understood that when the output of the first circuit 200 or one of its inputs is inverted, the first circuit 200 can also be regarded as realizing the function of an exclusive-OR logic circuit. Similarly, the first circuit 200 can be a first exclusive-OR logic circuit and the second circuit 300 can be a second equivalence logic circuit, which will not be elaborated here.

[0080] As shown in the appendix Figures 2a - 7Among them, only a dual-output flip-flop with Q and Q bar (i.e., the output terminal and the inverted output terminal) is shown. However, it should be understood that using either a single-output flip-flop with only Q or Q bar can also achieve the same function and corresponding technical effects. It should also be noted that in the above embodiments, only the case where the reset terminal and the set terminal of the flip-flop are active low is exemplified. However, for those of ordinary skill in the art to which the present invention pertains, based on the understanding of the present invention, it can be foreseen how to implement the solution of the present invention when using flip-flops of other output types or with active high set / reset terminals, and thus it will not be elaborated herein.

[0081] This embodiment also provides an integrated circuit, including the flip-flop circuit as described in the above Embodiment 1 or Embodiment 2.

[0082] Third Embodiment:

[0083] This embodiment provides a method for configuring the initial value of a flip-flop circuit, and the flip-flop circuit includes a flip-flop, as Figure 8 shown. The method for configuring the initial value of the flip-flop circuit includes:

[0084] S801. Determine the initial value of the flip-flop;

[0085] S802. Obtain first control data, and process the output data of the flip-flop according to the first control data to determine first output data;

[0086] S803. Use the first output data as the output data of the flip-flop circuit.

[0087] Through the above method, according to different first control data, the initial value of the flip-flop circuit is configured to the required value. It can be understood that when the flip-flop circuit is in the initial state, its output data is the initial value.

[0088] It should be noted that the flip-flop in this embodiment refers to the circuit part that can implement the basic flip-flop function. It can be an integrated flip-flop chip or composed of multiple units or components that cooperate to implement the flip-flop function. The initial value of the flip-flop can be flexibly set through the initial value setting pin. However, in some embodiments, the initial value of the flip-flop itself can be fixedly configured, that is, the flip-flop has only one possible initial value, which makes the initial value of the flip-flop stable and known. Therefore, those skilled in the art can configure the first control data according to the fixed initial value to achieve a stable function.

[0089] The flip-flop has an initial value setting pin, and its own initial value can be set through the initial value setting pin. The initial value of the flip-flop itself can be either "1" or "0". The initial value setting pin can be two, or there can be only one. The initial value of the flip-flop itself can be fixed in the following ways, including but not limited to: If the initial value setting pin of the flip-flop includes a set pin and a reset pin, one of the set terminal (i.e., one end of the set pin) or the reset terminal (i.e., one end of the reset pin) of the flip-flop can be fixed to "0". In this way, there can only be one case of the initial value of the flip-flop itself. For example, if the set terminal of the flip-flop is fixed to "0", when the reset terminal is "1", the initial value of the flip-flop is "0", and when the reset terminal is "0", the flip-flop enters the normal working state, so that the initial value of the flip-flop can always be only "0". Similarly, if the reset terminal of the flip-flop is fixed to "0", when the set terminal is "1", the initial value of the flip-flop is "1", and when the set terminal is "0", the flip-flop enters the normal working state, so that the initial value of the flip-flop can always be only "1". Fixing the initial value of the flip-flop itself can avoid timing conflicts when the flip-flop is set and reset, and improve the stability and reliability of the flip-flop circuit operation and timing. In some embodiments, the initial value setting pin of the flip-flop includes a set pin or a reset pin. In the related art, the flip-flop includes a set pin and a reset pin. In this embodiment, the initial value of the D flip-flop can be fixed by removing the set pin or the reset pin of the flip-flop.

[0090] It should be noted that the set pin and the reset pin of the flip-flop are the pins corresponding to the set terminal and the reset terminal of the flip-flop. Removing the set pin or the reset pin in this embodiment can be that no effective control is exerted on the set pin or the reset pin of the flip-flop. The set pin or the reset pin that is not effectively controlled (e.g., floating) will not change its potential state, thus achieving a fixed setting of a certain terminal. Further, a flip-flop that only has one of the set pin or the reset pin can be used, and the initial value of such a flip-flop itself is also fixed. It can be understood that the pins of the flip-flop will occupy a certain part of the circuit area. Therefore, using only one of the set pin or the reset pin can not only simplify the circuit layout but also reduce the area occupied by the flip-flop to a certain extent.

[0091] The trigger is in the initial state, which refers to the state of the trigger when it is just powered on, before it operates normally according to the timing sequence. At this time, the trigger outputs an initial value. In this embodiment, the initial value of the trigger itself has been set and is known. When the trigger is in the initial state, due to the initial value of the trigger itself, that is, the data output by the trigger at this time is known, therefore, according to the situation of the first control data, the data output by the trigger can be processed to obtain the desired initial value. In this embodiment, the first control data can also be statically configured so that the first control data is not changed in the normal working state, so as not to affect the trigger circuit after entering the normal working state.

[0092] In some embodiments, step S802 may specifically include:

[0093] S8011. Obtain the first control data, and perform an exclusive OR logic operation on the first control data and the output data of the trigger to obtain the first output data;

[0094] Or,

[0095] S8012. Obtain the first control data, and perform a coincidence logic operation on the first control data and the output data of the trigger to obtain the first output data.

[0096] Such as Figure 9 , in some embodiments, before determining the output by processing the output data of the trigger according to the first control data, it further includes:

[0097] S804. Obtain the second control data, and process the input data of the trigger circuit according to the second control data to obtain the second output data;

[0098] S805. Use the second output data as the input data of the trigger, so that the logical relationship between the first output data and the input data of the trigger circuit is the same as the logical relationship between the output data and the input data of the trigger.

[0099] By obtaining the second control data and processing the input data of the trigger circuit according to the second control data to obtain the second output data, the logical relationship between the first output data and the input data of the trigger circuit is made the same as the logical relationship between the output data and the input data of the trigger. It can be understood that the second control data and what kind of processing is performed on the input data of the trigger circuit according to the second control data are designed according to specific situations.

[0100] In some embodiments, the trigger in the trigger circuit is a D trigger. Processing the output data of the trigger according to the first control data to determine the output includes:

[0101] Perform an exclusive OR logic operation, or an exclusive NOR logic operation, on the first control data and the output data of the flip-flop to determine the output;

[0102] Process the input data of the flip-flop circuit according to the second control data to obtain the second output data, including:

[0103] Perform an exclusive OR logic operation, or an exclusive NOR logic operation, on the second control data and the input data of the flip-flop circuit to determine the output.

[0104] The method for configuring the initial value of the flip-flop circuit in this embodiment determines the first output data as the output data of the flip-flop circuit by processing the output data of the flip-flop according to the first control data. Without changing the circuit of the flip-flop itself, it can achieve the setting of the initial value of the flip-flop circuit and improve the flexibility of circuit design.

[0105] Embodiment 4:

[0106] This embodiment further illustrates the method for configuring the initial value of the flip-flop circuit. In this embodiment, the flip-flop in the flip-flop circuit is a D flip-flop

[0107] Please refer to Figure 10 , Figure 10 which is a detailed flowchart of a method for configuring the initial value of a flip-flop circuit provided in this embodiment.

[0108] S1001. Obtain the second control data;

[0109] S1002. Perform an exclusive OR logic operation on the second control data and the input data of the flip-flop circuit to obtain the second output data;

[0110] S1003. Use the second output data as the input data of the flip-flop;

[0111] S1004. Determine the initial value of the flip-flop;

[0112] S1005. Obtain the first control data, where the first control data is the same as the second control data;

[0113] S1006. Perform an exclusive OR logic operation on the first control data and the output data of the flip-flop to obtain the first output data;

[0114] S1007. Use the first output data as the output data of the flip-flop circuit.

[0115] When the flip-flop is in the initial state, the output data of the flip-flop is always "0" or always "1". Therefore, according to the difference of the first control data, the initial value of the flip-flop circuit is configured to the required value.

[0116] If the first control data is "1", the input data of the flip-flop circuit is inverted after an exclusive-OR logical operation with the first control data. The input received at the input terminal of the flip-flop is the result of inverting the input data of the flip-flop circuit, and the data output from the output terminal of the flip-flop is also the result of inverting the input data of the flip-flop circuit. The output data of the flip-flop is subjected to an exclusive-OR logical operation with the second control data to determine the first output data. At this time, the second control data is also "1". Therefore, the first output data is the same as the input data of the flip-flop circuit. If the second control data is "0", the input received at the input terminal of the flip-flop is the same as the input data of the flip-flop circuit, and the data output from the output terminal of the flip-flop is also the same as the input data of the flip-flop circuit. After the first control data is subjected to an exclusive-OR logical operation with the output data of the flip-flop, the obtained first output data is still the same value as the input data of the flip-flop circuit. Thus, by obtaining the second control data and processing the input data of the flip-flop circuit according to the second control data to obtain the second output data for the exclusive-OR logical operation of the input data of the flip-flop, the logical relationship between the output data and the input data of the flip-flop circuit is consistent with the logical relationship between the output data and the input data of the flip-flop.

[0117] The above content is a further detailed description of the embodiments of the present invention in combination with specific implementation manners, and it cannot be determined that the specific implementation of the present invention is only limited to these descriptions. In the above implementation manners, the mentioned connection relationship may be a direct connection, and in some cases, it may also be an indirect connection. For example, the connection also passes through devices such as switches or relays. For those of ordinary skill in the technical field to which the present invention pertains, without departing from the concept of the present invention, several simple deductions or substitutions can be made, and all should be regarded as belonging to the protection scope of the present invention.

Claims

1. A flip-flop circuit, characterized in that, The trigger circuit includes a trigger, a first circuit, and a second circuit; the trigger includes an initial value setting pin, the output end of the trigger is connected to the data input end of the first circuit, the first circuit further includes a control input end, and the output end of the first circuit is the output end of the trigger circuit; the first circuit is configured to determine an output according to the input data at the data input end and the input data at the control input end to cooperate with the initial value setting pin to configure the initial value of the trigger circuit; the data input end of the second circuit is the input end of the trigger circuit, the output end of the second circuit is connected to the input end of the trigger, the second circuit further includes a control input end, and the second circuit is configured to determine an output according to the input data at its data input end and the input data at its control input end to cooperate with the first circuit to make the logical relationship between the output data and the input data of the trigger circuit the same as the logical relationship between the output data and the input data of the trigger; The first circuit includes: a first exclusive - OR logic circuit, the first input end and the second input end of the first exclusive - OR logic circuit are respectively the data input end and the control input end of the first circuit, and the output end of the first exclusive - OR logic circuit is the output end of the first circuit; the first exclusive - OR logic circuit is configured to perform an exclusive - OR logic operation on the input data received at the data input end of the first circuit and the input data received at the control input end of the first circuit to determine the output; Or, a first exclusive - NOR logic circuit, the first input end and the second input end of the first exclusive - NOR logic circuit are respectively the data input end and the control input end of the first circuit, and the output end of the first exclusive - NOR logic circuit is the output end of the first circuit; the first exclusive - NOR logic circuit is configured to perform an exclusive - NOR logic operation on the input data received at the data input end of the first circuit and the input data received at the control input end of the first circuit to determine the output; The second circuit includes: a second exclusive - OR logic circuit, the first input end and the second input end of the second exclusive - OR logic circuit are respectively the data input end and the control input end of the second circuit, and the output end of the second exclusive - OR logic circuit is the output end of the second circuit; the second exclusive - OR logic circuit is configured to perform an exclusive - OR logic operation on the input data received at the data input end of the second circuit and the input data received at the control input end of the second circuit to determine the output; Or, a second exclusive - NOR logic circuit, the first input end and the second input end of the second exclusive - NOR logic circuit are respectively the data input end and the control input end of the second circuit, and the output end of the second exclusive - NOR logic circuit is the output end of the second circuit; the second exclusive - NOR logic circuit is configured to perform an exclusive - NOR logic operation on the input data received at the data input end of the second circuit and the input data received at the control input end of the second circuit to determine the output.

2. The flip-flop circuit according to claim 1, characterized in that, The trigger is a D - type flip - flop.

3. The flip-flop circuit according to claim 2, characterized in that, The control input end of the first circuit is connected to the control input end of the second circuit to receive the same input data.

4. The flip-flop circuit according to any one of claims 1-3, characterized in that, The initial value setting pin of the trigger includes a set pin or a reset pin.

5. A method for configuring an initial value of a trigger circuit, characterized in that, The trigger circuit includes a trigger, and the method for configuring the initial value of the trigger circuit includes: Obtaining second control data, performing an exclusive OR logic operation, or an exclusive NOR logic operation on the input data of the trigger circuit according to the second control data to determine second output data; Using the second output data as the input data of the trigger, so that the logical relationship between the output data and the input data of the trigger circuit is the same as the logical relationship between the output data and the input data of the trigger; Determining the initial value of the trigger; Obtaining first control data, performing an exclusive OR logic operation, or an exclusive NOR logic operation on the output data of the trigger according to the first control data to determine first output data; Using the first output data as the output data of the trigger circuit.

6. The method for configuring the initial value of the trigger circuit according to claim 5, characterized in that, The trigger is a D trigger.

7. An integrated circuit, characterized in that, The integrated circuit includes the trigger circuit according to any one of claims 1-4.

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