Embedded component structure and manufacturing method thereof

Abstract

The present invention provides an embedded component structure and a manufacturing method thereof, wherein the embedded component structure comprises a circuit board, an electronic component, a first conductive terminal and a second conductive terminal. The circuit board comprises a first electrical connection layer and a second electrical connection layer. The first electrical connection layer and the second electrical connection layer are staggered. The electronic component is embedded in the circuit board and comprises a first contact and a second contact. The first contact and the second contact are located on the same side as the first electrical connection layer and the second electrical connection layer, respectively. The first conductive terminal and the second conductive terminal respectively cover at least a portion of the top surface and the side wall of the first contact and the second contact, and the first electrical connection layer and the second electrical connection layer are electrically connected to the first contact and the second contact through the first conductive terminal and the second conductive terminal, respectively.

Description

Technical Field

[0001] The invention relates to an electronic component and a manufacturing method thereof, and in particular to an embedded component structure and a manufacturing method thereof. Background Art

[0002] In recent years, electronic components are usually carried by circuit boards in electronic products. However, the placement of electronic components on circuit boards will increase the carrying area. Therefore, how to design embedded components has become a key technology at present. Furthermore, in general embedded components, the electrical connection position of the contact is usually designed above or below the electronic component, which is prone to generate unnecessary losses, thereby reducing the quality of the electronic product. Summary of the invention

[0003] The present invention is directed to an embedded component structure and a manufacturing method thereof, which can effectively improve the quality of electronic products, wiring flexibility in three-dimensional structures, and yield and reliability.

[0004] According to an embodiment of the present invention, an embedded component structure includes a circuit board, an electronic component, a first conductive terminal, and a second conductive terminal. The circuit board includes a first electrical connection layer and a second electrical connection layer. The first electrical connection layer and the second electrical connection layer are staggered. The electronic component is embedded in the circuit board. The electronic component includes a first contact and a second contact. The first contact and the first electrical connection layer are located on the same side. The second contact and the second electrical connection layer are located on the same side. The first conductive terminal at least covers a portion of the top surface and side wall of the first contact, and the first electrical connection layer is electrically connected to the first contact through the first conductive terminal. The second conductive terminal at least covers a portion of the top surface and side wall of the second contact, and the second electrical connection layer is electrically connected to the second contact through the second conductive terminal.

[0005] In one embodiment of the present invention, the first conductive terminal is in direct contact with the first contact point and the first electrical connection layer respectively, and the second conductive terminal is in direct contact with the second contact point and the second electrical connection layer respectively.

[0006] In one embodiment of the present invention, the circuit board is a multi-layer structure, and the first electrical connection layer and the second electrical connection layer are located in different layers of the circuit board.

[0007] In one embodiment of the present invention, the first electrical connection layer and the second electrical connection layer are not aligned with each other.

[0008] In one embodiment of the present invention, the first electrical connection layer and the second electrical connection layer are not coplanar.

[0009] In one embodiment of the present invention, the first electrical connection layer and the second electrical connection layer are arranged along an extension direction of the cavity.

[0010] In an embodiment of the present invention, the first contact point and the second contact point of the other portion are not covered by the first conductive terminal and the second conductive terminal.

[0011] In one embodiment of the present invention, the electronic component comprises a central region and contact regions on both sides of the central region. The first conductive terminal and the second conductive terminal extend toward the central region respectively.

[0012] In one embodiment of the present invention, the first conductive terminal completely covers the top surface and side wall of the first contact, and the second conductive terminal completely covers the top surface and side wall of the second contact.

[0013] In one embodiment of the present invention, the electronic component is a passive component.

[0014] According to an embodiment of the present invention, a method for manufacturing an embedded component structure includes at least the following steps. A circuit board having a cavity is provided. The circuit board includes a plurality of electrical connection layers, wherein the plurality of electrical connection layers are arranged in a staggered manner. An electronic component is arranged in the cavity, wherein the electronic component includes a plurality of contacts exposed outside the cavity. A dielectric layer is formed to seal the electronic component. A first portion of the dielectric layer is removed to form a plurality of blind holes having a first size next to the plurality of contacts. A second portion of the dielectric layer is removed to expand the plurality of blind holes from the first size to the second size and to expose at least a portion of the top surface and side walls of the plurality of contacts and the plurality of electrical connection layers. A plurality of conductive terminals are formed in the plurality of blind holes of the second size, and the plurality of electrical connection layers are electrically connected to the plurality of contacts through the plurality of conductive terminals.

[0015] In one embodiment of the present invention, the circuit board comprises a plurality of buried vias, and the ratio of the third size to the second size of the plurality of buried vias is between 1:0.25 and 1:4 or the second size is between 20 micrometers and 100 micrometers.

[0016] In one embodiment of the present invention, when the first portion of the dielectric layer is removed, the top surfaces and side walls of the plurality of contacts and the plurality of electrical connection layers are not exposed.

[0017] In one embodiment of the present invention, a laser drilling process, a plasma process or a sandblasting process is performed to remove the first portion of the dielectric layer.

[0018] In one embodiment of the present invention, a plasma process and a desmear process are performed to remove the second portion of the dielectric layer.

[0019] In one embodiment of the present invention, the electronic component is attached to the cavity by an adhesive layer.

[0020] In one embodiment of the present invention, the plurality of blind holes are in a strip shape when viewed from above.

[0021] In one embodiment of the present invention, a portion of the second dielectric layer is removed to expose the regions between the plurality of contacts.

[0022] In one embodiment of the present invention, the plurality of blind holes are in a horseshoe shape when viewed from above.

[0023] In one embodiment of the present invention, the cavity has a plurality of conductive material layers, and the conductive material layers are located at the bottom of the cavity.

[0024] Based on the above, the embedded component structure of the present invention improves the design of the electrical connection position of the contact in the electronic component, so that the conductive terminal can at least cover the top surface and side wall of a part of the contact to avoid unnecessary loss and effectively improve the quality of the electronic product. Furthermore, the above design can make the electrical connection layers staggered, so the embedded component structure of the present invention can arbitrarily connect the lines in each layer / direction of the circuit board that are to be electrically connected to the contact, effectively improving the wiring flexibility on the three-dimensional structure. In addition, the present invention removes the dielectric layer in stages to expand the blind hole from the first size to the second size to expose part of the contact and the electrical connection layer. The process can avoid the direct impact of the contact of the electronic component (such as laser bombardment, etc.) when the blind hole is formed at one time, causing damage to the electronic component and thus reducing the yield and reliability. Therefore, the yield and reliability of the embedded component structure can be effectively improved.

[0025] In order to make the above features and advantages of the present invention more clearly understood, embodiments are given below with reference to the accompanying drawings for detailed description. BRIEF DESCRIPTION OF THE DRAWINGS

[0026] Figures 1A to 1F is a partial cross-sectional schematic diagram of a partial manufacturing method of an embedded component structure according to an embodiment of the present invention;

[0027] Figure 1G yes Figure 1D A schematic top view of area A;

[0028] Figure 1H yes Figure 1E A schematic top view of region B;

[0029] Fig. 1I yes Figure 1F A schematic top view of region C;

[0030] Figure 1J yes Figure 1F A three-dimensional schematic diagram of

[0031] FIG. 2A to FIG. 2C yes Figure 1A A partial cross-sectional schematic diagram of a method for manufacturing a circuit board;

[0032] FIG. 3A to FIG. 3D is a partial cross-sectional schematic diagram of a partial manufacturing method of an embedded component structure according to an embodiment of the present invention;

[0033] Figure 3E yes Figure 3B A schematic top view of region D;

[0034] Figure 3F yes Figure 3C A schematic top view of region E;

[0035] Figure 3G yes Figure 3D A schematic top view of region F;

[0036] Figure 3H yes Figure 3D A three-dimensional schematic diagram of

[0037] Figure 4 FIG. 4 is a partial cross-sectional schematic diagram of an embedded component structure according to another embodiment of the present invention. DETAILED DESCRIPTION

[0038] Reference will now be made in detail to exemplary embodiments of the present invention, examples of which are illustrated in the accompanying drawings. Whenever possible, the same reference numerals are used in the drawings and the description to refer to the same or like parts.

[0039] The above and other technical contents, features and effects of the present invention will be clearly presented in the detailed description of the embodiments with reference to the accompanying drawings. The directional terms mentioned in the following embodiments, such as "up", "down", "front", "back", "left", "right", etc., are only the directions with reference to the attached drawings. Therefore, the directional terms used are for illustration, not for limiting the present invention.

[0040] In the detailed description of each embodiment, terms such as "first", "second", and "third" may be used to describe different elements. These terms are only used to distinguish elements from each other, but in the structure, these elements should not be limited by these terms. For example, the first element may be referred to as the second element, and, similarly, the second element may be referred to as the first element without departing from the scope of protection of the present invention. In addition, in the manufacturing method, in addition to a specific process flow, the formation sequence of these components or members should not be limited by these terms. For example, the first element may be formed before the second element. Alternatively, the first element may be formed after the second element. Alternatively, the first element and the second element may be formed in the same process or step.

[0041] In addition, the thickness of layers and regions in the drawings are exaggerated for clarity. The same or similar reference numerals represent the same or similar components, and will not be described one by one in the following paragraphs.

[0042] Figures 1A to 1F FIG. 4 is a partial cross-sectional schematic diagram of a partial manufacturing method of an embedded component structure according to an embodiment of the present invention. Figure 1G yes Figure 1D Schematic top view of area A. Figure 1H yes Figure 1E Schematic top view of area B. Fig. 1I yes Figure 1F Schematic top view of area C. Figure 1J yes Figure 1F In this embodiment, the manufacturing process of the embedded component structure 100 may include the following steps.

[0043] Please refer to Figure 1A , providing a circuit board 110 having a cavity 110c. For example, the circuit board 110 can be formed by stacking a plurality of patterned conductive material layers 1111 and a plurality of dielectric material layers 1112, wherein the patterned conductive material layers 1111 can be electrically connected by a plurality of buried vias 114. In addition, a portion of the patterned conductive material layers 1111 can be used as a plurality of electrical connection layers 112 for subsequent electrical connection to the contact points 122.

[0044] In this embodiment, the circuit board 110 may include a plurality of electrical connection layers 112 that are staggered. For example, the plurality of electrical connection layers 112 may include a first electrical connection layer 1121 and a second electrical connection layer 1122, and the first electrical connection layer 1121 and the second electrical connection layer 1122 may be staggered. Here, the staggered configuration means that the first electrical connection layer 1121 and the second electrical connection layer 1122 may not be aligned with each other, in other words, the first electrical connection layer 1121 and the second electrical connection layer 1122 may not be coplanar.

[0045] In one embodiment, if the circuit board 110 is a multi-layer structure, the first electrical connection layer 1121 and the second electrical connection layer 1122 may be located in different layers of the circuit board 110. For example, the first electrical connection layer 1121 and the second electrical connection layer 1122 may be arranged along the extension direction E of the cavity 110c, but the present invention is not limited thereto. It should be noted that the first electrical connection layer 1121 and the second electrical connection layer 1122 of the present invention are not limited to Figure 1A The configuration method is not limited to the direction and the number of layers, as long as the first electrical connection layer 1121 and the second electrical connection layer 1122 are staggered, they all fall within the protection scope of the present invention.

[0046] On the other hand, the cavity 110c may penetrate at least from the first electrical connection layer 1121 to the second electrical connection layer 1122. In other words, the first electrical connection layer 1121 and the second electrical connection layer 1122 may be located on both sides of the cavity 110c and separated from each other in structure and electrical properties.

[0047] Please refer to Figure 1B , an electronic component 120 is disposed in the cavity 110c, wherein the electronic component 120 includes a plurality of contacts 122 exposed outside the cavity 110c, so that the electronic component 120 can be embedded in the circuit board 110. For example, the plurality of contacts 122 can include a first contact 1221 and a second contact 1222, wherein the first contact 1221 and the second contact 1222 can be located at two sides of the electronic component 120.

[0048] In this embodiment, the first contact 1221 may be located on the same side of the electronic component 120 as the first electrical connection layer 1121, and the second contact 1222 may be located on the same side of the electronic component 120 as the second electrical connection layer 1122, so that the first contact 1221 may be electrically connected to the first electrical connection layer 1121 later, and the second contact 1222 may be electrically connected to the second electrical connection layer 1122 later. Further, the first contact 1221 and the first electrical connection layer 1121 and the second contact 1222 and the second electrical connection layer 1122 may be located on opposite side walls of the electronic component 120, respectively.

[0049] In one embodiment, the electronic component 120 can be attached to the cavity 110c by an adhesive layer 10, so as to avoid the problem of cracking caused by aging of the intermetallic compound (IMC) when the electronic component 120 is connected by solder, thereby effectively improving the yield and reliability of the embedded component structure 100. The material of the adhesive layer 10 is, for example, a photosensitive adhesive. However, the present invention is not limited thereto, and the electronic component 120 can also be configured in the cavity 110c in other suitable ways.

[0050] In one embodiment, the electronic component 120 is, for example, a passive component, such as a resistor, a capacitor, an inductor, a filter or the like, but the present invention is not limited thereto, and the type of the electronic component 120 can be selected according to actual needs.

[0051] In one embodiment, a gap G may be provided between the plurality of contacts 122 and the sidewall of the cavity 110 c . In other words, the plurality of contacts 122 of the electronic component 120 may not directly contact the sidewall of the cavity 110 c , but the invention is not limited thereto.

[0052] Please refer to Figure 1C , forming a dielectric layer 130 to seal the electronic component 120. For example, the dielectric layer 130 can be filled into the cavity 110c and fill the gap G between the electronic component 120 and the circuit board 110 (eg, Figure 1B On the other hand, in one embodiment, a dielectric layer 130 may be further formed on a surface 110b of the circuit board 110 opposite to the cavity 110c for subsequent build-up circuits.

[0053] In some embodiments, the dielectric layer 130 may be formed by a lamination process of, for example, resin (e.g., epoxy or other similar thermosetting cross-linking resins), silane (e.g., hexamethyldisiloxane (HMDSN), tetraethoxysilane (TEOS), bis(dimethylamino)dimethylsilane (BDMADMS)), or other suitable dielectric materials, but the present invention is not limited thereto.

[0054] Please refer to Figure 1D , remove the first portion of the dielectric layer 130 to form a plurality of blind holes 130t having a first size D1 next to the plurality of contacts 122. Further, for example, a laser drilling process, a plasma process or a sandblasting process is performed to remove the first portion of the dielectric layer 130. It should be noted that, at this stage, when the first portion of the dielectric layer 130 is removed, the top surface and side walls of the plurality of contacts 122 and the plurality of electrical connection layers 112 may not be exposed, so as to effectively protect the contacts 122 and the electrical connection layer 112 of the electronic component 120. For example, the top surface 1221a and side walls 1221s of the first contact 122, the top surface 1222a and side walls 1222s of the second contact 1222, the first electrical connection layer 1121 and the second electrical connection layer 1122 may not be exposed. On the other hand, based on circuit layout requirements, a portion of the dielectric layer 130 located on the surface 110 b of the circuit board 110 opposite to the cavity 110 c may be selectively removed to form another blind hole 130 t 1 , but the present invention is not limited thereto.

[0055] In addition, in this embodiment, Figure 1G As shown, in a top view, the plurality of blind holes 130t are in the shape of elongated strips, but the present invention is not limited thereto. In other embodiments, the plurality of blind holes 130t may have other suitable shapes.

[0056] Please also refer to Figure 1D to Figure 1E and Figure 1G to Figure 1H, remove the second portion of the dielectric layer 130 to expand the plurality of blind holes 130t from the first size D1 to the second size D2 and expose at least a portion of the top surfaces and side walls of the plurality of contacts 122 and the plurality of electrical connection layers 112. For example, at least a portion of the top surface 1221a and side walls 1221s of the first contact 122, the top surface 1222a and side walls 1222s of the second contact 1222, the first electrical connection layer 1121, and the second electrical connection layer 1122 may be exposed.

[0057] In the present embodiment, the dielectric layer 130 is removed in stages so that the blind hole 130t is expanded from the first size D1 to the second size D2 to expose a portion of the contact 122 and the electrical connection layer 112. This can avoid the situation where the blind hole is formed at one time and the contact of the electronic component is directly impacted (such as by laser bombardment, etc.) to cause damage to the electronic component and thus reduce the yield and reliability. Therefore, the yield and reliability of the embedded component structure 100 can be effectively improved.

[0058] In some embodiments, the ratio of the third dimension D3 to the second dimension D2 of the plurality of buried vias 114 is between 1:0.25 and 1:4, or the second dimension D2 is between 20 micrometers and 100 micrometers, that is, the second dimension D2 of the blind via 130t can be similar to the dimension D3 of the buried via 114, so as to reduce the volume occupied by the blind via 130t in the embedded component structure 100 and improve the volume utilization rate of the embedded component structure 100, but the present invention is not limited thereto. The second dimension D2 of the blind via 130t can be determined according to actual design requirements.

[0059] It should be noted that the first size D1 and the second size D2 of the blind via 130 t and the size D3 of the buried via 114 may be defined as the maximum widths of the blind via 130 t and the buried via 114 .

[0060] In one embodiment, for example, a plasma process and a desmear process are performed to remove the second portion of the dielectric layer 130. Generally speaking, when forming a blind hole, a plasma process and a desmear process are usually used to remove the residue in the hole. Therefore, in this embodiment, no additional process is required. The blind hole 130t is expanded from the first size D1 to the second size D2 while the residue in the hole is removed. Therefore, the process of the embedded component structure 100 can be effectively simplified, but the present invention is not limited thereto.

[0061] Please also refer to Figure 1F , Fig. 1I and Figure 1J, a plurality of conductive terminals 140 are formed in the plurality of blind holes 130t of the second size D2, and the plurality of electrical connection layers 112 are electrically connected to the plurality of contacts 122 through the plurality of conductive terminals 140. For example, the plurality of conductive terminals 140 may include a first conductive terminal 1401 and a second conductive terminal 1402, wherein the first conductive terminal 1401 may at least cover a portion of the top surface 1221a and the side wall 1221s of the first contact 1221, and the first electrical connection layer 1121 is electrically connected to the first contact 1221 through the first conductive terminal 1401, and the second conductive terminal 1402 may at least cover a portion of the top surface 1222a and the side wall 1222s of the second contact 1222, and the second electrical connection layer 1122 is electrically connected to the second contact 1222 through the second conductive terminal 1402.

[0062] In the present embodiment, the embedded component structure 100 improves the design of the electrical connection position of the contact 122 in the electronic component 120, so that the conductive terminal 140 can at least cover a portion of the top surface and side wall of the contact 122 to avoid unnecessary loss and effectively improve the quality of the electronic product. Furthermore, through the aforementioned design, the electrical connection layers 112 can be staggered, so the embedded component structure 100 can arbitrarily connect the lines in each layer / direction of the circuit board that are to be electrically connected to the contact 122, effectively improving the wiring flexibility in the three-dimensional structure.

[0063] In addition, in this embodiment, another part of the contacts 122 may not be covered by the conductive terminal 140. For example, another part of the first contacts 1221 may not be covered by the first conductive terminal 1401, and another part of the second contacts 1222 may not be covered by the second conductive terminal 1402. In other words, the first conductive terminal 1401 may not completely cover the top surface 1221a and the side wall 1221s of the first contacts 1221, and the second conductive terminal 1402 may not completely cover the top surface 1222a and the side wall 1222s of the second contacts 1222. Figure 1F and Figure 1JIt can be seen that the first conductive terminal 1401 does not completely cover the side wall 1221s of the first contact 1221, which may be that the first conductive terminal 1401 only completely covers one of the side walls 1221s of the first contact 1221 (such as the side wall 1221s on the left side) but does not completely cover other side walls 1221s connected thereto (such as the front and back side walls 1221s), and the second conductive terminal 1402 does not completely cover the side wall 1222s of the second contact 1222, which may be that the second conductive terminal 1402 only completely covers one of the side walls 1222s of the second contact 1222 (such as the side wall 1222s on the right side) but does not completely cover other side walls 1222s connected thereto (such as the front and back side walls 1222s). However, the present invention is not limited thereto, and the degree of covering of the first contact 1221 and the second contact 1222 may be determined according to actual design requirements. As long as the conductive terminal 140 can at least partially cover the top surface and side wall of the contact 122 , it falls within the protection scope of the present invention.

[0064] In this embodiment, the conductive terminal 140 can be in direct contact with the contact 122 and the electrical connection layer 112, respectively, to form an electrode connection portion. For example, the first conductive terminal 1401 can be in direct contact with the first contact 1221 and the first electrical connection layer 1121, respectively, and the second conductive terminal 1402 can be in direct contact with the second contact 1222 and the second electrical connection layer 1122, respectively, so that the first contact 1221, the first conductive terminal 1401 and the first electrical connection layer 1121 form a first electrode connection portion, and the second contact 1222, the second conductive terminal 1402 and the second electrical connection layer 1122 form a second electrode connection portion. In addition, a build-up circuit 150 can be further formed on the surface 110b of the circuit board 110 opposite to the cavity 110c, but the present invention is not limited thereto.

[0065] After the above process, the embedded component structure 100 of the present embodiment can be substantially completed. The embedded component structure 100 of the present embodiment includes a circuit board 110, an electronic component 120, a first conductive terminal 1401, and a second conductive terminal 1402. The circuit board has a cavity 110c. The circuit board 110 includes a first electrical connection layer 1121 and a second electrical connection layer 1122. The first electrical connection layer 1121 and the second electrical connection layer 1122 are staggered. The electronic component 120 is disposed in the cavity 110c. The electronic component 120 includes a first contact 1221 and a second contact 1222. The first contact 1221 and the first electrical connection layer 1121 are located on the same side. The second contact 1222 and the second electrical connection layer 1122 are located on the same side. The first conductive terminal 1401 at least partially covers the top surface 1221a and the side wall 1221s of the first contact 1221, and the first electrical connection layer 1121 is electrically connected to the first contact 1221 through the first conductive terminal 1401. The second conductive terminal 1402 at least partially covers the top surface 1222a and the side wall 1222s of the second contact 1222, and the second electrical connection layer 1122 is electrically connected to the second contact 1222 through the second conductive terminal 1402, thereby effectively improving the quality of electronic products, the wiring flexibility in the three-dimensional structure, and the yield and reliability.

[0066] FIG. 2A to FIG. 2C yes Figure 1A A partial cross-sectional schematic diagram of a method for manufacturing a circuit board.

[0067] Please also refer to FIG. 2A to FIG. 2C In one embodiment, for example, the following steps are performed to form Figure 1A The circuit board 110 in FIG.

[0068] First, if Figure 2A As shown, a substrate 1 is provided, wherein the substrate 1 may include a core layer 11, a release layer 12, and a conductive material layer 13, wherein the release layer 12 may be formed on the core layer 11, and the conductive material layer 13 may be formed on the release layer 12. For example, the release layer 12 and the conductive material layer 13 may be formed on the upper and lower surfaces of the core layer 11 at the same time.

[0069] In some embodiments, the core layer 11 may include a polymer glass fiber composite substrate, a glass substrate, a ceramic substrate, an insulating silicon substrate, or a polyimide (PI) glass fiber composite substrate. However, the present invention is not limited thereto, as long as the core layer 11 can be suitable for carrying the film layer formed thereon or the components configured thereon in the subsequent process. On the other hand, the release layer 12 and the conductive material layer 13 can be any suitable release and conductive materials.

[0070] Then, if Figure 2Band Figure 2C As shown, a plurality of patterned conductive material layers 1111 and a plurality of dielectric material layers 1112 are formed on the conductive material 13 on both sides, and then the core layer 11 and the release layer 12 are removed to form two circuit boards (only one schematic diagram is shown in the figure), wherein a plurality of buried vias 114 are formed between the plurality of patterned conductive material layers 1112 so that the plurality of patterned conductive material layers 1111 can be electrically connected. Here, the patterned conductive material layer 1111, the dielectric material layer 1112, and the buried vias 114 can be formed with suitable materials and methods, and the present invention is not limited thereto.

[0071] Then, a cavity 110c may be formed in the dielectric material layer 1111 to form a Figure 1A The circuit board 110 is shown. In one embodiment, the core layer 11, the remaining release layer 12 and the conductive material layer 13 are removed by an etching process, for example, but the invention is not limited thereto.

[0072] It should be noted that the present invention is not limited to forming the circuit board 110 in the aforementioned manner, and as long as the circuit board 110 has the cavity 110 c , it falls within the protection scope of the present invention.

[0073] FIG. 3A to FIG. 3D FIG. 4 is a partial cross-sectional schematic diagram of a partial manufacturing method of an embedded component structure according to an embodiment of the present invention. Figure 3E yes Figure 3B Schematic top view of area D. Figure 3F yes Figure 3C Schematic top view of area E. Figure 3G yes Figure 3D Schematic top view of area F. Figure 3H yes Figure 3D A three-dimensional schematic diagram of .

[0074] Please refer to Figure 3A ,and Figure 1A Similarly, the difference is that the cavity 110c of the circuit board 210 may have multiple conductive material layers 216, and the conductive material layers 216 may be located at the bottom BS of the cavity 110c. For example, the multiple conductive material layers 216 may be part of the patterned conductive material layer 1111 in the circuit board 210, but the invention is not limited thereto.

[0075] Please refer to Figure 3B ,and Figure 1D Similarly, the difference is that after removing the first portion of the dielectric layer 230, the shape of the plurality of blind holes 230t in the dielectric layer 230 is a horseshoe shape when viewed from above, such as Figure 3EAs shown, the blind hole 230t may have a first size D11. On the other hand, the blind hole 230t may expose the conductive material layer 216 below, so that the conductive terminal 240 subsequently formed in the blind hole 230t may extend from the conductive material layer 216 to further improve the coverage of the conductive terminal 240 to the contact point 122.

[0076] Please also refer to Figure 3C ,and Figure 1E Similarly, the difference is that by removing the second portion of the dielectric layer 230, the plurality of blind holes 230t can be expanded from the first size D11 to the second size D21 and the areas between the plurality of contacts 122 can be exposed. In other words, the electronic component 120 can include a central region R1 and contact regions R2 on both sides of the central region R1. Removing the second portion of the dielectric layer 230 can completely expose the contact regions R2 and further partially expose a portion of the central region R1. In addition, if Figure 3F As shown, the horseshoe-shaped blind holes 230t may be equidistantly expanded, but the present invention is not limited thereto.

[0077] Please also refer to Figure 3D , Figure 3G and Figure 3H , a plurality of conductive terminals 240 are formed in a plurality of blind holes 230t of a second size D21, and a plurality of electrical connection layers 112 are electrically connected to a plurality of contacts 112 through the plurality of conductive terminals 240, wherein the conductive terminals 240 extend toward the center region R1. For example, the first conductive terminal 2401 and the second conductive terminal 2402 may extend toward the center region R1, respectively. In other words, the first conductive terminal 2401 may completely cover the top surface 1221a and the side wall 1221s of the first contact 1221, and the second conductive terminal 2402 may completely cover the top surface 1222a and the side wall 1222s of the second contact 1222. Therefore, the embedded component structure 200 in this embodiment may further enhance the wiring flexibility in the three-dimensional structure.

[0078] Figure 4 FIG. 4 is a partial cross-sectional schematic diagram of an embedded component structure according to another embodiment of the present invention.

[0079] Please refer to Figure 4 ,and Figure 1F Similarly, the difference is that the embedded component structure 300 of this embodiment further forms a build-up circuit 350 on the first side 100a of the embedded component structure 100, and further forms a build-up circuit 360 on the second side 100b relative to the first side 100a, so that the embedded component structure 300 can further perform other electrical connections later.

[0080] In summary, the embedded component structure of the present invention improves the design of the electrical connection position of the contact in the electronic component, so that the conductive terminal can at least cover the top surface and side wall of a part of the contact to avoid unnecessary loss and effectively improve the quality of the electronic product. Furthermore, the electrical connection layers can be staggered through the above design, so the embedded component structure of the present invention can arbitrarily connect the lines in each layer / direction of the circuit board that are to be electrically connected to the contact, effectively improving the wiring flexibility on the three-dimensional structure. In addition, the present invention removes the dielectric layer in multiple stages to expand the blind hole from the first size to the second size to expose part of the contact and the electrical connection layer. This can avoid the situation where the electronic component is damaged and the yield is reduced by directly impacting the contact of the electronic component (such as by laser bombardment, etc.) when the blind hole is formed at one time, thereby effectively improving the reliability of the embedded component structure.

[0081] Finally, it should be noted that the above embodiments are only used to illustrate the technical solutions of the present invention, rather than to limit it. Although the present invention has been described in detail with reference to the aforementioned embodiments, those skilled in the art should understand that they can still modify the technical solutions described in the aforementioned embodiments, or replace some or all of the technical features therein with equivalents. However, these modifications or replacements do not cause the essence of the corresponding technical solutions to deviate from the scope of the technical solutions of the embodiments of the present invention.

Claims

1. An embedded component structure, characterized in that: include: Circuit board, including: a first electrical connection layer; and A second electrical connection layer, wherein the first electrical connection layer and the second electrical connection layer are staggered; An electronic component is embedded in the circuit board, wherein the first electrical connection layer and the second electrical connection layer are respectively located on opposite side walls of the electronic component, and the electronic component includes: A first contact point located on the same side as the first electrical connection layer; and A second contact point is located on the same side as the second electrical connection layer; a first conductive terminal covering at least a portion of a top surface and a side wall of the first contact, and the first electrical connection layer being electrically connected to the first contact through the first conductive terminal; and The second conductive terminal at least covers a portion of the top surface and side wall of the second contact, and the second electrical connection layer is electrically connected to the second contact through the second conductive terminal, wherein The electronic component includes a central area and contact areas on both sides of the central area; The first conductive terminal and the second conductive terminal extend toward the central area respectively; The first conductive terminal completely covers the top surface and the side wall of the first contact; and The second conductive terminal completely covers the top surface and the side wall of the second contact.

2. The embedded component structure according to claim 1, characterized in that: The first conductive terminal is in direct contact with the first contact point and the first electrical connection layer respectively; and The second conductive terminal is in direct contact with the second contact point and the second electrical connection layer respectively.

3. The embedded component structure according to claim 1, characterized in that: The circuit board has a multi-layer structure, and the first electrical connection layer and the second electrical connection layer are located in different layers of the circuit board.

4. The embedded component structure according to claim 1, characterized in that: The first electrical connection layer and the second electrical connection layer are not aligned with each other.

5. The embedded component structure according to claim 1, characterized in that: The first electrical connection layer and the second electrical connection layer are not coplanar.

6. The embedded component structure according to claim 1, characterized in that: The first electrical connection layer and the second electrical connection layer are arranged along an extension direction of the cavity.

7. The embedded component structure according to claim 1, characterized in that: The electronic component is a passive component.

8. A method for manufacturing an embedded component structure, characterized in that: include: A circuit board having a cavity is provided, wherein the circuit board comprises: A plurality of electrical connection layers, wherein the plurality of electrical connection layers are arranged in a staggered manner relative to each other; Disposing an electronic component in the cavity, wherein a first electrical connection layer and a second electrical connection layer among the plurality of electrical connection layers are respectively located on opposite side walls of the electronic component, and the electronic component includes a plurality of contacts exposed outside the cavity; forming a dielectric layer to seal the electronic component; removing a first portion of the dielectric layer to form a plurality of blind holes having a first size next to the plurality of contacts; removing a second portion of the dielectric layer to expand the plurality of blind holes from the first size to a second size and to expose at least a portion of the top surfaces and sidewalls of the plurality of contacts and the plurality of electrical connection layers; and A plurality of conductive terminals are formed in the plurality of blind holes of the second size, the plurality of electrical connection layers are electrically connected to the plurality of contacts through the plurality of conductive terminals, and the plurality of conductive terminals at least partially cover the top surface and the side wall of the plurality of contacts, wherein The electronic component includes a central area and contact areas on both sides of the central area; The plurality of conductive terminals extend toward the central area respectively; and The plurality of conductive terminals completely cover the top surfaces and the side walls of the plurality of contacts.

9. The method for manufacturing an embedded component structure according to claim 8, characterized in that: The circuit board includes a plurality of buried vias, and a ratio of a third size of the plurality of buried vias to the second size is between 1:0.25 and 1:4, or the second size is between 20 micrometers and 100 micrometers.

10. The method for manufacturing an embedded component structure according to claim 8, characterized in that: When the first portion of the dielectric layer is removed, the top surfaces and the side walls of the plurality of contacts and the plurality of electrical connection layers are not exposed.

11. The method for manufacturing an embedded component structure according to claim 8, characterized in that: A laser drilling process, a plasma process or a sandblasting process is performed to remove the first portion of the dielectric layer.

12. The method for manufacturing an embedded component structure according to claim 8, characterized in that: A plasma process and a desmear process are performed to remove the second portion of the dielectric layer.

13. The method for manufacturing an embedded component structure according to claim 8, characterized in that: The electronic component is attached to the cavity by an adhesive layer.

14. The method for manufacturing an embedded component structure according to claim 8, characterized in that: In a plan view, the plurality of blind holes are in the shape of elongated strips.

15. The method for manufacturing an embedded component structure according to claim 8, characterized in that: A portion of the second dielectric layer is removed to expose the areas between the plurality of contacts.

16. The method for manufacturing an embedded component structure according to claim 15, characterized in that: In a top view, the plurality of blind holes are in a horseshoe shape.

17. The method for manufacturing an embedded component structure according to claim 15, characterized in that: A plurality of conductive material layers are disposed in the cavity, and the conductive material layers are located at the bottom of the cavity.

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