Ga2o3-based voltage and current resistant sic pin diode

Abstract

The application provides a Ga2O3 voltage and current resistant SiC PIN diode, which comprises the following: the lower side of an N-type heavily doped semiconductor transport layer is connected to the upper side of an N-type ohmic electrode; the lower side of an N-type heavily doped Ga2O3 voltage improving layer is connected to the upper side of the N-type heavily doped semiconductor transport layer; the lower side of an N-type intrinsic layer is connected to the upper side of the N-type heavily doped Ga2O3 voltage improving layer; the lower side of a P-type heavily doped semiconductor transport layer is connected to the upper side of the N-type intrinsic layer; and the lower side of a P-type ohmic electrode is connected to the upper side of the P-type heavily doped semiconductor transport layer, so that the voltage and current resistance of the SiC PIN diode is improved.

Description

Technical Field

[0001] This invention relates to a Ga2O3-based SiC PIN diode with high voltage and current withstand capability. Background Technology

[0002] Silicon carbide (SiC) materials have attracted widespread attention and research due to their superior physical properties. Their high-temperature, high-power electronic devices possess advantages such as high input impedance, fast switching speed, high operating frequency, and resistance to high temperatures and pressures, leading to their widespread application in switching power supplies, high-frequency heating, automotive electronics, and power amplifiers.

[0003] However, due to the limitations of the material properties, the bandgap is fixed. To achieve a higher withstand voltage, the current capability must be sacrificed. Therefore, the current capability of high-voltage SiC PIN diodes is relatively small. Summary of the Invention

[0004] The technical problem to be solved by the present invention is to provide a SiC PIN diode based on Ga2O3 with high voltage and current withstand capability, thereby improving the current capability of SiC PIN diodes.

[0005] This invention is implemented as follows: a Ga2O3-based SiC PIN diode with withstand voltage and current, comprising:

[0006] An N-type ohmic electrode;

[0007] An N-type heavily doped semiconductor transport layer, wherein the lower side of the N-type heavily doped semiconductor transport layer is connected to the upper side of the N-type ohmic electrode;

[0008] An N-type heavily doped Ga2O3 breakdown voltage enhancement layer is provided, wherein the lower side of the N-type heavily doped Ga2O3 breakdown voltage enhancement layer is connected to the upper side of the N-type heavily doped semiconductor transport layer.

[0009] An N-type intrinsic layer, wherein the lower side of the N-type intrinsic layer is connected to the upper side of the N-type heavily doped Ga2O3 breakdown voltage enhancement layer;

[0010] A P-type heavily doped semiconductor transport layer, wherein the lower side of the P-type heavily doped semiconductor transport layer is connected to the upper side of the N-type intrinsic layer;

[0011] And a P-type ohmic electrode, the lower side of which is connected to the upper side of the P-type heavily doped semiconductor transport layer.

[0012] Furthermore, the thickness of the N-type heavily doped Ga2O3 withstand voltage enhancement layer is 1.4 to 3 micrometers.

[0013] Furthermore, the doping concentration of the N-type heavily doped Ga2O3 breakdown voltage enhancement layer is 3*10⁻⁶.17 cm -3 .

[0014] The advantages of this invention are: This invention provides a Ga2O3-based SiC PIN diode with high voltage and current withstand capability, which increases the voltage withstand capability by 2.1 times and the current withstand capability by 3 times without changing the thickness of the PIN diode. Attached Figure Description

[0015] The present invention will be further described below with reference to the accompanying drawings and embodiments.

[0016] Figure 1 This is a schematic diagram of a Ga2O3-based SiC PIN diode with withstand voltage and current of the present invention.

[0017] Figure 2 This is a schematic diagram of the space charge region during the operation of a Ga2O3-based SiC PIN diode with withstand voltage and current. Figure 1 ;

[0018] Figure 3 This is a schematic diagram of the space charge region during the operation of a Ga2O3-based SiC PIN diode with withstand voltage and current. Figure 2 . Detailed Implementation

[0019] like Figure 1 As shown, the present invention discloses a Ga2O3-based SiC PIN diode with withstand voltage and current, comprising:

[0020] An N-type ohmic electrode;

[0021] An N-type heavily doped semiconductor transport layer, wherein the lower side of the N-type heavily doped semiconductor transport layer is connected to the upper side of the N-type ohmic electrode;

[0022] A heavily doped N-type Ga2O3 breakdown voltage enhancement layer is provided, wherein the lower side of the heavily doped N-type Ga2O3 breakdown voltage enhancement layer is connected to the upper side of the heavily doped N-type semiconductor transport layer, the thickness of the heavily doped N-type Ga2O3 breakdown voltage enhancement layer is 1.4 to 3 micrometers, and the doping concentration of the heavily doped N-type Ga2O3 breakdown voltage enhancement layer is 3*10. 17 cm -3 ;

[0023] An N-type intrinsic layer is provided, the lower side of which is connected to the upper side of the N-type heavily doped Ga2O3 breakdown voltage enhancement layer. The N-type intrinsic layer is made of SiC and has a thickness of 3 micrometers (the thickness of the N-type intrinsic layer in the prior art is 6 micrometers).

[0024] A P-type heavily doped semiconductor transport layer, wherein the lower side of the P-type heavily doped semiconductor transport layer is connected to the upper side of the N-type intrinsic layer;

[0025] And a P-type ohmic electrode, the lower side of which is connected to the upper side of the P-type heavily doped semiconductor transport layer.

[0026] The high-voltage SiC PIN diode has a vertical structure and is a bipolar device. It offers greater current capability at the same voltage level. This structure adds an N-type heavily doped Ga2O3 voltage-enhancing layer above the existing N-type heavily doped semiconductor transport layer. The bandgap of Ga2O3 is 5.3 eV, 1.6 times that of SiC, but its critical breakdown field strength is 8 MV / cm, 3.2 times that of SiC. Therefore, its breakdown voltage increases proportionally to the critical breakdown voltage, resulting in a 3.2-fold improvement in voltage withstand capability. The mobility of Ga2O3 is 300 cm⁻¹. 2 / Vs is 0.3 times that of SiC material, making it suitable for high-voltage SiC PIN diodes.

[0027] This N-type heavily doped Ga2O3 breakdown voltage enhancement layer can greatly improve the current capability of the PIN diode with minimal sacrifice in breakdown voltage level. The main reason is that a space charge region is formed when the PIN diode is reverse-biased, and the space charge region extends from the N-type intrinsic layer to the N-type heavily doped Ga2O3 breakdown voltage enhancement layer.

[0028] like Figure 2 and Figure 3 As shown, at low voltage, the space charge region diffuses into the N-type intrinsic breakdown voltage region. As the voltage gradually increases, the space charge region diffuses into the Ga2O3 breakdown voltage region. The doping concentration of the heavily doped N-type Ga2O3 breakdown voltage enhancement layer is three times that of the N-type intrinsic layer. Therefore, at the same voltage, the diffusion depth is one-third of the original thickness. Thus, for the same thickness, the breakdown voltage is 2.1 times the original.

[0029] With the thickness of the PIN diode remaining constant—that is, the thickness of the N-type heavily doped Ga2O3 voltage-enhancing layer is 3 micrometers and the thickness of the N-type intrinsic layer is 3 micrometers—the voltage withstand is increased by 2.1 times and the current is increased by 3 times. If the thickness of the N-type heavily doped Ga2O3 voltage-enhancing layer is 1.4 micrometers and the thickness of the N-type intrinsic layer is 3 micrometers, the voltage withstand remains the same, but the current can still be increased. This allows for a reduction in diode thickness and further reduction in size, which can further shrink the size of devices using many of these diodes.

[0030] While specific embodiments of the present invention have been described above, those skilled in the art should understand that the specific embodiments described are merely illustrative and not intended to limit the scope of the present invention. Equivalent modifications and variations made by those skilled in the art in accordance with the spirit of the present invention should be covered within the scope of protection of the claims of the present invention.

Claims

1. A Ga2O3-based SiC PIN diode with withstand voltage and current, characterized in that: include: An N-type ohmic electrode; An N-type heavily doped semiconductor transport layer, wherein the lower side of the N-type heavily doped semiconductor transport layer is connected to the upper side of the N-type ohmic electrode; An N-type heavily doped Ga2O3 breakdown voltage enhancement layer is provided, wherein the lower side of the N-type heavily doped Ga2O3 breakdown voltage enhancement layer is connected to the upper side of the N-type heavily doped semiconductor transport layer. An N-type intrinsic layer, wherein the lower side of the N-type intrinsic layer is connected to the upper side of the N-type heavily doped Ga2O3 breakdown voltage enhancement layer; A P-type heavily doped semiconductor transport layer, wherein the lower side of the P-type heavily doped semiconductor transport layer is connected to the upper side of the N-type intrinsic layer; And a P-type ohmic electrode, the lower side of which is connected to the upper side of the P-type heavily doped semiconductor transport layer. The thickness of the N-type heavily doped Ga2O3 breakdown voltage enhancement layer is 1.4 to 3 micrometers; The doping concentration of the N-type heavily doped Ga2O3 breakdown enhancement layer is 3*10. 17 cm -3 .

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