Control Circuit and Switching Converter Using the Same

By detecting the capacitance charge difference between the main switch junction, adjusting the conduction time of the auxiliary switch tube, the problem of low efficiency and serious electromagnetic interference in the wide input voltage range is solved, and efficient and stable voltage control is achieved.

CN113972816BActive Publication Date: 2025-07-08SILERGY SEMICON TECH (HANGZHOU) CO LTD
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Patent Information

Application Number
CN202111467379.3
Authority / Receiving Office
CN · China
Patent Type
Patents(China)
Current Assignee / Owner
Priority Date
2020-12-14
Filing Date
2021-12-02
Publication Date
2025-07-08
Estimated Expiration
2041-12-02

AI Technical Summary

Technical Problem

The existing switching converters are inefficient and have serious electromagnetic interference within a wide input voltage range. The on-time of the auxiliary switching tube cannot follow the change of the input voltage, resulting in unstable opening of the main switching tube zero voltage.

Method used

By detecting the difference in charge and discharge charge on the main switch tube junction capacitor, adjusting the conduction time of the auxiliary switch tube, the closed-loop control method is used to adaptively adjust the conduction time of the auxiliary switch tube, and optimizing the control circuit using the principle of conservation of charge.

Benefits of technology

Reduce the voltage when the main switch tube is turned on within a wide input voltage range, improve efficiency and improve electromagnetic interference, and the control method is simple and fast.

✦ Generated by Eureka AI based on patent content.

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Patent Text Reader

Abstract

The present application discloses a control circuit and a switching converter applying the same. In an embodiment of the present invention, the difference between the charging charge and the discharging charge on the junction capacitance during the turn-off period of the main switch tube is detected to generate a detection signal, and the on-time of the auxiliary switch tube is adjusted according to the error between the detection signal and a reference signal, so as to reduce the voltage between the two power terminals of the main switch tube when it is turned on, and at the same time recover the leakage inductance energy and improve the electromagnetic interference. In this embodiment, the control circuit adopts a closed-loop control method, and adaptively adjusts the continuous change of the on-time of the auxiliary switch tube by using the principle of charge conservation. The control method is simple, has a fast response, and can be applied to a wide range of AC input voltages or DC input voltages.
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Description

Technical Field

[0001] The present invention relates to power electronics technology, and particularly to a switching converter and its control circuit. Background Art

[0002] Currently, switching converters are widely used to rectify mains AC power and provide the DC voltage required by the load. The switching converter has a magnetic component. When the switching tube is turned on, energy is stored in the magnetic component, and when the switching tube is turned off, the energy stored in the magnetic component is delivered to the load power converter. When the switching tube operates in the hard-switching mode, there is an overlap between the waveforms of the voltage drop and current rise during the conduction process, resulting in large turn-on losses. In the prior art, active clamping is usually used to recover the energy in the magnetic component to improve efficiency.

[0003] Generally, the main switching tube and the auxiliary switching tube conduct and turn off alternately in a complementary manner. During the off period of the main switching tube, the auxiliary switching tube conducts, thus forming an additional absorption circuit to absorb the energy stored in the magnetic component, so that the generation of spike voltages can be suppressed. Since the main switching tube and the auxiliary switching tube conduct and turn off alternately in a complementary manner, the detection method and control method are relatively complex. In addition, when the switching converter inputs an AC voltage, the conduction time of the auxiliary switching tube cannot follow the change of the AC input voltage, resulting in unstable zero-voltage turn-on of the main switching tube, thereby affecting the efficiency of the switching converter. Summary of the Invention

[0004] In view of the above problems, an object of the present invention is to provide a novel switching converter and its control circuit, which utilize an absorption circuit to return the energy stored in the parasitic capacitances of the main switching tube and the auxiliary switching tube to the power grid within a wide input voltage range, so as to reduce the voltage between the two power terminals of the main switching tube when it is conducting, while recovering the leakage inductance energy and improving electromagnetic interference.

[0005] According to an aspect of the present invention, a control circuit is provided. The switching converter includes a main switching tube and an auxiliary switching tube, and is characterized in that

[0006] During the off period of the main switching tube, the junction capacitance of the main switching tube is charged and discharged, and the control circuit adjusts the conduction time of the auxiliary switching tube according to the difference between the charging charge and the discharging charge on the junction capacitance.

[0007] Preferably, when the charging charge on the junction capacitance is greater than the discharging charge, the control circuit increases the conduction time of the auxiliary switching tube; when the charging charge on the junction capacitance is less than the discharging charge, the control circuit reduces the conduction time of the auxiliary switching tube; when the charging charge on the junction capacitance is equal to the discharging charge, the control circuit maintains the conduction time of the auxiliary switching tube unchanged.

[0008] Preferably, the control circuit includes a detection circuit that receives a sampling signal representing the voltage change across the junction capacitor and generates a detection signal representing the difference between the charging charge and the discharging charge across the junction capacitor according to the main switch conduction signal.

[0009] Preferably, the control circuit includes an auxiliary switch control circuit for generating an auxiliary switch conduction signal and generating an error signal according to the error between the detection signal and a first reference signal to adjust the conduction time of the auxiliary switch.

[0010] Preferably, the auxiliary switch control circuit adjusts the conduction time of the auxiliary switch according to the error signal.

[0011] When the error signal increases, the control circuit increases the conduction time of the auxiliary switch; when the error signal decreases, the control circuit decreases the conduction time of the auxiliary switch.

[0012] Preferably, the switching converter includes:

[0013] A magnetic element coupled to the main switch; and

[0014] A sampling circuit configured to generate a sampling signal representing the voltage change across the junction capacitor.

[0015] Preferably, the sampling circuit is coupled to a power terminal of the main switch to sample the voltage change across the junction capacitor to generate the sampling signal.

[0016] Preferably, the sampling circuit is coupled to one end of the magnetic element to sample the voltage change across the magnetic element to generate the sampling signal.

[0017] Preferably, the sampling circuit is coupled to a power terminal of the auxiliary switch to sample the voltage change between the two power terminals of the auxiliary switch to generate the sampling signal.

[0018] Preferably, the switching converter includes a secondary diode, and the sampling circuit is coupled to one end of the secondary diode to sample the voltage change across the secondary diode to generate the sampling signal.

[0019] Preferably, the sampling circuit includes a sampling resistor, the first end of which is coupled to the main switch and the second end is coupled to the reference ground to generate the sampling signal at the first end.

[0020] Preferably, the sampling circuit includes a capacitor and a resistor connected in series, and the sampling signal is generated at the common connection point of the capacitor and the resistor.

[0021] Preferably, the detection circuit includes:

[0022] A first switch, having its first terminal receiving the sampling signal and conducting during the turn-off period of the main switch; and

[0023] A second switch, having its first terminal coupled to the second terminal of the first switch and its second terminal coupled to a reference ground and conducting during the turn-on period of the main switch,

[0024] wherein the detection signal is generated at a common connection point of the first switch and the second switch.

[0025] Preferably, the detection circuit includes:

[0026] A first switch, having its first terminal receiving the sampling signal, and the sampling signal serving as the detection signal during the turn-off period of the main switch.

[0027] Preferably, the auxiliary switch control circuit includes:

[0028] An error amplifier, having its first input terminal receiving the detection signal and its second input terminal receiving a first reference signal to generate the error signal at an output terminal.

[0029] Preferably, the auxiliary switch control circuit includes:

[0030] A comparison circuit, having its first input terminal receiving the error signal and its second input terminal receiving a second reference signal, and adjusting the conduction time of the auxiliary switch by comparing the error signal and the second reference signal.

[0031] Preferably, the detection circuit generates the detection signal according to the sampling signal after a predetermined time when the main switch is turned off.

[0032] Preferably, the detection circuit generates the detection signal according to the sampling signal when the voltage on the junction capacitance reaches a threshold voltage.

[0033] According to a second aspect of the present invention, there is provided a switching converter, including:

[0034] A power stage circuit, including a main switch for controlling the energy storage and transfer of a magnetic element; a clamping circuit, including an auxiliary switch; and

[0035] The control circuit according to any one of the first aspects of the claims.

[0036] Preferably, the clamping circuit is connected in series with the main switch and includes an auxiliary switch and a clamping capacitor connected between an input terminal of the switching converter and the main switch.

[0037] Preferably, the clamping circuit is connected in parallel with the main switching transistor, and includes an auxiliary switching transistor and a clamping capacitor connected in series between the first end and the second end of the main switching transistor.

[0038] Preferably, it includes an auxiliary winding coupled to the primary winding of the switching converter. The clamping circuit is connected in parallel across the two ends of the auxiliary winding, and includes an auxiliary switching transistor and a clamping capacitor connected in series between the first end and the second end of the auxiliary winding.

[0039] In the embodiment of the present invention, the control circuit generates a detection signal by detecting the difference between the charging charge and the discharging charge on the junction capacitance of the main switching transistor when the main switching transistor is in the off state, and adjusts the on-time of the auxiliary switching transistor according to the error between the detection signal and the reference signal. In this embodiment, the control circuit adopts a closed-loop control method, and adaptively adjusts the continuously changing on-time of the auxiliary switching transistor by using the principle of charge conservation. The control method is simple, with fast response, and can be applied to a wide range of AC input voltages or DC input voltages. BRIEF DESCRIPTION OF THE DRAWINGS

[0040] Through the following description of the embodiments of the present invention with reference to the drawings, the above and other objects, features, and advantages of the present invention will become more apparent. In the drawings:

[0041] Figure 1 is the circuit diagram of the switching converter according to the first embodiment of the present invention;

[0042] Figure 2 is the circuit diagram of the switching converter according to the second embodiment of the present invention;

[0043] Figure 3 is the circuit diagram of the switching converter according to the third embodiment of the present invention;

[0044] Figure 4 is the circuit block diagram of the control circuit according to the embodiment of the present invention;

[0045] Figure 5 is the circuit diagram of the control circuit according to the first embodiment of the present invention;

[0046] Figure 6 is the working waveform diagram of the switching converter according to the embodiment of the present invention;

[0047] Figure 7 is the circuit diagram of the control circuit according to the second embodiment of the present invention;

[0048] Figure 8 is the circuit diagram of the control circuit according to the third embodiment of the present invention;

[0049] Figure 9 is the circuit diagram of the control circuit according to the fourth embodiment of the present invention;

[0050] Figure 10 is the circuit diagram of the control circuit according to the fifth embodiment of the present invention;

[0051] Figure 11a is the circuit diagram of the switching converter according to the fourth embodiment of the present invention;

[0052] Figure 11b is the circuit diagram of the switching converter according to the fifth embodiment of the present invention;

[0053] Figure 11c is the circuit diagram of the switching converter according to the sixth embodiment of the present invention. Detailed implementation manners

[0054] The present invention will be described below based on embodiments, but the present invention is not limited to these embodiments. In the following detailed description of the present invention, some specific details are described in detail. Those skilled in the art can fully understand the present invention without the description of these details. In order to avoid obscuring the essence of the present invention, well-known methods, processes, procedures, components, and circuits are not described in detail.

[0055] In addition, those of ordinary skill in the art should understand that the drawings provided herein are for illustrative purposes only, and the drawings are not necessarily drawn to scale.

[0056] Meanwhile, it should be understood that in the following description, "circuit" refers to a conductive loop formed by at least one component or sub-circuit through electrical connection or electromagnetic connection. When it is said that a component or circuit "is connected to" another component or that a component / circuit "is connected between" two nodes, it may be directly coupled or connected to another component or there may be intermediate components, and the connection between components may be physical, logical, or a combination thereof. On the contrary, when it is said that a component "is directly coupled to" or "is directly connected to" another component, it means that there are no intermediate components between the two.

[0057] Unless the context clearly requires otherwise, the words such as "including", "comprising" and the like in the whole specification and claims should be interpreted as the meaning of including rather than exclusive or exhaustive meaning; that is, the meaning of "including but not limited to".

[0058] In the description of the present invention, it should be understood that the terms "first", "second", etc. are only used for descriptive purposes and cannot be understood as indicating or implying relative importance. In addition, in the description of the present invention, unless otherwise specified, the meaning of "a plurality of" is two or more.

[0059] Figure 1 is the circuit diagram of the switching converter according to the first embodiment of the present invention. As Figure 1As shown, the switching converter of the embodiment of the present invention is a flyback switching converter, including a power stage circuit, a clamping circuit 1, and a control circuit 100. The power stage circuit includes a transformer T, a main switching transistor Sm connected in series with the primary winding of the transformer T, and a secondary diode D1 and an output capacitor Co connected in series with the secondary winding of the transformer T. As Figure 1 shown, the first end (e.g., the opposite-named end) of the primary winding of the transformer T receives the input voltage Vin, and the second end (e.g., the same-named end) of the primary winding of the transformer T is connected to the first end of the main switching transistor Sm. The second end of the main switching transistor Sm is coupled to the primary reference ground. The first end (e.g., the same-named end) of the secondary winding of the transformer T is connected to the first end of the diode D1. The output capacitor Co is connected between the second end of the diode D1 and the second end (e.g., the opposite-named end) of the secondary winding of the transformer T. A DC output voltage Vout is provided across the output capacitor Co. The clamping circuit 1 is connected in series with the main switching transistor Sm of the transformer T, and includes an auxiliary switching transistor Sa and a clamping capacitor Cc connected in series with the main switching transistor Sm. By providing an active clamping circuit, the voltage withstand of the switching transistor can be reduced, and the ZVS range can be expanded, so that the switching converter can be applied to a wide input voltage range. In Figure 1 it, the primary winding of the transformer T can be equivalently regarded as a series-connected magnetizing inductor Lm and leakage inductor Lk, which are respectively shown by dashed lines. According to various implementation manners, the input voltage Vin can be an unrectified AC input voltage, such as 220V alternating current (AC), or a DC input voltage.

[0060] The control circuit 100 is respectively connected to the main switching transistor Sm and the auxiliary switching transistor Sa, and is used to control the on and off states of the two. During the conduction of the main switching transistor Sm, the primary current Ip flows through the primary winding of the transformer T. The primary current Ip gradually increases with the conduction time of the main switching transistor Sm, so that the transformer T stores energy. The diode D1 connected to the secondary winding of the transformer T is cut off due to reverse bias. During the turn-off of the main switching transistor Sm, the primary current Ip of the primary winding of the transformer T decreases to zero, and the diode D1 connected to the secondary winding is turned on due to forward bias. Therefore, the transformer T releases energy to supply power to the output capacitor Co and the load.

[0061] During the turn-off of the main switching transistor Sm, the auxiliary switching transistor Sa conducts for at least a period of time, so that the clamping circuit starts to work. The energy stored in the leakage inductor Lk of the transformer is released to the clamping capacitor Cc through the body diode of the auxiliary switching transistor Sa, thereby suppressing the parasitic oscillation generated by the leakage inductor Lk, that is, suppressing the generation of spike voltage, so as to improve electromagnetic interference (EMI).

[0062] Different from the control method of the existing switch converter, for the switch converter according to the embodiments of the present invention, the main switch tube Sm and the auxiliary switch tube Sa do not conduct in a complementary conduction manner. In this embodiment, during the off period of the main switch tube Sm, the junction capacitance of the main switch tube is charged and discharged, and the control circuit 100 adjusts the conduction time of the auxiliary switch tube according to the difference between the charging charge and the discharging charge on the junction capacitance. Specifically, the switch converter generates a sampling signal Vs representing the voltage change on the junction capacitance of the main switch tube Sm through a sampling circuit. The control circuit 100 receives the sampling signal Vs and generates a control signal for the auxiliary switch tube Sa according to the sampling signal Vs during the off period of the main switch tube, so as to adjust the conduction time of the auxiliary switch tube Sa, so that the main switch tube Sm discharges the junction capacitance through the discharging current before conduction, so as to reduce the voltage at the two power terminals of the main switch tube Sm when it conducts, thereby reducing the turn-on loss, and at the same time recovering the energy in the leakage inductance Lk and improving the electromagnetic interference. It should be understood that the junction capacitance of the main switch tube Sm in this embodiment can be its own parasitic capacitance or an equivalent capacitance externally disposed at both ends of the main switch tube.

[0063] Since the junction capacitance is non-linear, when the voltage on the junction capacitance is relatively low, its capacitance value is relatively large. If the main switch tube is to achieve complete zero-voltage turn-on, a relatively long conduction time of the auxiliary switch tube is required, which will result in a relatively large turn-on loss and reduce the circuit efficiency. Therefore, in practical applications, a trade-off needs to be made between efficiency and zero-voltage turn-on of the main switch tube. That is, for optimal efficiency, incomplete zero-voltage turn-on needs to be achieved. The control circuit according to the embodiments of the present invention can adjust the conduction time of the auxiliary switch tube Sa according to the difference between the charging charge and the discharging charge on the junction capacitance, so that the voltage at the two power terminals of the main switch tube reaches a preset value when it conducts, so as to optimize the circuit performance.

[0064] The control circuit 100 can detect the voltage change across the junction capacitance by using various forms of sampling circuits, thereby obtaining the charge change amount across the junction capacitance, and adjusting the conduction time of the auxiliary switch tube Sa according to the difference between the charging charge and the discharging charge across the junction capacitance. For example, during the off period of the main switch tube Sm, when the charging charge across the junction capacitance is greater than the discharging charge, it indicates that the junction capacitance was not fully discharged before the main switch tube Sm was turned on, and zero-voltage turn-on was not achieved. The control circuit 100 needs to increase the conduction time of the auxiliary switch tube Sa to increase the discharging charge amount across the junction capacitance. When the charging charge across the junction capacitance is less than the discharging charge, although the main switch tube Sm achieves zero-voltage turn-on, the discharging energy of the junction capacitance of the main switch tube is excessive, resulting in a large power consumption of the circuit system. At this time, the control circuit 100 can reduce the conduction time of the auxiliary switch tube Sa. When the charging charge across the junction capacitance is equal to the discharging charge, it indicates that the main switch tube Sm achieves zero-voltage turn-on during conduction, and the control circuit 100 can maintain the conduction time of the auxiliary switch tube Sa unchanged.

[0065] In a preferred embodiment, the control circuit 100 generates a detection signal representing the difference between the charging charge and the discharging charge across the junction capacitance during the off period of the main switch tube Sm according to the sampling signal Vs and the main switch conduction signal for controlling the main switch tube Sm, and adjusts the conduction time of the auxiliary switch tube Sa according to the detection signal to reduce the voltage across the two power terminals of the main switch tube Sm when it is turned on. In this embodiment, the control circuit adopts a closed-loop control method, and adaptively adjusts the continuous change of the conduction time of the auxiliary switch tube Sa by using the principle of charge conservation. The control method is simple, has a fast response, and can be applied to a wide range of AC input voltages or DC input voltages.

[0066] In other embodiments, the power stage circuit of the power converter can be other topologies such as BUCK, BUCK - BOOST, etc., rather than being limited to the exemplified FLYBACK topology structure. According to different topology structures, the magnetic component can be an inductor, rather than being limited to the exemplified transformer.

[0067] Figure 2 is the circuit diagram of the switching converter according to the second embodiment of the present invention. As Figure 2 shown, the switching converter of the embodiment of the present invention is a flyback switching converter, including a power stage circuit, a clamping circuit 1, and a control circuit 100. The clamping circuit 1 is connected in parallel with the main switch tube Sm, and includes an auxiliary switch tube Sa and a clamping capacitor Cc connected in series between the first end and the second end of the main switch tube Sm.

[0068] The control circuit 100 is respectively connected to the main switch tube Sm and the auxiliary switch tube Sa, and is used to control their on and off states. The power stage circuit, control circuit and control method of the switch converter in the second embodiment are the same as those of the power stage, control circuit and control method of the switch converter according to the first embodiment, and will not be described in detail here.

[0069] Figure 3 is the circuit diagram of the switch converter according to the third embodiment of the present invention. As Figure 3 shown, the switch converter of the embodiment of the present invention is a flyback switch converter, including a power stage circuit, a clamping circuit 1 and a control circuit 100. In this embodiment, the auxiliary winding is coupled to the primary winding of the transformer. The clamping circuit 1 is connected in parallel at both ends of the auxiliary winding, and includes an auxiliary switch tube Sa and a clamping capacitor Cc connected in series between the first end and the second end of the auxiliary winding. The control circuit 100 is respectively connected to the main switch tube Sm and the auxiliary switch tube Sa, and is used to control their on and off states. The power stage circuit, control circuit and control method of the switch converter in the second embodiment are the same as those of the power stage, control circuit and control method of the switch converter according to the first embodiment, and will not be described in detail here.

[0070] Figure 4 is the circuit block diagram of the control circuit according to the embodiment of the present invention. In this embodiment, the control circuit includes a detection circuit 40 and an auxiliary tube control circuit 41. The detection circuit 40 receives a sampling signal Vs representing the voltage change on the junction capacitance of the main switch tube, and generates a detection signal Vt representing the difference between the charging charge and the discharging charge on the junction capacitance during the turn-off period of the main switch tube Sm according to the main tube conduction signal. The auxiliary tube control circuit 41 adjusts the conduction time of the auxiliary switch tube Sa according to the detection signal Vt, so as to reduce the turn-on loss and improve the system efficiency. In one implementation, the auxiliary control circuit 41 generates an error signal according to the error between the detection signal Vt and the first reference signal, and at the same time adjusts the conduction time of the auxiliary switch tube Sa according to the change of the error signal to reduce the voltage at the two power terminals when the main switch tube Sm is conducting. For example, when the error signal increases, the auxiliary tube control circuit 41 increases the conduction time of the auxiliary switch tube Sa, and when the error signal decreases, the auxiliary tube control circuit 41 decreases the conduction time of the auxiliary switch tube Sa to dynamically adjust the continuous change of the conduction time of the auxiliary switch tube, so as to accurately control the voltage at the two power terminals when the main switch tube is conducting.

[0071] In a preferred embodiment, the switch converter includes a sampling circuit, and the sampling circuit is configured to generate a sampling signal Vs representing the voltage change on the junction capacitance. Since the switch converter charges and discharges the junction capacitance at different stages, causing the voltage on the junction capacitance to change, according to the charge balance principle, the charge Q on the junction capacitance can be expressed as follows: Q = C DS *VDS , where C DS is the capacitance value of the junction capacitance, and V DS is the voltage across the junction capacitance. Therefore, the sampling circuit can obtain a sampling signal Vs representing the voltage change across the junction capacitance through the sampling circuit. The detection circuit 40 receives the sampling signal Vs during the off period of the main switch transistor Sm to generate a detection signal Vt representing the difference between the charging charge and the discharging charge across the junction capacitance during the off period of the main switch transistor. The auxiliary transistor control circuit 41 controls the auxiliary transistor conduction signal G_ Sa according to the error signal representing the error between the detection signal Vt and the first reference signal, so as to adjust the conduction time of the auxiliary switch transistor Sa. In this embodiment, the control circuit 100 further includes a main transistor control circuit for generating a main transistor conduction signal G_ Sm . According to the application environment of the switching converter, the control method of the main switch transistor Sm can adopt constant on-time control, peak current control mode, etc., which are not limited herein.

[0072] Figure 5 is the circuit diagram of the control circuit according to the first embodiment of the present invention. In this embodiment, there is a junction capacitance C DS between the drain and source of the main switch transistor Sm. The sampling circuit is configured as a sampling resistor Rs. The first end of the sampling resistor Rs is connected to a power terminal of the main switch transistor Sm, and its second end is connected to the reference ground. The sampling resistor Rs samples the current flowing through the junction capacitance C DS to generate a sampling signal Vs at its first end. The detection circuit 40 includes a first switch S1 and a second switch S2 controlled by the main transistor conduction signal G_ Sm , where the first switch S1 and the second switch S2 conduct complementarily. The first switch S1 receives the main transistor conduction signal G_ Sm through an inverter B0, and the second switch S2 is directly controlled by the main transistor conduction signal G_ Sm . When the main transistor conduction signal G_ Sm is invalid and the main switch transistor Sm is turned off, the first switch S1 conducts and the second switch S2 turns off. The detection circuit 40 receives the sampling signal Vs to generate a detection signal Vt.

[0073] In this embodiment, the auxiliary transistor control circuit 41 includes an error amplifier GM and a comparator A0. The first input terminal (e.g., non-inverting input terminal) of the error amplifier GM receives the detection signal Vt, and the second input terminal (e.g., inverting input terminal) receives the first reference signal V REF1 , and by comparing the detection signal Vt and the first reference signal V REF1The error between them is amplified to generate an error signal Vc. The capacitor C1 is coupled to the output terminal of the error amplifier GM and is used to compensate the output signal of the error amplifier GM to generate the error signal Vc. The first input terminal (such as the non-inverting input terminal) of the comparator A0 receives the second reference signal V REF2 , and the second input terminal (such as the inverting input terminal) receives the error signal Vc. By comparing the error signal Vc and the second reference signal V REF2 to adjust the conduction time of the auxiliary switch tube Sa. In one implementation, the auxiliary tube control circuit 41 further includes a conduction circuit and an RS flip-flop. The conduction circuit is connected to the set terminal of the RS flip-flop and is used to generate a set signal to control the RS flip-flop to generate an auxiliary tube conduction signal G_ Sa , so as to control the turn-on moment of the auxiliary switch tube Sa. The reset terminal of the RS flip-flop is connected to the output terminal of the comparator A0 and is used to control the turn-off moment of the auxiliary switch tube according to the comparison result of the comparator A0 to adjust the conduction time of the auxiliary switch tube. It should be understood that in this embodiment, the conduction circuit can set the turn-on moment of the auxiliary switch tube according to the application environment of the switching converter, which is not limited here. For example, the conduction circuit can control the auxiliary switch tube Sa to conduct after the main switch tube Sm is turned off for a predetermined time.

[0074] In order to control the main switch tube to achieve full zero-voltage turn-on and reduce the circuit power consumption at the same time, the control circuit 100 adjusts the charging charge on the junction capacitance to be equal to its discharging charge during the turn-off period of the main switch tube. Therefore, in this embodiment, the first reference signal V REF1 can be set to the reference ground. The second reference signal V REF2 can be generated by a reference signal generation circuit. For example, the second reference signal V REF2 is a ramp signal. The reference signal generation circuit controls a current source to charge a capacitor to generate the ramp signal when the auxiliary switch tube starts to conduct. When the ramp signal rises to the error signal Vc, the auxiliary tube control circuit 41 controls the auxiliary switch tube to turn off. It should be understood that the above reference voltage generation circuit is only one circuit structure for generating the above reference voltage, and other circuit structures suitable for generating the above reference voltage are within the protection scope of the embodiments of the present invention.

[0075] Figure 6 is the working waveform diagram of the switching converter according to the embodiment of the present invention. In this embodiment, the switching converter takes the flyback converter in the above embodiment as an example. As Figure 6 shown, at time t0, the main tube conduction signal G_ SmIt is effective, the main switch tube Sm conducts, the input voltage magnetizes the primary excitation inductor, the primary current increases linearly from zero, and no current flows through the secondary side. At time t1, the main switch tube Sm turns off, and the auxiliary switch tube Sa also turns off, entering the dead time. At this time, the primary current Ip needs to freewheel, and the primary current Ip charges the junction capacitance C of the main switch tube DS of the main switch tube, and the voltage V DS on the junction capacitance C DS gradually increases. When the voltage V DS on the junction capacitance C DS reaches a certain value, the body diode of the auxiliary switch tube conducts, and the primary current charges the clamping capacitance through the body diode of the auxiliary switch tube. During this process, the excitation inductor and the clamping capacitance resonate. At time t2, the conduction signal G_ Sa of the auxiliary switch tube is effective, and the auxiliary switch tube Sa conducts. At this time, the primary current Ip decreases to zero. During the conduction stage of the auxiliary switch tube Sa, the energy stored in the leakage inductance Lk of the transformer is released to the clamping capacitance Cc through the body diode of the auxiliary switch tube Sa. At time t3, the conduction signal G_ Sa of the auxiliary switch tube is ineffective, and the auxiliary switch tube Sa turns off. At this time, the energy stored in the leakage inductance Lk and the excitation inductance Lm of the transformer discharges the junction capacitance C DS , and the primary current Ip reverses. The greater the negative current of the excitation inductor corresponding to the turn-off of the auxiliary switch tube Sa, the greater the resonance between the excitation inductance Lm and the junction capacitance C DS , and the greater the decrease in the drain-source voltage of the main switch tube Sm, that is, the voltage V DS on the junction capacitance C DS . The greater the decrease amplitude, the zero-voltage turn-on of the main switch tube Sm can be realized. At time t4, the voltage on the junction capacitance C DS drops to zero, and the conduction signal G_ Sm of the main switch tube is effective, controlling the zero-voltage turn-on of the main switch tube Sm.

[0076] In this embodiment, the control circuit 100 adjusts the conduction time of the auxiliary switch tube Sa by detecting the charging charge Qch (as shown by the shaded part in the figure) and the discharging charge Qdis (as shown by the shaded part in the figure) on the junction capacitance of the main switch tube during the turn-off period of the main switch tube Sm. When the charging charge Qch is equal to the discharging charge Qdis, the main switch tube Sm realizes zero-voltage turn-on, and the efficiency and performance are optimal; when the charging charge Qch is less than the discharging charge Qdis, although the main switch tube Sm realizes ZVS turn-on, the discharging energy of the junction capacitance of the main switch tube is too much. At this time, the conduction time of the auxiliary switch tube Sa needs to be reduced. When the charging charge Qch is greater than the discharging charge Qdis, the main switch tube Sm does not realize ZVS turn-on. At this time, the conduction time of the auxiliary switch tube Sa needs to be increased to increase the discharging charge Qdis.

[0077] In the embodiments of the present invention, the sampling circuit and the detection circuit are not limited to the above embodiments, and various implementation manners can be adopted, such as Figure 7 and 8 as shown. Figure 7 is the circuit diagram of the control circuit according to the second embodiment of the present invention. In this embodiment, the detection circuit 40 includes a first switch S1 and a second switch S2 connected in series, wherein the first switch S1 and the second switch S2 are complementary-conducted. The first switch S1 and the second switch S2 are connected in series between the sampling signal Vs and the reference ground. The first switch S1 is directly controlled by the main control conduction signal G_ Sm , and the second switch S2 receives the main control conduction signal G_ Sm through an inverter B1. When the main control conduction signal G_ Sm is valid, the main switch tube conducts, the first switch S1 conducts, and the second switch S2 turns off. The two input terminals of the error amplifier GM in the auxiliary tube control circuit 41 are connected, and at this time, the auxiliary tube control circuit 41 does not work. When the main switch tube turns off, the first switch S1 turns off, the second switch S2 conducts, and the sampling signal Vs is directly used as the detection signal. The non-inverting input terminal of the error amplifier GM receives the sampling signal Vs, and the inverting input terminal is connected to the reference ground through the second switch S2. The auxiliary tube control circuit 41 adjusts the conduction time of the auxiliary switch tube Sa according to the error signal Vc representing the error between the detection signal and the reference ground. It should be understood that those skilled in the art can construct different detection circuits through simple deformation to generate a detection signal representing the change in the charge on the junction capacitance during the off period of the main switch tube, and adjust the conduction time of the auxiliary switch tube Sa according to the detection signal.

[0078] Figure 8 is the circuit diagram of the control circuit according to the third embodiment of the present invention. In this embodiment, the sampling circuit 80 is connected to a power tube (such as the drain) of the main switch tube Sm. The detection circuit 40 and the auxiliary tube control circuit 41 are the same as those in the above embodiments, and will not be described herein again. The sampling circuit is connected in parallel across the two ends of the series-connected junction capacitance C DS and the sampling resistor Rs to sample the voltage change on the junction capacitance C DS . In this embodiment, the sampling circuit includes a capacitor C3 and a resistor R DS connected in series. The first end of the capacitor C3 is connected to the first end of the junction capacitance C DS , the second end of the capacitor C3 is connected to the first end of the resistor R DS , and the second end of the resistor R DS is connected to the reference ground. The sampling circuit generates a sampling signal Vs at the common connection point of the capacitor C3 and the resistor R DS . The detection circuit 40 generates a signal representing the junction capacitance C during the off period of the main switch tube according to the sampling signal Vs DSThe detection signal Vt of the upper charge variation, and the auxiliary transistor control circuit 41 controls the auxiliary transistor conduction signal G_ according to the detection signal Vt Sa , so as to adjust the conduction time of the auxiliary switch transistor Sa. It should be understood that in this embodiment, the sampling circuit uses a differentiating circuit to generate a sampling signal Vs representing the voltage variation across the junction capacitance, and other sampling circuit structures capable of implementing the above functions can be used in this embodiment. Additionally, the sampling position of the sampling circuit can be flexibly adjusted according to the topology of the switching converter, and is not limited to the power terminal for sampling the in-flow current of the main switch transistor in the above embodiment.

[0079] For optimal efficiency, in practical applications, it is necessary to achieve incomplete zero-voltage turn-on. The control circuit of the embodiment of the present invention can control the drain-source voltage of the main switch transistor to reach a preset value when conducting according to the difference between the charging charge and the discharging point charge across the junction capacitance. Specifically, the control circuit controls the sampling moment of the detection circuit 40 to reduce the detection of the charging charge across the junction capacitance, so as to be able to control the voltage across the junction capacitance C DS not to be completely reduced to zero when the main switch transistor conducts by adjusting the conduction time of the auxiliary switch transistor. In a preferred embodiment, the detection circuit 40 detects the charge amount across the junction capacitance C DS according to the sampling signal Vs after the main switch transistor Sm is turned off for a predetermined time, so as to generate a detection signal Vt, as Figure 9 shown. In another preferred implementation, the detection circuit detects the charge amount across the junction capacitance according to the sampling signal Vs when the voltage across the junction capacitance reaches the threshold voltage, so as to generate a detection signal Vt, as Figure 10 shown.

[0080] Figure 9 is the circuit diagram of the control circuit according to the fourth embodiment of the present invention. The detection circuit 40 includes a first switch S1, a second switch S2, and a delay circuit, where the first switch S1 and the second switch S2 conduct complementarily. The first switch S1 receives the main transistor conduction signal G_ Sm through the delay circuit and an inverter B0, and the second switch S2 is directly controlled by the main transistor conduction signal G_ Sm . When the main transistor conduction signal G_ Sm is invalid, the second switch S2 is turned off, and the first switch S1 conducts after the delay time generated by the delay circuit to delay the detection moment of the detection circuit 40, thereby reducing the detection of the charging charge amount across the junction capacitance C DS . The detection circuit 40 generates a detection signal Vt according to the sampling signal Vs after the main switch transistor Sm is turned off for a predetermined time. The auxiliary transistor control circuit 41 controls the auxiliary transistor conduction signal G_ Sa , so as to adjust the conduction time of the auxiliary switch transistor Sa.

[0081] Figure 10It is the circuit diagram of the control circuit according to the fifth embodiment of the present invention. The detection circuit 40 includes a first switch S1, a second switch S2, an error amplifier GM1, and an RS flip-flop, where the first switch S1 and the second switch S2 conduct complementarily. The first input terminal (e.g., the non-inverting input terminal) of the error amplifier GM1 receives the voltage V1 on the first end of the junction capacitance C DS and the second input terminal receives the threshold voltage ref. The set terminal of the RS flip-flop is connected to the output terminal of the error amplifier GM1, its reset terminal receives the main switch conduction signal G_ Sm , and the output terminal is used to control the conduction and cutoff of the first switch S1 and the second switch S2. During the turn-off period of the main switch tube, when the voltage V1 on the first end of the junction capacitance reaches the threshold voltage ref, the first switch S1 conducts and the second switch S2 cuts off, and the detection circuit 40 generates a detection signal Vt according to the sampling signal Vs. The auxiliary switch control circuit 41 controls the auxiliary switch conduction signal G_ Sa to adjust the conduction time of the auxiliary switch tube Sa.

[0082] In the embodiment of the present invention, the sampling position of the sampling circuit is not limited to the above embodiments, and the voltage change on the junction capacitance of the main switch tube can be sampled at different nodes according to the working principle of the switching converter, such as Figure 11a shown in 11b, 11c. Figure 11a It is the circuit diagram of the switching converter according to the fourth embodiment of the present invention. In this embodiment, the sampling circuit is connected to one end of the magnetic element (the primary winding of the transformer) to sample the voltage change on the magnetic element. Since during the turn-off period of the main switch tube Sm, the current flowing through the junction capacitance of the main switch tube is equal to the current flowing through the primary winding of the transformer, the sampling circuit can directly sample the voltage change of the primary winding of the transformer to obtain the sampling signal Vs representing the voltage change on the junction capacitance of the main switch tube.

[0083] Figure 11b It is the circuit diagram of the switching converter according to the fifth embodiment of the present invention. In this embodiment, the sampling circuit is connected to one end of the auxiliary switch tube Sa to sample the voltage change on the auxiliary switch tube Sa. Since during the turn-off period of the main switch tube Sm, both the charging current and the discharging current on the junction capacitance of the main switch tube pass through the auxiliary switch tube Sa, the sampling circuit can directly sample the voltage change on the auxiliary switch tube Sa to obtain the sampling signal Vs representing the voltage change on the junction capacitance of the main switch tube.

[0084] Figure 11cIt is the circuit diagram of the switching converter according to the sixth embodiment of the present invention. In this embodiment, the sampling circuit is connected to one end of the secondary diode D1 to sample the voltage change across the secondary diode D1. Since during the turn-off period of the main switch tube Sm, the secondary diode D1 connected to the secondary winding conducts due to forward biasing, and the current flowing through the secondary diode D1 is proportional to the current flowing through the junction capacitance of the main switch tube, the sampling circuit can directly sample the voltage change across the secondary diode D1 to obtain the sampling signal Vs representing the voltage change across the junction capacitance of the main switch tube.

[0085] In the embodiment of the present invention, the control circuit generates a detection signal by detecting the difference between the charging charge and the discharging charge across the junction capacitance during the turn-off period of the main switch tube, and adjusts the conduction time of the auxiliary switch tube according to the error between the detection signal and the reference signal, so as to reduce the voltage of the two power tubes when the main switch tube is conducting, recover the leakage inductance energy and improve the electromagnetic interference. In this embodiment, the control circuit adopts a closed-loop control method, and adaptively adjusts the continuously changing conduction time of the auxiliary switch tube by using the principle of charge conservation. The control method is simple, has a fast response, and can be applied to a wide range of AC input voltages or DC input voltages.

[0086] The above are only the preferred embodiments of the present invention and are not intended to limit the present invention. For those skilled in the art, the present invention may have various modifications and changes. Any modifications, equivalent replacements, improvements, etc. made within the spirit and principle of the present invention shall be included within the protection scope of the present invention.

Claims

1. A control circuit for a switching converter, the switching converter including a main switching transistor and an auxiliary switching transistor, characterized in that during the turn-off period of the main switching transistor, the junction capacitance of the main switching transistor is charged and discharged, and the control circuit adjusts the conduction time of the auxiliary switching transistor according to the difference between the charging charge and the discharging charge on the junction capacitance; the control circuit includes a detection circuit that receives a sampling signal representing the voltage change on the junction capacitance and generates a detection signal representing the difference between the charging charge and the discharging charge on the junction capacitance according to the main switch conduction signal, and an auxiliary transistor control circuit for generating an error signal according to the error between the detection signal and a first reference signal to adjust the conduction time of the auxiliary switching transistor; the detection circuit generates the detection signal according to the sampling signal after a predetermined time when the main switching transistor is turned off or when the voltage on the junction capacitance reaches a threshold voltage, so that the drain-source voltage of the main switching transistor reaches a preset value when it is turned on.

2. The control circuit according to claim 1, wherein When the charging charge on the junction capacitance is greater than the discharging charge, the control circuit increases the conduction time of the auxiliary switching transistor; when the charging charge on the junction capacitance is less than the discharging charge, the control circuit decreases the conduction time of the auxiliary switching transistor; when the charging charge on the junction capacitance is equal to the discharging charge, the control circuit keeps the conduction time of the auxiliary switching transistor unchanged.

3. The control circuit according to claim 1, wherein The auxiliary transistor control circuit adjusts the conduction time of the auxiliary switching transistor according to the error signal, when the error signal increases, the control circuit increases the conduction time of the auxiliary switching transistor; when the error signal decreases, the control circuit decreases the conduction time of the auxiliary switching transistor.

4. The control circuit according to claim 1, characterized in that, The switching converter includes: a magnetic element coupled to the main switching transistor; and a sampling circuit configured to generate a sampling signal representing the voltage change on the junction capacitance.

5. The control circuit according to claim 4, wherein The sampling circuit is coupled to a power terminal of the main switching transistor to sample the voltage change on the junction capacitance to generate the sampling signal.

6. The control circuit according to claim 4, wherein The sampling circuit is coupled to one end of the magnetic element to sample the voltage change on the magnetic element to generate the sampling signal.

7. The control circuit according to claim 4, wherein The sampling circuit is coupled to a power terminal of the auxiliary switching transistor to sample the voltage change between the two power terminals of the auxiliary switching transistor to generate the sampling signal.

8. The control circuit according to claim 4, characterized in that The switching converter includes a secondary diode, and the sampling circuit is coupled to one end of the secondary diode to sample the voltage change on the secondary diode to generate the sampling signal.

9. The control circuit according to claim 4, characterized in that The sampling circuit includes a sampling resistor, the first end of which is coupled to the main switching transistor and the second end of which is coupled to the reference ground to generate the sampling signal at the first end.

10. The control circuit according to claim 4, wherein The sampling circuit includes a capacitor and a resistor connected in series, and the sampling signal is generated at the common connection point of the capacitor and the resistor.

11. The control circuit according to claim 1, wherein, The detection circuit includes: a first switch, the first end of which receives the sampling signal and conducts during the turn-off period of the main switch; and a second switch, the first end of which is coupled to the second end of the first switch and the second end of which is coupled to the reference ground and conducts during the turn-on period of the main switch, The detection signal is generated at the common connection point of the first switch and the second switch.

12. The control circuit according to claim 1, characterized in that, The detection circuit includes: A first switch, whose first terminal receives the sampling signal, and the sampling signal serves as the detection signal during the turn-off period of the main switch.

13. The control circuit according to claim 1, wherein The auxiliary transistor control circuit includes: An error amplifier, whose first input terminal receives the detection signal, and the second input terminal receives the first reference signal to generate the error signal at the output terminal.

14. The control circuit according to claim 1, characterized in that The auxiliary transistor control circuit further includes: A comparison circuit, whose first input terminal receives the error signal, and the second input terminal receives the second reference signal, and adjusts the conduction time of the auxiliary switch transistor by comparing the error signal and the second reference signal.

15. A switching converter, comprising: A power stage circuit, including a main switch transistor, for controlling the energy storage and transmission of the magnetic element; A clamping circuit, including an auxiliary switch transistor; And The control circuit according to any one of claims 1 to 14.

16. The switching converter according to claim 15, wherein The clamping circuit is connected in series with the main switch transistor, and includes an auxiliary switch transistor and a clamping capacitor connected between the input terminal of the switching converter and the main switch transistor.

17. The switching converter according to claim 15, wherein, The clamping circuit is connected in parallel with the main switch transistor, and includes an auxiliary switch transistor and a clamping capacitor connected in series between the first terminal and the second terminal of the main switch transistor.

18. The switching converter according to claim 15, wherein It includes an auxiliary winding, which is coupled to the primary winding of the switching converter, and the clamping circuit is connected in parallel across the two ends of the auxiliary winding, and includes an auxiliary switch transistor and a clamping capacitor connected in series between the first terminal and the second terminal of the auxiliary winding.

Citation Information

Patent Citations

  • Flyback converter and its control circuit

    CN109245569A