Automated test equipment for testing high power electronic components

Abstract

Aspects of the present application relate to automated test equipment (ATE) for testing high power electronic components and methods of operation thereof. The present inventors have recognized and appreciated that providing an ATE in a single test system that offers both high power alternating current (AC) and direct current (DC) testing can result in high throughput testing of high power components while reducing system hardware complexity and cost. Aspects of the present application provide a synchronous inductor switch module and high precision digitizers and high speed digitizers for capturing DC and AC characteristics of high power transistors.

Description

Background Technology

[0001] Electronic components such as semiconductor devices, circuits, and printed circuit board (PCB) assemblies are frequently tested during and after their manufacturing process using test systems such as automated test equipment (ATE). To perform these tests, ATE may include instruments that generate or measure test signals, enabling the testing of a range of operating conditions on a specific device under test (DUT). For example, the instruments may generate a specific pattern of digital or analog signals applied to the semiconductor device and may measure the digital or analog signals received from the semiconductor device in response.

[0002] High-power electronic components are used to power machinery and vehicles with electric drive systems, including electric and hybrid electric vehicles. Full-function testing of high-power electronic components is an important part of the manufacturing process for motor drive components. Summary of the Invention

[0003] Various aspects of this application relate to automated test equipment (ATE) for testing high-power electronic components and methods of operation thereof. The inventors have recognized and understood that ATEs providing both high-power alternating current (AC) and direct current (DC) testing within a single test system can lead to high-throughput testing of high-power components while reducing system hardware complexity and cost. Various aspects of this application provide synchronous inductor switching modules and high-precision and high-speed digitizers for capturing the DC and AC characteristics of high-power transistors.

[0004] According to some embodiments, a method is provided for operating an automated test apparatus (ATE) to test an insulated gate bipolar transistor (IGBT) in a device under test (DUT). The method includes: turning on the IGBT; driving current from an energy source unit (ESU) through the IGBT via an inductor; measuring multiple current waveforms through the IGBT and voltage waveforms across the IGBT; and processing the multiple measured current and voltage waveforms to obtain at least one alternating current (AC) characteristic and at least one direct current (DC) characteristic of the IGBT.

[0005] According to some implementation schemes, an automated test apparatus (ATE) for testing a device under test (DUT) is provided. The ATE includes: an energy source unit (ESU) including an ESU output; a switching module configured to couple a transistor in the DUT to the ESU output via an inductor; a first digitizer configured to measure the voltage of the transistor; a second digitizer configured to measure the voltage of the transistor, the second digitizer having a lower voltage resolution than the first digitizer; and a third digitizer configured to measure the current of the transistor.

[0006] According to some embodiments, a method is provided for operating an automated test equipment (ATE) to test a first insulated-gate bipolar transistor (IGBT) in a device under test (DUT). The method includes turning on the first IGBT to allow a first current to flow through a first circuit path from the output of the energy source unit (ESU) of the ESU to a reference voltage. The first circuit path includes an inductor, a first switch coupled between the inductor and the ESU output, and the first IGBT. The method further includes: measuring a first characteristic of the first IGBT using a first digitizer; and measuring a second characteristic of the first IGBT using a second digitizer having a lower voltage resolution than the first voltage digitizer.

[0007] The foregoing is a non-limiting description of the invention as defined in the appended claims. Attached Figure Description

[0008] Various aspects and implementation schemes will be described in conjunction with the following figures. It should be understood that the figures are not necessarily drawn to scale. In the figures, each identical or nearly identical component shown in different figures is indicated by the same reference numeral. For clarity, not every component in every figure is labeled.

[0009] Figure 1 This is a high-level schematic diagram of an exemplary ATE according to various aspects of this application;

[0010] Figure 2 This is a schematic diagram illustrating an exemplary ATE for testing high-power components during a first testing phase, according to some aspects.

[0011] Figure 3 It is based on the time-domain waveforms of current and voltage signals measured by ATE as described in this article, based on certain aspects;

[0012] Figure 4 This is a schematic diagram illustrating an exemplary ATE for testing high-power components during a second testing phase, according to some aspects.

[0013] Figure 5 This is a schematic diagram illustrating an exemplary ATE used for testing high-power components during the third testing phase, according to some aspects.

[0014] Figure 6 This is a schematic diagram illustrating an exemplary ATE used for testing high-power components during the fourth test phase, according to some aspects.

[0015] Figure 7 This is a schematic diagram illustrating an exemplary ATE used for testing high-power components during the fifth test phase, according to some aspects.

[0016] Figure 8 This is a schematic diagram illustrating an exemplary ATE used for testing high-power components during the sixth test phase, according to some aspects.

[0017] Figure 9 This is a schematic diagram illustrating a timing control engine based on an exemplary pattern according to some aspects. Detailed Implementation

[0018] The inventors have understood and recognized that, with the increasing commercial demand for more advanced electric motors, there is a need for test systems capable of providing high-throughput testing of motor drive components at higher voltages, higher currents, and faster test times. This is particularly true for automotive motor drive applications where product quality and production costs must be carefully optimized. While different test techniques and significantly different test hardware are typically used for AC and DC testing of motor drive components, this document discloses examples of ATEs that can perform AC and DC testing on motor drive components using general-purpose ATE hardware, as well as methods for operating such ATE hardware. Embodiments of this disclosure can provide improved testing efficiency, lower test system costs, reduced test system size and complexity, faster test times, and reduced development time and costs for motor drive components.

[0019] An example of a high-power motor drive component that can be tested using ATE as described herein is an insulated-gate bipolar transistor (IGBT), which is used to provide efficient pulsed power to various motor windings to control the rotational direction, power, and speed of an electric motor. This IGBT may include an internal fast recovery diode (FRD).

[0020] This document describes examples of an ATE for testing a device under test (DUT), which may be a high-power electronic component for motor drive, and in some embodiments, examples of an ATE for testing transistors in the DUT are described. The ATE can be configured to provide testing of both the AC and DC characteristics of the transistors in the same hardware, thereby eliminating the need for separate high-power test system hardware and associated interconnects with the DUT to perform both types of testing.

[0021] In some implementations, the ATE includes an Energy Source Unit (ESU) configured to provide a high voltage and current source to drive the transistor under test. The transistor is coupled to the ESU via an inductor within an Inductor Switching Module (ISM) in the ATE. When the transistor is turned on, current flows from the ESU through the inductor, through the transistor, and ultimately to a reference voltage such as circuit ground via a first current path. The current through the transistor and the voltage across the transistor are digitized by the ATE for testing various characteristics of the transistor, as will be discussed in more detail below. The inductor stores energy within its flux, preventing abrupt interruption of the inductor current during dynamic testing of the transistor's AC characteristics when the transistor is turned off. When the transistor is turned off, a switch within the ISM can divert the inductor current to another circuit path or short-circuit the inductor via a dissipation path, allowing for safe shutdown upon completion of transistor testing and mitigating the risk of induced surges from sudden changes in the large current supplied by the ESU.

[0022] As described herein, the ATE provides multiple tests for transistors in the DUT. Specifically, aspects of this application relate to providing AC and DC tests for the capabilities of high-power electronic components, such as high-power transistors in the DUT. AC tests are performed to verify the high-speed AC characteristics of the transistor (such as switching energy, turn-on and turn-off times, diode reverse recovery, etc.). DC tests are performed to verify DC characteristics (such as saturation voltage, diode forward voltage, off-state collector leakage, gate leakage, gate threshold voltage, etc.).

[0023] AC testing can be performed as the transistor dynamically turns on and off, while the ISM in the ATE forces a dynamically changing amount of current through the transistor. The analog current through the transistor and the voltage across the transistor are measured by multiple instruments within the ATE and digitized into measured current and voltage signals for storage and further processing. In some implementations, a current digitizer in the ATE measures the transistor's current over time, while one or more high-speed voltage digitizers measure various voltages across the transistor over time. The time-domain current and voltage waveforms measured during AC testing can be analyzed to measure the transistor's high-speed characteristics. For example, during AC testing, the ATE can measure the transistor's current and voltage around the switching transitions between on and off states to measure characteristics such as switching energy, on-time, and off-time.

[0024] The inventors have recognized and understood that, conventionally, DC testing of high-power transistors is performed in separate test hardware to provide current levels that are significantly higher than those used for AC testing, for example, two times or more higher. High current levels require specific voltage and current sources (VIs) in the ATE (Automatic Test Equipment) with high cost and complexity, as well as interconnect hardware (such as high-power cables) for connecting to the Device Interface Board (DIB) and then to the DUT (Device Under Test). According to one aspect of this application, the same ATE can be used to perform DC testing on the transistor during the transistor's on-time period. Therefore, the requirement for separate hardware to provide high-power VIs and interconnects is eliminated. For example, the ATE can measure the voltage varying with ramp current using high-precision voltage and current digitizers during the period when the transistor is on and current flows through it. By using a single ATE to perform both AC and DC testing on high-power electronic components, test system costs are reduced and test time is decreased.

[0025] According to one aspect, a high-precision voltage digitizer used for DC testing has a higher voltage resolution than one or more high-speed voltage digitizers used in AC testing of transistors. This is because the voltage swings measured in DC testing during the on-state are within a low voltage range compared to the much larger voltage transition range, sometimes 100V or higher, measured in AC testing. For example, a high-precision voltage digitizer can operate within a low voltage dynamic range of 5V or 10V, while a high-speed voltage digitizer measures a dynamic range of hundreds of volts of the voltage across a transistor as it switches between on and off states. Therefore, even if both types of digitizers have similar analog-to-digital resolution (such as 16-bit resolution), the voltage resolution of a high-precision voltage digitizer is significantly higher than that of a high-speed voltage digitizer.

[0026] According to one aspect, the ISM includes multiple switches operated based on multiple synchronous timing control signals. These synchronous timing control signals also control the switching of transistors being tested in the DUT, such that when a transistor is turned on, the switches are operated to allow current to flow from or be forced through the transistor via the ESU to permit transistor measurements, and when the transistor is turned off, the current is diverted away from the transistor via an alternative current path. Furthermore, these synchronous timing control signals also control measurements by a high-speed voltage digitizer, a high-precision voltage digitizer, and a current digitizer, for example, turning on only the corresponding digitizer when measurements are required at the digitizer. Synchronizing the sampling of current and corresponding voltage values ​​also allows, for example, analysis of voltage-current relationships during transistor on-state, which allows for specific DC tests. In one embodiment, a pattern-based timing control engine is provided in the ATE that generates the multiple synchronous timing control signals.

[0027] According to one aspect, the ATE can provide testing for more than one transistor. For example, the transistor in the DUT can be a lower IGBT, and the DUT includes a second upper IGBT. The AC and DC characteristics of both the IGBT and its internal FRD can be tested using the ATE as described herein. In one embodiment, when the lower IGBT is off, the switch within the ISM is configured to redirect the inductor current through the upper IGBT via a second circuit path, and the characteristics of the IGBT can be tested by the ATE.

[0028] Figure 1 This is a high-level schematic diagram of an exemplary ATE according to various aspects of this application. Figure 1 A test system 10 comprising a test computer 12 is shown according to the method disclosed in this application, which controls a tester 16 to perform tests on a device under test (DUT) 20. In some cases, the tester 16 may be an automated test apparatus (ATE) constructed using techniques known in the art. The DUT 20 may be any suitable device for testing. For example, the DUT 20 may be a high-power transistor for motor drives, such as an IGBT. The ATE 16 may include circuitry for generating and / or measuring test signals 14 against the DUT 20. The ATE 16 may include multiple instruments configured to generate or measure different types of analog or digital signals.

[0029] It should be understood that Figure 1 This is a greatly simplified representation of an automated test system. For example, although not shown, test system 10 may include control circuitry for controlling the operation of instruments within ATE 16. Additionally, test system 10 may include processing circuitry to process measurement results and determine whether DUT 20 is operating correctly. Optionally and alternatively, a device interface board (DIB) may be provided to connect contacts on the DUT to corresponding test points on the instruments within ATE 16. Furthermore, Figure 1 A single signal path between ATE16 and DUT 20 is shown. Those skilled in the art will understand that testing a high-power DUT may require generating and measuring hundreds or thousands of test signals. Therefore, the circuit described herein can be replicated multiple times within ATE16 and controlled to provide synchronous test signals for testing DUT 20. Furthermore, although... Figure 1 The diagram shows a scenario where a single DUT 20 is being tested, but the test system 10 can be configured to test multiple devices.

[0030] Regardless of the number of instruments or other components that generate or measure test signals, or the number of devices under test, the test system 10 may include a signal delivery component that routes signals between the instruments within the DUT 20 and ATE 16.

[0031] Furthermore, it should be understood that the other components shown are exemplary and not limiting. For example, although test computer 12 is... Figure 1 The test computer is shown as a personal computer (PC), but it should be understood that any suitable computing device can be used to implement the test computer, such as a mobile device or a computer workstation. The test computer 12 can be connected to a network and can access resources through the network and / or communicate with one or more other computers connected to the network.

[0032] Figure 2 This is a schematic diagram illustrating an exemplary ATE 200 for testing high-power components during a first testing phase, according to some aspects. Figure 2 A DUT 100 is shown, which includes a lower IGBT 110 with an internal fast recovery diode (FRD) 112 and an upper IGBT 120 with an internal FRD 122. The switching of the lower IGBT 110 is controlled by a lower gate driver 222 based on a synchronization timing control signal 234. The switching of the upper IGBT 120 is controlled by a lower gate driver 242 based on a synchronization timing control signal 254.

[0033] ESU 202 is provided to deliver a large, high-speed current pulse for AC testing purposes at ESU output 204. ESU 202 can be a programmable voltage source or a programmable current source. To test high-power transistors, ESU 202 can generate signals covering voltages exceeding 1500V and currents of at least 3000A, at least 4000A, or exceeding 5000A. In some embodiments, ESU 202 may also include a fast-acting high-side circuit breaker to protect the instrument within the ATE from short circuits in the DUT during testing. According to one aspect, the circuit path between the ESU and the DUT has low path inductance to avoid inductor overvoltage pulses. In some embodiments, the ESU may be designed to operate from a set of large-value storage capacitors charged by a programmable current-limiting voltage source.

[0034] The ISM 210 includes switches 212, 214, and 216, and an inductor 218. Switches 212, 214, and 216 operate based on corresponding synchronous timing control signals: +Rail to L, -Rail to L, and Short to L. In some implementations, switches 212, 214, and 218 are high-power solid-state switches.

[0035] ATE provides a galvanometer 226 for measuring the emitter current of the lower IGBT 110. The current measurement result is digitized in a high-speed current digitizer 232. A voltmeter 224 provides a measurement of the voltage difference across the collector and emitter of the lower IGBT, and this measurement result is digitized by a high-speed voltage digitizer 228 and a high-precision digitizer 230. A galvanometer 246 measures the collector current through the upper IGBT 120. The current measurement result is digitized in a high-speed current digitizer 252. A voltmeter 244 provides a measurement of the voltage difference across the collector and emitter of the upper IGBT, and this measurement result is digitized by a high-speed voltage digitizer 248 and a high-precision digitizer 250.

[0036] exist Figure 2 In the example shown, ammeter 226 is an inductively coupled current monitor, but any suitable current measurement technique can be used. The inventors recognize and understand that inductively coupled current monitors typically provide an accuracy of approximately ±1% and can be less than a specific high-power VI typically used for testing high-power electronic devices. Forced current protection banding techniques can be used to mitigate the impact of reduced accuracy by appropriately increasing test condition requirements without significantly affecting production yield. According to one aspect, the test technique can be modified to force the current level to exceed the range by a small amount (approximately 2%) for measuring V. CE (Saturation) and V (positive).

[0037] In such Figure 2 During the first test phase shown, the lower IGBT 110 is turned on, and switches 212 and 218 in ISM210 are turned on to allow current to flow from the ESU output 204 through switch 212, inductor 218, and lower IGBT 110 to the reference voltage 206 via circuit path 281.

[0038] Reference Figure 3 The exemplary waveforms are described in more detail below. Figure 2 The AC and DC tests for IGBTs are shown in the diagram.

[0039] Figure 3 It is based on the time-domain waveforms of current and voltage signals measured by ATE as described in this paper, according to certain aspects. Figure 3 In the waveform 302, starting from time T1, for example, due to the programmable current being forced through such... Figure 2 The circuit path 281 shown goes from the ESU output terminal 204 through the lower IGBT 110, so as... Figure 2The collector current of the lower IGBT 110 shown rises linearly over time. The peak current level during the ramp period can depend on the pulse duration between T1 and T2 and the value of inductor 218. The collector current shown in waveform 302 can be measured by ammeter 226 and digitized by digitizer 232.

[0040] See still Figure 3 Waveform 304 shows the collector-emitter voltage (V) of IGBT 110 as it is turned on and off over time. CE The collector-emitter voltage can be measured, for example, by voltmeter 224 and digitized by high-speed digitizer 228 for AC testing, or by high-precision digitizer 230 for DC testing.

[0041] During the time period between T1 and T2, the lower IGBT 110 is turned on, and the synchronous voltage signal 305 digitized by the high-precision voltage digitizer 230 and the synchronous current signal I between T1 and T2 can be used. CE 302 performs DC testing. By digitizing the timing of current and voltage synchronization, the forced condition can be correlated with the measured response. Synchronous voltage-current relationships can be handled to provide high-power DC characteristics for the lower IGBT 110 (such as, but not limited to, saturation voltage V). CE (Saturation), On-state resistance R DS (Connection) test. Known in the art for processing V CE -I CE Any technique that can be used to obtain such properties can be used for this DC test.

[0042] See again Figure 2 During DC testing, the high-precision digitizer 230 is used for relatively small voltage changes, such as for measuring the voltage signal 305 within waveform 304, as... Figure 3 As shown. In some embodiments, the high-precision digitizer 230 may be a high-sampling-rate timing-controlled differential or floating-input high-precision DC voltmeter operating over a full-scale low-voltage range of 0V to 5V, 0V to 10V, 0V to 20V, or 0 to 50V, with a digitization bit resolution of at least 12 bits, at least 14 bits, or at least 16 bits, thereby providing high voltage resolution based on binarization over the low-voltage range. For example, a 16-bit analog-to-digital converter with a full-scale range of 10V has a 10V / 2... 16 Or a voltage resolution of approximately 0.15 mV. It should be understood that, depending on the bandwidth of the measurement, the voltage resolution can also depend on the noise in the digitizer.

[0043] In some implementations, the input of a high-precision digitizer is protected from high voltage due to limiting the voltage at the digitizer to a predetermined voltage range. CE Value and peak value V CE The effect of overvoltage conditions caused by the value (which can be approximately several hundred volts when transitioning between the on and off states).

[0044] like Figure 2 The first test phase shown can be repeated to force an increased amount of high current from the ESU through the lower IGBT. For example, as... Figure 3 As shown, during periods T3 to T4, a high forced current of up to 480A is driven through the lower IGBT, and DC measurements can be performed based on the synchronization voltage signal 307 and the synchronization current signal 302 measured by a high-precision digitizer. In some embodiments, the DC test of the lower IGBT can be performed by an ATE according to this disclosure at a forced current of at least 1000A, at least 2000A, at least 3000A, at least 4000A, or between 3000A and 5000A.

[0045] AC testing is performed based on signals measured around the transitions of an IGBT between its on and off states, as discussed in detail below. In some implementations, AC switching energy testing is initiated by turning on and off an IGBT (such as IGBT 110 below) using the current generated in the inductive load to generate the current required for the test. When an appropriate amount of time has elapsed and the current has reached an appropriate level, the IGBT is turned off for a brief period and then turned on again, while various digitizers capture the resulting voltage and current waveforms. This continuous action is sufficient to provide the off and on waveforms of an IGBT (such as IGBT 110 and FRD 122) paired with an FRD, thereby generating a complete set of switching energy waveforms, such as... Figure 3 As shown. If data is required at multiple unique test currents, multiple test conditions can be performed sequentially.

[0046] See again Figure 3 Waveform 306 shows the gate-to-emitter voltage (V) of the lower IGBT 110 as a function of time. GE This waveform controls the switching of IGBT 110 between an on / conducting state and an off / non-conducting state. At time T2, when IGBT 110 is turned off based on control signal 234, the induced surge from inductor 218 rapidly drives the collector voltage upward and forward biases the upper FRD 122 in upper IGBT 120. An example of the current after time T2 is shown in... Figure 4 As shown in the image.

[0047] Figure 4 This is a schematic diagram illustrating an exemplary ATE 200 for testing high-power components during a second testing phase, according to some aspects. Figure 4 The circuit path 282 of the upper FRD122 is shown when inductor 218 is turned on and lower IGBT 110 is turned off. The current V during the off-to-on transition of lower IGBT 110 is also shown. CE and V GE It can be digitized. The current passing through the upper FRD can also be digitized during testing via ammeter 246. The digitizer can be controlled to turn on or off at various points in the continuous operation as needed to capture the necessary information for testing AC characteristics.

[0048] The AC characteristics (such as turn-on and turn-off switching energy) of the lower IGBT 110 can be determined by calculations using any technique known in the art, employing digitized voltage waveform data 304 and digitized current waveform data 302 as operands. Specifically, the voltage across the lower IGBT 110 is digitized using a high-speed digitizer 228, which operates over a full-scale high-voltage range, for example, from 0V to 1000V, to allow the capture of large voltage swings during AC transitions, such as... Figure 3 The exemplary waveform 304 is shown in the figure. Therefore, the high-speed digitizer 228 has a lower voltage resolution compared to the high-precision voltage digitizer 230. The same ATE 200 can also be used to test the AC characteristics of the upper IGBT 120 and the lower FRD 112. Other examples of available AC characteristics include, but are not limited to, the gate charge Q of the lower IGBT. g (on), reverse recovery time t rr and the reverse recovery current I of the upper FRD rr .

[0049] Figure 5 This is a schematic diagram illustrating an exemplary ATE 200 for testing high-power components during the third testing phase, according to some aspects. Figure 5 This illustrates how, when the current through inductor 218 is turned on again, the current is drawn from the ESU through circuit path 281 to reconnect the inductor to the lower IGBT 110. The turn-on energy of the lower IGBT 110 can be measured AC-based during such transitions from an off state to an on state based on measured voltage and current signals.

[0050] Furthermore, the inventors have recognized and understood that in some embodiments, after the lower IGBT 110 is turned on, due to, for example, a delay in hole migration, the FRD 122 in the upper IGBT 120 may remain on for a short period of time, thereby causing current through circuit path 283, such as... Figure 5 As shown, this increases the peak current demand on the lower IGBT 110. This reverse recovery response of the upper FRD 122 can be digitized by voltage digitizers 250 and 248 and current digitizer 252, and used to characterize the FRD 122.

[0051] Figure 6 This is a schematic diagram illustrating an exemplary ATE 200 for testing high-power components during the fourth test phase, according to some aspects. The inventors have recognized and understood that when the inductor current increases to very high levels during one or more test phases (where the lower IGBT is turned on), there is a need to provide an alternative for safe disconnection that would allow testing of both the IGBT and FRD at much higher DC test currents. Figure 6 An exemplary test phase is shown, in which the voltage on the free inductor lead shifts downwards by disconnecting the +Rail to L switch 212 until it forward-biases the internal diode 215 into the –Rail to L switch 214. This turns on the lower IGBT 110 and allows current to flow in circuit path 284, which safely avoids excessive energy and overvoltage due to the disconnection of the current supply from ESU 202.

[0052] Figure 7 This is a schematic diagram illustrating an exemplary ATE 200 for testing high-power components during the fifth test phase, according to some aspects. The fifth test phase may be... Figure 6 This will be conducted after the fourth testing phase shown. Figure 7 As shown, the short-circuit switch 216 on the inductive load is turned on, while the lower IGBT is turned off. This encapsulates the inductor energy within the inductor 218 and the short-circuit switch 216, preparing it for testing the upper IGBT 120 and FRD 122.

[0053] Figure 8 This is a schematic diagram illustrating an exemplary ATE 200 for testing high-power components during the sixth test phase, according to some aspects. The sixth test phase may be... Figure 7 The fifth test phase, as shown, is conducted afterward and is used to test the IGBT 120 and FRD 122.

[0054] To test FRD 122, the +Rail to L switch 212 is sequentially turned on and the short-circuit switch 216 is turned off. This allows current in inductor 218 to begin flowing through FRD 122 via circuit path 286. The resulting V (positive) and I (positive) waveforms are then digitized synchronously and at timing using digitizers 248, 250, and 252. This operation is safe for the DUT because the voltage on the device is minimal, keeping the switching energy low. When the test is complete, the short-circuit switch 216 can be closed again, and the +Rail to L switch 212 can be turned off.

[0055] It should be understood that as long as the power requirements of the ISM are not exceeded, Figure 2 , 4 The test phases shown in 5, 6, 7, and 8 can be repeated multiple times for alternative, desired test cases. Testing based on multiple modes is also possible, for example, to test the upper IGBT and lower FRD switch pair.

[0056] Figure 9 This is a schematic diagram illustrating a timing control engine 900 based on an exemplary pattern, according to some aspects. As described herein, AC and DC tests in an ATE are pattern-based tests, wherein the testing process is coordinated with the hardware by multiple synchronous control signals generated in the pattern-based timing control engine 900. Figure 9 As shown, the pattern-based timing control engine 900 can generate control signals to drive gating of the upper and lower IGBT devices of the DUT for testing both the upper and lower IGBTs, gating of switches in the ISM, and gating of high-speed voltage / current digitizers and high-precision voltage digitizers. The pattern-based timing control engine 900 can be implemented in hardware (e.g., using one or more digital sequencers with precise timing control) and can be operated by an operator, for example, in... Figure 1 Programming is performed on the test computer 12 shown.

[0057] The foregoing description of at least one embodiment of the present invention covers various aspects, and it should be understood that those skilled in the art can readily make various changes, modifications and improvements.

[0058] For example, measured current and voltage data can be further processed to remove noise using a center moving average method. A center moving average is performed to calculate the average of an odd number of samples, with an equal number of samples on either side of the center sample. This mechanism provides noise reduction or data smoothing appropriate to the sample size without introducing time shift into the data. In a synchronous environment with multiple digitizers, this mechanism is used to correlate specific voltage samples with specific current samples in a timely manner while reducing measurement variance. In test systems as described herein, where the measured signals include dynamic DC data with voltage and current waveforms that slope in a near-linear manner, center moving averages are a highly effective technique for locating specific measurement points within a constantly changing dataset. The combination of current guard bands and measurement noise reduction provides improved accuracy to maintain high product quality and test yield.

[0059] Such changes, modifications, and improvements are intended to be part of this disclosure and are considered to fall within the spirit and scope of the invention. Furthermore, while advantages of the invention are indicated, it should be understood that not every embodiment of the technology described herein will include every stated advantage. Some embodiments may not achieve any of the features advantageously described herein, and in some cases, one or more of the stated features may be implemented to achieve other embodiments. Therefore, the foregoing description and figures are by way of example only.

[0060] Various aspects of the invention can be used individually, in combination, or in various configurations not specifically discussed in the above embodiments, and therefore its application is not limited to the details and configurations of the components described above or shown in the accompanying drawings. For example, an aspect described in one embodiment can be combined in any way with aspects described in other embodiments.

[0061] Furthermore, the present invention can be implemented as a method, and examples thereof have been provided. The operations performed as part of this method can be ordered in any suitable manner. Therefore, embodiments can be constructed that perform operations in a different order than those shown, which may include performing certain operations simultaneously, even if these operations are shown as sequential operations in the various exemplary embodiments.

[0062] The use of ordinal terms such as “first,” “second,” and “third” to modify claim elements in claims does not in itself imply any priority, order, or sequence of one claim element relative to another, or the chronological order of performing method operations. Rather, it serves only as a label to distinguish one claim element with a certain name from another element with the same name (except for the ordinal term used), in order to identify the claim elements.

[0063] The terms “about” and “approximately” may be used in some embodiments to mean within ±20% of the target value, in some embodiments to mean within ±10% of the target value, in some embodiments to mean within ±5% of the target value, and in some embodiments to mean within ±2% of the target value. The terms “about” and “approximately” may include the target value.

[0064] Furthermore, the phrases and terms used herein are for illustrative purposes only and should not be considered limiting. The terms “including,” “contains,” “has,” “includes,” “involves,” and their variations, as used herein, mean that they include the items listed thereafter, their equivalents, and any additional items.

Claims

1. A method for operating automated test equipment (ATE) to test an insulated gate bipolar transistor (IGBT) in a device under test (DUT), the method comprising: turning on the IGBT; driving current from an energy source unit (ESU) through the IGBT via an inductor; measuring a plurality of current waveforms through the IGBT and a voltage waveform across the IGBT; processing the measured plurality of current waveforms and voltage waveforms to obtain at least one alternating current (AC) characteristic and at least one direct current (DC) characteristic of the IGBT, measuring, with a first digitizer of the ATE, the at least one voltage waveform measured during a turn-on state of the IGBT; measuring, with a second digitizer of the ATE, the at least one voltage waveform across the IGBT during a turn-on-turn-off transition of the IGBT, wherein: the second digitizer has a lower voltage resolution than the first digitizer.

2. The method of claim 1, further comprising: generating, with a controller, a plurality of synchronized control signals synchronized with a timing pattern; controlling switching of the IGBT and sampling of the first digitizer and the second digitizer based at least in part on the plurality of synchronized control signals.

3. Automated test equipment (ATE) for testing a device under test (DUT), the automated test equipment comprising: an energy source unit (ESU) comprising an ESU output; a switch module configured to couple a transistor in the DUT to the ESU output via an inductor; a first digitizer configured to measure a voltage of the transistor; a second digitizer configured to measure the voltage of the transistor, the second digitizer having a lower voltage resolution than the first digitizer; and a third digitizer configured to measure a current of the transistor.

4. The ATE of claim 3, wherein the ATE is configured to sample the first digitizer and operate one or more switches in the switch module based on a plurality of synchronized control signals.

5. The ATE of claim 4, wherein the ATE is configured to cyclically turn on and off the transistor based on the plurality of synchronized control signals, and wherein the ATE is configured to sample the first digitizer during a period in which the transistor is turned on.

6. The ATE of claim 5, wherein the transistor is an insulated gate bipolar transistor (IGBT).

9. The ATE of claim 8, wherein the transistor is a first IGBT, and the inductor in the switch module has a first inductor terminal configured to be coupled to the first IGBT, and wherein the switch module is further configured to couple a second IGBT between the first inductor terminal and the ESU output.

7. The ATE of claim 6, wherein the first digitizer is configured to measure one or more characteristics of the transistor when the transistor is turned on, wherein the one or more characteristics include collector-to-emitter voltage (V CE ) at saturation, forward voltage (V FRD ), or a combination thereof.

8. The ATE of claim 7, wherein the one or more characteristics include V CE or V FRD measured when the current of the transistor is at least 3000 A.

10. The ATE of claim 9, wherein the ATE further comprises: ​ a fourth digitizer configured to measure a voltage of the second IGBT; a fifth digitizer configured to measure the voltage of the second IGBT, the fifth digitizer having a lower voltage resolution than the fifth digitizer; a sixth digitizer configured to measure a current of the second IGBT, wherein the ATE is configured to sample the fourth digitizer based on the plurality of synchronous control signals.

11. The ATE of claim 10, wherein a first one of the one or more switches in the switch module is in parallel with the inductor, the first one of the one or more switches configured to operate based on one of the plurality of synchronous control signals.

12. The ATE of claim 11, wherein a second inductor terminal of the inductor is coupled to the ESU output via a second one of the one or more switches, the second one of the one or more switches configured to operate based on one of the plurality of synchronous control signals.

13. The ATE of claim 12, wherein the second inductor terminal of the inductor is coupled to a reference voltage via a third one of the one or more switches, the third one of the one or more switches configured to operate based on one of the plurality of synchronous control signals.

14. The ATE of claim 13, wherein the switch module is configured to couple the transistor in the DUT between the first inductor terminal of the inductor and the reference voltage.

15. The ATE of claim 3, further comprising a controller configured to provide a plurality of synchronous control signals to a second voltage meter and the one or more switches in the switch module, wherein the plurality of synchronous control signals are synchronized to a common timing pattern.

16. A method for operating an automated test equipment (ATE) to test a first insulated gate bipolar transistor (IGBT) in a device under test (DUT), the method comprising: turning on a first IGBT to cause a first current to flow from an energy source unit (ESU) output to a reference voltage via a first circuit path, the first circuit path comprising an inductor, a first switch coupled between the inductor and the ESU output, and the first IGBT; measuring a first characteristic of the first IGBT with a first digitizer; measuring a second characteristic of the first IGBT with a second digitizer having a lower voltage resolution than the first digitizer.

17. The method of claim 16, wherein the first characteristic is a collector-to-emitter voltage (V CE ) or a forward voltage (V FRD ) at saturation, and wherein the first characteristic is measured during an on state of the IGBT when the first current is flowing through the first IGBT.​​ 18. The method of claim 17, wherein the first current is at least 3000 A.

19. The method of claim 16, further comprising: after turning on the first IGBT, turning off the first IGBT to cause a second current to flow from the ESU output via a second circuit path, the second circuit path comprising the first switch, the inductor, and a second IGBT, wherein: the second characteristic is measured around a transition of the first IGBT between an on state and an off state, and wherein: the second characteristic is a switching energy of the first IGBT.

20. The method of claim 19, further comprising: measuring, with a third digitizer, a third characteristic of the second IGBT during an on state of the second IGBT when the second current is flowing through the second IGBT.

21. The method of claim 16, further comprising: disconnecting the inductor from the ESU output by turning off the first switch; turning on a second switch coupled between the inductor and the reference voltage to cause a third current to flow via a third current path, wherein the third current path is a loop including the inductor, the first IGBT, and the second switch.

22. The method of claim 16, further comprising: generating, with a controller, a plurality of synchronized control signals that are synchronized to a common timing pattern; controlling switching of the first IGBT and the first switch, and sampling of the first digitizer and the second digitizer based at least in part on the plurality of synchronized control signals.

23. The method of claim 16, wherein measuring the first characteristic comprises: sampling a voltage across the first IGBT and the first current; moving averaging the sampled voltage across the first IGBT.

24. The method of claim 16, further comprising: protecting the first digitizer from an overvoltage condition by limiting a voltage at the digitizer to be within a predetermined voltage range.

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