Digitally controlled oscillator for synthesizer module, synthesizer module, synthesizer and electronic audio signal generation method

Abstract

The present invention provides a digitally controlled oscillator (100), a synthesizer module (200), a synthesizer (300), and a method for generating an electronic audio signal. The oscillator (100) includes a digital processing device (10) capable of generating a first pulse wave at a first output terminal (PulseUp) of the processing device (10), wherein the first pulse wave includes pulses with at least two different frequencies. The oscillator (100) further includes a summing circuit (30) and a linear wave shaper (20). The output terminal (PulseUp) of the processing device (10) is connected to the summing circuit (30), and the summing circuit generates a total signal based on at least the first pulse wave. The total signal is fed to the linear wave shaper (20), and the linear wave shaper can generate an output signal at the output terminal (OUT) of the oscillator (100) by modifying the total signal.

Description

Technical Field

[0001] The present invention relates generally to electronic oscillators. However, the invention relates particularly, but not exclusively, to digitally controlled oscillators for audio equipment. Background Art

[0002] There are many known methods for electronically generating sawtooth and pulse waveforms under various frequency controls.

[0003] A voltage-controlled oscillator (VCO) is based on a relaxation oscillator, essentially a voltage-controlled ramp generator. When the ramp reaches a certain threshold, it can be triggered by a reset circuit, generating a sawtooth waveform. This waveform can then be manipulated to produce other output waveforms. A common variation is to switch the direction of integration to produce a triangle wave.

[0004] A digitally controlled oscillator (DCO) replaces the VCO reset circuit with a digitally controlled reset circuit. Its advantage is that the frequency can be controlled by pulses derived from a very high-frequency, very stable clock.

[0005] In direct digital synthesis (DDS), a waveform is generated as a digital stream in a digital signal processor (DSP) and then fed into a digital-to-analog converter (DAC) clocked at a sampling rate that is at least a multiple of the highest desired waveform output frequency (based on the Nyquist criterion).

[0006] On the other hand, if multiple synchronized waveforms need to be generated at independently controllable frequencies, the analog circuitry must be fully replicated for each frequency, for both the VCO and DCO. However, the DDS approach is immediately generalizable to generate multiple waveforms. If sufficient DSP power is available, the various waveforms can simply be generated separately and then summed before the DAC, eliminating the need for additional analog components. DSP requirements typically scale in proportion to the number of separate waveforms.

[0007] However, in the DDS method, the waveform is generated by simply calculating the phase of the oscillator and outputting the corresponding instantaneous sampling value, which is essentially equivalent to continuous time waveform sampling. When the waveform has many harmonics, such as sawtooth waves and pulse waves, some of the harmonic frequencies will be higher than the Nyquist boundary F s / 2, where F s is the sampling frequency, which will be aliased to baseband 0≤f <F s / 2. In audio applications, human hearing is extremely sensitive to such non-harmonic frequencies, so aliasing must be carefully controlled to produce a quality similar to that of analog sound methods, and this also requires a lot of DSP resources. Summary of the Invention

[0008] The present invention aims to provide a numerically controlled oscillator, a synthesizer module, a synthesizer, and a method for generating an electronic audio signal. Another object of the present invention is that the numerically controlled oscillator, synthesizer module, synthesizer, and method can at least alleviate some of the disadvantages of known solutions, such as those related to aliasing. Furthermore, the present invention provides a simpler method for generating an electronic audio signal (including multiple audio characteristics).

[0009] The objects of the invention are achieved by a numerically controlled oscillator, a synthesizer module, a synthesizer and a method for generating an electronic audio signal as defined in the respective independent claims.

[0010] According to a first aspect of the present invention, a digitally controlled oscillator for a synthesizer module is provided. The digitally controlled oscillator includes a digital processing device (e.g., an STM32F103RGT6 microcontroller (MCU)) capable of generating a first pulse wave at a first output terminal, such as at pin PA8 of the MCU's TIM1 timer. The first pulse wave includes pulses at at least two different first frequencies, for example, 75 Hz and 77 Hz. The digitally controlled oscillator also includes a summing circuit and a linear wave shaper, wherein the linear wave shaper includes an integrator, such as an ideal (essentially) integrator or preferably a non-ideal or drain integrator. The first output terminal of the processing device is connected to the summing circuit, which generates a sum signal based on at least the first pulse wave. The sum signal is fed to the linear wave shaper, which modifies the sum signal to generate an output signal at an output terminal of the oscillator, which can be converted into an electronic audio signal corresponding to the audio frequency at a speaker. The modification includes at least integrating the sum signal.

[0011] Thus, generating the output signal preferably (optionally) comprises generating a total signal, which, from a mathematical point of view, comprises at least one derivative or higher-order derivative (optionally) or ramp of the desired output signal. The linear wave shaper then adjusts the total signal to the desired output signal, at least by integration.

[0012] In various embodiments, the digitally controlled oscillator may include a DC bias power supply (such as a digital-to-analog output of a processing device), and the processing device is connected to a summing circuit to generate a DC bias voltage, wherein the total signal is further generated based on the DC bias voltage.

[0013] In various embodiments, the oscillator may include a digital processing device configured to generate a second pulse wave at a second output of the processing device, wherein the second pulse wave comprises pulses at at least two different second frequencies. The second output of the processing device is coupled to a summing circuit configured to generate a sum signal at its output based on at least the first pulse wave and the second pulse wave. The sum signal may also optionally be based on a DC bias voltage.

[0014] In some embodiments, the at least two different first frequencies may correspond to at least two different second frequencies, respectively.

[0015] In various embodiments, the linear wave shaper may comprise an active filter, preferably an active second-order bandpass filter. Alternatively, the linear wave shaper may comprise a passive filter connected to an amplifier.

[0016] In some embodiments, the active filter may include a first operational amplifier whose output is connected to the output of the oscillator, wherein the first operational amplifier includes a non-inverting input and an inverting input. The active filter may further include a first resistor connected between the output and inverting input of the first operational amplifier. The active filter may further include a first capacitor whose first terminal is connected to the inverting input, and whose second terminal is connected to an input of the linear wave shaper. Furthermore, the active filter may include a second capacitor connected between the output of the first operational amplifier and the second terminal of the first capacitor.

[0017] In various embodiments, the summing circuit includes a first input terminal, a second input terminal, and an optional third input terminal, wherein the first input terminal is connected to the first output terminal of the processing device, the second input terminal is connected to a DC bias power supply (such as a digital-to-analog output of the processing device), and the third input terminal is optionally connected to the second output terminal of the processing device.

[0018] In various embodiments, the summing circuit forms a single pulse wave at a common coupling point based on at least the first pulse wave, the voltage of the DC bias power supply, and the second pulse wave (optional), wherein the total signal is based on the single pulse wave.

[0019] The common coupling point refers to any point in the oscillator electronic circuit, where at least two first pulse waves, the second pulse wave and the DC bias voltage or at least two signals based on the first pulse wave, the second pulse wave and the DC bias voltage are combined into one electronic signal, that is, a single pulse wave.

[0020] In one embodiment, the summing circuit may include a first semiconductor switch (e.g., a MOSFET). The first semiconductor switch may be controlled by a control terminal thereof using a first pulse wave. A first terminal of the first semiconductor switch may be connected to a second power supply, and a second terminal of the first semiconductor switch may be connected to a point of common coupling.

[0021] Furthermore, the summing circuit may include a second semiconductor switch (e.g., a MOSFET). The second semiconductor switch may be controlled by a control terminal thereof using a second pulse wave. A first terminal of the second semiconductor switch may be connected to a third power supply, and a second terminal of the second semiconductor switch may be connected to a point of common coupling.

[0022] In various embodiments, the summing circuit may include a digital buffer disposed between the processing device and the point of common coupling.

[0023] In various embodiments, the summing circuit may include an inverting amplifier arranged between the point of common coupling and the linear wave shaper.

[0024] According to a second aspect of the present invention, a synthesizer module is provided. The synthesizer module includes at least one digitally controlled oscillator according to the first aspect or any embodiment thereof. The synthesizer module further includes a user interface for controlling the at least one digitally controlled oscillator, wherein the user interface is functionally connected to at least one input terminal of the at least one digitally controlled oscillator. For example, the user interface may include a plurality of rotatable knobs for controlling oscillator settings, such as settings related to the waveform of the oscillator output signal in response to knob rotation. In various embodiments, MIDI (Musical Instrument Digital Interface) may be used as the user interface to control the operation of the oscillator.

[0025] According to a third aspect of the present invention, a synthesizer is provided. The synthesizer includes at least one digitally controlled oscillator according to the first aspect or any embodiment thereof. The synthesizer further includes a keyboard (such as a musical instrument keyboard) including a plurality of keys, wherein the keyboard is functionally connected to at least one input terminal of the at least one digitally controlled oscillator, and a speaker is optionally connected to an output terminal of the at least one digitally controlled oscillator.

[0026] According to a fourth aspect of the present invention, a method for generating an electronic audio signal is provided. The method comprises at least the following steps:

[0027] - generating a first pulse wave by a digital processing device, wherein the first pulse wave comprises pulses with at least two different first frequencies,

[0028] - generating a total signal based on at least the first pulse wave, and

[0029] - Total signal filtering by means of a linear wave shaper comprising an active or passive filter connected to an amplifier to generate an electronic audio signal.

[0030] In some embodiments, the method may include generating, by a digital processing device, a second pulse wave including pulses at at least two different second frequencies, and generating a total signal based on at least the first pulse wave and the second pulse wave.

[0031] The advantage of the present invention over known solutions is that multiple or preferably a large number of independent waveforms can be generated without increasing or at most increasing the component count significantly. In addition, the high frequency resolution and the low or no aliasing typical characteristics of DCO solutions are retained.

[0032] Various other advantages will become apparent to those skilled in the art from the following detailed description.

[0033] As used herein, the expression "a number" may refer to any positive integer starting from one (1).

[0034] The expression "plurality" may refer to any positive integer starting from two (2).

[0035] Herein, unless expressly stated otherwise, the terms "first," "second," "third," "fourth," etc. are used to distinguish between various elements, but not to particularly prioritize or rank them.

[0036] The exemplary embodiments of the present invention herein should not be interpreted as limiting the applicability of the appended claims. In this document, the verb "comprise" is used as an open limitation that does not exclude the presence of unlisted features. Unless explicitly stated otherwise, the features listed in the dependent claims may be freely combined with each other.

[0037] The novel features which are regarded as characteristic of the invention are set forth with particularity in the appended claims. However, the invention itself, as well as its construction and its method of operation, together with further objects and advantages will be better understood by reference to the following description of specific embodiments when read in connection with the accompanying drawings. BRIEF DESCRIPTION OF THE DRAWINGS

[0038] In the drawings, some embodiments of the invention are shown by way of illustration and not limitation.

[0039] Figure 1 A numerically controlled oscillator according to one embodiment of the invention is shown highly schematically.

[0040] Figure 2 A digitally controlled oscillator according to an embodiment of the present invention is schematically shown.

[0041] Figure 3 A digitally controlled oscillator according to an embodiment of the present invention is schematically shown.

[0042] Figure 4A The Dirac delta is shown, with the integral represented by the length of the arrow.

[0043] Figure 4B FIG. 1 schematically shows the estimation of Dirac delta using a finite-width pulse according to an embodiment of the present invention.

[0044] Figure 5A and Figure 5B Schematic diagram showing how overlapping pulses are combined in some embodiments of the present invention.

[0045] Figure 6 A synthesizer module of one embodiment of the present invention is shown schematically.

[0046] Figure 7 A synthesizer module of one embodiment of the present invention is shown schematically.

[0047] Figure 8 A flow chart showing a method according to one embodiment of the present invention is shown. DETAILED DESCRIPTION

[0048] Figure 1 A highly schematic diagram illustrates a digitally controlled oscillator 100 according to one embodiment of the present invention. The digitally controlled oscillator 100 includes a processing device 10 (e.g., an MCU) and a linear wave shaper 20 (including an active filter). The processing device 10 can be connected to the linear wave shaper 20 via a summing circuit 30. The summing circuit 30 can sum or combine multiple signals at the input 15 of the summing circuit 30 to form a total signal at the output 25 of the summing circuit 30. The total signal at the output 25 is then fed to the linear wave shaper 20, resulting in an output signal at the output OUT of the oscillator 100. Furthermore, the oscillator input 101 can be connected to a user interface of the synthesizer module and / or a keyboard of the synthesizer.

[0049] Figure 2 The digital controlled oscillator 100 according to one embodiment of the present invention is schematically shown. Figure 2 In FIG. 1 , GND refers to the ground potential, and OUT refers to the output terminal of the oscillator 100 .

[0050] exist Figure 2 In the embodiment, the oscillator 100 may include a processing device 10, such as a microcontroller (MCU). The MCU may utilize an external 8 MHz crystal to generate a 72 MHz master clock rate. In one embodiment, the MCU may be comprised of STM32F103RGT6 microcontroller produced by etc.

[0051] For the first operational amplifier U1A, a quarter of a TL074 operational amplifier, etc. can be used. The operational amplifier can be selected according to its required characteristics.

[0052] The first terminals of the resistors R1, R2 and R3 can be connected to the input terminals DAC, PulseUp and PulseDown of the summing circuit 30, respectively. Figure 2 As shown, the second terminals of the resistors R1-R3 may be connected to each other.

[0053] The linear wave shaper 20 may be implemented by a first operational amplifier U1A and a surrounding passive network including a resistor R4 and capacitors C1 and C2 .

[0054] In some embodiments, capacitor C1 may be part of summing circuit 30 or common to summing circuit 30 and linear wave shaper 20 .

[0055] In an exemplary embodiment, Figure 2 As shown, the following component values ​​may be included: R1 = R2 = 100 kΩ, R3 = 278 kΩ, R4 = 820 kΩ, C1 = 330 nF, and C2 = 40 nF. The operation of the oscillator depends on the ratio of the component values. Therefore, multiplying all component values ​​by the same positive real number can make the oscillator 100 operate in a manner substantially the same as an oscillator with the above component values.

[0056] In addition, if Figure 2 As shown, the processing device 10 can generate at least two output signals, namely PulseUp and / or PulseDown and DAC.

[0057] In one embodiment, the PulseDown and PulseUp signals can be generated on pins PA8 and PC6, respectively, by the MCU's TIM1 and TIM8 timer PWM outputs. The DAC output can be generated on output pin PA5 by the MCU's internal DAC2. The DAC output can also be further buffered using a quarter-size TL074 op amp (not shown) with a voltage follower.

[0058] Figure 3 A numerically controlled oscillator 100 according to another embodiment of the present invention is schematically shown. The oscillator 100 can preferably be used as an oscillator for a modular audio synthesizer in the "Eurorack" format. Figure 3 In the embodiment, the oscillator 100 includes an MCU, such as an STM32F103RGT6 microcontroller, which can use an external 8 MHz crystal to generate a main clock rate of 72 MHz.

[0059] Additionally, the PulseDown and PulseUp signals can be generated on pins PA8 and PC6, respectively, using the MCU's TIM1 and TIM8 timer PWM outputs. The TIM1 and TIM8 timer PWM outputs, as well as pins PA8 and PC6, are well known to those skilled in the art. The DAC output can be generated on output pin PA5 using the MCU's internal DAC2 and buffered using a quarter-size TL074 op amp (not shown) via a voltage follower.

[0060] In some embodiments, the linear wave shaper 20 may be implemented using any standard op amp bandpass filter configuration (eg, Salen-Key, state variable, feedback ladder, etc.).

[0061] In a preferred embodiment, the linear wave shaper 20 may be based on a multiple feedback (MFB) topology. Figure 3 In FIG. 2 , the linear wave shaper 20 is implemented by an operational amplifier U1A and a surrounding passive network including resistors R10 , R11 and capacitors C3 and C4 .

[0062] In one embodiment, Figure 3 As shown, the following component values ​​may be included: R5 = 82kΩ, R6 = 56kΩ, R7 = 22kΩ, R8 = 22kΩ, R9 = 47kΩ, R10 = 18kΩ, R11 = 820kΩ, as well as C3 = 330nF, C4 = 8.2nF and the optional component C5 = 33pF.

[0063] exist Figure 3 The cutoff asymptotic gain of the linear wave shaper 20 filter at ω and Q can be estimated by the following equations (EQ1)-(EQ3).

[0064]

[0065] and

[0066]

[0067] and

[0068]

[0069] Furthermore, the linear wave shaper 20 may be fed via a summing circuit 30 around an operational amplifier U1B. In the summing circuit 30, the DAC signal may be amplified based at least in part on the ratio of R9 to R5. PulseDown and PulseUp signals from a processing device 10 (e.g., an MCU) may control MOSFET switches Q1A, Q1B, e.g., a DMN63D8LDW logic-level gate MOSFET pair, which are used to connect analog supply voltages U2 and U3 (e.g., 3.3V) to the summing circuit 30. By using switches Q1A and Q1B, a direct connection of a noisy digital power supply (supplying the MCU) to the audio circuitry is avoided, which may otherwise cause detectable interference. Figure 3 In the example, U1 is the first power supply voltage, such as -10V.

[0070] exist Figure 3 In the example shown, when PulseUp is high (i.e., Q1A is conducting), U1B's output voltage shifts -3.3V, multiplied by the ratio of R9 to R7. The same applies for PulseDown, but multiplied by the ratio of R9 to R8. Finally, R6 shifts U1's output downward using the -10V reference voltage. When all pulses are in their inactive states (PulseDown low, PulseUp high) and the DAC is at mid-range, the output of summing circuit 30 is approximately ground potential GND or higher, or approximately 0.4V, for maximum headroom. Of course, the absolute voltage values ​​described here depend on the specific component values ​​chosen.

[0071] Additionally, optional component C5 can limit the amplifier bandwidth to approximately 100 kHz to suppress very high frequency interference on the digital side of oscillator 100.

[0072] exist Figure 3 In this configuration, when PulseUp is pulsed to its active-low state, an output pulse of approximately 7V is generated (inverting the amplifier), and when PulseDown is pulsed to its active-high state, a pulse of -7V is generated. The DAC's control range is approximately + / -1V. Small DC voltage offsets due to offset inaccuracies are insignificant because linear wave shaper 20 has zero DC response. For U1B, one-quarter of a TL074 op amp can be used, with the remaining half buffering the MCUDAC output and providing the final line driver and amplifier for the output stage of oscillator 100.

[0073] The oscillator 100 according to various embodiments may generate a sawtooth pulse and / or various other waveforms at its output terminal OUT.

[0074] According to one embodiment, oscillator 100 can generate a sawtooth waveform at its output OUT. This can be achieved by arranging a pulse train with a small DC offset. In an analog system, a finite pulse train (generated by a clock circuit or an MCU) can be used to estimate Dirac delta. Figure 4A and Figure 4B This principle is explained and the derivative of an ideal sawtooth waveform is shown schematically. Figure 4A The arrows in describe the Dirac delta function, and the integral is expressed as the length of the arrow. Figure 4B The case of estimating Dirac delta from a finite-width pulse is shown. For example, the duty cycle of the finite pulse can be in the range of about 0.01-0.2. Figure 4B In the example, the duty cycle is about 0.05.

[0075] Approximation errors exist due to the finite pulse width and limited temporal resolution of the pulse timing. In audio applications, the highest frequency of interest may be f_max = 20 kHz. In this case, the maximum approximation error for a 0.5-1 μs pulse (duty cycle 0.01-0.02) is approximately less than or equal to -0.006 dB. Even for a 10 μs pulse (duty cycle 0.2), the error is approximately -0.6 dB.

[0076] To maintain a constant approximation error, oscillator 100 keeps the pulse length (as opposed to the duty cycle) fixed even when the oscillator frequency changes. Finite time resolution errors can be eliminated by quantizing the period to the nearest integer clock period. In audio-rate applications, the highest period of interest is a few kilohertz, extending the audio range to 20 kHz. The frequency resolution of a portion of oscillator 100 (with a master clock rate of 72 MHz) is then 2 kHz (36,000), or approximately 0.05 cents (of musical notation), significantly better than the resolution of human pitch perception. Thus, embodiments of the present invention are well-suited for audio-rate systems and can be easily extended to exceed audio rates in other applications by at least several octaves.

[0077] To generate the frequency-dependent DC bias component, the DAC generates a voltage proportional to the frequency. At a constant oscillation frequency, the DAC output is constant, so oscillator 100 is alias-free regardless of the DAC sampling rate. If the frequency varies, the frequency control signal is aliased based on the DAC sampling rate, but aliasing is minimal or absent in oscillator 100 according to various embodiments of the present invention.

[0078] After the pulse is generated, for example, Figure 4B In the embodiment, the pulse sequence can be preferably converted into a sawtooth wave.

[0079] In one embodiment, this conversion is performed by a linear wave shaper 20 comprising an integrator including an integrator pole slightly offset from the origin in the ideal integrator Laplace plane (in other words, the integrator drain), which shifts the transfer function from ω g / s changes to ω g / (s+p0), where p0 is a positive real number less than the relevant minimum frequency.

[0080] According to a preferred embodiment, the linear wave shaper 20 may include an integrator that is implemented by placing a zero at the origin and replacing the poles with complex pole pairs to provide a second-order bandpass response, which can be described by the following equation (EQ4):

[0081]

[0082] Where, ω c is the cutoff (corner) frequency, Q determines the number of peaks in the response, and the gain k = ω g / ω c , so as to obtain the same order asymptotic gain at high frequencies. In addition, the response H(s) is similar to the ideal response ω g The ratio of / s is as follows:

[0083]

[0084] Therefore, compared to the ideal case, when a low-frequency zero is added, a second-order high-pass filter (HPF) can be effectively used to filter the output signal. c is the cutoff value of HPF, and Q determines the response peak.

[0085] ω can be selected based on the choice of the relevant lowest frequency f_min c This choice may be influenced by the fact that the higher the cutoff value, the faster the DC offset error will settle (the less total energy therein).

[0086] Q can be chosen based on reducing the total amplitude or energy in response to a step input. For example, using a fixed ω c , numerically minimizing the peak of the filter step response, yields Q = 1.354.

[0087] In various embodiments, the oscillator 100 (including the linear wave shaper 20 described above) can generate an output signal that can be used to produce a sound that includes a slight bass boost and a slight high frequency droop, which can be advantageous depending on the application. As a result, the sound is warmer and more solid than an oscillator including a mathematically ideal integrator.

[0088] According to various embodiments of the present invention, it is important that the wave shaper 20 is substantially linear. This allows the summing device 30 to be moved before the wave shaper 20, i.e., the pulses generated by the processing device can be combined (e.g., summed) in the summing circuit 30, and then, advantageously, only the wave shaper 20 can be used to modify the total signal at the output of the summing circuit 30 and fed to the wave shaper 20.

[0089] Therefore, in contrast to known solutions, where N pulse arrays and N DAC signals are fed to N phase wave shapers, whose outputs are then summed to produce the final output waveform, in various embodiments of the present invention, the bias voltages may be digitally summed before conversion in the processing device 10 to combine the N DAC signals.

[0090] Therefore, the hardware required to generate N sawtooth waves can be reduced to a single linear wave shaper 20, a single DAC to generate the DAC signal, and N pulse wave generators. This can be achieved with the STM32 series microcontrollers, which include up to 12 independent timers (PWM generation) and a built-in 12-bit DAC. Such controllers are equipped with a wave shaper 20 and a summing circuit 30 (including a simple operational amplifier for the DAC and PWM outputs) to generate 12 sawtooth waves with independent frequencies and amplitudes.

[0091] In known solutions, for pulse summation, assuming that the pulse width multiplied by the number of oscillators is small relative to the oscillator period, 0s are summed to 1s most of the time, since typically only one pulse is in its active state at any given time. Therefore, in various embodiments of the present invention, the pulse trains can be digitally interleaved within processing device 10 to combine the pulses into a single pulse train, which is then output from a single pin of processing device 10.

[0092] However, in rare cases, pulses may overlap. In various embodiments, one or more overlapping pulses are not ignored, as this would result in a DC error with the same amplitude as the waveform being generated. Although the error is attenuated by the wave shaper 20, the glitch caused by ignoring one or more overlapping pulses is clearly detectable.

[0093] In various embodiments, the length of overlapping pulses may be increased to produce a single long pulse.

[0094] In some embodiments, this addition is achieved by starting a long pulse simultaneously with the first overlapping pulse 51 to be combined, forming a single long pulse that then continues to resolve the error at the correct DC level for a long period of time. In this case, the error pulse 52 is completely positive and provides primarily low-frequency energy. Figure 5AThis is illustrated where three completely overlapping pulses 51 are combined into a single long pulse 53, each overlapping pulse being 1 microsecond in length. Figure 5A A long pulse 53 is shown which starts at the pulse time of the overlapping pulse 51 . Figure 5A The amplitude in is relative to the peak-to-peak amplitude of the sawtooth wave.

[0095] According to another embodiment, the above-mentioned addition operation can be achieved by shifting the combined pulse 56 so that it appears symmetrically in time with the original overlapping pulse 54, thereby eliminating the low frequency portion of the error 55 and forming a single long pulse 56. Figure 5B This is illustrated in FIG, which shows a long pulse 56 occurring symmetrically around an overlapping pulse 54. Figure 5B In FIG. 5 , three completely overlapping pulses 54 are combined into a single long pulse 56 , with each overlapping pulse 54 being 1 microsecond in length. Figure 5B The amplitude in is related to the peak-to-peak amplitude of the sawtooth wave.

[0096] This embodiment (operation as Figure 5B The advantage of the above is that Figure 5A In the asymmetric case of , the error caused by increasing the pulse length of the overlapping pulses produces an audible delta function, a sharp full-bandwidth click. Figure 5B In the symmetrical case, if any of its energy even manifests itself in the audible frequency region, the error will result in a soft, very high frequency beeping sound.

[0097] In audio applications, as long as pulse overlap is relatively small, no audible degradation will occur. If pulse overlap becomes more frequent by increasing the frequency or the number of oscillators in the system, Figure 5A In the embodiment of , the error may appear as a vinyl-like crackling sound. Figure 5B As shown, this situation can be further alleviated by increasing the overlapping pulses.

[0098] Furthermore, the oscillator 100 according to various embodiments may generate a pulse wave.

[0099] A pulse wave can be generated by adding another pin that feeds a wave shaper to produce a falling edge. In one embodiment, this can be achieved using an inverting amplifier. In practice, two pulse streams can be generated, each output from a dedicated pin of the processing device 10 (e.g., a microcontroller).

[0100] According to some embodiments (where linear wave shaper 20 rejects any DC offset), the inverting amplifier (if any) can be omitted, and feeding the other pins directly and simply causes the pulse to be active low. In other words, when the pulse for generating a falling edge is not output, the pin of processing device 10 may be at the operating voltage of processing device 10. Therefore, with the DC offset removed by wave shaper 20, the short pulse will then appear as a downward pulse where the pin is temporarily grounded.

[0101] The oscillator 100 according to various embodiments may generate waveforms other than sawtooth waves and pulse waves.

[0102] Oscillator 100 can generate any combination of single ramps with overlapping rising and falling edges, the height of which can be controlled by adjusting the pulse duration. Furthermore, the direction and magnitude of the ramp components can be altered to produce triangular and other waveforms. Indeed, in some applications, this approach can be used to specify complex waveforms with piecewise linearity along the vertical edges.

[0103] According to one embodiment, the processing device 10 may be an STM32F103, comprising a DAC suitable for implementing the aforementioned complex waveform.

[0104] Various embodiments of the present invention allow for lower sampling rates to be used for the DAC (proportional only to the highest expected oscillator period, not the highest sinusoidal component of interest), without the need for explicit anti-aliasing operations to be performed in software.

[0105] The software in the processing device 10 may be provided with a list of oscillators (eg up to 16), each having a waveform, period in terms of the number of ticks of the master 72 MHz clock, phase and amplitude (given as pulse width).

[0106] For example, only sawtooth waveforms are considered, but pulse waveforms only need to drive other pulse generators with opposite polarity to produce a falling edge. This processing can be performed in a 0.5ms processing block. At each frequency, the next edge time can be determined based on the period and the current phase. The frequency-related data is stored in a binary stack and sorted according to the next edge time. The top of the binary stack is popped up, the corresponding edge (consisting of the start time and duration) is added to the edge list, the oscillator phase is advanced by one period, and it is reinserted into the binary stack. If the current edge overlaps with the previous edge, its length can be increased to form a combination of such edges. The above operation is repeated until the next edge time is later than the boundary of the current 0.5ms processing block. The oscillator parameters can be updated between processing blocks.

[0107] The edge list allows to build a list of wait times between pulses and the length of the individual pulses. Using DMA and burst mode in the timer, these can be fed to TIM8 compare channel 1.

[0108] Regarding the operation of the oscillator 100 according to some embodiments (e.g. Figure 3 If a pulse of length t_pulse is fed to the linear wave shaper 20, the wave shaper 20 outputs a pulse of height V_p-p=t_pulse*ω g *V_pulse edge, where V_pulse=-3.3V*(R9 / R7),ω g This is given in (EQ3). This is one edge of the sawtooth waveform. Also given is the peak voltage of the output waveform of the single oscillator 100. If the maximum pulse is 3 μs, the maximum peak voltage is approximately 140 mV.

[0109] Requiring no accumulated DC offset during the period of the oscillator 100, an equation for the DAC output value is obtained, according to which V_p-p=t_period*ω g *V_DAC, where t_period = 1 / f, the period of the resulting sawtooth wave and V_DAC is the amount the DAC must offset the output of the pulse summing circuit 30. This yields: V_DAC = (t_pulse / t_period) * V_pulse.

[0110] When multiple oscillators are running, the DAC output code is simply the sum of the corresponding codes. Note that the choice of the ratio (R5 / R7), pulse width (i.e., amplitude), and the maximum number of synchronized oscillators determines the frequency range over which the DAC can compensate for offsets. Based on our values, with a pulse width of 3μs, the range for 16 oscillators is 3kHz.

[0111] In various embodiments (where the linear wave shaper 20 has zero DC response), an offset may be applied to the DAC and effectively used as a bipolar, ramping up and down.

[0112] Figure 6 A synthesizer module 200 according to an embodiment of the present invention is schematically shown. The synthesizer module 200 may include at least one or more digitally controlled oscillators 100 according to an embodiment of the present invention. The synthesizer module 200 may further include a user interface 150 for controlling the at least one or more digitally controlled oscillators 100, wherein the user interface 150 is functionally connected to at least one input terminal 101 of the at least one or more digitally controlled oscillators 100.

[0113] According to various embodiments, the user interface 150 of the synthesizer module 200 may include various devices, such as knobs, for controlling the operation of the oscillator 100. Such devices may be used to select an output signal waveform, such as a sawtooth wave or a pulse wave, from the oscillator 100. The user interface 150 may further include various inputs and outputs, such as those in conventional synthesizer modules 200.

[0114] In various embodiments, the synthesizer module 200 may include a housing with all components arranged in the housing. The user interface 150 may be arranged in an outer surface of the housing.

[0115] Figure 7 A synthesizer module 300 according to an embodiment of the present invention is schematically shown. The synthesizer 300 may include at least one or more numerically controlled oscillators 100 according to an embodiment of the present invention. Alternatively, the synthesizer 300 may include a keyboard 160 (e.g., a musical instrument keyboard) comprising a plurality of keys, wherein the keyboard 160 is functionally connected to at least one input terminal 101 of at least one numerically controlled oscillator 100, and a speaker 250 is optionally connected to an output terminal OUT of at least one or more numerically controlled oscillators 100.

[0116] Alternatively, the synthesizer 300 may include a synthesizer module 200 according to some embodiments of the present invention. Thus, the synthesizer 300 may include the user interface 150 of the module 200. The user interface 150 may preferably be separate from the keyboard 160.

[0117] Furthermore, although electrically connected to the module 200, the keyboard 160 may be disposed integrally or separately.

[0118] Figure 8 A flow chart showing a method according to one embodiment of the present invention is shown.

[0119] However, it should be noted that the above Figures 1 to 7 The description of the present invention also applies to the methods according to some embodiments of the present invention. For example, the components used and the methods of use described herein may constitute part of the method embodiments. However, the methods according to the various embodiments of the present invention should not be interpreted as being limited to the methods of the present invention. Figures 1 to 7 content.

[0120] Thus, item 1001 may refer to the initial stage of the method, in which appropriate equipment and components, including but not limited to the oscillator 100, are obtained, and the system (e.g., an arrangement including the oscillator 100, the synthesizer module 200, and the synthesizer 300) is assembled and configured for operation.

[0121] Item 1010 may refer to generating a first pulse wave by the digital processing device 10, wherein the first pulse wave includes pulses using at least two different first frequencies.

[0122] According to one embodiment, the method may include generating, by the digital processing device 10 , a second pulse wave including pulses at at least two different second frequencies.

[0123] Item 1020 may refer to generating a total signal based on at least a first pulse wave.

[0124] Furthermore, in some embodiments, a total signal may be generated based on at least the first pulse wave and the second pulse wave.

[0125] Item 1030 may refer to total signal filtering through active filters to produce electronic audio signals.

[0126] At item 1099, execution of the method is stopped. The electronic audio signal may be fed to or injected into a speaker or a loudspeaker, thereby converting the electronic audio signal into sound.

[0127] The specific examples provided in the above description should not be construed as limiting the applicability and / or interpretation of the appended claims.Unless expressly stated otherwise, the lists of examples and groups of examples provided in the above description are not exhaustive.

Claims

1. A digitally controlled oscillator (100) for a synthesizer module (200), wherein: The oscillator (100) comprises: A digital processing device (10) capable of generating a first pulse wave at a first output terminal (PulseUp) of the processing device (10), wherein the first pulse wave comprises pulses having at least two different first frequencies; a summing circuit (30); wherein the first output terminal (PulseUp) of the processing device (10) is connected to a summing circuit (30), and the summing circuit (30) generates a total signal based on at least the first pulse wave; Characterized in that the oscillator (100) further comprises a linear wave shaper (20) comprising an integrator; and The total signal is fed to a linear wave shaper (20), wherein the linear wave shaper (20) can generate an output signal at an output terminal (OUT) of the oscillator (100) by modifying the total signal, wherein the output signal is an electronic audio signal including frequency components corresponding to at least two different first frequencies as fundamental frequency components, wherein the modification at least includes integrating the total signal.

2. The digitally controlled oscillator (100) according to claim 1, comprising a DC bias power supply, wherein the processing device is connected to the summing circuit (30) and can generate a DC bias voltage, wherein: The total signal is further generated based on the DC bias voltage.

3. The digitally controlled oscillator (100) according to any one of the preceding claims, further comprising a digital processing device (10) capable of generating a second pulse wave at a second output terminal (PulseDown) of the processing device (10), wherein: The second pulse wave comprises pulses with at least two different second frequencies, wherein a second output terminal (PulseDown) of the processing device (10) is connected to a summing circuit (30), and the summing circuit (30) generates a total signal at an output terminal based on at least the first pulse wave and the second pulse wave.

4. The digitally controlled oscillator (100) according to claim 3, wherein: The at least two different first frequencies correspond to at least two different second frequencies, respectively.

5. The digitally controlled oscillator (100) according to claim 1, wherein: The linear wave shaper (20) comprises an active filter.

6. The numerically controlled oscillator (100) according to claim 5, wherein: The active filter comprises: a first operational amplifier (U1A), whose output terminal is connected to the output terminal (OUT) of the oscillator (100), wherein the first operational amplifier (U1A) includes a non-inverting input terminal (+) and an inverting input terminal (-); a first resistor (R4; R11) connected between the output terminal and the inverting input terminal (-) of the first operational amplifier (U1A); a first capacitor (C1; C3) having a first terminal connected to the inverting input terminal (-), wherein a second terminal of the first capacitor (C1; C3) is connected to the input terminal of the linear wave shaper (20); and A second capacitor (C2; C4) is connected between the output of the first operational amplifier (U1A) and the second terminal of the first capacitor (C1; C3).

7. The digitally controlled oscillator (100) according to claim 2, wherein: The summing circuit (30) comprises a first input terminal and a second input terminal, wherein the first input terminal is connected to a first output terminal (PulseUp) of the processing device (10), and the second input terminal is connected to a DC bias power supply.

8. The digitally controlled oscillator (100) according to claim 2, wherein: The summing circuit (30) forms a single pulse wave (22) at a common coupling point (CCP) based on at least the first pulse wave and the voltage of a DC bias power supply, wherein the total signal is based on the single pulse wave (22).

9. The numerically controlled oscillator (100) according to claim 8, wherein: The summing circuit (30) includes a first semiconductor switch (Q1A), wherein the first semiconductor switch (Q1A) is controlled by its control terminal through a first pulse wave, wherein the first terminal of the first semiconductor switch (Q1A) is connected to a second power supply (U2), and the second terminal of the first semiconductor switch (Q1A) is connected to a common coupling point (CCP).

10. The numerically controlled oscillator (100) according to claim 9, wherein: The summing circuit (30) includes a second semiconductor switch (Q2A), wherein the second semiconductor switch (Q2A) is controlled by its control terminal through a second pulse wave, wherein a first terminal of the second semiconductor switch (Q2A) is connected to a third power supply (U3), and a second terminal of the second semiconductor switch (Q2A) is connected to a common coupling point (CCP).

11. The digitally controlled oscillator (100) according to claim 1, wherein: The summing circuit (30) includes - a digital buffer arranged between the common coupling point (CCP) and the linear wave shaper (20); or - an inverting amplifier (U1B) arranged between the common coupling point (CCP) and the linear wave shaper (20).

12. The digitally controlled oscillator (100) according to claim 2, wherein: The one DC bias supply is a digital-to-analog output (DAC) of the processing device (10).

13. The numerically controlled oscillator (100) according to claim 3, wherein: The summing circuit (30) generates the total signal at an output terminal based on at least the first pulse wave and the second pulse wave and a DC bias voltage.

14. The numerically controlled oscillator (100) according to claim 5, wherein: The one active filter is an active second-order bandpass filter.

15. The digitally controlled oscillator (100) according to claim 7, wherein: The DC bias power supply is a digital-to-analog output (DAC) of the processing device (10).

16. The numerically controlled oscillator (100) according to claim 7, wherein: The summing circuit (30) includes the first input terminal, the second input terminal and a third input terminal.

17. The numerically controlled oscillator (100) according to claim 16, wherein: The third input terminal is connected to the second output terminal (PulseDown) of the processing device (10).

18. The numerically controlled oscillator (100) according to claim 8, wherein: The summing circuit (30) forms a single pulse wave (22) at a common coupling point (CCP) based on at least the first pulse wave, the voltage of the DC bias power supply, and the second pulse wave.

19. The numerically controlled oscillator (100) according to claim 9, wherein: The one first semiconductor switch (Q1A) is a MOSFET.

20. The numerically controlled oscillator (100) according to claim 10, wherein The second semiconductor switch (Q2A) is a MOSFET.

21. A synthesizer module (200), characterized in that The synthesizer module (200) comprises at least one numerically controlled oscillator (100) according to any one of the preceding claims, and A user interface (150) for controlling at least one numerically controlled oscillator (100), wherein the user interface (150) is functionally connected to at least one input terminal (101) of the at least one numerically controlled oscillator (100).

22. A synthesizer (300), characterized in that The synthesizer (300) includes at least one numerically controlled oscillator (100) according to any one of claims 1 to 11, A keyboard (160) includes a plurality of keys, wherein the keyboard (160) is functionally connected to at least one input end (101) of at least one numerically controlled oscillator (100), and a speaker is optionally connected to an output end (OUT) of at least one numerically controlled oscillator (100).

23. The synthesizer (300) of claim 22, wherein: The one keyboard (160) is a musical instrument keyboard.

24. A method for generating an electronic audio signal, wherein: The method comprises: generating (1010) a first pulse wave by a digital processing device (10), wherein the first pulse wave comprises pulses having at least two different first frequencies; generating (1020) a total signal based on at least the first pulse wave; Characterized in that the method includes Signal filtering (1030) is performed by a linear wave shaper (20) comprising an integrator capable of generating an electronic audio signal comprising frequency components corresponding to at least two different first frequencies as fundamental frequency components, wherein the filtering comprises at least integrating the total signal.

25. The method according to claim 24, comprising generating a second pulse wave by a digital processing device (10), wherein the second pulse wave comprises pulses with at least two different second frequencies; and A total signal is generated based on at least the first pulse wave and the second pulse wave.

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