A pad selection method and device, electronic equipment and medium

Abstract

This application provides a pad selection method, apparatus, device, and medium. The method includes: reading all pin parameters and determining initial pad information for each pin based on the pin parameters. The initial pad information includes pad coordinate parameters and initial pad size information. The chip region is divided according to all pad coordinate parameters to obtain multiple sub-regions. The initial pad size information corresponding to the pin is updated according to the type of the sub-region to obtain pad size information. This application defines the pad corresponding to each pin based on the pin parameters to obtain initial pad information, divides the chip region according to the pad coordinate parameters in the initial pad information to obtain multiple sub-regions, and redefines the pad size information according to the type of the sub-region to obtain the final pad information, including pad size information. This avoids the problems of low efficiency and low accuracy caused by manual methods.

Description

Technical Field

[0001] This application relates to the field of packaging technology, and in particular to a pad selection method, apparatus, electronic device, and computer-readable storage medium. Background Technology

[0002] Printed Circuit Boards (PCBs) are a crucial component of the electronics industry. Almost every electronic device, from small items like watches and calculators to large systems like computers, communication devices, and military weaponry, relies on PCBs for electrical interconnection of integrated circuits and other electronic components. The smallest unit in a PCB file is the PCB package. The PCB package represents the actual electronic component, chip, and other components graphically for quick reference during PCB design. It is also the sole medium for soldering components onto the actual PCB, so its design quality directly impacts the overall PCB design. BGA (Ball Grid Array) devices, with their high reliability, high integration, and good coplanarity, have become a major trend in the electronics assembly industry. However, their numerous pins and small spacing place higher demands on PCB package design quality. Especially for BGA devices with irregular pin arrangements, current software cannot quickly create libraries.

[0003] Currently, the most common method for selecting pads for complex BGA packages is for engineers to manually locate the pins in the design software based on the pin layout information in the device datasheet. However, this method is inefficient and requires attention to parameters such as pin orientation, position, and sequence, making it difficult to guarantee accuracy.

[0004] Therefore, how to provide a solution to the above-mentioned technical problems is a problem that needs to be solved by those skilled in the art. Summary of the Invention

[0005] The purpose of this application is to provide a method, apparatus, electronic device, and computer-readable storage medium for selecting solder pads, avoiding the problems of low efficiency and low accuracy caused by manual methods. The specific solution is as follows:

[0006] This application provides a pad selection method, including:

[0007] Read all pin parameters and determine the initial pad information corresponding to each pin based on the pin parameters. The initial pad information includes pad coordinate parameters and initial pad size information.

[0008] The chip region is divided into multiple sub-regions based on all the pad coordinate parameters.

[0009] The initial pad size information corresponding to the pin is updated according to the type of the sub-region to obtain the pad size information.

[0010] Preferably, determining the initial pad information corresponding to each pin based on the pin parameters includes:

[0011] A package file is created based on all the pin parameters, including pin size and pin coordinates;

[0012] Set all the pins to the coordinate system of the package file;

[0013] Based on the pin size, pin coordinates, and pin spacing of the target pin, the initial pad information of the target pin is determined, so as to obtain the initial pad information corresponding to each pin, wherein the pin spacing is the distance between the target pin and other pins.

[0014] Preferably, determining the initial pad information of the target pin based on the pin size, pin coordinates, and pin spacing, so as to obtain the initial pad information corresponding to each pin, includes:

[0015] Determine whether there are other pins within a preset range of the pin coordinates of the target pin;

[0016] If the other pins do not exist, the corresponding initial pad size information is determined based on the pin size of the target pin.

[0017] If the other pins exist, then obtain the minimum pin spacing between the target pin and the other pins;

[0018] Based on the minimum pin pitch and the pin size of the target pin, determine the corresponding initial pad size information;

[0019] Iterate through the other pins until all the initial pad size information is determined;

[0020] The corresponding pad coordinate parameters are determined based on the pin coordinates to obtain the initial pad information.

[0021] Preferably, the step of dividing the chip region according to all the pad coordinate parameters to obtain multiple sub-regions includes:

[0022] Read the pad row number information of at least one type of sub-region;

[0023] The chip region is divided according to the number of pad rows to obtain multiple sub-regions.

[0024] Preferably, when the sub-region is an edge region, the corresponding step of updating the initial pad size information corresponding to the pin according to the type of the sub-region to obtain the pad size information includes:

[0025] Obtain the first initial pad information of the pads to be processed in the edge region;

[0026] Based on the pad coordinate parameters of the pad to be processed, obtain the second initial pad information of the pad closest in the corresponding direction;

[0027] The size of the pad to be processed is optimized based on the first initial pad information and the second initial pad information in order to update the initial pad size information of the pad to be processed and obtain the corresponding pad size information.

[0028] Preferably, optimizing the size of the pad to be processed based on the first initial pad information and the second initial pad information includes:

[0029] The pad edge spacing is obtained based on the first initial pad information and the second initial pad information, and the optimized spacing is determined based on the pad edge spacing and the allowable pad shape reduction value.

[0030] Determine whether the optimized spacing is greater than the preset threshold after increasing the trace;

[0031] If the optimized spacing is greater than the preset threshold after adding traces, then the size of the pad to be processed is reduced to obtain the pad size information, so that the optimized pad edge spacing is greater than the preset threshold after adding traces.

[0032] Preferably, when the sub-region is the central region, the step of updating the initial pad size information corresponding to the pin according to the type of the sub-region to obtain the pad size information includes:

[0033] When the pads in the central region are regular traces, the initial pad size information of the pads in the central region is determined as the pad size information, wherein the initial pad size information is standard size information;

[0034] When the pads in the central region are non-standard outgoing lines, the third initial pad information of the pads to be processed in the central region will be obtained.

[0035] The fourth initial pad information is obtained based on the pad coordinate parameters of the pad to be processed, which is the closest pad in the corresponding direction;

[0036] The size of the pad to be processed is optimized based on the third initial pad information and the fourth initial pad information, so as to update the initial pad size information in the third initial pad information to obtain the pad size information.

[0037] Preferably, when the sub-region is a corner region, the step of updating the initial pad size information corresponding to the pin according to the type of the sub-region to obtain the pad size information includes:

[0038] The initial pad size information of the pads in the corner area is determined as the pad size information, wherein the initial pad size information is larger than the standard size information.

[0039] This application provides a pad selection device, including:

[0040] The pad predefined module is used to read all pin parameters and determine the initial pad information corresponding to each pin based on the pin parameters. The initial pad information includes pad coordinate parameters and initial pad size information.

[0041] The region division module is used to divide the chip region according to all the pad coordinate parameters to obtain multiple types of sub-regions;

[0042] The pad definition module is used to update the initial pad size information corresponding to the pin according to the type of the sub-region, so as to obtain the pad size information.

[0043] This application provides an electronic device, including:

[0044] Memory, used to store computer programs;

[0045] A processor for executing the computer program to implement the steps of the pad selection method as described above.

[0046] This application provides a computer-readable storage medium storing a computer program that, when executed by a processor, implements the steps of the pad selection method described above.

[0047] This application provides a pad selection method, including: reading all pin parameters and determining the initial pad information corresponding to each pin based on the pin parameters, wherein the initial pad information includes pad coordinate parameters and initial pad size information; dividing the chip area according to all pad coordinate parameters to obtain multiple sub-regions; and updating the initial pad size information corresponding to the pin according to the type of the sub-region to obtain pad size information.

[0048] As can be seen, this application defines the pads corresponding to each pin based on the pin parameters to obtain initial pad information. Then, based on the pad coordinate parameters in the initial pad information, the chip area is divided into multiple sub-regions. The pad size information is then defined again based on the type of the sub-region to obtain the final pad information, which includes pad size information. This avoids the inefficiency and low accuracy problems caused by manual methods. This application also provides a pad selection device, electronic equipment, and computer-readable storage medium, which have the aforementioned beneficial effects, and will not be elaborated further here. Attached Figure Description

[0049] To more clearly illustrate the technical solutions in the embodiments of this application or the prior art, the drawings used in the description of the embodiments or the prior art will be briefly introduced below. Obviously, the drawings described below are only embodiments of this application. For those skilled in the art, other drawings can be obtained based on the provided drawings without creative effort.

[0050] Figure 1 A flowchart illustrating a pad selection method provided in this application embodiment;

[0051] Figure 2 A schematic diagram of pin parameters provided for an embodiment of this application;

[0052] Figure 3 A schematic diagram of a pin array provided in an embodiment of this application;

[0053] Figure 4 This is a schematic diagram of a chip region division structure provided in an embodiment of this application;

[0054] Figure 5 An optimized structural schematic diagram provided for an embodiment of this application;

[0055] Figure 6 This is a schematic diagram of the structure of a pad selection device provided in an embodiment of this application;

[0056] Figure 7 This is a schematic diagram of the structure of an electronic device provided in an embodiment of this application. Detailed Implementation

[0057] To make the objectives, technical solutions, and advantages of the embodiments of this application clearer, the technical solutions of the embodiments of this application will be clearly and completely described below with reference to the accompanying drawings. Obviously, the described embodiments are only some embodiments of this application, not all embodiments. Based on the embodiments of this application, all other embodiments obtained by those skilled in the art without creative effort are within the scope of protection of this application.

[0058] Currently, the commonly used method for selecting pads in complex BGA packages is for engineers to manually locate the pins in the design software based on the pin layout information in the device datasheet. However, this method is inefficient and requires attention to parameters such as pin direction, position, and sequence, making it difficult to guarantee accuracy.

[0059] To address the aforementioned technical issues, this embodiment provides a pad selection method. It defines the pad corresponding to each pin based on pin parameters to obtain initial pad information. Then, based on the pad coordinate parameters in the initial pad information, the chip area is divided into multiple sub-regions. The pads are then redefined according to the type of each sub-region to obtain the final pad information. This method avoids the low efficiency and accuracy problems caused by manual methods. Please refer to [link / reference] for details. Figure 1 , Figure 1 A flowchart of a pad selection method provided in this application embodiment specifically includes:

[0060] S101. Read all pin parameters and determine the initial pad information corresponding to each pin based on the pin parameters. The initial pad information includes pad coordinate parameters and initial pad size information.

[0061] In this step, we obtain the pin parameters from the manufacturer's documentation. These pin parameters include, but are not limited to, pin number, pin size, and pin coordinates. Please refer to [link / reference needed]. Figure 2 , Figure 2 This is a schematic diagram of pin parameters provided in an embodiment of this application. Each pin corresponds to a pad. The initial pad information for each pin is determined based on the pin parameters. The initial pad information includes, but is not limited to, pad coordinate parameters and initial pad size information. It is understood that the pin coordinates of each pin are defined in the corresponding pad coordinate parameters. Therefore, each pad corresponds to one pin. However, due to changes in the center coordinates, the pad coordinate parameters and pin coordinates may not be numerically consistent, but the relative positional relationship between the pins is corresponding. It is understood that in this embodiment, all pins form a pin array. For the corresponding information, please refer to... Figure 3 , Figure 3 This is a schematic diagram of a pin array provided in an embodiment of this application, wherein each circle represents a pin.

[0062] In one feasible implementation, the initial pad information corresponding to each pin is determined based on the pin parameters, specifically including:

[0063] S1011. Create a package file based on all pin parameters, including pin size and pin coordinates;

[0064] S1012. Set all pins to the coordinate system of the package file;

[0065] A package file is created based on all pin parameters. A coordinate system, specifically a two-dimensional coordinate system, is established within the package file. All pins are defined in the package file, meaning all pins are represented as points in the coordinate system of the package file. This embodiment does not limit the origin of the coordinate system; users can customize the setting. Preferably, the origin is the center of the pin array, i.e., the center of the pad array.

[0066] S1013. Determine the initial pad information of the target pin based on the pin size, pin coordinates and pin spacing, so as to obtain the initial pad information corresponding to each pin. The pin spacing is the distance between the target pin and other pins.

[0067] A target pin is identified from all the pins. The pin parameters of this target pin include the corresponding pin size and pin coordinates. This embodiment does not limit the method of determining the initial pad information of the target pin based on the pin size and pin spacing. Users can customize the settings as long as they achieve the purpose of this embodiment. The initial pad information includes, but is not limited to, pad coordinate parameters and initial pad size information.

[0068] In one feasible implementation, step S1013 includes: obtaining the pin spacing between the target pin and all other pins; determining the minimum pin spacing from the pin spacings; and determining the initial pad size information in the initial pad information based on the minimum pin spacing. Since the pin spacing is different in each sub-region, the corresponding initial pad size information is determined differently. Of course, all initial pad size information can also be set to standard size information. This embodiment does not limit this, as long as the purpose of this embodiment can be achieved.

[0069] In another possible implementation, step S1013 includes: determining whether there are other pins within a preset range of the pin coordinates of the target pin; if there are no other pins, determining the corresponding initial pad size information based on the pin size of the target pin; if there are other pins, obtaining the minimum pin spacing between the target pin and other pins; determining the corresponding initial pad size information based on the minimum pin spacing and the pin size of the target pin; traversing other pins until all initial pad size information is determined; and determining the corresponding pad coordinate parameters based on the pin coordinates to obtain the initial pad information.

[0070] This embodiment does not limit the preset range. For example, if the target pin coordinates are (Xa, Ya), and other pins are selected within the range of this pin R, if any, the pin coordinates (Xb, Yb) must satisfy Xa - R < Xb < Xa + R and Ya - R < Yb < Ya + R. Specifically, if the target pin coordinates are (5, 5) and other pins within the range of 1 are obtained, then the other pins must satisfy 4 < x < 6 and 4 < y < 6. According to the minimum pin pitch and the pin size of the target pin, the corresponding initial pad size information is determined, and all other pins are traversed until all pads are predefined to obtain the pad information.

[0071] S102. Divide the chip area according to all pad coordinate parameters to obtain multiple types of sub-areas;

[0072] Dividing the chip area according to the pad coordinate parameters can specifically be based on the coordinate data specified by the user, and then divided into multiple types of sub-areas according to the pad coordinate parameters; it can also be automatically divided into multiple types of sub-areas according to the size of the pins. The number of sub-areas in this embodiment is not limited, and the user can set it according to actual needs, which can be 3 types, 4 types or other types, as long as the purpose of this embodiment can be achieved. Specifically, taking three types of sub-areas as an example, please refer to Figure 4 , Figure 4 which is a schematic structural diagram of chip area division provided by an embodiment of the present application, including a central area ①, an edge area ②, and a corner area ③.

[0073] In an implementable embodiment, S102 includes:

[0074] S1021. Read the pad row number information of at least one type of sub-area;

[0075] S1022. Divide the chip area according to the pad row number information to obtain multiple types of sub-areas.

[0076] In this embodiment, the pad row number information of at least one type of sub-area is arbitrarily selected.

[0077] It can be understood that when the number of sub-areas is 3. When the selected sub-area is the corner area, the pad row number information of the corner area is obtained at this time. At this time, when the origin is at the center, the pad row number information includes the corresponding x coordinate value and y coordinate value. When there are the same x coordinate value or y coordinate value in other pad coordinate parameters, it is determined as the edge area, and when there are no same x coordinate value and y coordinate value in other pad coordinate parameters, it is determined as the central area.

[0078] When the selected sub-region is the center region, the pad row number information of the center region is obtained. At this time, when the origin is in the center, the pad row number information includes the corresponding x-coordinate value and y-coordinate value. When other pad coordinate parameters have the same x-coordinate value or y-coordinate value, it is determined as an edge region. When other pad coordinate parameters do not have the same x-coordinate value or y-coordinate value, it is determined as a corner region.

[0079] When the selected sub-region is an edge region, the pad row number information of the edge region is obtained. At this time, when the origin is in the center, the pad row number information includes the corresponding x-coordinate value and y-coordinate value. When there is the same x-coordinate value in the coordinate parameters of other pads, it is determined as the center region. When there is the same y-coordinate value in the coordinate parameters of other pads, it is determined as the corner region.

[0080] Users can make custom choices, as long as they can achieve the purpose of this embodiment.

[0081] S103. Update the initial pad size information corresponding to the pin according to the type of the sub-region to obtain the pad size information.

[0082] The initial pad size information corresponding to the pin is updated according to the type of the sub-region to obtain the pad size information, which is then used to update the initial pad information and obtain the pad information. Among them, the pads in the central region ① are usually connected to power / ground signals or directly drilled to the inner layer of the single board for traces, and are handled in a conventional manner; the pads in the edge region ② need to consider signal traces and increase the number of traces as much as possible; the pads in the corner region ③ need to consider the thermal stress of soldering around them to prevent component soldering misalignment and thermal deformation of thin components, and the pad size in this region should be appropriately increased.

[0083] In one feasible implementation, when the sub-region is an edge region, S103 includes:

[0084] S1031a. Obtain the first initial pad information of the pads to be processed in the edge region;

[0085] The pad to be processed is any pad in the edge region.

[0086] S1032a. Obtain the second initial pad information of the pad closest to the pad in the corresponding direction based on the pad coordinate parameters of the pad to be processed;

[0087] It is understood that the edge region in this embodiment includes four regions: the upper edge region, the lower edge region, the left edge region, and the right edge region. It is understood that the left and right edge regions are horizontal traces, so the gap between the upper and lower pads is considered; while the upper and lower edges are vertical, so the gap between the left and right pads is considered.

[0088] S1033a. Optimize the size of the pad to be processed based on the first initial pad information and the second initial pad information, so as to update the initial pad size information of the pad to be processed and obtain the corresponding pad size information.

[0089] During the packaging process, the trace width between pads is 3 mil, while the spacing between traces or between traces and pads can be 4 mil, allowing for a 3 mil reduction in pad shape. Therefore, when the distance between the pad to be processed and the nearest pad does not meet the specifications, the shape and size of the pad to be processed need to be optimized to meet the trace requirements.

[0090] Specifically, S1033a may include: determining the size of the pad to be processed based on the first initial pad information and the second initial pad information to meet the trace requirements. For example, the first initial pad information includes first pad coordinate parameters, and the second initial pad information includes second pad coordinate parameters. The pin spacing is obtained based on the first and second pad coordinate parameters. When a trace is allowed between two pads, and both pads are circular and the same size, the maximum radius of the pad is (pin spacing - 4 - 4 - 3) / 2. When two traces are allowed between two pads, and both pads are circular and the same size, the maximum radius of the pad is (pin spacing - 4 - 4 - 3 - 3 - 4) / 2. The pad size information is then updated according to the actual requirements based on the calculated radius value.

[0091] Specifically, S1033a may include: obtaining the pad edge spacing based on the first initial pad information and the second initial pad information, and determining the optimized spacing based on the pad edge spacing and the allowable pad shape reduction value; determining whether the optimized spacing is greater than the preset threshold after adding traces; if the optimized spacing is greater than the preset threshold after adding traces, reducing the size of the pad to be processed to obtain the pad size information, so that the optimized pad edge spacing is greater than the preset threshold after adding traces.

[0092] Specifically, the initial pad information includes initial pad size information. The pad edge spacing is obtained based on the first and second initial pad information. It is determined whether adding a reduction value to the spacing increases the number of traces. If so, the shape corresponding to the pad size information is optimized to an ellipse; otherwise, no adjustment is made to the pad. For example, please refer to... Figure 5 , Figure 5 This is a schematic diagram of an optimized structure provided in an embodiment of this application. The pad to be processed is a 12mil circle with a pad edge spacing of 15mil, which can only accommodate one trace. To accommodate two traces, the required spacing is 4+3+4+3+4=18mil. Figure 5 In this context, 4 represents the spacing requirement and 3 represents the line width requirement. That is, the pad to be processed needs to be reduced by 3mil, which is less than or equal to the reduction value of the pad shape. In this case, the optimized pad is a 9*12mil ellipse.

[0093] In another possible implementation, when the sub-region is a corner region, S103 includes:

[0094] The initial pad size information of the pads in the corner area is determined as the pad size information, wherein the initial pad size information is larger than the standard size information.

[0095] Among them, the number of pads in the corner area is small and there are two outgoing directions. The outgoing lines are not considered. However, since they are distributed in the four corners of the device, the thermal stress of the welding around the perimeter needs to be considered to prevent the device from being misaligned and the thin device from being deformed by heat. Therefore, the pad size information in this area is larger than the standard size information.

[0096] In another possible implementation, when the sub-region is the central region, S103 includes: when the pads in the central region are regular traces, the initial pad size information of the pads in the central region is determined as pad size information, wherein the initial pad size information is standard size information; when the pads in the central region are non-regular traces, the third initial pad information of the pads to be processed in the central region is obtained; the fourth initial pad information of the pad closest in the corresponding direction is obtained according to the pad coordinate parameters of the pads to be processed; the size of the pads to be processed is optimized according to the third initial pad information and the fourth initial pad information, so as to update the initial pad size information in the third initial pad information to obtain the pad size information.

[0097] The central area is typically used for power / ground signals or for direct vias to the inner layers of the board, so no wiring considerations or pad adjustments are needed. However, in special cases where wiring considerations are required, it can be treated as an edge area, which will not be elaborated upon in this embodiment.

[0098] As can be seen, the pad selection method provided in this embodiment has high design efficiency. A complex KPIN BGA device can complete the library construction in a few minutes with high accuracy. The software automatically implements this, requiring only the pad selection rules to be provided. The risk of PCB failure to output traces is minimized during the package library construction stage, achieving optimal pad selection. Automatic pad selection and positioning are realized.

[0099] Based on the above technical solution, this embodiment defines the pad corresponding to each pin according to the pin parameters to obtain the initial pad information, and divides the chip area into multiple sub-regions according to the pad coordinate parameters in the initial pad information. The pad size information is then defined again according to the type of the sub-region to obtain the final pad information. The pad information includes the pad size information, which avoids the problems of low efficiency and low accuracy caused by manual operation.

[0100] Based on the above embodiments, this embodiment provides a specific method for selecting solder pads, including:

[0101] A. General rule predefined pads:

[0102] A1. Obtain pin parameters according to the manufacturer's data. The pin parameters include information such as pin numbers, pin sizes, and pin coordinates.

[0103] A2. Establish a two-dimensional coordinate system in the package file and predefined all pins into the package file. That is, all pins are represented as points in the coordinate system. It is recommended to place the origin of the coordinate system at the center of the pad array.

[0104] A3. Obtain the coordinates (Xa, Ya) of the target pin A, and select other pins within the range of the target pin R. If any, the pin coordinates (Xb, Yb) must satisfy Xa - R < Xb < Xa + R and Ya - R < Yb < Ya + R. For example, if the coordinates of the target pin A are (5, 5) and other pins within the range of 1 are obtained, then other pins must satisfy 4 < x < 6 and 4 < y < 6.

[0105] A4. If there are no pins that meet the requirements, select a suitable pad according to the pin size.

[0106] A5. If there are pins that meet the requirements, traverse these pin coordinates (X0, Y0) to obtain the distance from the target pin A and obtain the minimum pin distance.

[0107] A6. Determine the initial pad information of the target pin according to the pin size and the minimum pin distance. Among them, define the pad at the position of pin A in the coordinate system.

[0108] A7. Similarly, traverse other pins until the initial pad information is obtained after all pins have been defined with pads.

[0109] B. Custom three-region division implementation process:

[0110] B1. Obtain the initial pad information.

[0111] B2. Split the coordinates, put the x / y values into arrays A / B respectively, and sort them in ascending order according to the numerical values. For example, if there are now 4 pad coordinates (1, 2), (4, 5), (-1, -3), (-2, 1), then array A is (-2, -1, 1, 4), and array B is (-3, 1, 2, 5).

[0112] B3. Obtain the user-defined number of peripheral special pad rows (information on the number of pad rows in the corner area), and take the corresponding number of items from arrays A / B, placing them into arrays Ax / By. For example, if array A is currently (-4, -3, -2, -1, 0, 1, 2, 3, 4) and array B is (-3, -2, -1, 0, 1, 2, 3), and we select the two outermost rows of pads as special pads, then array Ax will be (-4, -3, 3, 4), and array By will be (-3, -2, 2, 3). Peripheral special pads can also be distinguished by coordinate values. For example, if the input x-axis boundary value is -3.5 and 3.5, then array Ax will be (-4, 4).

[0113] B4. Traverse the coordinates of each pad, determine its location based on the match with the Ax / By array, and place it into regions Z1 / Z2 / Z3. For example:

[0114] The pad coordinates are (1, 1), the x-coordinate is not in Ax, and the y-coordinate is not in By, which means it belongs to the central area pad.

[0115] The pad coordinates are (-3, -3), with the x-coordinate in Ax and the y-coordinate in By, which belongs to the corner area pad.

[0116] The pad coordinates are (3, 1), the x-coordinate is in Ax, and the y-coordinate is not in By, which belongs to the edge region Z2a pad;

[0117] The pad coordinates are (2, -2), the x coordinate is not in Ax, and the y coordinate is in By, which belongs to the edge region Z2b pad;

[0118] The edge area is divided into two groups, Z2a and Z2b, to facilitate special handling of the pads in the Z2 area below. The Z2a pads are located on the left and right sides of the BGA, while the Z2b pads are located on the top and bottom sides of the BGA.

[0119] C. Special treatment of chip area pads.

[0120] The central area pads are usually connected to power / ground signals or directly drilled to the inner layer of the board for traces. There is no need to consider the traces and no need to adjust the pads (in special cases where traces need to be considered, they can be handled according to the Z2 pad rules).

[0121] The corner areas have fewer pads and two routing directions, so routing is not considered. However, since they are located at the four corners of the device, the thermal stress from soldering around them needs to be taken into account to prevent component misalignment and thermal deformation of thin components. Therefore, the pad dimensions in this area are larger than the standard dimensions. The method is relatively simple and will not be described in detail.

[0122] The explanation focuses on the edge region:

[0123] C1. User inputs trace width, trace spacing, and allowable pad size reduction. For example, the required trace width between pads is 3mil, the trace-to-trace and trace-to-pad spacing is 4mil, and the allowable pad size reduction is 3mil.

[0124] C2. Obtain the initial pad information of the pads to be processed in region Z2a / Z2b, including the initial pad size information and pad coordinate parameters.

[0125] C3. Based on the pad coordinate parameter p, obtain the coordinates of the nearest pads a and b on both sides and the initial pad size information. If p is in region Z2a, then take the nearest pads on the top and bottom sides; if p is in region Z2b, then take the nearest pads on the left and right sides.

[0126] C4. Obtain the edge spacing between two pads and determine if adding a reduction value to the spacing increases the number of traces. If so, optimize the shape corresponding to the pad size information to an ellipse; otherwise, do not adjust the pads. For example: if the pad size information corresponds to a 12mil circle, and the pad edge spacing is 15mil, only one trace can pass through. To allow two traces to pass through, the required spacing is 4+3+4+3+4 = 18mil (e.g., ...). Figure 5 On the right, 4 represents the spacing requirement and 3 represents the line width requirement. That is, the pad needs to be reduced by 3mil, which is less than or equal to the reduction value of the pad shape. Then the optimized pad is a 9*12mil ellipse.

[0127] The following describes a pad selection device provided in an embodiment of this application. The pad selection device described below can be referred to in correspondence with the pad selection method described above. Figure 6 , Figure 6 A schematic diagram of a pad selection device provided in this application embodiment includes:

[0128] The pad predefined module 201 is used to read all pin parameters and determine the initial pad information corresponding to each pin based on the pin parameters. The initial pad information includes pad coordinate parameters and initial pad size information.

[0129] The region division module 202 is used to divide the chip region according to all pad coordinate parameters to obtain multiple types of sub-regions;

[0130] The pad definition module 203 is used to update the initial pad size information corresponding to the pin according to the type of the sub-region, so as to obtain the pad size information.

[0131] Preferably, the pad predefined module 201 includes:

[0132] The package file creation unit is used to create a package file based on all pin parameters, including pin size and pin coordinates.

[0133] The setting unit is used to set all pins to the coordinate system of the package file;

[0134] The initial pad information determination unit is used to determine the initial pad information of the target pin based on the pin size, pin coordinates and pin spacing, so as to obtain the initial pad information corresponding to each pin, and the pin spacing is the distance between the target pin and other pins.

[0135] Preferably, the initial pad information determination unit includes:

[0136] The judgment subunit is used to determine whether there are other pins within a preset range of the pin coordinates of the target pin;

[0137] The first determining subunit is used to determine the corresponding initial pad size information based on the pin size of the target pin if no other pins exist.

[0138] Get sub-unit, used to obtain the minimum pin spacing between the target pin and other pins if other pins exist;

[0139] The second determining subunit is used to determine the corresponding initial pad size information based on the minimum pin pitch and the pin size of the target pin.

[0140] Traverse the sub-cells to iterate over other pins until all initial pad size information is determined;

[0141] The initial pad information determination subunit is used to determine the corresponding pad coordinate parameters based on the pin coordinates in order to obtain the initial pad information.

[0142] Preferably, the region division module 202 includes:

[0143] A reading unit is used to read pad row number information for at least one type of sub-region;

[0144] The partitioning unit is used to divide the chip area into multiple sub-regions based on the number of pad rows.

[0145] Preferably, when the sub-region is an edge region, the corresponding pad definition module 203 includes:

[0146] The first initial pad information acquisition unit is used to acquire the first initial pad information of the pads to be processed in the edge region;

[0147] The second initial pad information acquisition unit is used to acquire the second initial pad information of the pad closest in the corresponding direction based on the pad coordinate parameters of the pad to be processed.

[0148] The optimization unit is used to optimize the size of the pad to be processed based on the first initial pad information and the second initial pad information, so as to update the initial pad size information of the pad to be processed and obtain the corresponding pad size information.

[0149] Preferably, the optimization unit includes:

[0150] The optimized spacing determination subunit is used to obtain the pad edge spacing based on the first initial pad information and the second initial pad information, and to determine the optimized spacing based on the pad edge spacing and the allowable pad shape reduction value.

[0151] The judgment sub-unit is used to determine whether the optimized spacing is greater than the preset threshold after adding traces;

[0152] The size reduction subunit is used to reduce the size of the pad to be processed if the optimized spacing is greater than the preset threshold after increasing the traces, so as to obtain the pad size information and make the optimized pad edge spacing greater than the preset threshold after increasing the traces.

[0153] Preferably, when the sub-region is the central region, the corresponding pad definition module 203 includes:

[0154] The size determination unit is used to determine the initial pad size information of the pad in the center area as the pad size information when the pad in the center area is a regular outgoing line. The initial pad size information is standard size information.

[0155] The third initial pad information acquisition unit is used to acquire the third initial pad information of the pad to be processed in the central area when the pad in the central area is an unconventional outgoing line.

[0156] The fourth initial pad information acquisition unit is used to acquire the fourth initial pad information of the nearest pad in the corresponding direction based on the pad coordinate parameters of the pad to be processed.

[0157] The optimization unit is used to optimize the size of the pad to be processed based on the third initial pad information and the fourth initial pad information, so as to update the initial pad size information in the third initial pad information to obtain the pad size information.

[0158] Preferably, when the sub-region is a corner region, the corresponding pad definition module 203 includes:

[0159] The size determination unit is used to determine the initial pad size information of the pads in the corner area as the pad size information, wherein the initial pad size information is larger than the standard size information.

[0160] Since the embodiments of the apparatus and the embodiments of the method correspond to each other, please refer to the description of the embodiments of the method for the embodiments of the apparatus, which will not be repeated here.

[0161] The following describes an electronic device provided by an embodiment of this application. The electronic device described below can be referred to in correspondence with the method described above. Please refer to... Figure 7 , Figure 7 A schematic diagram of the structure of an electronic device provided in this application embodiment includes:

[0162] Memory 300 is used to store computer programs;

[0163] The processor 400 is used to implement the steps of the pad selection method described above when executing computer programs.

[0164] It may also include: an input / output interface 500 and a network port 600. The memory 300 includes a non-volatile storage medium and internal memory. The non-volatile storage medium stores the operating system and computer-readable instructions, and the internal memory provides an environment for the operation of the operating system and computer-readable instructions in the non-volatile storage medium. The processor 400 may be a Central Processing Unit (CPU), or other general-purpose processors, digital signal processors (DSPs), application-specific integrated circuits (ASICs), field-programmable gate arrays (FPGAs), or other programmable logic devices, discrete gate or transistor logic devices, discrete hardware components, etc. The general-purpose processor may be a microprocessor or any conventional processor. The processor 400 provides computing and control capabilities for the electronic device, and when executing the computer program stored in the memory 300, it can implement the steps of the pad selection method. The input / output interface 500 is used to acquire externally imported computer programs, parameters, and instructions, which are then stored in the memory 300 under the control of the processor 400. The input / output interface 500 can be connected to an input device to receive parameters or commands manually input by the user. This input device can be a touch layer covering the display screen, a button, trackball, or touchpad on the terminal casing, or a keyboard, touchpad, or mouse. Specifically, in this embodiment, the user can initiate the pad selection method through the input / output interface 500. The network port 600 is used for communication connections with external terminal devices. The communication technology used for this connection can be wired or wireless, such as Mobile High Definition Link (MHL), Universal Serial Bus (USB), High Definition Multimedia Interface (HDMI), Wireless Fidelity (WiFi), Bluetooth, Bluetooth Low Energy, or IEEE 802.11s-based communication technologies. Specifically, in this embodiment, under normal network conditions, authentication can be achieved through interaction with a mobile phone or tablet via the network port 600.

[0165] Since the embodiments of the electronic device part correspond to the embodiments of the method part, please refer to the description of the embodiments of the method part for the embodiments of the electronic device part, and will not be repeated here.

[0166] The following describes a computer-readable storage medium provided by an embodiment of this application. The computer-readable storage medium described below can be referred to in correspondence with the method described above.

[0167] This application provides a computer-readable storage medium on which a computer program is stored, and when the computer program is executed by a processor, it implements the steps of the above-mentioned pad selection method.

[0168] Since the embodiments of the computer-readable storage medium portion correspond to the embodiments of the method portion, the embodiments of the computer-readable storage medium portion are described in the description of the embodiments of the method portion, and will not be repeated here.

[0169] The various embodiments in this specification are described in a progressive manner, with each embodiment focusing on its differences from other embodiments. Similar or identical parts between embodiments can be referred to interchangeably. For the apparatus disclosed in the embodiments, since it corresponds to the method disclosed in the embodiments, the description is relatively simple; relevant parts can be referred to in the method section.

[0170] Those skilled in the art will further recognize that the units and algorithm steps of the various examples described in conjunction with the embodiments disclosed herein can be implemented in electronic hardware, computer software, or a combination of both. To clearly illustrate the interchangeability of hardware and software, the components and steps of the various examples have been generally described in terms of functionality in the foregoing description. Whether these functions are implemented in hardware or software depends on the specific application and design constraints of the technical solution. Those skilled in the art can use different methods to implement the described functions for each specific application, but such implementation should not be considered beyond the scope of this application.

[0171] The steps of the methods or algorithms described in conjunction with the embodiments disclosed herein can be implemented directly by hardware, a software module executed by a processor, or a combination of both. The software module can be located in random access memory (RAM), main memory, read-only memory (ROM), electrically programmable ROM, electrically erasable programmable ROM, registers, hard disk, removable disk, CD-ROM, or any other form of storage medium known in the art.

[0172] The foregoing has provided a detailed description of a pad selection method, apparatus, electronic device, and computer-readable storage medium provided in this application. Specific examples have been used to illustrate the principles and implementation methods of this application. The descriptions of the embodiments above are merely for the purpose of helping to understand the method and core ideas of this application. It should be noted that those skilled in the art can make various improvements and modifications to this application without departing from its principles, and these improvements and modifications also fall within the protection scope of the claims of this application.

Claims

1. A method for selecting solder pads, characterized in that, include: Read all pin parameters and determine the initial pad information corresponding to each pin based on the pin parameters. The initial pad information includes pad coordinate parameters and initial pad size information. Read the pad row number information of at least one type of sub-region; The chip area is divided according to the pad row number information to obtain multiple types of sub-regions; Update the initial pad size information corresponding to the pin according to the type of the sub-region to obtain the pad size information; Specifically, the chip region is divided according to the pad row number information to obtain multiple sub-regions, including: storing the x-coordinate and y-coordinate values ​​of the pad coordinate parameters into array A and array B respectively, and sorting them according to their numerical values; placing the corresponding number of items of the pad row number information into array Ax and array By in array A and array B; traversing each pad coordinate parameter, and determining its region based on its matching with array Ax and array By, thus obtaining multiple sub-regions; Specifically, when the sub-region is an edge region, the pads in the edge region need to consider signal output, and the number of outputs should be increased as much as possible. Correspondingly, updating the initial pad size information corresponding to the pin according to the type of the sub-region to obtain the pad size information includes: obtaining the first initial pad information of the pad to be processed in the edge region; obtaining the second initial pad information of the pad closest in the corresponding direction according to the pad coordinate parameters of the pad to be processed, where the gap between the upper and lower pads is considered for the left and right edge regions; the gap between the left and right pads is considered for the upper and lower edge regions; and optimizing the size of the pad to be processed according to the first initial pad information and the second initial pad information to update the initial pad size information of the pad to be processed, thereby obtaining the corresponding pad size information.

2. The pad selection method of claim 1, wherein The step of determining the initial pad information corresponding to each pin based on the pin parameters includes: A package file is created based on all the pin parameters, including pin size and pin coordinates; Set all the pins to the coordinate system of the package file; Based on the pin size, pin coordinates, and pin spacing of the target pin, the initial pad information of the target pin is determined, so as to obtain the initial pad information corresponding to each pin, wherein the pin spacing is the distance between the target pin and other pins.

3. The pad selection method of claim 2, wherein The step of determining the initial pad information of the target pin based on the pin size, pin coordinates, and pin spacing, so as to obtain the initial pad information corresponding to each pin, includes: Determine whether there are other pins within a preset range of the pin coordinates of the target pin; If the other pins do not exist, the corresponding initial pad size information is determined based on the pin size of the target pin; If the other pins exist, then obtain the minimum pin spacing between the target pin and the other pins; Based on the minimum pin pitch and the pin size of the target pin, the corresponding initial pad size information is determined; Iterate through the other pins until all the initial pad size information is determined; The corresponding pad coordinate parameters are determined based on the pin coordinates to obtain the initial pad information.

4. The pad selection method of claim 1, wherein The step of optimizing the size of the pad to be processed based on the first initial pad information and the second initial pad information includes: The pad edge spacing is obtained based on the first initial pad information and the second initial pad information, and the optimized spacing is determined based on the pad edge spacing and the allowable pad shape reduction value. Determine whether the optimized spacing is greater than the preset threshold after increasing the trace; If the optimized spacing is greater than the preset threshold after adding traces, then the size of the pad to be processed is reduced to obtain the pad size information, so that the optimized pad edge spacing is greater than the preset threshold after adding traces.

5. The pad selection method according to any one of claims 1 to 3, wherein When the sub-region is the center region, the corresponding step of updating the initial pad size information corresponding to the pin according to the type of the sub-region to obtain the pad size information includes: When the pads in the central region are regular traces, the initial pad size information of the pads in the central region is determined as the pad size information, wherein the initial pad size information is standard size information; When the pads in the central region are non-standard outgoing lines, the third initial pad information of the pads to be processed in the central region will be obtained. The fourth initial pad information is obtained based on the pad coordinate parameters of the pad to be processed, which is the closest pad in the corresponding direction; The size of the pad to be processed is optimized based on the third initial pad information and the fourth initial pad information, so as to update the initial pad size information in the third initial pad information to obtain the pad size information.

6. The pad selection method according to any one of claims 1 to 3, wherein When the sub-region is a corner region, the corresponding step of updating the initial pad size information corresponding to the pin according to the type of the sub-region to obtain the pad size information includes: The initial pad size information of the pads in the corner area is determined as the pad size information, wherein the initial pad size information is larger than the standard size information.

7. A pad selection device, characterized in that, include: The pad predefined module is used to read all pin parameters and determine the initial pad information corresponding to each pin based on the pin parameters. The initial pad information includes pad coordinate parameters and initial pad size information. The region division module is used to divide the chip region according to all the pad coordinate parameters to obtain multiple types of sub-regions; The pad definition module is used to update the initial pad size information corresponding to the pin according to the type of the sub-region, so as to obtain the pad size information. The region division module includes: A reading unit is used to read pad row number information for at least one type of sub-region; A partitioning unit is used to partition the chip region according to the pad row number information to obtain multiple types of sub-regions; The region division module is used to store the x-coordinate and y-coordinate values ​​of the pad coordinate parameters into array A and array B respectively, and sort them according to the value size; in array A and array B, the number of items corresponding to the pad row information are placed into array Ax and array By; each pad coordinate parameter is traversed, and the region is determined according to the matching with array Ax and array By, thus obtaining multiple types of sub-regions; When the sub-region is an edge region, the pads in the edge region need to consider signal output, and the number of outputs should be increased as much as possible; correspondingly, the pad definition module includes: The first initial pad information acquisition unit is used to acquire the first initial pad information of the pads to be processed in the edge region. The second initial pad information acquisition unit is used to acquire the second initial pad information of the pad closest in the corresponding direction according to the pad coordinate parameters of the pad to be processed. The left and right edge regions take into account the gap between the upper and lower pads; the upper and lower edge regions take into account the gap between the left and right pads. An optimization unit is configured to optimize the size of the pad to be processed based on the first initial pad information and the second initial pad information, so as to update the initial pad size information of the pad to be processed and obtain the corresponding pad size information.

8. An electronic device, characterized in that, include: Memory, used to store computer programs; A processor, configured to implement the steps of the pad selection method as described in any one of claims 1 to 6 when executing the computer program.

9. A computer-readable storage medium, characterized in that, The computer-readable storage medium stores a computer program that, when executed by a processor, implements the steps of the pad selection method as described in any one of claims 1 to 6.

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