Electrostatic discharge protection device and circuit

Abstract

The present invention discloses an electrostatic discharge protection device and circuit, wherein the electrostatic discharge protection device includes a substrate, a first PNP element, a second PNP element, and an isolation region. The substrate has P-type conductivity. The first PNP element and the second PNP element are formed in the substrate. The isolation region separates the first PNP element and the second PNP element. The presence of the NPN element in the present invention provides a higher holding voltage when the PNP element is turned on, optimizing the on-resistance of the PNP element. Furthermore, the PNP element can withstand higher electrostatic discharge currents.

Description

Technical Field

[0001] The present invention relates to an electrostatic discharge protection device, and more particularly to an electrostatic discharge protection device having a series-connected PNP element. Background Art

[0002] Component damage caused by electrostatic discharge (ESD) has become one of the most significant reliability issues for integrated circuits (ICs). As device dimensions continue to shrink to sub-micron levels, the gate oxide layer of metal oxide semiconductors (MOS) becomes increasingly thinner, making ICs more susceptible to damage from ESD. General industry standards dictate that the I / O pins of integrated circuits must be able to withstand a Human Body Model (HBM) ESD test exceeding 2000 volts and a Mechanical Model (MM) ESD test exceeding 200 volts. Therefore, ESD protection components must be placed near all I / O pads within an IC to protect the core circuitry from ESD currents. Summary of the Invention

[0003] One embodiment of the present invention provides an electrostatic discharge protection device comprising a substrate, a first PNP element, a second PNP element, and an isolation region. The substrate has P-type conductivity. The first PNP element comprises a first well, a first doped region, and a second doped region. The first well is formed in the substrate and has N-type conductivity. The first doped region is formed in the first well and has P-type conductivity. The second doped region is formed in the first well and has P-type conductivity. The second PNP element comprises a second well, a third doped region, and a fourth doped region. The second well is formed in the substrate and has N-type conductivity. The third doped region is formed in the second well and has P-type conductivity. The fourth doped region is formed in the second well and has P-type conductivity. The isolation region is formed in the substrate and separates the first PNP element from the second PNP element. BRIEF DESCRIPTION OF THE DRAWINGS

[0004] Figure 1 Schematic diagram of the electrostatic discharge protection device of the present invention.

[0005] Figure 2 for Figure 1 Schematic diagram of the equivalent circuit of the electrostatic discharge protection device.

[0006] Figure 3 FIG. 4 is another schematic diagram of the electrostatic discharge protection device of the present invention.

[0007] Figure 4 for Figure 3 Schematic diagram of the equivalent circuit of the electrostatic discharge protection device.

[0008] Figures 5A to 5C Schematic diagram of the manufacturing method of the electrostatic discharge protection device of the present invention.

[0009] Reference numerals:

[0010] 100, 300: Electrostatic discharge protection device

[0011] 110: substrate

[0012] 120, 130, 170: PNP components

[0013] 121, 131, 171: Trap

[0014] 122-124, 132-134, 140, 172-174: doped regions

[0015] 151-154, 125, 126, 135, 136, 175, 176: Isolation area

[0016] 161-164: Routing

[0017] VH, VL: voltage source

[0018] R121, R131, R110, R110A, R110B, R110C: resistors

[0019] 200, 400, 500: NPN components DETAILED DESCRIPTION

[0020] To make the objectives, features, and advantages of the present invention more readily apparent, the following examples are presented and described in detail with reference to the accompanying drawings. This specification provides various examples to illustrate the technical features of various embodiments of the present invention. The configurations of the various components in the examples are for illustrative purposes only and are not intended to limit the present invention. Furthermore, some duplication of figure numerals in the examples is for simplification and does not imply a correlation between the different examples.

[0021] Figure 1FIG1 is a schematic diagram of an ESD protection device according to the present invention. As shown, ESD protection device 100 includes a substrate 110, PNP elements 120 and 130. Substrate 110 has P-type conductivity. In one embodiment, substrate 110 may be a semiconductor substrate, such as a silicon substrate. Furthermore, the semiconductor substrate may be an elemental semiconductor, including germanium; a compound semiconductor, including silicon carbide, gallium arsenide, gallium phosphide, indium phosphide, indium arsenide, and / or indium antimonide; an alloy semiconductor, including silicon-germanium alloy (SiGe), gallium arsenide phosphide alloy (GaAsP), aluminum indium arsenide alloy (AlInAs), aluminum gallium arsenide alloy (AlGaAs), gallium indium arsenide alloy (GaInAs), gallium indium phosphide alloy (GaInP), and / or gallium indium arsenide phosphide alloy (GaInAsP), or a combination of the above materials. Alternatively, the substrate 110 may be a semiconductor on an insulator. In one embodiment, the substrate 110 may be an undoped substrate. However, in other embodiments, the substrate 110 may be a lightly doped substrate, such as a lightly doped P-type substrate.

[0022] PNP device 120 includes a well 121 and doped regions 122 and 123. Well 121 is formed in substrate 110 and has N-type conductivity. The present invention is not limited to how well 121 is formed. In one embodiment, well 121 can be formed by ion implantation. For example, phosphorus ions or arsenic ions are implanted into the region where well 121 is to be formed. In other embodiments, well 121 is a high voltage N-type well (HVNW).

[0023] Doped regions 122 and 123 are formed within well 121 and have P-type conductivity. In this embodiment, the impurity concentration of doped regions 122 and 123 is higher than the impurity concentration of substrate 110. In one embodiment, P+-type doped regions 122 and 123 are formed by implanting P-type impurities. P-type impurities include, for example, boron, gallium, aluminum, indium, or a combination thereof. In one embodiment, doped region 122 serves as a collector of PNP device 120, doped region 123 serves as an emitter of PNP device 120, and well 121 serves as a base of PNP device 120.

[0024] In other embodiments, the PNP device 120 further includes a doped region 124, and isolation regions 125 and 126. The doped region 124 has N-type conductivity and serves as an electrical contact for the well 121. In this embodiment, the impurity concentration of the doped region 124 is higher than that of the well 121. In one embodiment, the N+ doped region 124 is formed by implanting N-type impurities. In some embodiments, the doped regions 122-124 are formed using a patterned mask (not shown) in conjunction with an implantation step.

[0025] Isolation regions 125 and 126 are formed on the surface of substrate 110 and extend into well 121. In this embodiment, isolation region 125 is located between doped regions 122 and 123 to separate doped regions 122 and 123. Isolation region 126 is located between doped regions 123 and 124 to separate doped regions 123 and 124. In some embodiments, isolation regions 125 and 126 may be field oxide (FOX). In some embodiments, isolation regions 125 and 126 may be local oxidation of silicon (LOCOS) or shallow trench isolation (STI) structures. In other embodiments, the material of isolation regions 125 and 126 may be silicon oxide, silicon nitride, silicon oxynitride, other suitable dielectric materials, or combinations thereof.

[0026] The PNP element 130 includes at least a well 131 and doped regions 132 and 133. Well 131 is formed in substrate 110 and has N-type conductivity. Since the characteristics of well 131 are similar to those of well 121, they will not be described in detail. In this embodiment, well 131 does not contact well 121. In some embodiments, the impurity concentration of well 131 is similar to the impurity concentration of well 121, but this is not intended to limit the present invention. In other embodiments, the impurity concentration of well 131 may be lower or higher than the impurity concentration of well 121. For example, one of wells 121 and 131 is a high-voltage N-type well, and the other is a normal well. In this example, the impurity concentration of the high-voltage N-type well is lower than that of the normal well. Therefore, the high-voltage N-type well can withstand higher voltages.

[0027] Doped regions 132 and 133 are formed within well 131. Doped regions 132 and 133 have P-type conductivity. In this embodiment, the impurity concentration of doped regions 132 and 133 is higher than the impurity concentration of substrate 110. In one embodiment, the impurity concentration of doped regions 132 and 133 is similar to the impurity concentration of doped regions 122 and 123. Because the characteristics of doped regions 132 and 133 are similar to those of doped regions 122 and 123, they are not further described. In one embodiment, doped region 132 serves as a collector of PNP device 130, doped region 133 serves as an emitter of PNP device 130, and well 131 serves as a base of PNP device 130.

[0028] In other embodiments, PNP device 130 further includes a doped region 134, and isolation regions 135 and 136. Doped region 134 has N-type conductivity and serves as an electrical contact for well 131. In this embodiment, the impurity concentration of doped region 134 is higher than that of well 131 and similar to that of doped region 124. Since the characteristics of doped region 134 are similar to those of doped region 124, they are not further described.

[0029] Isolation regions 135 and 136 are formed on the surface of substrate 110 and extend into well 131. In this embodiment, isolation region 135 is located between doped regions 132 and 133 to separate doped regions 132 and 133. Isolation region 136 is located between doped regions 133 and 134 to separate doped regions 133 and 134. Since the characteristics of isolation regions 135 and 136 are similar to those of isolation regions 125 and 126, they are not further described.

[0030] In this embodiment, ESD protection device 100 further includes an isolation region 152. Isolation region 152 is formed on the surface of substrate 110 and extends into wells 121 and 131. Isolation region 152 is used to separate PNP devices 120 and 130. In this example, isolation region 152 is located between doped regions 124 and 132. In one embodiment, isolation region 152 directly contacts doped regions 124 and 132.

[0031] In other embodiments, the ESD protection device 100 further includes a doped region 140. The doped region 140 is formed in the substrate 110 and has P-type conductivity. In one embodiment, the impurity concentration of the doped region 140 is similar to that of the doped region 122. Since the characteristics of the doped region 140 are similar to those of the doped region 122, they will not be further described. In this embodiment, the doped region 140 serves as an electrical contact point for the substrate 110.

[0032] In some embodiments, the ESD protection device 100 further includes isolation regions 151 and 153. The isolation region 151 is formed on the surface of the substrate 110 and extends into the well 121 and the substrate 110. In this embodiment, the isolation region 151 is used to separate the doped region 140 from the PNP device 120. Furthermore, the isolation region 153 is formed on the surface of the substrate 110 and extends into the well 131 and the substrate 110. The isolation region 153 is used to separate the PNP device 130 from other devices (not shown).

[0033] The present invention does not limit the dimensions of isolation regions 151-153. In one embodiment, the width (horizontally) of isolation region 152 is greater than the widths of isolation regions 151 and 153. For example, the distance between doped regions 124 and 132 is greater than the distance between doped regions 140 and 122. The distance between doped regions 124 and 132 is also greater than the distance between doped region 134 and another doped region (not shown). In other embodiments, the widths of isolation regions 125, 126, 135, and 136 are smaller than the width of isolation region 151. In this example, the widths of isolation regions 125, 126, 135, and 136 are similar.

[0034] In one embodiment, the ESD protection device 100 further includes traces 161-163. Trace 161 electrically connects doped regions 140 and 122. In one embodiment, trace 161 is coupled to a voltage source VL. Trace 162 electrically connects doped regions 123, 124, and 132. Trace 163 electrically connects doped regions 133 and 134. In one embodiment, trace 163 is coupled to a voltage source VH. Under normal operation (no ESD event), voltage source VH receives a high operating voltage, and voltage source VL may receive a low operating voltage, such as ground.

[0035] When an electrostatic discharge (ESD) event occurs at voltage source VH and voltage source VL is grounded, PNP devices 130 and 120 are sequentially turned on. Consequently, an ESD current flows from voltage source VH through doped region 133, well 131, doped region 132, doped region 123, well 121, and doped region 122, and then into voltage source VL. At this point, due to the voltage increase in well 131, a current flows into substrate 110, causing the voltage of substrate 110 to increase, thereby turning on an NPN device with a P-type substrate between PNP devices 130 and 120. In this example, wells 131, 121, and substrate 110 form an NPN device with a P-type substrate. Well 131 serves as the collector of this NPN device with a P-type substrate, well 121 serves as the emitter of this NPN device with a P-type substrate, and substrate 110 serves as the base of this NPN device with a P-type substrate. Because the NPN device with a P-type substrate is conducting, the on-resistance of PNP devices 130 and 120 can be reduced. Consequently, ESD protection device 100 can withstand higher currents and increase its holding voltage, preventing latch-up during normal operation (without an ESD event). Furthermore, the NPN device with a P-type substrate can be a parasitic element or an NPN device resulting from doping, but the present invention is not limited thereto.

[0036] Figure 2 for Figure 1 As shown in the figure, the electrostatic discharge protection device 100 includes PNP elements 120 and 130 and an NPN element 200 with a P-type substrate. The emitter E1 of the PNP element 120 is Figure 1 The collector C1 of the PNP element 120 is Figure 1 The base B1 of the PNP element 120 is Figure 1 In this embodiment, a resistor R121 is provided between the emitter E1 and the base B1 of the PNP element 120. In this example, the resistor R121 is the equivalent resistance of the well 121. In addition, the collector C1 of the PNP element 120 is connected to the collector C1 by a wiring (such as Figure 1 161), electrically connected to the voltage source VL.

[0037] The emitter E2 of the PNP element 130 is Figure 1 The collector C2 of the PNP element 130 is Figure 1 The base B2 of the PNP element 130 is Figure 1In this embodiment, a resistor R131 is provided between the emitter E2 and the base B2 of the PNP element 130. In this example, the resistor R131 is an equivalent resistance of the well 131. In addition, the collector C2 of the PNP element 130 is connected to the collector C2 via a wiring (such as Figure 1 The emitter E2 of the PNP element 130 is electrically connected to the emitter E1 of the PNP element 120 via a trace (such as Figure 1 163), electrically connected to the voltage source VH.

[0038] because Figure 1 The well 121 is used as the emitter E3 of the NPN element 200 with a P-type substrate, so it can be considered that the emitter E3 of the NPN element 200 with a P-type substrate is electrically connected to the base B1 of the PNP element 120. In addition, since Figure 1 Since well 131 serves as collector C3 of NPN device 200 with a P-type substrate, collector C3 of NPN device 200 with a P-type substrate can be considered to be electrically connected to base B2 of PNP device 130. In this embodiment, a resistor R110 is provided between base B3 of NPN device 200 with a P-type substrate and voltage source VL. In this example, resistor R110 represents the equivalent resistance of substrate 110.

[0039] When an ESD event occurs when voltage source VH is connected and voltage source VL is grounded, the voltage at emitter E2 of PNP device 130 increases, turning PNP device 130 on. At this point, the voltage at emitter E1 of PNP device 120 also increases, turning PNP device 120 on. Consequently, an ESD current flows from voltage source VH through PNP devices 130 and 120 to voltage source VL. At this point, since PNP devices 130 and 120 are turned on, NPN device 200, which has a P-type substrate, also turns on. This reduces the equivalent impedance of PNP devices 130 and 120 when they are turned on, resulting in a higher holding voltage for ESD protection device 100.

[0040] Figure 3 FIG. 4 is another schematic diagram of the electrostatic discharge protection device of the present invention. Figure 3 resemblance Figure 1 , the difference is that, Figure 3The electrostatic discharge protection device 300 further includes a PNP element 170. The PNP element 170 includes a well 171, doped regions 172 and 173. The well 171 is formed in the substrate 110 and has N-type conductivity. Since the characteristics of the well 171 are similar to those of the well 121, they will not be described in detail. In this embodiment, the isolation region 153 separates the wells 131 and 171. In some embodiments, the impurity concentrations of the wells 121, 131, and 171 are the same, but this is not intended to limit the present invention. In other embodiments, the impurity concentration of one of the wells 121, 131, and 171 may be lower or higher than the impurity concentration of the other well 121, 131, and 171. For example, one of the wells 121, 131, and 171 is a high-voltage N-type well, while the other well 121, 131, and 171 is not a high-voltage N-type well.

[0041] Doped regions 172 and 173 are formed within well 171. Doped regions 172 and 173 have P-type conductivity. In this embodiment, the impurity concentration of doped regions 172 and 173 is higher than the impurity concentration of substrate 110. In one embodiment, the impurity concentration of doped regions 172 and 173 is similar to the impurity concentration of doped regions 122 and 123. Since the characteristics of doped regions 172 and 173 are similar to those of doped regions 122 and 123, they will not be described in detail. In this embodiment, doped region 172 serves as a collector of PNP device 170, doped region 173 serves as an emitter of PNP device 170, and well 171 serves as a base of PNP device 170.

[0042] In other embodiments, PNP device 170 further includes a doped region 174 and isolation regions 175 and 176. Doped region 174 is formed in well 171 and has N-type conductivity. In one embodiment, the impurity concentration of doped region 174 is similar to that of doped region 124. Since the characteristics of doped region 174 are similar to those of doped region 124, they are not further described. In this embodiment, doped region 174 serves as an electrical contact for well 171.

[0043] Isolation regions 175 and 176 are formed on the surface of substrate 110 and extend into well 171. In this embodiment, isolation region 175 is located between doped regions 172 and 173 to separate doped regions 172 and 173. Isolation region 176 is located between doped regions 173 and 174 to separate doped regions 173 and 174. Since the characteristics of isolation regions 175 and 176 are similar to those of isolation regions 125 and 126, they are not further described.

[0044] In this embodiment, isolation region 153 is used to separate PNP devices 130 and 170. In this example, isolation region 153 is located between doped regions 134 and 172. In one embodiment, isolation region 153 directly contacts doped regions 134 and 172. In other embodiments, ESD protection device 300 further includes an isolation region 154. Isolation region 154 is formed on the surface of substrate 110 and extends into well 171 and substrate 110. Isolation region 154 is used to separate PNP device 170 from other devices (not shown). The present invention does not limit the dimensions of isolation regions 151-154. In one embodiment, the width of isolation region 154 is similar to the width of isolation region 151. In other embodiments, the widths of isolation regions 152 and 153 are similar and greater than the widths of isolation regions 151 and 154. In this example, the widths of isolation regions 125 , 126 , 135 , 136 , 175 , and 176 are similar and smaller than the width of isolation region 151 .

[0045] In one possible embodiment, the ESD protection device 300 further includes a trace 164. The trace 164 electrically connects the doped regions 173 and 174 and is coupled to the voltage source VH. In addition, the trace 163 electrically connects the doped regions 133, 134, and 172. In this embodiment, traces 161 to 164 are used to connect the PNP elements 120, 130, and 170 in series. When more PNP elements are connected in series, the triggering voltage of the ESD protection device 300 is higher, thereby preventing the ESD protection device 300 from being triggered during normal operation (i.e., when there is no ESD event). The present invention does not limit the number of PNP elements. In other embodiments, the ESD protection device 300 has more PNP elements.

[0046] When an electrostatic discharge event occurs at voltage source VH and voltage source VL is coupled to ground, PNP devices 170, 130, and 120 are sequentially turned on. Consequently, an electrostatic discharge current flows through PNP devices 170, 130, and 120 into voltage source VL. In this embodiment, a first NPN device with a P-type substrate is located between PNP devices 170 and 130, a second NPN device with a P-type substrate is located between PNP devices 130 and 120, and a third NPN device with a P-type substrate is located between PNP devices 170 and 120. In this example, when PNP devices 170, 130, and 120 are turned on, the first NPN device with a P-type substrate between PNP devices 170 and 130 and the third NPN device with a P-type substrate between PNP devices 170 and 120 are also turned on.

[0047] In this embodiment, a first NPN device with a P-type substrate is formed by wells 171 and 131, and substrate 110. Well 171 serves as the collector of the first NPN device with a P-type substrate, well 131 serves as the emitter of the first NPN device with a P-type substrate, and substrate 110 serves as the base of the first NPN device with a P-type substrate. Furthermore, a second NPN device with a P-type substrate is formed by wells 131 and 121, and substrate 110. In this example, well 131 serves as the collector of the second NPN device with a P-type substrate, well 121 serves as the emitter of the second NPN device with a P-type substrate, and substrate 110 serves as the base of the second NPN device with a P-type substrate. A third NPN device with a P-type substrate is formed by wells 171 and 121, and substrate 110. In this example, the well 171 serves as the collector of the third NPN device having a P-type substrate, the well 121 serves as the emitter of the third NPN device having a P-type substrate, and the substrate 110 serves as the base of the third NPN device having a P-type substrate.

[0048] When PNP elements 170, 130, and 120 are turned on, the first NPN element with a P-type substrate reduces the equivalent impedance of PNP elements 170 and 130, and the third NPN element with a P-type substrate reduces the equivalent impedance of PNP elements 170 and 120. Therefore, ESD protection device 300 has a higher holding voltage and can withstand a larger current.

[0049] Figure 4 for Figure 3 Schematic diagram of the equivalent circuit of the electrostatic discharge protection device 300. As shown in the figure, the electrostatic discharge protection device 300 includes PNP elements 120, 130, 170 and NPN elements 200, 400, 500 with a P-type substrate. Figure 2 The characteristics of the PNP elements 120 and 130 and the NPN element 200 with a P-type substrate are the same, so they are not described again.

[0050] In this embodiment, the emitter E4 of the PNP element 170 is Figure 3 The collector C4 of the PNP element 170 is Figure 3 The base B4 of the PNP element 170 is Figure 3 In this embodiment, a resistor R171 is provided between the emitter E4 and the base B4 of the PNP element 170. In this example, the resistor R171 is the equivalent resistance of the well 171. In addition, the collector C4 of the PNP element 170 is connected to the collector C4 via a wiring (such as Figure 3The emitter E4 of the PNP element 170 is electrically connected to the emitter E2 of the PNP element 130 via a trace (such as Figure 3 164), electrically connected to a voltage source VH.

[0051] because Figure 3 The well 131 of the PNP element 400 is used as the emitter E5 of the P-type substrate NPN element 400, so it can be considered that the emitter E5 of the PNP element 400 is electrically connected to the base B2 of the PNP element 130. Figure 3 Well 171 serves as collector C5 of NPN device 400 with a P-type substrate. Therefore, collector C5 of NPN device 400 with a P-type substrate can be considered electrically connected to base B4 of PNP device 170. In this embodiment, a resistor R110B is provided between base B5 of NPN device 400 with a P-type substrate and voltage source VL. In this example, resistor R110B represents the equivalent resistance of substrate 110.

[0052] because Figure 3 The well 121 serves as the emitter E6 of the NPN element 500 having a P-type substrate, so it can be considered that the emitter E6 of the NPN element 500 having a P-type substrate is electrically connected to the base B1 of the PNP element 120. In addition, Figure 3 Well 171 serves as collector C6 of NPN device 500 with a P-type substrate. Therefore, collector C6 of NPN device 500 with a P-type substrate can be considered electrically connected to base B4 of PNP device 170. In this embodiment, a resistor R110C is provided between base B6 of NPN device 500 with a P-type substrate and voltage source VL. In this example, resistor R110C represents the equivalent resistance of substrate 110.

[0053] In this embodiment, because the distance between NPN devices 400 and 500 with a P-type substrate and voltage source VL is greater than that between NPN device 200 with a P-type substrate and voltage source VL, the impedance of resistors R110B and R110C is greater than that of resistor R110A. In one embodiment, the impedance of resistors R110A, R110B, and R110C can be controlled by adjusting the concentration of substrate 110. In a preferred embodiment, the voltage across resistors R110B and R110C is less than approximately 0.7V, causing NPN devices 400 and 500 with a P-type substrate to conduct.

[0054] When an ESD event occurs at voltage source VH and voltage source VL is grounded, the voltage at emitter E4 of PNP device 170 increases, turning PNP device 170 on. At this time, the voltage at emitter E2 of PNP device 130 increases, turning PNP device 130 on. Since the voltage at emitter E1 of PNP device 120 increases, PNP device 120 also turns on. Consequently, an ESD current flows from voltage source VH through PNP devices 170, 130, and 120, and into voltage source VL. At this point, since PNP devices 170, 130, and 120 are turned on, NPN devices 400 and 500, each with a P-type substrate, are also turned on, reducing the equivalent impedance of PNP devices 170, 130, and 120 when they are turned on, and enabling ESD protection device 300 to have a higher holding voltage.

[0055] Figures 5A to 5C for Figure 1 The manufacturing method of the electrostatic discharge protection device 100 is as follows. First, please refer to Figure 5A A substrate 110 is provided. In one embodiment, the substrate 110 may include a silicon-on-insulator (SOI) substrate, a bulk silicon substrate, or a silicon epitaxial layer on a substrate. In this embodiment, the substrate 110 has P-type conductivity.

[0056] Next, isolation regions 151-153 are formed within substrate 110 to define the locations of PNP devices 120 and 130, and isolation regions 125, 126, 135, and 136 are formed. In this embodiment, field oxide layers are used as an example for isolation regions 151-153, 125, 126, 135, and 136, but this is not intended to limit the present invention. In other embodiments, other isolation structures, such as shallow trench isolation structures, may also be used. In one embodiment, isolation region 152 is larger than isolation regions 151 and 153. In this example, isolation regions 151 and 153 are larger than isolation regions 125, 126, 135, and 136. The dimensions of isolation regions 125, 126, 135, and 136 are similar.

[0057] Please refer to Figure 5B Wells 121 and 131 are formed in substrate 110. Well 121 is located between isolation regions 151 and 152, and well 131 is located between isolation regions 152 and 153. In this embodiment, isolation region 152 separates wells 121 and 131. In one embodiment, well 121 extends below isolation regions 151 and 152. Therefore, isolation regions 151 and 152 partially cover well 121. Similarly, well 131 extends below isolation regions 152 and 153. Therefore, isolation regions 152 and 153 partially cover well 131. In this embodiment, wells 121 and 131 have N-type conductivity.

[0058] Next, please refer to Figure 5C , forming a doped region 140 in the substrate 110, forming doped regions 122 and 123 in the well 120, and forming doped regions 132 and 133 in the well 130. In one embodiment, the doped regions 140, 122, 123, 132, and 133 can be formed by implanting P-type impurities. P-type impurities include, for example, boron, gallium, aluminum, indium, or a combination thereof. The doping concentration may depend on the process technology and device characteristics and is not limited here. In this embodiment, the doping concentration of the doped regions 140, 122, 123, 132, and 133 is higher than the doping concentration of the substrate 110. In one embodiment, the doped regions 140, 122, 123, 132, and 133 are formed by performing an implantation step through a patterned mask (not shown). In this embodiment, the doped region 122 is located between the isolation regions 151 and 125. The doped region 123 is located between the isolation regions 125 and 126. The doped region 132 is located between the isolation regions 152 and 135 . The doped region 133 is located between the isolation regions 135 and 136 .

[0059] Next, a doped region 124 is formed in the well 120, and a doped region 134 is formed in the well 130. In one embodiment, the doped regions 124 and 134 can be formed by implanting N-type impurities. N-type impurities include, for example, impurities such as phosphorus, arsenic, nitrogen, antimony, or a combination thereof. The doping concentration may depend on the process technology and device characteristics and is not limited here. In this embodiment, the doping concentration of the doped regions 124 and 134 is higher than the doping concentration of the wells 121 and 131. In one embodiment, the doped regions 124 and 134 are formed by performing an implantation step through a patterned mask (not shown). In this embodiment, the doped region 124 is located between the isolation regions 126 and 152. The doped region 134 is located between the isolation regions 136 and 153.

[0060] Doped regions 122, 123, and well 121 form PNP device 120, while doped regions 132, 133, and well 131 form PNP device 130. Furthermore, an NPN device with a P-type substrate is located between PNP devices 120 and 130. For example, wells 121, 131, and substrate 110 form an NPN device. The presence of the NPN device allows PNP devices 120 and 130 to have a higher holding voltage when they are on, optimizing their on-resistance. Furthermore, PNP devices 120 and 130 can withstand higher electrostatic discharge currents.

[0061] Unless otherwise defined, all terms (including technical and scientific terms) used herein are those generally understood by those skilled in the art to which this invention belongs. Furthermore, unless otherwise expressly stated, dictionary definitions of terms should be interpreted as consistent with their meanings in the relevant technical context and should not be interpreted as idealized or overly formal.

[0062] While the present invention has been disclosed above with reference to preferred embodiments, these are not intended to limit the present invention. Any skilled artisan may make modifications and variations without departing from the spirit and scope of the present invention. For example, the systems, devices, or methods described in the embodiments of the present invention may be implemented in physical embodiments using hardware, software, or a combination of hardware and software. Therefore, the scope of protection of the present invention shall be determined by the scope of the claims.

Claims

1. An electrostatic discharge protection device, characterized in that: include: a substrate having a P-type conductivity; A first PNP element, comprising: a first well formed in the substrate and having an N-type conductivity; a first doped region formed in the first well and having the P-type conductivity; a second doped region formed in the first well and having the P-type conductivity; a second PNP element, comprising: a second well formed in the substrate and having the N-type conductivity; a third doped region formed in the second well and having the P-type conductivity; a fourth doped region formed in the second well and having the P-type conductivity; a first isolation region formed in the substrate and separating the first PNP device and the second PNP device; a fifth doped region formed in the substrate and having the P-type conductivity; a first wiring electrically connecting the first doped region and the fifth doped region; a sixth doped region formed in the first well and having the N-type conductivity; and A second wiring electrically connects the second doping region, the third doping region and the sixth doping region.

2. The electrostatic discharge protection device according to claim 1, wherein: The first PNP element further includes: a second isolation region formed in the first well and located between the first doped region and the second doped region; and A third isolation region is formed in the first well and located between the second doping region and the sixth doping region.

3. The electrostatic discharge protection device according to claim 2, wherein: The second PNP element further includes: a seventh doped region formed in the second well and having the N-type conductivity; a fourth isolation region formed in the second well and located between the third doped region and the fourth doped region; and A fifth isolation region is formed in the second well and located between the fourth doping region and the seventh doping region.

4. The electrostatic discharge protection device according to claim 3, wherein: The first isolation region extends into the first well and the second well and is located between the third doping region and the sixth doping region.

5. The electrostatic discharge protection device according to claim 3, wherein: The width of the first isolation region is greater than the width of the second isolation region.

6. The electrostatic discharge protection device according to claim 3, wherein: Also includes: A third wiring is electrically connected to the fourth doping region and the seventh doping region.

7. The electrostatic discharge protection device according to claim 6, wherein: Also includes: a third PNP element, comprising: a third well formed in the substrate and having the N-type conductivity; an eighth doped region formed in the third well and having the P-type conductivity; a ninth doped region formed in the third well and having the P-type conductivity; a tenth doped region formed in the third well and having the N-type conductivity; a sixth isolation region formed in the third well and located between the eighth doping region and the ninth doping region; a seventh isolation region formed in the third well and located between the ninth doping region and the tenth doping region; and an eighth isolation region formed in the substrate and extending into the second well and the third well; The eighth isolation region is located between the seventh doping region and the eighth doping region.

8. The electrostatic discharge protection device according to claim 7, wherein: An impurity concentration of one of the first well, the second well, and the third well is different from an impurity concentration of the other of the first well, the second well, and the third well.

9. The electrostatic discharge protection device according to claim 7, wherein: Also includes: a third wiring electrically connecting the fourth doping region, the seventh doping region, and the eighth doping region; and A fourth wiring electrically connects the ninth doping region and the tenth doping region.

10. The electrostatic discharge protection device according to claim 1, wherein: An impurity concentration of the first well is different from an impurity concentration of the second well.

11. An electrostatic discharge protection circuit, characterized in that: include: a first PNP element having a first collector, a first emitter, and a first base, wherein the first collector is coupled to a first voltage source; a second PNP element having a second collector, a second emitter, and a second base, wherein the second collector is directly electrically connected to the first emitter, and the second emitter is coupled to a second voltage source; and A first NPN element has a third collector, a third emitter, and a third base. The third collector is coupled to the second base, the third emitter is coupled to the first base, and the third base is coupled to the first voltage source.

12. The electrostatic discharge protection circuit according to claim 11, wherein: When an electrostatic discharge event occurs at the second voltage source and the first voltage source is grounded, the first PNP device and the second PNP device are turned on in sequence.

13. The electrostatic discharge protection circuit according to claim 12, wherein: When an electrostatic discharge event occurs at the second voltage source and the first voltage source is grounded, the first NPN element is turned on to reduce the on-resistance of the first PNP element and the second PNP element.

14. The electrostatic discharge protection circuit according to claim 11, wherein: There is a first equivalent impedance between the first emitter and the first base, there is a second equivalent impedance between the second emitter and the second base, and there is a third equivalent impedance between the third base and the first voltage source.

15. The electrostatic discharge protection circuit according to claim 14, wherein: Also includes: a third PNP element having a fourth collector, a fourth emitter, and a fourth base, wherein the fourth collector is coupled to the second emitter, and the fourth emitter is coupled to the second voltage source; a second NPN element having a fifth collector, a fifth emitter, and a fifth base, the fifth collector coupled to the fourth base, the fifth emitter coupled to the second base, and the fifth base coupled to the first voltage source; and A third NPN element has a sixth collector, a sixth emitter, and a sixth base. The sixth collector is coupled to the second voltage source, the sixth emitter is coupled to the first base, and the sixth base is coupled to the first voltage source.

16. The electrostatic discharge protection circuit according to claim 15, wherein: When an electrostatic discharge event occurs at the second voltage source and the first voltage source is grounded, the first PNP device, the second PNP device, and the third PNP device are turned on in sequence.

17. The electrostatic discharge protection circuit according to claim 15, wherein: There is a fourth equivalent impedance between the fourth base and the second voltage source, there is a fifth equivalent impedance between the fifth base and the second voltage source, and there is a sixth equivalent impedance between the sixth base and the second voltage source.

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