A mechanical relay jitter elimination device and method

By connecting the photocoupling relay and the photocoupling relay in series at both ends of the mechanical relay, combining the high-speed photocoupling relay and the capacitor to control the on-off time of the MOS tube, the problem of reduced voltage withstandability and increased leakage current caused by mechanical relay jitter is solved, and the safety of lithium battery testing is improved.

CN114070269BActive Publication Date: 2025-07-22FUJIAN NEBULA ELECTRONICS CO LTD
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Patent Information

Application Number
CN202111334368.8
Authority / Receiving Office
CN · China
Patent Type
Patents(China)
Current Assignee / Owner
Filing Date
2021-11-11
Publication Date
2025-07-22
Estimated Expiration
2041-11-11

AI Technical Summary

Technical Problem

When the prior art eliminates mechanical relay jitter, there are problems such as reduced voltage resistance and increased leakage current, which affects the safety of lithium battery testing.

Method used

The photocoupling relay and the photocoupling relay are connected in series at both ends of the mechanical relay, and a high-speed photocoupling relay is used to link the MOS tube. The on-off time of the MOS tube is adjusted through the capacitor, and the on-off sequence of the relay is controlled to eliminate jitter.

Benefits of technology

Without increasing leakage current, the voltage withstandability of the mechanical relay is improved, effectively eliminating jitter, and improving the safety of lithium battery testing.

✦ Generated by Eureka AI based on patent content.

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Abstract

The present invention provides a mechanical relay jitter elimination device and method in the technical field of lithium battery testing. The device includes an MCU, a relay enabling circuit, and a signal driving circuit. The relay enabling circuit includes a mechanical relay K1, an opto-relay K2, an opto-relay K3, a current-limiting resistor R1, and a current-limiting resistor R2. Pin 1 of the mechanical relay K1 is connected to the current-limiting resistor R1, pin 2 is connected to the signal driving circuit, pin 3 is connected to pin 3 of the opto-relay K2, and pin 4 is connected to pin 4 of the opto-relay K3. Pin 1 of the opto-relay K2 is connected to the current-limiting resistor R2, and pin 2 is connected to pin 1 of the opto-relay K3. Pin 2 of the opto-relay K3 is connected to the signal driving circuit. The advantages of the present invention are as follows: Under the condition of ensuring the withstand voltage ability and not increasing the leakage current, the mechanical relay jitter is eliminated, thereby greatly improving the safety of lithium battery testing.
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Description

Technical Field

[0001] The present invention relates to the technical field of lithium battery testing, and particularly to a mechanical relay jitter elimination device and method. Background Art

[0002] After the production of lithium batteries, in order to ensure the safety of lithium battery use, it is necessary to conduct a short-circuit protection performance test on the protection board of the lithium battery. During the test process, it is necessary to connect the test equipment to the protection board through the on-off of a mechanical relay. However, mechanical jitter interference will be generated at the moment when the mechanical relay is attracted and disconnected, which will then generate a voltage impact on the lithium battery. When the withstand voltage strengths of the protection devices and MOSFET tubes on the lithium battery protection board are relatively low, there is a risk of being broken down.

[0003] After retrieval, a Chinese utility model patent with an application date of September 26, 2019 and an application number of CN201921616854.7 discloses a relay attraction jitter interference elimination device. This device adopts the method of connecting an opto-relay in parallel with the mechanical relay to eliminate the jitter of the mechanical relay. However, since the withstand voltage capacity of the opto-relay is lower than that of the mechanical relay and the leakage current of the opto-relay is greater than that of the mechanical relay, this device has the disadvantages of reducing the withstand voltage capacity of the test equipment and increasing the leakage current.

[0004] Therefore, how to provide a mechanical relay jitter elimination device and method to eliminate the mechanical relay jitter under the condition of ensuring the withstand voltage capacity and not increasing the leakage current has become an urgent problem to be solved. Summary of the Invention

[0005] The technical problem to be solved by the present invention is to provide a mechanical relay jitter elimination device and method to eliminate the mechanical relay jitter under the condition of ensuring the withstand voltage capacity and not increasing the leakage current.

[0006] In a first aspect, the present invention provides a mechanical relay jitter elimination device, including an MCU, a relay enabling circuit, and a signal driving circuit; one end of the signal driving circuit is connected to the MCU, and the other end is connected to the relay enabling circuit;

[0007] The relay enabling circuit includes a mechanical relay K1, an opto-relay K2, an opto-relay K3, a current-limiting resistor R1, and a current-limiting resistor R2;

[0008] Pin 1 of the mechanical relay K1 is connected to the current-limiting resistor R1, pin 2 is connected to the signal driving circuit, pin 3 is connected to pin 3 of the opto-relay K2, and pin 4 is connected to pin 4 of the opto-relay K3; Pin 1 of the opto-relay K2 is connected to the current-limiting resistor R2, and pin 2 is connected to pin 1 of the opto-relay K3; Pin 2 of the opto-relay K3 is connected to the signal driving circuit.

[0009] Further, the signal driving circuit includes an opto-relay K4, a MOS transistor Q1, a MOS transistor Q2, a MOS transistor Q3, a resistor R3, a resistor R4, a resistor R5, a resistor R6, a resistor R7, a resistor R8, a resistor R9, a resistor R10, a capacitor C1, and a capacitor C2;

[0010] The drain of the MOS transistor Q1 is connected to pin 2 of the mechanical relay K3, the source is connected to the resistor R4 and grounded, and the gate is connected to the resistor R4 and pin 3 of the opto-relay K4; Pin 1 of the opto-relay K4 is connected to the resistor R5, pin 2 is connected to the resistor R5 and the resistor R6, and pin 4 is connected to the resistor R3 and one end of the capacitor C1; The drain of the MOS transistor Q2 is connected to the resistor R6, the source is connected to the resistor R8 and grounded, and the gate is connected to the resistor R7 and the resistor R8; The drain of the MOS transistor Q3 is connected to pin 2 of the mechanical relay K1, the source is connected to the resistor R10 and the capacitor C2 and grounded, and the gate is connected to the resistor R9, the resistor R10, and the capacitor C2; The resistors R3, R7, and R9 are all connected to the MCU; The other end of the capacitor C1 is grounded.

[0011] Further, the MOS transistors Q1, Q2, and Q3 are all NPN-type MOS transistors.

[0012] Further, the opto-relay K4 is a high-speed opto-relay.

[0013] Further, the values of the resistors R3, R9, R10, the capacitor C1, and the capacitor C2 satisfy the following relationships:

[0014] t1 = R3 * C1 * ln [(V1-V0) / (V1-Vt)] ;

[0015] t2 = R9 * C2 * ln [(V2-V,0) / (V2-V't)] ;

[0016] R9 << R10;

[0017] t1 > t2;

[0018] Among them, V1 represents the voltage value that the capacitor C1 can be finally charged or discharged; V2 represents the voltage value that the capacitor C2 can be finally charged or discharged; V0 represents the initial voltage value of the capacitor C1; V'0 represents the initial voltage value of the capacitor C2; V t represents the voltage value of the capacitor C1 at time t; V' t represents the voltage value of the capacitor C2 at time t; t1 represents the time when the capacitor C1 is fully charged; t2 represents the time when the capacitor C2 is fully charged.

[0019] In a second aspect, the present invention provides a method for eliminating mechanical relay jitter, including the following steps:

[0020] Step S10: The MCU inputs a high-level signal to the signal driving circuit. After the signal driving circuit receives the high-level signal, it first turns on the MOS transistor Q3, then turns on the MOS transistor Q1, and then first turns on the mechanical relay K1, and then turns on the opto-relay K2 and the opto-relay K3 to eliminate the jitter generated when the mechanical relay K1 is turned on;

[0021] Step S20: The MCU inputs a low-level signal to the signal driving circuit. After the signal driving circuit receives the low-level signal, it first turns off the MOS transistor Q1, then turns off the MOS transistor Q3, and then first turns off the opto-relay K2 and the opto-relay K3, and then turns off the mechanical relay K1 to eliminate the jitter generated when the mechanical relay K1 is turned off.

[0022] Further, the step S10 is specifically:

[0023] The MCU inputs a high-level signal to the signal driving circuit. The high-level signal is superimposed on the electric energy originally stored in the capacitor C2, and preferentially turns on the MOS transistor Q3, and then first turns on the mechanical relay K1;

[0024] The high-level signal turns on the MOS transistor Q2 through the resistor R7, and together with the high-level signal input from the resistor R3, turns on the opto-relay K4, and then turns on the MOS transistor Q1, and then turns on the opto-relay K2 and the opto-relay K3;

[0025] That is, first turn on the mechanical relay K1, and then turn on the opto-relay K2 and the opto-relay K3 to eliminate the jitter generated when the mechanical relay K1 is turned on.

[0026] Further, the step S20 is specifically:

[0027] The MCU inputs a low-level signal to the signal driving circuit. The low-level signal turns off the MOS transistor Q2 through the resistor R7, and then sequentially and quickly turns off the opto-relay K4 and the MOS transistor Q1, and then preferentially turns off the opto-relay K2 and the opto-relay K3;

[0028] The low-level signal is input to the MOS tube Q3 through the resistor R9. Since the capacitor C2 is discharged through the resistor R9, the resistor R10 and the MOS tube Q3, when the voltage of the capacitor C2 is reduced to the MOS tube Q3 shutdown condition, the MOS tube Q3 is turned off, and then the mechanical relay K1 is turned off;

[0029] That is, the optocoupler relay K2 and the optocoupler relay K3 are turned off first, and then the mechanical relay K1 is turned off, so as to eliminate the jitter generated when the mechanical relay K1 is turned off.

[0030] The advantages of the present invention are:

[0031] By connecting optocoupler relay K2 and optocoupler relay K3 in series at both ends of mechanical relay K1, the leakage current of optocoupler relay K2 and optocoupler relay K3 is blocked by the middle mechanical relay K1, and the mechanical relay K1 has a higher voltage resistance than optocoupler relay K2 and optocoupler relay K3, and has a higher voltage resistance than the traditional parallel optocoupler relay method; by adopting optocoupler relay K4 of high-speed optocoupler relay type, the optocoupler relay K4 can link MOS tube Q1 to quickly switch on and off; by setting capacitor C2, when a high-level signal is input, The MOS tube Q3 is turned on first, and the MOS tube Q3 is turned off with delay when a low-level signal is input, so that when the MCU inputs a high-level signal, the mechanical relay K1 is turned on first, and then the optocoupler relay K2 and the optocoupler relay K3 are turned on. When the MCU inputs a low-level signal, the optocoupler relay K2 and the optocoupler relay K3 are turned off first, and then the mechanical relay K1 is turned off, so as to eliminate the jitter generated when the mechanical relay K1 is turned on and off, that is, the mechanical relay jitter is eliminated under the condition of ensuring the withstand voltage capability and not increasing the leakage current, which greatly improves the safety of lithium battery testing. BRIEF DESCRIPTION OF THE DRAWINGS

[0032] The present invention will be further described below in conjunction with embodiments with reference to the accompanying drawings.

[0033] Figure 1 The invention discloses a circuit principle block diagram of a mechanical relay jitter elimination device.

[0034] Figure 2 It is a circuit diagram of the relay enabling circuit of the present invention.

[0035] Figure 3 1 is a circuit diagram of the signal driving circuit of the present invention.

[0036] Figure 4 The present invention is a flow chart of a method for eliminating jitter of a mechanical relay. DETAILED DESCRIPTION

[0037] The overall idea of the technical solution in the embodiment of this application is as follows: A photocoupler relay K2 and a photocoupler relay K3 are connected in series at both ends of the mechanical relay K1 to ensure the withstand voltage ability without increasing the leakage current; The photocoupler relay K4 of the type of high-speed photocoupler relay is used for quick on-off, and the capacitor C2 is set. When a high-level input signal is applied, the MOS transistor Q3 is preferentially turned on, and when a low-level input signal is applied, the turn-off of the MOS transistor Q3 is delayed. When the MCU inputs a high-level signal, the mechanical relay K1 is first turned on, and then the photocoupler relay K2 and the photocoupler relay K3 are turned on. When the MCU inputs a low-level signal, the photocoupler relay K2 and the photocoupler relay K3 are first turned off, and then the mechanical relay K1 is turned off, so as to eliminate the jitter generated at the moment when the mechanical relay K1 is turned on and off.

[0038] Please refer to Figures 1 to 4 As shown, a preferred embodiment of a mechanical relay jitter elimination device of the present invention includes an MCU, a relay enabling circuit, and a signal driving circuit; One end of the signal driving circuit is connected to the MCU, and the other end is connected to the relay enabling circuit; The MCU is used to input a high-level signal or a low-level signal to the signal driving circuit, and further control the on-off sequence of each relay in the relay enabling circuit to eliminate jitter. In specific implementation, as long as an MCU capable of implementing this function is selected from the prior art, it is not limited to any model. For example, the MCU of the STM32F103 series of ST company, and the control program is well-known to those skilled in the art, which can be obtained by those skilled in the art without creative labor; The relay enabling circuit is used to connect and disconnect the test equipment and the protection board; The signal driving circuit is used to control the on-off sequence of the mechanical relay K1, the photocoupler relay K2, and the photocoupler relay K3;

[0039] The relay enabling circuit includes a mechanical relay K1, a photocoupler relay K2, a photocoupler relay K3, a current limiting resistor R1, and a current limiting resistor R2; The current limiting resistor R1 serves as the current limiting resistor of the mechanical relay K1, and the current limiting resistor R2 serves as the current limiting resistor of the photocoupler relay K2 to prevent damage due to excessive control current when the mechanical relay K1 and the photocoupler relay K2 are switched;

[0040] Pin 1 of the mechanical relay K1 is connected to the current limiting resistor R1, pin 2 is connected to the signal driving circuit, pin 3 is connected to pin 3 of the photocoupler relay K2, and pin 4 is connected to pin 4 of the photocoupler relay K3; Pin 1 of the photocoupler relay K2 is connected to the current limiting resistor R2, and pin 2 is connected to pin 1 of the photocoupler relay K3; Pin 2 of the photocoupler relay K3 is connected to the signal driving circuit. The photocoupler relay K2 and the photocoupler relay K3 are connected in series through pin 2 and pin 1 respectively to achieve the purpose of simultaneous on-off.

[0041] The signal driving circuit includes an optical coupling relay K4, a MOS tube Q1, a MOS tube Q2, a MOS tube Q3, a resistor R3, a resistor R4, a resistor R5, a resistor R6, a resistor R7, a resistor R8, a resistor R9, a resistor R10, a capacitor C1 and a capacitor C2; the capacitor C2 is used to adjust the on and off time of the MOS tube Q3;

[0042] The drain of the MOS tube Q1 is connected to the pin 2 of the mechanical relay K3, the source is connected to the resistor R4 and grounded, and the gate is connected to the resistor R4 and the pin 3 of the optocoupler relay K4; the pin 1 of the optocoupler relay K4 is connected to the resistor R5, the pin 2 is connected to the resistor R5 and the resistor R6, and the pin 4 is connected to the resistor R3 and one end of the capacitor C1; the drain of the MOS tube Q2 is connected to the resistor R6, the source is connected to the resistor R8 and grounded, and the gate is connected to the resistor R7 and the resistor R8; the drain of the MOS tube Q3 is connected to the pin 2 of the mechanical relay K1, the source is connected to the resistor R10 and the capacitor C2 and grounded, and the gate is connected to the resistor R9, the resistor R10 and the capacitor C2; the resistors R3, R7 and R9 are all connected to the MCU; the other end of the capacitor C1 is grounded.

[0043] The MOS transistor Q1 , the MOS transistor Q2 and the MOS transistor Q3 are all NPN type MOS transistors.

[0044] The optical coupler relay K4 is a high-speed optical coupler relay, which can be linked to the MOS tube Q1 to switch on and off quickly.

[0045] The values of the resistor R3, the resistor R9, the resistor R10, the capacitor C1 and the capacitor C2 satisfy the following relationship:

[0046] t1=R3*C1*ln [(V1-V0) / (V1-Vt)] ;

[0047] t2=R9*C2*ln [(V2-V,0) / (V2-V't)] ;

[0048] R9<<R10;

[0049] t1>t2;

[0050] Wherein, V1 represents the voltage value at which capacitor C1 can be charged or discharged; V2 represents the voltage value at which capacitor C2 can be charged or discharged; V0 represents the initial voltage value of capacitor C1; V'0 represents the initial voltage value of capacitor C2; V t Represents the voltage value of capacitor C1 at time t; V' t represents the voltage value of capacitor C2 at time t; t1 represents the time when capacitor C1 is fully charged; t2 represents the time when capacitor C2 is fully charged.

[0051] That is, by setting reasonable values of the resistor R3, resistor R9, resistor R10, capacitor C1, and capacitor C2, the conduction time of MOS transistor Q1 and MOS transistor Q3 is adjusted, and finally, MOS transistor Q3 is preferentially turned on when a high-level input signal is received, and MOS transistor Q3 is turned off with a delay when a low-level input signal is received.

[0052] A preferred embodiment of a method for eliminating mechanical relay jitter according to the present invention includes the following steps:

[0053] Step S10: The MCU inputs a high-level signal to the signal driving circuit. After receiving the high-level signal, the signal driving circuit first turns on MOS transistor Q3, then turns on MOS transistor Q1, and further first turns on mechanical relay K1, then turns on opto-relay K2 and opto-relay K3 to eliminate the jitter generated when mechanical relay K1 is turned on.

[0054] Step S20: The MCU inputs a low-level signal to the signal driving circuit. After receiving the low-level signal, the signal driving circuit first turns off MOS transistor Q1, then turns off MOS transistor Q3, and further first turns off opto-relay K2 and opto-relay K3, and then turns off mechanical relay K1 to eliminate the jitter generated when mechanical relay K1 is turned off.

[0055] The specific content of step S10 is as follows:

[0056] The MCU inputs a high-level signal to the signal driving circuit. The high-level signal is superimposed on the electric energy originally stored in capacitor C2, preferentially turning on MOS transistor Q3, and further first turning on mechanical relay K1.

[0057] The high-level signal turns on MOS transistor Q2 through resistor R7, and together with the high-level signal input from resistor R3, turns on opto-relay K4, and then turns on MOS transistor Q1, and then turns on opto-relay K2 and opto-relay K3.

[0058] That is, first turn on mechanical relay K1, then turn on opto-relay K2 and opto-relay K3 to eliminate the jitter generated when mechanical relay K1 is turned on.

[0059] The specific content of step S20 is as follows:

[0060] The MCU inputs a low-level signal to the signal driving circuit. The low-level signal turns off MOS transistor Q2 through resistor R7, and then sequentially and quickly turns off opto-relay K4 and MOS transistor Q1, and then preferentially turns off opto-relay K2 and opto-relay K3.

[0061] The low-level signal is input to the MOS tube Q3 through the resistor R9. Since the capacitor C2 is discharged through the resistor R9, the resistor R10 and the MOS tube Q3, when the voltage of the capacitor C2 is reduced to the MOS tube Q3 shutdown condition, the MOS tube Q3 is turned off, and then the mechanical relay K1 is turned off;

[0062] That is, the optocoupler relay K2 and the optocoupler relay K3 are turned off first, and then the mechanical relay K1 is turned off, so as to eliminate the jitter generated when the mechanical relay K1 is turned off.

[0063] In summary, the advantages of the present invention are:

[0064] By connecting optocoupler relay K2 and optocoupler relay K3 in series at both ends of mechanical relay K1, the leakage current of optocoupler relay K2 and optocoupler relay K3 is blocked by the middle mechanical relay K1, and the mechanical relay K1 has a higher voltage resistance than optocoupler relay K2 and optocoupler relay K3, and has a higher voltage resistance than the traditional parallel optocoupler relay method; by adopting optocoupler relay K4 of high-speed optocoupler relay type, the optocoupler relay K4 can link MOS tube Q1 to quickly switch on and off; by setting capacitor C2, when a high-level signal is input, The MOS tube Q3 is turned on first, and the MOS tube Q3 is turned off with delay when a low-level signal is input, so that when the MCU inputs a high-level signal, the mechanical relay K1 is turned on first, and then the optocoupler relay K2 and the optocoupler relay K3 are turned on. When the MCU inputs a low-level signal, the optocoupler relay K2 and the optocoupler relay K3 are turned off first, and then the mechanical relay K1 is turned off, so as to eliminate the jitter generated when the mechanical relay K1 is turned on and off, that is, the mechanical relay jitter is eliminated under the condition of ensuring the withstand voltage capability and not increasing the leakage current, which greatly improves the safety of lithium battery testing.

[0065] Although the specific implementation modes of the present invention are described above, those skilled in the art should understand that the specific implementation modes described are only illustrative and are not intended to limit the scope of the present invention. Equivalent modifications and changes made by those skilled in the art in accordance with the spirit of the present invention should be included in the scope of protection of the claims of the present invention.

Claims

1. A mechanical relay jitter elimination device, characterized in that: It includes an MCU, a relay enabling circuit, and a signal driving circuit; one end of the signal driving circuit is connected to the MCU, and the other end is connected to the relay enabling circuit; The relay enabling circuit includes a mechanical relay K1, an opto-relay K2, an opto-relay K3, a current-limiting resistor R1, and a current-limiting resistor R2; Pin 1 of the mechanical relay K1 is connected to the current-limiting resistor R1, pin 2 is connected to the signal driving circuit, pin 3 is connected to pin 3 of the opto-relay K2, and pin 4 is connected to pin 4 of the opto-relay K3; pin 1 of the opto-relay K2 is connected to the current-limiting resistor R2, and pin 2 is connected to pin 1 of the opto-relay K3; pin 2 of the opto-relay K3 is connected to the signal driving circuit; The signal driving circuit includes an opto-relay K4, an MOS transistor Q1, an MOS transistor Q2, an MOS transistor Q3, a resistor R3, a resistor R4, a resistor R5, a resistor R6, a resistor R7, a resistor R8, a resistor R9, a resistor R10, a capacitor C1, and a capacitor C2; The drain of the MOS transistor Q1 is connected to pin 2 of the mechanical relay K3, the source is connected to the resistor R4 and grounded, and the gate is connected to the resistor R4 and pin 3 of the opto-relay K4; pin 1 of the opto-relay K4 is connected to the resistor R5, pin 2 is connected to the resistor R5 and the resistor R6, and pin 4 is connected to the resistor R3 and one end of the capacitor C1; the drain of the MOS transistor Q2 is connected to the resistor R6, the source is connected to the resistor R8 and grounded, and the gate is connected to the resistor R7 and the resistor R8; the drain of the MOS transistor Q3 is connected to pin 2 of the mechanical relay K1, the source is connected to the resistor R10 and the capacitor C2 and grounded, and the gate is connected to the resistor R9, the resistor R10, and the capacitor C2; the resistors R3, R7, and R9 are all connected to the MCU; the other end of the capacitor C1 is grounded; The MOS transistors Q1, Q2, and Q3 are all NPN-type MOS transistors; The opto-relay K4 is a high-speed opto-relay.

2. The mechanical relay jitter elimination device according to claim 1, characterized in that: The values of the resistors R3, R9, R10, the capacitor C1, and the capacitor C2 satisfy the following relationships: t1 = R3 * C1 * ln [(V1-V0) / (V1-Vt)] ; t2 = R9 * C2 * ln [(V2-V,0) / (V2-V't)] ; R9 << R10; t1 > t2; Among them, V1 represents the voltage value to which capacitor C1 can be finally charged or discharged; V2 represents the voltage value to which capacitor C2 can be finally charged or discharged; V0 represents the initial voltage value of capacitor C1; V'0 represents the initial voltage value of capacitor C2; V t represents the voltage value of capacitor C1 at time t; V' t represents the voltage value of capacitor C2 at time t; t1 represents the time when capacitor C1 is fully charged; t2 represents the time when capacitor C2 is fully charged.

3. A method for eliminating mechanical relay jitter, characterized in that: The method needs to use the jitter elimination device according to any one of claims 1 to 2, and includes the following steps: Step S10, the MCU inputs a high-level signal to the signal driving circuit, the high-level signal superimposes the electric energy originally stored in the capacitor C2, preferentially turns on the MOS transistor Q3, and then preferentially turns on the mechanical relay K1; The high-level signal turns on the MOS transistor Q2 through the resistor R7, and together with the high-level signal input from the resistor R3, turns on the opto-relay K4, then turns on the MOS transistor Q1, and then turns on the opto-relay K2 and the opto-relay K3; That is, the mechanical relay K1 is turned on first, and then the opto-relay K2 and the opto-relay K3 are turned on to eliminate the jitter generated when the mechanical relay K1 is turned on; Step S20, the MCU inputs a low-level signal to the signal driving circuit, and the low-level signal turns off the MOS transistor Q2 through the resistor R7, and then quickly turns off the optocoupler relay K4 and the MOS transistor Q1 in sequence, and then preferentially turns off the optocoupler relay K2 and the optocoupler relay K3; The low-level signal is input to the MOS transistor Q3 through the resistor R9. Since the capacitor C2 discharges through the resistor R9, the resistor R10, and the MOS transistor Q3, when the voltage of the capacitor C2 drops to the turn-off condition of the MOS transistor Q3, the MOS transistor Q3 is turned off, and then the mechanical relay K1 is turned off; That is, the optocoupler relay K2 and the optocoupler relay K3 are turned off first, and then the mechanical relay K1 is turned off to eliminate the jitter generated when the mechanical relay K1 is turned off.

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