A fan control method, device, equipment and storage medium

By accurately controlling the speed of sub-fans in large-scale chassis communication equipment and calculating the target speed based on the chip temperature and speed algorithm, the problem of lack of flexibility in fan speed adjustment in the existing technology is solved, and efficient and low-noise heat dissipation effect is achieved.

CN114135513BActive Publication Date: 2025-05-16RUIJIE NETWORKS CO LTD
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Patent Information

Application Number
CN202111504963.1
Authority / Receiving Office
CN · China
Patent Type
Patents(China)
Current Assignee / Owner
Filing Date
2021-12-10
Publication Date
2025-05-16
Estimated Expiration
2041-12-10

AI Technical Summary

Technical Problem

The prior art lacks flexibility when controlling the fan speed in large-scale chassis communication equipment, resulting in the temperature of some business boards being too high or too low, and cannot respond quickly to heat dissipation needs, increasing power consumption and noise.

Method used

By accurately controlling the speed of each sub-fan in the chassis equipment, the first speed is calculated based on the temperature values ​​of various chips and the corresponding speed algorithm, and by weighting and determining the target speed, the fan speed is finally adjusted to meet the heat dissipation needs of different chips.

Benefits of technology

It realizes accurate heat dissipation response to various chips, improves the flexibility of fan speed adjustment, reduces power consumption and noise, and extends the life of the fan.

✦ Generated by Eureka AI based on patent content.

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Patent Text Reader

Abstract

The present application provides a fan control method, device, equipment and storage medium, which relates to the field of electronic technology and is used to accurately control the rotation speed of each sub-fan in a chassis device to quickly respond to the heat dissipation of various chips. The method can be applied to a chassis device including at least one set of fan trays, each fan tray including at least one sub-fan, and specifically includes: determining the temperature value of each type of chip corresponding to each sub-fan; calculating the first rotation speed of each type of chip corresponding to each sub-fan according to the rotation speed algorithm corresponding to each type of chip and the temperature value of each type of chip corresponding to each sub-fan; determining the target rotation speed of each sub-fan according to the first rotation speed of each type of chip corresponding to each sub-fan; adjusting the rotation speed of the corresponding sub-fan according to the target rotation speed of each sub-fan.
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Description

Technical Field

[0001] The present application relates to the field of electronic technology and provides a fan control method, device, equipment and storage medium. Background Art

[0002] As we all know, in large chassis communication equipment, the fan is a very important component. Since large chassis communication equipment works for a long time and is prone to heat, the fan components need to run all year round, which shortens the life of the fan. Among them, since the fan speed easily causes different degrees of wear on the fan bearing, the fan speed has become one of the key factors affecting the life of the fan. When the fan is running for a long time, the size of the fan speed has a significant impact on the rapid heat dissipation of the chassis equipment, the noise of the whole machine, power consumption and the life of the fan.

[0003] In the prior art, the speed of each fan in the chassis device is often controlled by adjusting all fans in the chassis device to the same speed, or by adjusting the speed of each fan in the chassis device independently by partition. However, when the same speed is used, since the processing capabilities of different service boards in the chassis device are different, the heat generation of different service boards may also be inconsistent. Therefore, some service boards may have a relatively high temperature and need to increase the fan speed to enhance heat dissipation, while other service boards do not need to enhance heat dissipation, which leads to a serious lack of flexibility in fan speed adjustment and increased power consumption and noise. When the partition independent adjustment method is used, since the heat dissipation requirements of different types of chips are different, there will still be a situation where heat dissipation is enhanced even though it is not required, so the flexibility of fan speed adjustment still needs to be improved, and the speed regulation method used is not flexible enough, and it is impossible to respond to the heat dissipation point more quickly. Summary of the invention

[0004] The embodiments of the present application provide a fan control method, apparatus, device and storage medium for accurately controlling the rotation speed of each sub-fan in a chassis device to quickly respond to heat dissipation of various chips.

[0005] In one aspect, a fan control method is provided, which is applied to a chassis device including at least one set of fan trays, each fan tray including at least one sub-fan, and the method includes:

[0006] Determine the temperature values ​​of various chips corresponding to each sub-fan;

[0007] Calculate the first speed of each type of chip corresponding to each sub-fan according to the speed algorithms corresponding to each type of chip and the temperature values ​​of each type of chip corresponding to each sub-fan;

[0008] Determine the target speed of each sub-fan according to the first speed of each chip corresponding to each sub-fan;

[0009] The rotation speed of the corresponding sub-fan is adjusted according to the target rotation speed of each sub-fan.

[0010] In a possible implementation, the calculating, according to the speed algorithms corresponding to the various chips and the temperature values ​​of the various chips corresponding to the various sub-fans, the first speeds of the various chips corresponding to the various sub-fans includes:

[0011] For each chip type corresponding to each sub-fan, execute:

[0012] Determine the heat dissipation point temperature of the current type of chip. Different types of chips correspond to different heat dissipation point temperatures.

[0013] Determine the speed algorithm corresponding to the current type of chip from various speed algorithms according to the heat dissipation point temperature of the current type of chip and the temperature response range corresponding to the speed algorithm corresponding to each type of chip;

[0014] Obtaining calculation parameters of the rotation speed algorithm corresponding to the current type of chip according to the rotation speed algorithm corresponding to the current type of chip;

[0015] A first rotation speed of the current type of chip is calculated according to calculation parameters of a rotation speed algorithm corresponding to the current type of chip and a temperature value corresponding to the current type of chip.

[0016] In a possible implementation, determining the target rotation speed of each sub-fan according to the first rotation speed of each type of chip corresponding to each sub-fan includes:

[0017] For each sub-fan, execute:

[0018] According to the first rotation speed of each type of chip corresponding to the current sub-fan and the weight of each type of chip corresponding to the current sub-fan;

[0019] The target rotation speed of the current sub-fan is determined by weighted sum.

[0020] In a possible implementation, determining the temperature values ​​of various chips corresponding to each sub-fan includes:

[0021] Obtaining the current actual temperature value of each chip in the chassis device;

[0022] The temperature values ​​of various chips corresponding to the sub-fans are determined according to the mapping relationship between the chips and the sub-fans and the current actual temperature values ​​of the chips.

[0023] In a possible implementation, determining the temperature values ​​of various chips corresponding to each sub-fan according to the mapping relationship between each chip and each sub-fan and the current actual temperature value of each chip includes:

[0024] For each chip type corresponding to each sub-fan, execute:

[0025] Determine at least one first chip corresponding to the current sub-fan according to the mapping relationship between each chip and each sub-fan, and determine at least one second chip of the current class chip corresponding to the current sub-fan from the at least one first chip;

[0026] determining a highest value among current actual temperature values ​​of the at least one second chip;

[0027] Determine whether the maximum value is greater than the historical maximum temperature value of the current sub-fan;

[0028] If it is determined that the highest value is greater than the historical highest temperature value, the highest value is determined as the temperature value of the current type chip corresponding to the current sub-fan.

[0029] In a possible implementation manner, obtaining the current actual temperature value of each chip in the chassis device includes:

[0030] Obtaining the slot number of each service board in the chassis device and the chip serial number of each chip on each service board;

[0031] The current actual temperature value of the chip corresponding to each chip serial number on the service board corresponding to each slot number is periodically obtained.

[0032] In a possible implementation, adjusting the rotation speed of the corresponding sub-fan according to the target rotation speed of each sub-fan includes:

[0033] For each sub-fan, execute:

[0034] Determine whether the target speed of the current sub-fan is greater than the current actual speed value of the current sub-fan;

[0035] If it is determined that the target speed of the current sub-fan is greater than the current actual speed value of the current sub-fan, the current actual speed value of the current sub-fan is increased;

[0036] If it is determined that the target rotation speed of the current sub-fan is less than the current actual rotation speed value of the current sub-fan, the current actual rotation speed value of the current sub-fan is adjusted to the target rotation speed.

[0037] In one aspect, a fan control device is provided, which is applied to a chassis device including at least one set of fan trays, each of which includes at least one sub-fan, and the device includes:

[0038] A temperature determination unit, used to determine the temperature values ​​of various chips corresponding to each sub-fan;

[0039] A first speed determination unit, configured to calculate first speeds of various chips corresponding to various sub-fans according to speed algorithms corresponding to various chips and temperature values ​​of various chips corresponding to various sub-fans;

[0040] a target speed determination unit, configured to determine a target speed of each sub-fan according to a first speed of each type of chip corresponding to each sub-fan;

[0041] The speed control unit is used to adjust the speed of the corresponding sub-fan according to the target speed of each sub-fan.

[0042] In a possible implementation manner, the first speed determination unit is specifically configured to:

[0043] For each chip type corresponding to each sub-fan, execute:

[0044] Determine the heat dissipation point temperature of the current type of chip. Different types of chips correspond to different heat dissipation point temperatures.

[0045] Determine the speed algorithm corresponding to the current type of chip from various speed algorithms according to the heat dissipation point temperature of the current type of chip and the temperature response range corresponding to the speed algorithm corresponding to each type of chip;

[0046] Obtaining calculation parameters of the rotation speed algorithm corresponding to the current type of chip according to the rotation speed algorithm corresponding to the current type of chip;

[0047] A first rotation speed of the current type of chip is calculated according to calculation parameters of a rotation speed algorithm corresponding to the current type of chip and a temperature value corresponding to the current type of chip.

[0048] In a possible implementation, the target speed determination unit is specifically configured to:

[0049] For each sub-fan, execute:

[0050] According to the first rotation speed of each type of chip corresponding to the current sub-fan and the weight of each type of chip corresponding to the current sub-fan;

[0051] The target rotation speed of the current sub-fan is determined by weighted sum.

[0052] In a possible implementation, the temperature determination unit is specifically configured to:

[0053] Obtaining the current actual temperature value of each chip in the chassis device;

[0054] The temperature values ​​of various chips corresponding to the sub-fans are determined according to the mapping relationship between the chips and the sub-fans and the current actual temperature values ​​of the chips.

[0055] In a possible implementation, the temperature determination unit is specifically configured to:

[0056] For each chip type corresponding to each sub-fan, execute:

[0057] Determine at least one first chip corresponding to the current sub-fan according to the mapping relationship between each chip and each sub-fan, and determine at least one second chip of the current class chip corresponding to the current sub-fan from the at least one first chip;

[0058] determining a highest value among current actual temperature values ​​of the at least one second chip;

[0059] Determine whether the maximum value is greater than the historical maximum temperature value of the current sub-fan;

[0060] If it is determined that the highest value is greater than the historical highest temperature value, the highest value is determined as the temperature value of the current type chip corresponding to the current sub-fan.

[0061] In a possible implementation, the temperature determination unit is specifically configured to:

[0062] Obtaining the slot number of each service board in the chassis device and the chip serial number of each chip on each service board;

[0063] The current actual temperature value of the chip corresponding to each chip serial number on the service board corresponding to each slot number is periodically obtained.

[0064] In a possible implementation, the speed control unit is further configured to:

[0065] For each sub-fan, execute:

[0066] Determine whether the target speed of the current sub-fan is greater than the current actual speed value of the current sub-fan;

[0067] If it is determined that the target speed of the current sub-fan is greater than the current actual speed value of the current sub-fan, the current actual speed value of the current sub-fan is increased;

[0068] If it is determined that the target rotation speed of the current sub-fan is less than the current actual rotation speed value of the current sub-fan, the current actual rotation speed value of the current sub-fan is adjusted to the target rotation speed.

[0069] On the one hand, a computer device is provided, comprising a memory, a processor, and a computer program stored in the memory and executable on the processor, wherein the processor implements the steps of the method described in the above aspects when executing the computer program.

[0070] On the one hand, a computer storage medium is provided, on which computer program instructions are stored, and when the computer program instructions are executed by a processor, the steps of the method described in the above aspects are implemented.

[0071] In the embodiment of the present application, when the speed of at least one sub-fan on at least one group of fan disks in the chassis device is controlled, first, the temperature values ​​of various chips corresponding to each sub-fan can be determined, and then, according to the speed algorithms corresponding to each chip and the temperature values ​​of various chips corresponding to each sub-fan, the first speeds of various chips corresponding to each sub-fan can be calculated, and then, the target speeds of various sub-fans can be determined according to the first speeds of various chips corresponding to each sub-fan, so that the speeds of the corresponding sub-fans can be adjusted according to the target speeds of various sub-fans. It can be seen that in the embodiment of the present application, since different speed algorithms are configured for different types of chips, the speeds required for various chips corresponding to the sub-fans to dissipate heat are comprehensively considered, so that the heat dissipation requirements of various chips can be met more accurately, so that when the chip temperature is high, the speed of the sub-fan can be controlled more quickly and accurately to dissipate heat, and when the chip temperature is low, energy saving and noise reduction can be minimized. BRIEF DESCRIPTION OF THE DRAWINGS

[0072] In order to more clearly illustrate the technical solutions in the embodiments of the present application or the related technologies, the drawings required for use in the embodiments or the related technical descriptions are briefly introduced below. Obviously, the drawings described below are only the embodiments of the present application. For ordinary technicians in this field, other drawings can be obtained based on the provided drawings without paying any creative work.

[0073] Figure 1 A schematic diagram of a chassis device provided in an embodiment of the present application;

[0074] Figure 2 A schematic diagram of an application scenario provided for an embodiment of the present application;

[0075] Figure 3 A schematic diagram of a flow chart of a fan control method provided in an embodiment of the present application;

[0076] Figure 4 A schematic diagram of the corresponding relationship between the sub-fans and the chips provided in the embodiment of the present application;

[0077] Figure 5A schematic diagram of a process for determining a first rotation speed provided in an embodiment of the present application;

[0078] Figure 6 A schematic diagram of a process for determining the temperature values ​​of various chips provided in an embodiment of the present application;

[0079] Figure 7 A schematic diagram of a process for obtaining the current actual temperature value of each chip provided in an embodiment of the present application;

[0080] Figure 8 A schematic diagram of the process of determining the temperature values ​​of various chips according to the bubbling method;

[0081] Fig. 9 A schematic diagram of the structure of a fan control device provided in an embodiment of the present application;

[0082] Fig.10 A schematic diagram of the structure of a computer device provided in an embodiment of the present application. DETAILED DESCRIPTION

[0083] In order to make the purpose, technical scheme and advantages of the present application clearer, the technical scheme in the embodiment of the present application will be clearly and completely described below in conjunction with the drawings in the embodiment of the present application. Obviously, the described embodiment is only a part of the embodiment of the present application, rather than all the embodiments. Based on the embodiments in the present application, all other embodiments obtained by ordinary technicians in the field without making creative work are within the scope of protection of the present application. In the absence of conflict, the embodiments in the present application and the features in the embodiments can be combined with each other arbitrarily. In addition, although the logical order is shown in the flow chart, in some cases, the steps shown or described can be performed in an order different from that here.

[0084] like Figure 1 As shown, a schematic diagram of a chassis device provided by an embodiment of the present application is provided. In the chassis device, multiple business boards are included. According to user needs, these business boards can be the same business boards or different business boards. On each business board, multiple chips can be included. Similarly, according to user needs, these chips can be the same type of chips or different types of chips. In addition, the chassis device also includes multiple groups of fan trays, and each group of fan trays can include multiple sub-fans. In actual application, the chassis device can be a large chassis-type network communication device such as a switch and a router.

[0085] Under normal circumstances, for large-scale chassis-type communication equipment, it is generally required to support a variety of different service boards, and each service board will have multiple different types of chips. Different types of chips not only have different heat generation, but also different heat dissipation requirements. However, in the prior art, the speed of each fan in the chassis device is often controlled by adjusting all fans in the chassis device to the same speed, or by adjusting the speed of each fan in the chassis device in a partitioned and independent manner. When the method of adjusting to the same speed is adopted, since the processing capabilities of different service boards in the chassis device are different, the heat generation of different service boards may also be inconsistent. Therefore, there may be a situation where the temperature of some service boards is relatively high and the fan speed needs to be increased to strengthen the heat dissipation, while other service boards do not need to strengthen the heat dissipation, which leads to a serious lack of flexibility in fan speed adjustment and increased power consumption and noise. When the method of independent adjustment of partitions is adopted, since the heat dissipation requirements of different types of chips are different, there will still be a situation where heat dissipation is strengthened even though heat dissipation is not needed, so that the flexibility of fan speed adjustment still needs to be improved, and the speed regulation method adopted is not flexible enough, and it is impossible to respond to the heat dissipation point more quickly.

[0086] Based on this, an embodiment of the present application provides a fan control method, in which, when the speed of at least one sub-fan on at least one group of fan disks in a chassis device is controlled, first, the temperature values ​​of various chips corresponding to each sub-fan can be determined, and then, according to the speed algorithms corresponding to each type of chip and the temperature values ​​of various chips corresponding to each sub-fan, the first speeds of various chips corresponding to each sub-fan can be calculated, and then, the target speeds of various sub-fans can be determined according to the first speeds of various chips corresponding to each sub-fan, so that the speeds of the corresponding sub-fans can be adjusted according to the target speeds of various sub-fans. It can be seen that in the embodiment of the present application, since different speed algorithms are configured for different types of chips, the speeds required for various chips corresponding to the sub-fans to dissipate heat are comprehensively considered, so that the heat dissipation requirements of various chips can be met more accurately, so that when the chip temperature is high, the speed of the sub-fan can be controlled more quickly and accurately to dissipate heat, and when the chip temperature is low, energy saving and noise reduction can be minimized.

[0087] After introducing the design ideas of the embodiments of the present application, the following briefly introduces the application scenarios to which the technical solutions of the embodiments of the present application can be applied. It should be noted that the application scenarios introduced below are only used to illustrate the embodiments of the present application and are not limited. In the specific implementation process, the technical solutions provided by the embodiments of the present application can be flexibly applied according to actual needs.

[0088] like Figure 2, which is a schematic diagram of an application scenario provided by an embodiment of the present application, wherein the application scenario of the fan control may include a fan control device 20 and a fan 21. The fan control device 20 and the fan 21 may be arranged in a chassis device.

[0089] In the embodiment of the present application, the fan control device 20 can be a device with a certain processing capability, for example, it can be a device that uses a field programmable gate array (FPGA) chip as a controller. Specifically, the fan control device 20 may include one or more processing units 201, a memory 202, and an I / O interface 203 for interacting with other devices. In addition, the fan control device 20 can also be configured with a database 204, which can be used to store data such as fan speed, chip temperature, and parameters of the speed algorithm involved in the solution provided in the embodiment of the present application. Among them, the program instructions of the fan control method provided in the embodiment of the present application can be stored in the memory 202 of the fan control device 20, and these program instructions can be used to implement the steps of the fan control method provided in the embodiment of the present application when executed by the processing unit 201, so as to accurately control the fan speed to dissipate heat for the chip in the chassis device.

[0090] In an embodiment of the present application, in order to quickly respond to the heat dissipation of the chip, the temperature of each chip in the chassis device can be detected in real time. Therefore, the program instructions of the fan control method stored in the memory 202 can be called in real time, and these program instructions are executed by the processing unit 201 to calculate the target speed corresponding to each fan 21 in the chassis device. Therefore, based on the calculated target speed, the speed of the corresponding fan 21 is controlled through the I / O interface 203, so as to achieve precise control of the speed of each sub-fan in the chassis device, so as to quickly respond to the heat dissipation of various chips.

[0091] Of course, the method provided in the embodiment of the present application is not limited to Figure 2 The application scenarios shown can also be used in other possible application scenarios, and the embodiments of the present application are not limited thereto. Figure 2 The functions that can be realized by each device in the application scenario shown will be described in the subsequent method embodiments, and will not be described in detail here. Below, the method of the embodiment of the present application will be introduced in conjunction with the accompanying drawings.

[0092] like Figure 3 FIG. 1 is a flow chart of a fan control method provided in an embodiment of the present application. The method can be performed by Figure 2 The method is performed by the fan control device 20, and the process of the method is described as follows.

[0093] Step 301: Determine the temperature values ​​of various chips corresponding to various sub-fans.

[0094] In the embodiment of the present application, one sub-fan may correspond to one or more chips, and these chips may belong to one or more chip types. Figure 4 As shown, it is a schematic diagram of the corresponding relationship between the sub-fans and each chip provided in an embodiment of the present application. Sub-fan 0 can dissipate heat for chips N1~Ni, wherein chips N1 and N2 are class A chips, ..., chips N(i-1)~Ni are class B chips; sub-fan 1 can dissipate heat for chips M1~Mi, wherein chips M1 and M2 are class C chips, ..., chips M(i-1)~Mi are class D chips; ...; sub-fan m can dissipate heat for chips X1~Xi, wherein chips X1 and X2 are class E chips, ..., chips X(i-1)~Xi are class F chips.

[0095] In actual application, before cooling each chip in the chassis device, it is necessary to understand whether each chip has reached the condition where cooling is required. Therefore, before cooling, it is necessary to detect the temperature value corresponding to each chip. In the implementation of this application, in order to quickly respond to the cooling of the chip, a real-time detection method can be used to detect the temperature value of each chip in the chassis device.

[0096] In the implementation of this application, the temperature value of each type of chip corresponding to the sub-fan can be set as the average value or maximum value of multiple temperature values ​​corresponding to this type of chip, etc. Then, after detecting the temperature value of each chip in the chassis device, the temperature value of each type of chip corresponding to the corresponding sub-fan can be determined based on the multiple temperature values ​​corresponding to each type of chip.

[0097] Step 302: Calculate the first rotation speed of each type of chip corresponding to each sub-fan according to the rotation speed algorithm corresponding to each type of chip and the temperature value of each type of chip corresponding to each sub-fan.

[0098] In the embodiment of the present application, the independent variable of the speed algorithm may be the temperature value of the chip, and the dependent variable may be the first speed of the sub-fan.

[0099] In actual applications, due to the different temperature characteristics of different types of chips, their heat dissipation requirements may be different, so their temperature response ranges may also be different. For example, the temperature value of the switching chip can increase the corresponding sub-fan speed to dissipate heat only when it reaches 80°C, while the optical module needs to increase the corresponding sub-fan speed to dissipate heat when it is 60°C to avoid overheating and burning the optical module. Therefore, in order to accurately dissipate the heat of the chips in the chassis device, in the embodiment of the present application, corresponding speed algorithms are set for different types of chips.

[0100] The function expressions used by the speed algorithms corresponding to various chips are different in type according to the different algorithms. For example, the following function expressions can be used to represent them:

[0101] f(s)=a*(s^2)+b*(s)+c

[0102] Wherein, s is the temperature value of the corresponding type of chip, f(s) represents the first speed value of the type of chip, and a, b, and c are the calculation parameters of the speed algorithm. In practical applications, a, b, and c in the above function expression can be set to different parameter values ​​according to different types of chips, as shown in Table 1, which is a schematic table of different calculation parameters corresponding to various types of chips provided in the embodiment of the present application, thereby meeting the requirements of various types of chips for response temperature and response time.

[0103] Parameter a Parameter b …… Parameter c Class A Chip Parameter a1 Parameter b1 …… Parameter c1 Class B Chip Parameter a2 Parameter b2 …… Parameter c2 …… …… …… …… …… Z-type chip Parameter a3 Parameter b3 …… Parameter c3

[0104] Table 1

[0105] For example, for Class A chips, assuming a=1, b=2, c=3, then the function expression of the speed algorithm corresponding to Class A chips can be f(s)=1*(s^2)+2*(s)+3. For Class B chips, assuming a=4, b=5, c=6, then the function expression of the speed algorithm corresponding to Class B chips can be f(s)=4*(s^2)+5*(s)+6. Of course, other speed algorithms can also be used to calculate the speed of each sub-fan. For example, the Proportional Integral Derivative (PID) algorithm can be used to calculate the speed of each sub-fan. I will not give examples one by one here, and their essence is the relationship between temperature and speed.

[0106] Furthermore, after determining the speed algorithm corresponding to this type of chip according to the chip type, the temperature value of this type of chip can be brought into the speed algorithm corresponding to this type of chip for calculation, so as to determine the first speed corresponding to this type of chip, as shown in Table 2, which is a schematic table of the first speeds of each type of chip corresponding to each sub-fan provided in the embodiment of the present application.

[0107]

[0108] Table 2

[0109] Step 303: Determine the target rotation speed of each sub-fan according to the first rotation speed of each type of chip corresponding to each sub-fan.

[0110] In practical applications, such as Figure 4As shown, since a sub-fan can correspond to one or more chips, and these chips can belong to one or more chip types. Therefore, after calculating the first speeds corresponding to each type of chip, there may be a situation where a sub-fan corresponds to multiple first speeds, as shown in Table 2 above. For example, sub-fan 0 may correspond to the first speed of Class A chips, the first speed of Class B chips, ..., the first speed of Class Z chips, etc. Therefore, in an embodiment of the present application, the target speed of each sub-fan can be determined by weighted sum based on the first speeds of each type of chip corresponding to each sub-fan and the weights corresponding to each type of chip. For example, for sub-fan 0, its corresponding target speed can be:

[0111] Target speed n = first speed of class A chip * weight A + first speed of class B chip * weight B + ... + first speed of class Z chip * weight Z

[0112] The weights A, B, ..., Z may be determined according to user requirements. Of course, for calculation convenience, the weights A, B, ..., Z may also be set to the same parameter value.

[0113] Step 304: adjusting the rotation speed of the corresponding sub-fan according to the target rotation speed of each sub-fan.

[0114] In actual application, the speed of the sub-fan can be controlled by stepless speed regulation. However, since stepless speed regulation will instantly increase the current and thus affect the power supply, in an embodiment of the present application, in order to minimize the impact on the power supply, the speed increase process can be adjusted in a step-by-step manner, and in each adjustment cycle, the fan speed can be set to increase by only one level, and the speed reduction process can be adjusted in a way that supports sudden drops, that is, it can directly jump to a small speed value.

[0115] Specifically, first, after determining the target speed of each sub-fan, the current actual speed value of the corresponding sub-fan can be determined according to the number of each sub-fan, and then the target speed of the sub-fan can be compared with the current actual speed value of the sub-fan, and when it is determined that the target speed of the sub-fan is greater than the current actual speed value, the current actual speed value of the sub-fan can be increased, for example, the current actual speed value of the sub-fan can be increased by one level, and when it is determined that the target speed of the sub-fan is less than the current actual speed value, the current actual speed value of the sub-fan can be adjusted to the target speed, for example, the current actual speed value of the sub-fan can be directly adjusted and updated to the target speed by a sudden drop. Of course, if the target speed of the sub-fan is equal to the current actual speed value, then the current actual speed value of the sub-fan is kept unchanged.

[0116] In a possible implementation, Figure 5 As shown in FIG. 1 , it is a schematic diagram of a process for determining a first speed according to an embodiment of the present application, which can be specifically performed by Figure 2 The fan control transposition 20 in the fan control is executed. Since the process of determining the first speed of each type of chip corresponding to each sub-fan is the same, the first speed determination process of the Class A chip among the various types of chips corresponding to the sub-fan 0 is taken as an example for introduction below. The specific process is as follows.

[0117] Step 501: Determine the temperature of the heat dissipation point of the A-type chip.

[0118] In the implementation of this application, since various types of chips can correspond to different heat dissipation point temperatures, for example, the heat dissipation point temperature of the switching chip can be 80°C, that is, when the actual temperature value of the switching chip reaches 80°C, it is necessary to dissipate heat to avoid affecting the operation of the switching chip. Similarly, the heat dissipation point temperature of the optical module can be 60°C. Therefore, after determining the various types of chips corresponding to sub-fan 0, the heat dissipation point temperature of Class A chips among various types of chips can be determined.

[0119] Step 502: According to the heat dissipation point temperature of the A-type chip and the temperature response range of the rotation speed algorithms corresponding to each type of chip, determine the rotation speed algorithm corresponding to the A-type chip from various rotation speed algorithms.

[0120] In practical applications, different speed algorithms have different temperature response ranges. For example, speed algorithm 1 is f(s)=1*(s^2)+2*(s)+3, and its temperature response range is 50℃~65℃. Speed ​​algorithm 2 is f(s)=4*(s^2)+5*(s)+6, and its temperature response range is 70℃~85℃. Since the heat dissipation point temperature of the optical module is 60℃, it is just within the temperature response range of speed algorithm 1. Therefore, for the optical module, when speed algorithm 1 is used, it can respond quickly, that is, the optical module is suitable for using speed algorithm 1 to determine the first speed. Similarly, the switching chip is suitable for using speed algorithm 2 to determine the first speed.

[0121] Therefore, after determining the heat dissipation point temperature of the Class A chip, based on the temperature response range corresponding to each speed algorithm and the heat dissipation point temperature of the Class A chip, the speed algorithm corresponding to the Class A chip can be determined from the various speed algorithms, that is, the speed algorithm whose heat dissipation point temperature of the Class A chip is within its temperature response range can be determined.

[0122] Step 503: Obtain calculation parameters of the rotation speed algorithm corresponding to the Class A chip according to the rotation speed algorithm corresponding to the Class A chip.

[0123] In actual application, after determining the speed algorithm corresponding to Class A chip, for example, when determining that the speed algorithm f(s)=a*(s^2)+b*(s)+c corresponding to Class A chip is speed algorithm 1, in order to calculate the first speed corresponding to Class A chip, it is necessary to obtain the specific values ​​of the calculation parameters a, b, and c corresponding to the speed algorithm 1 from the parameter storage unit. For example, it is necessary to obtain the calculation parameters a=1, b=2, and c=3 corresponding to the speed algorithm 1.

[0124] Step 504: Calculate a first rotation speed of the class A chip according to the calculation parameters of the rotation speed algorithm corresponding to the class A chip and the temperature value corresponding to the class A chip.

[0125] In practical applications, after obtaining the calculation parameters corresponding to the speed algorithm from the parameter storage unit, the temperature value corresponding to the class A chip can be brought into the speed algorithm corresponding to the class A chip for calculation to obtain the first speed corresponding to the class A chip. For example, the calculation parameters of the speed algorithm 1 corresponding to the class A chip are a=1, b=2 and c=3, then the speed algorithm 1 is: f(s)=1*(s^2)+2*(s)+3, assuming that the temperature value corresponding to the class A chip is 60°C, then the first speed corresponding to the class A chip can be f(60)=1*(60^2)+2*(60)+3=3723 revolutions / minute.

[0126] In a possible implementation, Figure 6 As shown in the figure, it is a schematic diagram of the process of determining the temperature values ​​of various chips provided in the embodiment of the present application, which can be specifically achieved by Figure 2 The fan control device 20 is used to perform the specific process as follows.

[0127] Step 601: Obtain the current actual temperature value of each chip in the chassis device.

[0128] In the embodiment of the present application, the current actual temperature value of each chip can be determined by polling each chip on the service board based on FPGA. The polling period can be 1s, 2s, etc., which can be set according to user needs.

[0129] In an embodiment of the present application, a mapping relationship between each chip and a sub-fan can be established in a dynamic manner, and the mapping relationship can be specifically expressed in the form of a mapping table, i.e., a chip-sub-fan relationship mapping table. The chip-sub-fan relationship mapping table can be established by the CPU after obtaining the information of each business board and writing it into the FPGA, or it can be directly established by directly accessing the relevant storage modules in each business board through the FPGA to obtain information. For example, when dynamically establishing, it can be queried whether a new business board is inserted into the chassis device by a periodic query method. When it is determined that a new business board is inserted, the mapping relationship between each chip and the sub-fan on the new business board will be read, and then the mapping relationship will be poured into the chip-sub-fan relationship mapping table, so as to realize the dynamic update of the mapping relationship between each chip and the sub-fan on the business board. Of course, after a certain business board is pulled out, the relevant mapping information of each chip on the business board will also be dynamically deleted from the chip-sub-fan relationship mapping table.

[0130] Specifically, in the temperature polling process, first, the slot number of each service board in the chassis device and the chip serial number of each chip on each service board can be determined by querying the chip-sub-fan relationship mapping table, and then, according to the slot number of each service board in the chassis device, the current actual temperature value of each chip on the service board corresponding to each slot number is periodically obtained. Among them, for a service board among the service boards, according to the chip serial number of each chip on the service board, the current actual temperature value of each chip corresponding to the chip serial number can be periodically obtained.

[0131] For example, Figure 7 As shown, it is a schematic diagram of a process for obtaining the current actual temperature value of each chip provided by an embodiment of the present application. The polling order is performed according to the slot number (0, 1, ..., m) of each service board, from the first slot to the last slot. Each chip in each slot is polled according to the sequence number (1, 2, ..., i). Among them, the chip temperature acquisition unit for obtaining the temperature of each chip may include a bus controller and a temperature reading controller.

[0132] In actual application, the bus controller can control the bus timing according to the temperature sensor interface protocol of each chip, and then complete the temperature reading operation according to the obtained slot number and chip number (i.e., the device address of each chip), and return the read temperature value to the temperature reading controller. Among them, the interface protocol of the temperature sensor can be I2C, Localbus, SPI, etc., which can be determined by the type of each chip.

[0133] The temperature reading controller mainly completes the temperature reading control of various chips of all business boards in the chassis equipment. In each polling cycle, the slot number polling control and chip serial number polling control are completed. At the beginning of the polling operation, the selected slot number and chip serial number are first submitted to the bus controller. After the bus controller returns the temperature value, the temperature value, slot number and chip serial number are submitted to the chip maximum temperature acquisition unit. At the same time, the serial number and slot number of the next chip are submitted to the bus controller, and the temperature reading result is waited for until all chips in all slots are read, and then the polling cycle operation is ended.

[0134] Step 602: Determine the temperature value of each type of chip corresponding to any sub-fan according to the mapping relationship between each chip and each sub-fan and the current actual temperature value of each chip.

[0135] In the implementation of this application, after obtaining the current actual temperature value of each chip in the chassis device, such as Figure 4 As shown, since one sub-fan may correspond to at least one chip, and at least one chip belongs to at least one chip category, the average value or maximum value of multiple temperature values ​​corresponding to a certain type of chip may be determined as the temperature value of the chip of this type.

[0136] In practical applications, the maximum value of multiple temperature values ​​corresponding to a certain type of chip can be determined as the temperature value of the chip. Specifically, the bubbling method can be used to determine the temperature values ​​of various types of chips corresponding to each sub-fan. Figure 8 As shown in the figure, it is a schematic diagram of the process of determining the temperature values ​​of various chips according to the bubbling method provided in the embodiment of the present application. Figure 2 The fan control device 20 in the fan control device 20 is used to execute. Since the process of determining the temperature values ​​of various types of chips corresponding to each sub-fan is the same, the temperature value determination process of the Class A chip among the various types of chips corresponding to the sub-fan 0 is taken as an example to introduce the specific process as follows.

[0137] Step 801: Determine at least one first chip corresponding to sub-fan 0 according to the mapping relationship between each chip and each sub-fan, and determine at least one second chip of the type A chip corresponding to sub-fan 0 from the at least one first chip.

[0138] In the embodiments of the present application, for example, according to Figure 4 From the mapping relationship between each chip and each sub-fan shown, it can be seen that sub-fan 0 can dissipate heat for chips N1~Ni, where chips N1 and N2 are class A chips, ..., and chips N(i-1)~Ni are class B chips.

[0139] Step 802: Determine the highest value among the current actual temperature values ​​of at least one second chip.

[0140] In the embodiments of the present application, Figure 4 As shown, for the Class A chip corresponding to sub-fan 0, the Class A chip includes chips N1 and N2. Among them, the current actual temperature value of chip N1 is 59°C, and the current actual temperature value of chip N2 is 64°C. Therefore, it can be known that the highest value among the many current actual temperature values ​​corresponding to the Class A chip is 64°C.

[0141] Step 803: Determine whether the highest value is greater than the historical highest temperature value of sub-fan 0.

[0142] Step 804: If it is determined that the highest value is greater than the historical highest temperature value, the highest value is determined as the temperature value of the class A chip corresponding to sub-fan 0.

[0143] In the embodiment of the present application, assuming that the historical highest temperature value of the Class A chip corresponding to the sub-fan 0 is 60°C, then when the highest value among the many current actual temperature values ​​corresponding to the Class A chip is 64°C, it can be determined that the highest value of the Class A chip is greater than the historical highest temperature value, then at this time, the highest value 64°C can be determined as the temperature value of the Class A chip corresponding to the sub-fan 0. That is, the temperature value of the Class A chip corresponding to the sub-fan 0 is updated.

[0144] Of course, after obtaining the current actual temperature value of chip N1, the current actual temperature value of chip N1 can be compared with the historical highest temperature value of class A chip. When it is determined that the current actual temperature value of chip N1 is greater than the historical highest temperature value of class A chip, the temperature value of class A chip is updated to the current actual temperature value of chip N1, otherwise, the temperature value of class A chip is maintained as the historical highest temperature value of class A chip. Then, the current actual temperature value of chip N2 is obtained. If the current actual temperature value of chip N2 is greater than the current temperature value of class A chip, then the temperature value of class A chip is updated to the current actual temperature value of chip N2, otherwise, the temperature value of class A chip is maintained unchanged, that is, the temperature value of class A chip is always the highest value among the many current actual temperature values ​​corresponding to class A chip. Furthermore, assuming that the historical highest temperature value of class A chip is 60°C, the current actual temperature value of chip N1 is 59°C, and the current actual temperature value of chip N2 is 64°C, then it can be concluded that the temperature value of class A chip corresponding to sub-fan 0 is 64°C.

[0145] Furthermore, by repeating the above steps 801-804, the temperature values ​​of the various chips corresponding to the various sub-fans can be determined, as shown in Table 3, which is a schematic table of the temperature values ​​of the various chips corresponding to the various sub-fans provided in the embodiment of the present application.

[0146] Sub fan 0 Sub fan 1 …… Sub fan m Class A Chip Temperature value of Class A chip Temperature value of Class A chip …… Temperature value of Class A chip Class B Chip Temperature value of Class B chip Temperature value of Class B chip …… Temperature value of Class B chip …… …… …… …… …… Z-type chip Temperature value of Z type chip Temperature value of Z type chip …… Temperature value of Z type chip

[0147] Table 3

[0148] In summary, in the embodiment of the present application, since different speed algorithms are configured for different types of chips, the speeds required for the heat dissipation of various chips corresponding to the sub-fans are comprehensively considered, so that the heat dissipation requirements of various chips can be met more accurately, so that when the chip temperature is high, the speed of the sub-fan can be controlled more quickly and accurately to dissipate heat, and when the chip temperature is low, energy saving and noise reduction can be maximized. In addition, the solution provided in the embodiment of the present application is also more flexible, smarter, more efficient, and has better customer experience.

[0149] like Fig. 9 As shown, based on the same inventive concept, an embodiment of the present application provides a fan control device, the device 90 can be applied to a chassis device including at least one set of fan trays, each fan tray including at least one sub-fan, the device 90 includes:

[0150] A temperature determination unit 901 is used to determine the temperature values ​​of various chips corresponding to each sub-fan;

[0151] A first speed determining unit 902 is used to calculate a first speed of each type of chip corresponding to each sub-fan according to a speed algorithm corresponding to each type of chip and a temperature value of each type of chip corresponding to each sub-fan;

[0152] A target speed determination unit 903, configured to determine a target speed of each sub-fan according to a first speed of each type of chip corresponding to each sub-fan;

[0153] The speed control unit 904 is used to adjust the speed of the corresponding sub-fan according to the target speed of each sub-fan.

[0154] In a possible implementation, the first speed determining unit 902 is specifically configured to:

[0155] For each chip type corresponding to each sub-fan, execute:

[0156] Determine the heat dissipation point temperature of the current type of chip. Different types of chips correspond to different heat dissipation point temperatures.

[0157] According to the temperature of the heat dissipation point of the current type of chip and the temperature response range of the speed algorithms corresponding to each type of chip, determine the speed algorithm corresponding to the current type of chip from various speed algorithms;

[0158] Obtaining calculation parameters of the speed algorithm corresponding to the current type of chip according to the speed algorithm corresponding to the current type of chip;

[0159] A first rotation speed corresponding to the current type of chip is calculated according to calculation parameters of a rotation speed algorithm corresponding to the current type of chip and a temperature value corresponding to the current type of chip.

[0160] In a possible implementation, the target speed determination unit 903 is specifically configured to:

[0161] For each sub-fan, execute:

[0162] According to the first rotation speed of each type of chip corresponding to the current sub-fan and the weight of each type of chip corresponding to the current sub-fan;

[0163] The target speed of the current sub-fan is determined by weighted sum.

[0164] In a possible implementation, the temperature determination unit 901 is specifically configured to:

[0165] Get the current actual temperature value of each chip in the chassis device;

[0166] The temperature values ​​of various chips corresponding to the sub-fans are determined according to the mapping relationship between the chips and the sub-fans and the current actual temperature values ​​of the chips.

[0167] In a possible implementation, the temperature determination unit 901 is specifically configured to:

[0168] For each chip type corresponding to each sub-fan, execute:

[0169] Determine at least one first chip corresponding to the current sub-fan according to the mapping relationship between each chip and each sub-fan, and determine at least one second chip of the current class chip corresponding to the current sub-fan from the at least one first chip;

[0170] determining a highest value among current actual temperature values ​​of at least one second chip;

[0171] Determine whether the highest value is greater than the historical highest temperature value of the current sub-fan;

[0172] If it is determined that the highest value is greater than the historical highest temperature value, the highest value is determined as the temperature value of the current type chip corresponding to the current sub-fan.

[0173] In a possible implementation, the temperature determination unit 901 is specifically configured to:

[0174] Obtain the slot number of each service board in the chassis device and the chip serial number of each chip on each service board;

[0175] The current actual temperature value of the chip corresponding to each chip serial number on the service board corresponding to each slot number is periodically obtained.

[0176] In a possible implementation, the speed control unit 904 is further configured to:

[0177] For each sub-fan, execute:

[0178] Determine whether the target speed of the current sub-fan is greater than the current actual speed value of the current sub-fan;

[0179] If it is determined that the target speed of the current sub-fan is greater than the current actual speed value of the current sub-fan, the current actual speed value of the current sub-fan is increased;

[0180] If it is determined that the target rotation speed of the current sub-fan is less than the current actual rotation speed value of the current sub-fan, the current actual rotation speed value of the current sub-fan is adjusted to the target rotation speed.

[0181] The device can be used to perform Figure 3 to Figure 8 Therefore, for the functions that can be realized by each functional module of the device, reference can be made to Figure 3 to Figure 8 The description of the embodiment shown is not repeated here. It should be noted that: Fig. 9 The functional units shown in the dotted boxes are non-essential functional units of the device.

[0182] See also Fig.10 Based on the same technical concept, an embodiment of the present application also provides a computer device 100, which may include a memory 1001 and a processor 1002.

[0183] The memory 1001 is used to store computer programs executed by the processor 1002. The memory 1001 may mainly include a program storage area and a data storage area, wherein the program storage area may store an operating system, an application required for at least one function, etc.; the data storage area may store data created according to the use of the computer device, etc. The processor 1002 may be a central processing unit (CPU), or a digital processing unit, etc. The specific connection medium between the above-mentioned memory 1001 and the processor 1002 is not limited in the embodiments of the present application. The embodiments of the present application are Fig.10 In the embodiment, the memory 1001 and the processor 1002 are connected via a bus 1003. The bus 1003 is connected to the processor 1002 via a bus 1003. Fig.10 The connection between other components is shown by bold lines, and is not intended to be limiting. The bus 1003 can be divided into an address bus, a data bus, a control bus, etc. For ease of representation, Fig.10 Only one thick line is used in the diagram, but this does not mean that there is only one bus or only one type of bus.

[0184] The memory 1001 may be a volatile memory, such as a random-access memory (RAM); the memory 1001 may also be a non-volatile memory, such as a read-only memory, a flash memory, a hard disk drive (HDD) or a solid-state drive (SSD), or the memory 1001 is any other medium that can be used to carry or store the desired program code in the form of instructions or data structures and can be accessed by a computer, but is not limited thereto. The memory 1001 may be a combination of the above memories.

[0185] The processor 1002 is used to execute the following when calling the computer program stored in the memory 1001: Figure 3 to Figure 8 The method executed by the device in the illustrated embodiment.

[0186] In some possible implementations, various aspects of the method provided in the present application may also be implemented in the form of a program product, which includes a program code. When the program product is run on a computer device, the program code is used to enable the computer device to execute the steps of the method according to various exemplary embodiments of the present application described above in this specification. For example, the computer device may execute the following steps: Figure 3 to Figure 8 The method described in the embodiment shown.

[0187] It can be understood by those skilled in the art that all or part of the steps of the above-mentioned method embodiment can be completed by hardware related to program instructions, and the aforementioned program can be stored in a computer-readable storage medium. When the program is executed, the steps of the above-mentioned method embodiment are executed; and the aforementioned storage medium includes: various media that can store program codes, such as mobile storage devices, read-only memory (ROM), random access memory (RAM), magnetic disks or optical disks. Alternatively, if the above-mentioned integrated unit of the present invention is implemented in the form of a software function module and sold or used as an independent product, it can also be stored in a computer-readable storage medium. Based on such an understanding, the technical solution of the embodiment of the present invention can be essentially or partly reflected in the form of a software product, which is stored in a storage medium and includes several instructions for a computer device (which can be a personal computer, a server, or a network device, etc.) to execute all or part of the methods described in various embodiments of the present invention. And the aforementioned storage medium includes: various media that can store program codes, such as mobile storage devices, ROM, RAM, magnetic disks or optical disks.

[0188] Although the preferred embodiments of the present application have been described, those skilled in the art may make additional changes and modifications to these embodiments once they have learned the basic creative concept. Therefore, the appended claims are intended to be interpreted as including the preferred embodiments and all changes and modifications falling within the scope of the present application.

[0189] Obviously, those skilled in the art can make various changes and modifications to the present application without departing from the spirit and scope of the present application. Thus, if these modifications and variations of the present application fall within the scope of the claims of the present application and their equivalents, the present application is also intended to include these modifications and variations.

Claims

1. A fan control method, characterized in that: Applied to a chassis device including at least one set of fan trays, each fan tray including at least one sub-fan, the method includes: Periodically obtaining the insertion information of the service board in the chassis device; When a new service board is inserted into the chassis device, the mapping relationship between each chip and the sub-fan on the new service board is obtained; when a service board with a recorded mapping relationship is removed from the chassis device, the mapping relationship corresponding to the removed service board is deleted; Based on the mapping relationship between each chip and each sub-fan, combined with the maximum value of the temperature value of at least one chip of the same chip type, the temperature value of each type of chip corresponding to each sub-fan is determined; wherein each chip corresponds to a chip type; According to the respective heat dissipation point temperatures of the various chips and the respective temperature response ranges corresponding to the respective speed algorithms, the speed algorithms corresponding to the various chips are determined from the various speed algorithms, and the first speeds of the various chips corresponding to the various sub-fans are calculated in combination with the temperature values ​​of the various chips corresponding to the various sub-fans; wherein the speed algorithms corresponding to the various chips include calculation parameters that are different from the calculation functions; Determine the target speed of each sub-fan according to the first speed of each type of chip corresponding to each sub-fan and the preset weight for each type of chip; The rotation speed of the corresponding sub-fan is adjusted according to the target rotation speed of each sub-fan.

2. The method according to claim 1, characterized in that The step of calculating the first rotation speed of each type of chip corresponding to each sub-fan according to the rotation speed algorithm corresponding to each type of chip and the temperature value of each type of chip corresponding to each sub-fan includes: For each chip type corresponding to each sub-fan, execute: Determine the heat dissipation point temperature of the current type of chip. Different types of chips correspond to different heat dissipation point temperatures. Determine the speed algorithm corresponding to the current type of chip from various speed algorithms according to the heat dissipation point temperature of the current type of chip and the temperature response range corresponding to the speed algorithm corresponding to each type of chip; Obtaining calculation parameters of the rotation speed algorithm corresponding to the current type of chip according to the rotation speed algorithm corresponding to the current type of chip; A first rotation speed of the current type of chip is calculated according to calculation parameters of a rotation speed algorithm corresponding to the current type of chip and a temperature value corresponding to the current type of chip.

3. The method according to claim 1, characterized in that The step of determining the target rotation speed of each sub-fan according to the first rotation speed of each type of chip corresponding to each sub-fan includes: For each sub-fan, execute: According to the first rotation speed of each type of chip corresponding to the current sub-fan and the weight of each type of chip corresponding to the current sub-fan; The target rotation speed of the current sub-fan is determined by weighted sum.

4. The method according to claim 1, characterized in that The step of determining the temperature values ​​of various chips corresponding to each sub-fan includes: Obtaining the current actual temperature value of each chip in the chassis device; The temperature values ​​of various chips corresponding to the sub-fans are determined according to the mapping relationship between the chips and the sub-fans and the current actual temperature values ​​of the chips.

5. The method according to claim 4, characterized in that The step of determining the temperature values ​​of various chips corresponding to various sub-fans according to the mapping relationship between various chips and various sub-fans and the current actual temperature values ​​of various chips includes: For each chip type corresponding to each sub-fan, execute: Determine at least one first chip corresponding to the current sub-fan according to the mapping relationship between each chip and each sub-fan, and determine at least one second chip of the current class chip corresponding to the current sub-fan from the at least one first chip; determining a highest value among current actual temperature values ​​of the at least one second chip; Determine whether the maximum value is greater than the historical maximum temperature value of the current sub-fan; If it is determined that the highest value is greater than the historical highest temperature value, the highest value is determined as the temperature value of the current type chip corresponding to the current sub-fan.

6. The method according to claim 4, characterized in that The obtaining of the current actual temperature value of each chip in the chassis device includes: Obtaining the slot number of each service board in the chassis device and the chip serial number of each chip on each service board; The current actual temperature value of the chip corresponding to each chip serial number on the service board corresponding to each slot number is periodically obtained.

7. The method according to any one of claims 1 to 6, characterized in that: The adjusting the speed of the corresponding sub-fan according to the target speed of each sub-fan includes: For each sub-fan, execute: Determine whether the target speed of the current sub-fan is greater than the current actual speed value of the current sub-fan; If it is determined that the target speed of the current sub-fan is greater than the current actual speed value of the current sub-fan, the current actual speed value of the current sub-fan is increased; If it is determined that the target rotation speed of the current sub-fan is less than the current actual rotation speed value of the current sub-fan, the current actual rotation speed value of the current sub-fan is adjusted to the target rotation speed.

8. A fan control device, characterized in that: Applicable to a chassis device including at least one set of fan trays, each fan tray including at least one sub-fan, the device includes: The temperature determination unit is used to periodically obtain the insertion information of the service board in the chassis device; when a new service board is inserted into the chassis device, obtain the mapping relationship between each chip and the sub-fan on the new service board; when a service board with a recorded mapping relationship is removed from the chassis device, delete the mapping relationship corresponding to the removed service board; The temperature determination unit is further used to determine the temperature values ​​of various chips corresponding to each sub-fan based on the mapping relationship between each chip and each sub-fan, combined with the maximum value of the temperature value of at least one chip of the same chip type; wherein each chip corresponds to a chip type; a first speed determination unit, configured to determine the speed algorithms corresponding to the various types of chips from the various speed algorithms according to the respective heat dissipation point temperatures of the various types of chips and the respective temperature response ranges corresponding to the various speed algorithms, and to calculate the first speeds of the various types of chips corresponding to the various sub-fans in combination with the temperature values ​​of the various types of chips corresponding to the various sub-fans; wherein the speed algorithms corresponding to the various types of chips include calculation parameters that are different from the calculation functions; a target speed determination unit, configured to determine a target speed of each sub-fan according to a first speed of each type of chip corresponding to each sub-fan and a preset weight for each type of chip; The speed control unit is used to adjust the speed of the corresponding sub-fan according to the target speed of each sub-fan.

9. A computer device comprising a memory, a processor and a computer program stored in the memory and executable on the processor, characterized in that: When the processor executes the computer program, the steps of the method according to any one of claims 1 to 7 are implemented.

10. A computer storage medium having computer program instructions stored thereon, characterized in that: When the computer program instructions are executed by a processor, the steps of the method according to any one of claims 1 to 7 are implemented.

Citation Information

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