Control circuit of power conversion device and power conversion device
By calculating the delay time in the control circuit of the power conversion device and adjusting the reference voltage, the problem of inductor current detection delay is solved, the accurate detection of the inductor current zero point and the reduction of the loss of the power supply device are achieved, and the high density of the power supply device is improved .
Patent Information
- Application Number
- CN202080052723.X
- Authority / Receiving Office
- CN · China
- Patent Type
- Patents(China)
- Current Assignee / Owner
- Priority Date
- 2019-08-09
- Filing Date
- 2020-07-27
- Publication Date
- 2024-12-27
- Estimated Expiration
- 2040-07-27
AI Technical Summary
In the prior art, the inductor current detection delay leads to an increase in the loss of the switching power supply device in the power factor improvement circuit, especially in the development of small and large-capacity power supplies, which is difficult to achieve accurate detection of high-frequency and high currents.
The control circuit of a power conversion device is adopted, including inductor current detection, input voltage detection and output voltage detection. By calculating the delay time, the reference voltage is adjusted to ensure the accurate detection of the inductor current zero point and avoid detection delay.
Accurate detection of the inductor current zero point in the current critical mode is achieved, reducing the loss of the power conversion device and improving the density of the power supply device.
Smart Images
Figure CN114144967B_ABST
Abstract
Description
Technical Field
[0001] The present invention relates to a control circuit of a power conversion device such as a power factor improvement circuit and the power conversion device. Background Art
[0002] For example, in a power factor correction circuit (hereinafter referred to as a PFC circuit) operating in a current critical mode, it is necessary to turn on a switching element after the inductor current becomes 0. Therefore, it is necessary to accurately detect the zero point of the inductor current (for example, refer to Non-Patent Document 1).
[0003] Prior art literature
[0004] Patent Literature
[0005] Non-patent document 1: Qingyun Huang et al., "Predictive ZVS Control withImproved ZVS Time Margin and Limited Variable Frequency Range for A 99% Efficient, 130W / in3 MHz GaN Totem-Pole PFC Rectifier," IEEE Transactions onPower Electronics, Vol.34, No.7, 2018 Summary of the invention
[0006] Technical problem to be solved by the invention
[0007] Conventionally, in the inductor current detection circuit, a shunt resistor, an operational amplifier, and a comparator are used for current detection (for example, see Non-Patent Document 1). Therefore, delays in the IC and in the noise removal filter occur, and there is a technical problem that zero detection cannot be performed accurately.
[0008] Figure 2 1 is a timing chart for explaining the delay of zero detection of the inductor current iL in the current detection circuit in the prior art. Figure 2 , the ideal value and actual value of the comparison result signal for zero detection are shown in FIG. Figure 2 td represents the delay time for zero detection based on the delay of the operational amplifier and the noise filter. That is, due to the delay of the comparator IC and the time constant of the noise filter, the comparator starts with a delay from the ideal current zero detection point, so Figure 2 The negative current shown increases.
[0009] Figure 3Ais a circuit diagram of a switching power supply device for explaining a mechanism of increase in loss of the switching power supply device due to a delay in zero detection of the inductor current, Figure 3B Yes means Figure 3A The timing diagram of the operation of the switching power supply device. Figure 3A In the embodiment, the switching power supply device includes an AC power supply 1, an inductor 2, switching elements S1 to S4, a smoothing capacitor 3, and a load resistor 4. Figure 3B In , the inductor current iL, the drain-source voltage Vds of the switching element S2, the drive signal G2 for the switching element S2, and the drive signal G1 for the switching element S1 are shown. Here, T1 represents a period during which soft switching is performed by the negative current of the inductor current iL.
[0010] Due to the delay caused by the soft switching, Figure 3C as well as Figure 3D As shown in FIG. 1 , a negative current of the inductor current iL flows through the body diode of the switching element S2. The flow of this excess negative current increases the loss of the switching power supply device.
[0011] In particular, in the development of small, high-capacity power supplies, high-frequency and high-current detection is required, and the solution to this problem has become a technical problem.
[0012] An object of the present invention is to solve the above problems and to provide a control circuit of a power converter and the power converter, which can accurately detect the zero point of the inductor current in a PFC circuit operating in a current critical mode compared with the prior art.
[0013] Technical solutions for solving technical problems
[0014] A control circuit for a power conversion device according to one embodiment of the present invention is characterized in that:
[0015] The control circuit of the power conversion device includes a power factor improvement circuit, which includes an inductor and operates in a current critical mode.
[0016] Furthermore, the control circuit of the power conversion device comprises:
[0017] a first detection circuit that detects the current of the inductor, or a current corresponding to or including the current of the inductor, and amplifies a voltage corresponding to the detected current by a predetermined gain and outputs the amplified voltage as a detection voltage;
[0018] A comparison circuit, which compares the detection voltage with a specified reference voltage and outputs a comparison result signal;
[0019] A second detection circuit detects an input voltage of the power conversion device; and
[0020] A third detection circuit detects the output voltage of the power conversion device,
[0021] The control circuit calculates a reference voltage for making the delay when detecting the zero value of the current of the inductor substantially zero based on the detected input voltage, the detected output voltage, a preset delay time, the inductance value of the inductor, a conversion coefficient when converting the current detected by the first detection circuit into a voltage, a power supply voltage, and the gain, and outputs the calculated reference voltage to the comparison circuit.
[0022] The comparison circuit comprises:
[0023] A first comparator compares the detection voltage with a specified first reference voltage and outputs a first comparison result signal at a zero-crossing detection point when the detection voltage changes from positive to negative;
[0024] a second comparator, which compares the detection voltage with a specified second reference voltage which is lower than the first reference voltage, and outputs a second comparison result signal at a zero-crossing detection point when the detection voltage changes from negative to positive;
[0025] A first pulse generating circuit detects the rising edge of the first comparison result signal and outputs a first pulse signal;
[0026] a second pulse generating circuit, detecting a rising edge of the second comparison result signal and outputting a second pulse signal; and
[0027] A set-reset type trigger has a set terminal, a reset terminal and an output terminal. The first pulse signal is input to the set terminal, the second pulse signal is input to the reset terminal, and the comparison result signal of the comparison circuit is output from the output terminal.
[0028] Effects of the Invention
[0029] Therefore, according to the present invention, in a PFC circuit operating in a current critical mode, it is possible to prevent a detection delay of the inductor current and accurately detect the zero point of the inductor current compared to the prior art, thereby reducing the loss of the power conversion device and achieving a high-density power supply device. BRIEF DESCRIPTION OF THE DRAWINGS
[0030] Figure 1A 1 is a circuit diagram showing a configuration example of a switching power supply device including the control circuit 20 according to the first embodiment.
[0031] Figure 1B Yes means Figure 1A A circuit diagram of a configuration example of the current detection unit 5.
[0032] Figure 2This is a timing chart for explaining the delay in zero detection of the inductor current in the current detection circuit in the conventional example.
[0033] Figure 3A This is a circuit diagram of a switching power supply device for explaining a mechanism in which a loss of the switching power supply device increases due to a delay in zero detection of the inductor current.
[0034] Figure 3B Yes means Figure 3A Timing diagram of the operation of the switching power supply device.
[0035] Figure 3C This is a circuit diagram of a switching power supply device for explaining a mechanism in which a loss of the switching power supply device increases due to a delay in zero detection of the inductor current.
[0036] Figure 3D Yes means Figure 3C Timing diagram of the operation of the switching power supply device.
[0037] Figure 4A It is a circuit diagram showing a configuration example of a current detection unit according to a conventional example.
[0038] Figure 4B Yes means Figure 4A The timing diagram of the operation of the current detection unit.
[0039] Figure 4C : is a circuit diagram showing a configuration example of the current detection unit 5 according to the embodiment.
[0040] Figure 4D Yes means Figure 4C 1 is a timing diagram of the operation of the current detection unit 5.
[0041] Figure 5 : is a graph showing the operation of the current detection unit 5 according to the first embodiment.
[0042] Figure 6 This is a block diagram showing a configuration example of a power conversion device using the PFC circuit according to the first embodiment.
[0043] Figure 7 This is a waveform diagram for explaining a method of deriving the reference voltage Vref used in the current detection unit 5 according to the first embodiment.
[0044] Fig. 8A This is a waveform diagram for explaining soft switching of the PFC circuit by the current detection unit 5 according to the first embodiment.
[0045] Figure 8B This is a waveform diagram for explaining soft switching of the PFC circuit by the current detection unit 5 according to the first embodiment.
[0046] Fig. 9 This is a waveform diagram for explaining a method of deriving the reference voltage Vref used in the current detection unit 5 according to the modification.
[0047] Fig. 10A This is a block diagram showing a configuration example of a switching power supply device according to Modification 1.
[0048] Fig. 10B This is a block diagram showing a configuration example of a switching power supply device according to Modification 2.
[0049] Fig.11A This is a block diagram showing a configuration example of a switching power supply device according to Modification 3.
[0050] Fig. 11B This is a block diagram showing a configuration example of a switching power supply device according to Modification 4.
[0051] Fig.12 Yes means Figure 1B A circuit diagram of a modified example of the current detection unit 5.
[0052] Fig.13 : is a circuit diagram showing a configuration example of a current detection unit 5A according to the second embodiment.
[0053] Fig.14 It is used to illustrate Fig.13 1 is a waveform diagram of a method of deriving reference voltages Vref1 and Vref2 used in the current detection unit 5A.
[0054] Fig.15A Yes means Fig.13 1 is a timing diagram of the operation of the current detection unit 5A.
[0055] Fig. 15B This is a diagram for explaining the technical problem of the current detection unit 5 according to the first embodiment, and is a waveform diagram showing the inductor current iL.
[0056] Fig. 15C is a diagram for explaining the technical problem of the current detection unit 5 involved in the first embodiment, and is Fig. 15B Part 202 of the waveform diagram corresponds to a timing diagram of each signal, etc.
[0057] Fig.16 Yes means Fig.13 A circuit diagram of a modified example of the current detection unit 5A.
[0058] Fig.17 : is a circuit diagram showing a configuration example of a current detection unit 5B according to the third embodiment. DETAILED DESCRIPTION
[0059] Hereinafter, embodiments of the present invention will be described with reference to the accompanying drawings. It should be noted that the same or similar components are denoted by the same reference numerals.
[0060] (Implementation Method 1)
[0061] Figure 1A 1 is a circuit diagram showing a configuration example of a switching power supply device including the control circuit 20 according to the first embodiment.
[0062] exist Figure 1A In the embodiment, the switching power supply device includes an AC power supply 1, an inductor 2 as an inductor (reactor), bridge-connected switching elements S1 to S4, a smoothing capacitor 3, a load resistor 4, a shunt resistor Rs, and a control circuit 20. Here, the control circuit 20 includes a controller 10, a current detection unit 5, a drive signal generation circuit 11, an input voltage detection circuit 12, and an output voltage detection circuit 13.
[0063] The input voltage Vin generated by the AC power source 1 is input to the bridge circuit of the switching elements S1 to S4 via the shunt resistor Rs and the inductor 2. Each of the switching elements S1 to S4 is controlled to be on / off by the drive signals G1 to G4 from the drive signal generating circuit 11, so that after the input voltage Vin is switched, the smoothed DC voltage is output to the load resistor 4 as the output voltage Vout via the smoothing capacitor 3.
[0064] The shunt resistor Rs converts the inductor current iL into a voltage value and outputs it to the current detection unit 5. The input voltage detection circuit 12 detects the input voltage Vin and outputs it to the controller 10, and the output voltage detection circuit 13 detects the output voltage Vout and outputs it to the controller 10. The controller 10 controls the drive signal generation circuit 11 based on each input signal so that the drive signals G1 to G4 are generated in a current critical mode, for example. It should be noted that the controller 10 has a DA converter 10a, which generates a reference voltage Vref predetermined by a method described in detail later.
[0065] Figure 1B Yes means Figure 1A A circuit diagram of a configuration example of the current detection unit 5 is shown in FIG. Figure 1B In FIG. 2 , the current detector 5 includes an operational amplifier 21 and a comparator 22. It should be noted that Vcc is a power supply voltage.
[0066] The operational amplifier 21 amplifies the voltage corresponding to the inductor current iL detected by the shunt resistor Rs, and outputs the amplified voltage Vamp to the comparator 22. The comparator 22 compares the input amplified voltage Vamp with the reference voltage Vref from the DA converter 10a in the controller 10, generates a comparison result voltage Vcomp and outputs it to the controller 10. In response to this, the controller 10 detects the zero current of the inductor current iL based on the comparison result voltage Vcomp, and controls the drive signal generating circuit 11 based on this, so that, for example, the switching action is performed in the current critical mode to generate the drive signals G1 to G4. It should be noted that the polarity of the reference voltage Vref depends on the input voltage Vin ( Figure 1A ), that is, it is reversed according to the direction of the inductor current iL.
[0067] According to the switching power supply device having the control circuit 20 configured as described above, the reference voltage Vref of the comparator 22 is changed according to the delay time, so that the detection delay can be prevented. Thus, the efficiency degradation caused by the zero point detection delay of the inductor current iL in the critical mode PFC circuit can be prevented. The effects of this embodiment are described in detail below.
[0068] Figure 4A is a circuit diagram showing a configuration example of a current detection unit according to a conventional example. Figure 4B Yes means Figure 4A The timing diagram of the current detection unit is shown in FIG. Figure 4A As shown, when the reference voltage Vref of the comparator 22 is a constant voltage such as Vcc / 2, as shown in FIG. Figure 4B As shown, a delay time Tdelay is generated.
[0069] Figure 4C is a circuit diagram showing a configuration example of the current detection unit 5 according to the first embodiment. Figure 4D Yes means Figure 4C The timing diagram of the operation of the current detection unit 5 is shown in FIG. Figure 4C As shown in FIG. 1 , the reference voltage Vref is increased according to the delay time by the DA converter 10a of the controller 10. That is, in a PFC circuit whose input voltage is AC, the reference voltage Vref is changed depending on the input voltage Vin, as shown in FIG. Figure 4D As shown, through Figure 4B The comparison can reduce the delay time Tdelay. It should be noted that Figure 4D middle,
[0070] (1) Td_amp is the delay time caused by the amplification operation of the operational amplifier 21,
[0071] (2) Td_comp is the delay time caused by the comparison operation of the comparator 22,
[0072] (3) Tdead-time is the dead time of the switching elements S1 and S2.
[0073] Figure 5 is a graph showing the operation of the current detection unit 5 according to the first embodiment. Figure 5 In FIG. 1 , for example, an example of a reference voltage Vref (a half cycle of the input voltage Vin) is shown when Vcc=3V, Tdelay=50ns, Vin(rms)=200V, and fLINE=50Hz. Figure 1B as well as Figure 4C The current detection unit 5 and the controller 10 feed back the reference voltage Vref derived according to the delay time Tdelay to the comparator 22 of the current detection unit 5, thereby reducing the delay time Tdelay.
[0074] An example of a method of deriving the reference voltage Vref will be described below.
[0075] Figure 6 1 is a block diagram showing a configuration example of a power conversion device using the PFC circuit according to Embodiment 1. Figure 6 In the embodiment, the power conversion device includes an AC power source 1, a PFC circuit 100, a DC / DC converter 101, and a load 102. Since the control object is the PFC circuit, the input AC voltage and the output DC voltage are Vin(t) and Vout, respectively. The input voltage Vin(t) is expressed by the following equation.
[0076]
[0077] Here, the input voltage Vin (rms) and the line frequency fLINE vary according to countries or regions, and an example is as follows.
[0078] Vin(rms)=100V、200V、230V
[0079] fLINE=50Hz or 60Hz
[0080] In use Figure 1B as well as Figure 4C When the current detection unit 5 is used, the resistance value of the shunt resistor Rs is set to Rs, the gain of the operational amplifier 21 is set to G, and the voltage applied to the operational amplifier 21 and the comparator 22 is set to Vcc.
[0081] Figure 7 This is a waveform diagram for explaining a method of deriving the reference voltage Vref used in the current detection unit 5 according to the first embodiment.
[0082] The inductor current iL in a half cycle of the input voltage Vin is as follows: Figure 7 As shown in the graph, the right side shows an enlarged view of one switching cycle. Here, the slope of the inductor current iL is calculated from vin(t), Vout, and the inductance value L. Based on the detection delay time Tdelay of the current zero, the current variation Δidelay that changes during the delay time is expressed by the following formula.
[0083]
[0084] The current zero can be detected by advancing the current variation Δidelay. The current variation Δidelay can be converted into a voltage by multiplying the resistance value Rs of the shunt resistor and the gain G of the operational amplifier 21. Therefore, the reference voltage Vref considering the delay time is expressed by the following equation.
[0085]
[0086] Fig. 8A as well as Figure 8B 1 is a waveform diagram for explaining the soft switching of the PFC circuit by the current detection unit 5 according to the first embodiment. Fig. 8A This is the waveform when Vin>Vout / 2, Figure 8B This is a waveform diagram when on-time control is added.
[0087] The first embodiment is characterized in that a well-known TCM (Triangular Current Mode) control method is used and TCM control is performed only by changing the reference voltage Vref of the comparator 22. Fig. 8A as well as Figure 8B The symbols are as follows.
[0088] Vin: input voltage
[0089] Vds: Drain-source voltage of the main switching element
[0090] iL: Inductor current
[0091] Vgs: Gate-source voltage of the main switching element
[0092] In the above first embodiment, the controller 10 calculates a reference voltage Vref for making the delay when detecting the zero value of the inductor current iL substantially zero based on the detected input voltage Vin and output voltage Vout, the preset delay time, the inductance value of the inductor 2, the resistance value of the shunt resistor Rs (in the modified example described later, it is the conversion coefficient when converting the inductor current iL during current detection into a voltage, and generally it is the conversion coefficient.), the power supply voltage Vcc, and the gain of the operational amplifier 21, and outputs the calculated reference voltage Vref to the comparator 22. As a result, in the power conversion device having the PFC circuit operating in the current critical mode, the detection delay of the inductor current can be prevented, and the zero point of the inductor current can be accurately detected compared with the conventional technology.
[0093] exist Fig. 8A Under the condition of Vin>Vout / 2, the negative current for extracting the charge of the switch element is insufficient and soft switching cannot be performed. Therefore, the TCM control method is used to make the synchronous rectification switch element continuously turned on for a specified additional time α [ns] from the current zero detection point, so that a negative current for extracting the charge flows.
[0094] Fig. 8A as well as Figure 8B The soft switching method shown provides additional on-time by continuously switching on +α[ns], thereby allowing the negative current required for soft switching to flow. Fig. 9 As shown below, the reference voltage Vref can be changed to adjust the negative current required for soft switching.
[0095] Fig. 9 1 is a waveform diagram for explaining a method of deriving a reference voltage Vref used in the current detection unit 5 according to the modification. Fig. 9 As shown, relative to Figure 5 The reference voltage Vref of the delay prevention control only decreases in an elliptical shape, for example, only during a predetermined time period. Here, the negative current required for soft switching can be obtained based on the input voltage Vin, the output voltage Vout, and the inductance L of the inductor 2, and can be realized by adding it to the reference voltage Vref considering the delay time.
[0096] Fig. 10A FIG. 1 is a block diagram showing a configuration example of a switching power supply device according to Modification Example 1. Figure 1A In the first embodiment of the present invention, the inductor current iL flowing through the shunt resistor Rs is detected, but the present invention is not limited thereto. Fig. 10AAs shown, the inductor current iL may be detected using a current sensor 14 such as a CT (Current Transformer), a Hall element, or a GMR (Giant Magneto Resistive Effect) element.
[0097] Fig. 10B FIG. 1 is a block diagram showing a configuration example of a switching power supply device according to Modification Example 2. Fig. 10B In the embodiment, a shunt resistor Rs1 may be inserted between the ground side of the switching elements S2 and S4 and the load resistor 4 to detect the zero point of the inductor current iL.
[0098] Fig.11A This is a block diagram showing a configuration example of a switching power supply device according to Modification 3. Fig.11A An example of a synchronous rectification boost PFC circuit is shown. Fig.11A In the embodiment, the switching power supply device comprises an AC power supply 1, four bridge-connected diodes D1 to D4, an inductor 2 as an inductor, switching elements S11 and S12, a shunt resistor Rs2, a smoothing capacitor 3, and a load resistor 4. Fig.11A In the synchronous rectification type boost PFC circuit, when the present embodiment is applied, it is preferable to insert a shunt resistor Rs2 for detecting the zero point of the inductor current iL between the switching element S12 and the smoothing capacitor 3 .
[0099] Fig. 11B FIG. 4 is a block diagram showing a configuration example of a switching power supply device according to Modification Example 4. Fig. 11B In the modification 4, it is also possible to replace Fig.11A In the third variation, a shunt resistor Rs3 for detecting the zero point of the inductor current iL is inserted between the diodes D1 and D4 and the inductor 2.
[0100] In the above-mentioned Modifications 2 to 4, a configuration is adopted to detect a current corresponding to the inductor current iL or a current including the inductor current iL.
[0101] Fig.12 Yes means Figure 1B A circuit diagram of a modified example of the current detection unit 5. Fig.12 The invention is characterized in that a controller 10A is provided instead of the controller 10, and the controller 10A includes a DA converter 10a, a comparator 22, and a signal processing unit 10b. Here, the signal processing unit 10b performs signal processing for changing the reference voltage Vref based on the comparison result signal Vcomp from the comparator 22.
[0102] In addition to the AD converter and DA converter, some controllers such as DSP (digital signal processor) also have a comparator function built in. By using the built-in comparator 22, there is an advantage that an external comparator IC is not required.
[0103] As described above, according to the first embodiment and the modified example, in a power conversion device having a PFC circuit operating in a current critical mode, it is possible to prevent the detection delay of the inductor current, and it is possible to accurately detect the zero point of the inductor current compared to the prior art. As a result, it is possible to reduce the loss of the power conversion device and realize high density of the power supply device. In particular, since no magnetic body is used, the loss does not increase during high-frequency driving, and no additional components are required. In addition, if a method of changing the reference voltage Vref is applied, a soft switching function using voltage resonance can be easily installed.
[0104] (Implementation Method 2)
[0105] Fig.13 is a circuit diagram showing a configuration example of a current detection unit 5A according to Embodiment 2. Fig.13 In the embodiment 2, the current detection unit 5A and Figure 1B Compared with the current detection unit 5, it has the following differences.
[0106] (1) The comparator 22 is replaced with a comparison circuit 30 including comparators 22A and 22B, one-shot pulse generating circuits 23A and 23B, and a set-reset flip-flop 24.
[0107] (2) Instead of the controller 10 including the DAC 10 a , a controller 10B including the DACs 10 a and 10 b is provided.
[0108] The above differences are described in detail below.
[0109] exist Fig.13 The operational amplifier 21 amplifies the voltage corresponding to the inductor current iL detected by the shunt resistor Rs and outputs the amplified voltage Vamp to the comparators 22A and 22B. The controller 10B includes a DA converter 10a for generating a predetermined reference voltage Vref1 described later and a DA converter 10c for generating a predetermined reference voltage Vref2 described later.
[0110] Comparator 22A compares the input amplified voltage Vamp with the reference voltage Vref1 from the DA converter 10a within the controller 10B, generates a comparison result voltage Vcomp1, and outputs it to the one-shot pulse generation circuit 23A. Additionally, comparator 22B compares the input amplified voltage Vamp2 with the reference voltage Vref2 from the DA converter 10c within the controller 10B, generates a comparison result voltage Vcomp2, and outputs it to the one-shot pulse generation circuit 23B. Here, refer to Fig.14 The voltage settings of the reference voltages Vref1 and Vref2 will be described later.
[0111] The one-shot pulse generation circuits 23A and 23B are constituted by, for example, a multiplexed oscillator. Each of the one-shot pulse generation circuits 23A and 23B generates one pulse in response to the rising of the comparison result voltages Vcomp1 and Vcomp2 of the input pulse signals respectively, and outputs them to the set terminal and the reset terminal of the set-reset flip-flop 24. In response to this, the set-reset flip-flop 24 outputs a zero-crossing detection pulse voltage Vflip to the controller 10B. In addition, the controller 10B detects the zero current of the inductor current iL based on the zero-crossing detection pulse voltage Vflip, and controls the drive signal generation circuit 11 ( Figure 1A ) based on this, such that, for example, drive signals G1 to G4 are generated by performing switching operation in the current critical mode.
[0112] Fig.14 is a waveform diagram for explaining Fig.13 the derivation method of the reference voltages Vref1 and Vref2 used in the current detection section 5A, Fig.15A is a timing diagram showing Fig.13 the operation of the current detection section 5A.
[0113] As Fig.14 shown, the reference voltage Vref1 is set to the same value as the reference voltage Vref in Embodiment 1, and is set to Vcc / 2 < Vref1. Here, the reference voltage Vref1 detects the moment of the zero-crossing detection point (ZCD point) where the inductor current iL changes from positive to negative ( Figure 7 ), and compensates for the delay in the rise of the zero-crossing detection point (ZCD point). On the other hand, the reference voltage Vref2 is set to Vref2 < Vref1, detects the moment of the zero-crossing detection point (ZCD point) where the inductor current iL changes from negative to positive ( Figure 7 ), and helps to shorten the pulse width of the zero-crossing detection pulse voltage Vflip.
[0114] That is, Fig.13 the comparator 22A in Figure 1A)When it is positive polarity, Vref1 > Vcc / 2. The comparator 22A detects the moment when the inductor current iL changes from positive to negative, and outputs the comparison result voltage Vcomp1 representing this moment. Thus, the rising delay of the zero-crossing detection pulse voltage Vflip is eliminated. In addition, when the input voltage Vin of the PFC circuit ( Figure 1A ) is positive polarity, Vref2 < Vref1. It detects the moment when the inductor current iL changes from negative to positive, and outputs the comparison result voltage Vcomp2 representing this moment. Thus, the falling delay of the zero-crossing detection pulse voltage Vflip is eliminated. It should be noted that here, regarding the input voltage Vin of the PFC circuit ( Figure 1A ) being positive polarity has been described. However, when it is negative polarity, similar to the inversion of the reference voltage Vref mentioned above, the reference voltages Vref1 and Vref2 are also inverted. Except for these polarity inversions, the comparators 22A and 22B operate in the same way.
[0115] In the case of the reference voltage Vref1, it is necessary to correctly detect Figure 7 's "zero-crossing detection point", so it is derived through correct calculation (Embodiment 1). However, the function of the reference voltage Vref2 is to shorten the pulse width of the zero-crossing detection pulse voltage Vflip ( Fig.15A 's 201), so it is not necessary to correctly coincide with Figure 7 's "zero-crossing detection point (ZCD point) from negative to positive".
[0116] Fig. 15B And Fig. 15C are diagrams for explaining the technical problems of the current detection unit 5 according to Embodiment 1. Fig. 15B is a waveform diagram showing the inductor current iL. Fig. 15C is related to Fig. 15B 's waveform diagram part 202 corresponding timing diagram of each signal, etc. According to Embodiment 1 involved Figure 5 it can be known that the reference voltage Vref near the zero-crossing point becomes relatively large. In addition, in the case of high-frequency driving, since the inductance value L is relatively small, the slope of the inductor current iL becomes steeper, and the on-time of the switching element (the time when di / dt is positive) becomes shorter. As a result, as Fig. 15B (inductor current iL's part 202) and Fig. 15C show, there is a falling delay of the comparison result voltage Vcomp, and there is a technical problem in Embodiment 1 where the on-state is continuously generated in the comparison result voltage Vcomp.
[0117] As described above, it is not necessary to correctly coincide with Figure 7 's "zero-crossing detection point (ZCD point) from negative to positive". However, as Fig. 15B and Fig. 15C As shown, it is necessary to advance by an amount equivalent to the delay time Td_comp of comparators 22A and 22B. Therefore, if it is set to satisfy the following formula, as Fig.15A shown, the secondary turn-on state can be prevented.
[0118]
[0119] If the above formula and the relationship Vref2 < Vref1 are satisfied, the reference voltage Vref2 can be set to an arbitrary value, for example
[0120] (1) Vref2 = Vcc / 2, or
[0121] (2) Vref2 = Vref1 - (constant)
[0122] etc. In addition, in the case of a PFC circuit operating in current critical mode (CRM), when the input AC voltage is positive, the inductor current iL hardly flows to the negative side. Therefore, it is appropriate to set the reference voltage Vref2 in the following range.
[0123]
[0124] As described above, in the present embodiment, the reference voltage Vref2, as Fig.14 shown, only needs to be set to satisfy the above formula.
[0125] Fig.16 represents Fig.13 a circuit diagram of a modified example of the current detection unit 5A. In Fig.16 it, it is characterized in that instead of the controller 10B, a controller 10BA is provided, and the controller 10BA has: DA converters 10a, 10b; a comparison circuit 30; and a signal processing unit 10b. Here, the signal processing unit 10b performs signal processing for changing the above-mentioned reference voltages Vref1 and Vref2 based on the zero-crossing detection pulse voltage Vflip from the set-reset flip-flop 24.
[0126] It should be noted that in the switching power supply devices according to the modified examples 1 to 4 related to the first embodiment, the Fig.13 current detection unit 5A according to the second embodiment can also be applied.
[0127] As described above, according to Embodiment 2 and the variation, in a power conversion device having a PFC circuit operating in a current critical mode, it is possible to prevent the detection delay of the inductor current, and it is possible to correctly detect the zero point of the inductor current compared to the prior art. As a result, it is possible to reduce the loss of the power conversion device and realize high density of the power supply device. In particular, since no magnetic body is used, the loss does not increase during high-frequency driving, and no additional components are required. In addition, if a method of changing the reference voltage Vref is applied, a soft switching function using voltage resonance can be easily installed.
[0128] (Implementation 3)
[0129] Fig.17 is a circuit diagram showing a configuration example of a current detection unit 5B according to the third embodiment. Fig.17 Among them, the current detection unit 5B according to the third embodiment is different from the current detection unit 5A according to the second embodiment in the following points.
[0130] (1) A circuit including a differentiating circuit 23C, a protection diode Da, and a comparator 25A in place of the one-shot pulse generating circuit 23A.
[0131] (2) A circuit including a differentiating circuit 23D, a protective diode Db, and a comparator 25B instead of the one-shot pulse generating circuit 23B.
[0132] The differences are described below.
[0133] exist Fig.17 , the differential circuit 23C is composed of a capacitor C1 and a resistor R1. A protection diode Da is provided at the output terminal of the differential circuit 23C, and the protection diode Da allows a negative current to flow to the ground without outputting a negative voltage. The differential voltage output from the differential circuit 23C is input to the comparator 25A to which the reference voltage Vcc / 2 from the reference voltage generator 26 is applied via the protection diode Da. The comparator 25A compares the input differential voltage with the reference voltage Vcc / 2, and outputs the comparison result voltage Vpulse1 to the set-reset type flip-flop 24.
[0134] The differential circuit 23D is composed of a capacitor C2 and a resistor R2. A protection diode Db is provided at the output terminal of the differential circuit 23D, and the protection diode Db allows a negative current to flow to the ground without outputting a negative voltage. The differential voltage output from the differential circuit 23D is input to the comparator 25B to which the reference voltage Vcc / 2 from the reference voltage generator 26 is applied via the protection diode Db. The comparator 25B compares the input differential voltage with the reference voltage Vcc / 2, and outputs the comparison result voltage Vpulse2 to the set-reset type flip-flop 24.
[0135] The current detection unit 5B configured as above is different from the current detection unit 5B in the above-mentioned configuration. Fig.13 The current detection unit 5A operates in the same manner.
[0136] It should be noted that the switching power supply device according to the first to fourth variations of the first embodiment may also be applied to the second embodiment. Fig.17 The current detection unit 5B can also be Fig.16 The current detection unit 5B is configured like the controller 10BA.
[0137] The third embodiment and the modified example configured as above also have the same effects as those of the first and second embodiments.
[0138] (Application example)
[0139] In the above embodiment and modified examples, the switching power supply device has been described, but the present invention is not limited thereto and can be applied to various power conversion devices including the switching power supply device.
[0140] Industrial Applicability
[0141] As described above, according to the present invention, in a PFC circuit operating in a current critical mode, it is possible to prevent a detection delay of an inductor current and accurately detect the zero point of the inductor current compared to the prior art, thereby reducing the loss of a power conversion device and achieving a high-density power supply device.
[0142] Description of Reference Numerals
[0143] 1: AC power supply; 2: inductor; 3: smoothing capacitor; 4: load resistor; 5, 5A, 5B: current detection unit; 10, 10A, 10B, 10BA: controller; 10a, 10c: DA converter (DAC); 10b: signal processing unit; 11: drive signal generation circuit; 12: input voltage detection circuit; 13: output voltage detection circuit; 14: current sensor; 20: control circuit; 21: operational amplifier; 22, 22A, 22B: comparator; 23A, 23B : Single-shot pulse generating circuit; 23C, 23D: Differentiation circuit; 24: Set-reset type flip-flop; 25S, 25B: Comparator; 26: Reference voltage generator; 30: Comparison circuit; 100: PFC circuit; 101: DC / DC converter; 102: Load; C1, C2: Capacitors; D1~D4: Diodes; Da, Db: Protection diodes; R1, R2: Resistors; Rs, Rs1, Rs2, Rs3: Shunt resistors; S1~S4, S11, S12: Switching elements.
Claims
1. A control circuit for a power conversion device, characterized in that: A power factor improvement circuit is provided, wherein the power factor improvement circuit includes an inductor and operates in a current critical mode. The control circuit of the power conversion device comprises: a first detection circuit that detects a current, amplifies a voltage corresponding to the detected current by a predetermined gain, and outputs the amplified voltage as a detection voltage, wherein the current is a current of the inductor, or a current corresponding to or including the current of the inductor; A comparison circuit, which compares the detection voltage with a specified reference voltage and outputs a comparison result signal; a second detection circuit, detecting an input voltage of the power conversion device; as well as A third detection circuit detects the output voltage of the power conversion device, The control circuit calculates a reference voltage for making the delay when detecting the zero value of the current of the inductor substantially zero, and outputs the calculated reference voltage to the comparison circuit. The comparison circuit comprises: A first comparator compares the detection voltage with a specified first reference voltage and outputs a first comparison result signal at a zero-crossing detection point when the detection voltage changes from positive to negative; a second comparator, which compares the detection voltage with a specified second reference voltage which is lower than the first reference voltage, and outputs a second comparison result signal at a zero-crossing detection point when the detection voltage changes from negative to positive; A first pulse generating circuit detects the rising edge of the first comparison result signal and outputs a first pulse signal; A second pulse generating circuit detects the rising edge of the second comparison result signal and outputs a second pulse signal; as well as A set-reset type flip-flop has a set terminal, a reset terminal and an output terminal, the first pulse signal is input to the set terminal, the second pulse signal is input to the reset terminal, and the comparison result signal of the comparison circuit is output from the output terminal, The control circuit calculates a reference voltage Vref for making the delay when detecting the zero value of the current of the inductor substantially zero based on the detected input voltage Vin, the detected output voltage Vout, the preset delay time Tdelay, the inductance value L of the inductor, the conversion coefficient Rshunt when converting the current detected by the first detection circuit into a voltage, the power supply voltage Vcc, and the gain G, and outputs the reference voltage to the comparison circuit using the following formula: The first pulse generating circuit includes: a first differentiating circuit that differentiates the first comparison result signal; and a first protection diode that is connected to the first differentiating circuit and does not output a negative voltage. The second pulse generating circuit comprises: a second differentiating circuit that differentiates the second comparison result signal; and a second protection diode that is connected to the second differentiating circuit and does not output a negative voltage. The first pulse generating circuit comprises: a third comparator that compares the voltage output from the first protection diode with a voltage that is half the power supply voltage, and outputs a comparison result signal as the first pulse signal; as well as The second pulse generating circuit includes a fourth comparator that compares the voltage output from the second protection diode with a voltage that is half the power supply voltage and outputs a comparison result signal as the second pulse signal.
2. The control circuit of the power conversion device according to claim 1, wherein: The control circuit calculates the reference voltage in consideration of a negative current required for soft switching of the power conversion device.
3. The control circuit of the power conversion device according to claim 1, wherein: The control circuit has a built-in DA converter, and the DA converter performs DA conversion on the voltage converted by the first detection circuit.
4. A power conversion device, characterized in that: A control circuit having a power conversion device, The control circuit includes a power factor improvement circuit, wherein the power factor improvement circuit includes an inductor and operates in a current critical mode. The control circuit comprises: a first detection circuit that detects a current, amplifies a voltage corresponding to the detected current by a predetermined gain, and outputs the amplified voltage as a detection voltage, wherein the current is a current of the inductor, or a current corresponding to or including the current of the inductor; A comparison circuit, which compares the detection voltage with a specified reference voltage and outputs a comparison result signal; a second detection circuit, detecting an input voltage of the power conversion device; as well as A third detection circuit detects the output voltage of the power conversion device, The control circuit calculates a reference voltage for making the delay when detecting the zero value of the current of the inductor substantially zero, and outputs the calculated reference voltage to the comparison circuit. The comparison circuit comprises: A first comparator compares the detection voltage with a specified first reference voltage and outputs a first comparison result signal at a zero-crossing detection point when the detection voltage changes from positive to negative; a second comparator, which compares the detection voltage with a specified second reference voltage which is lower than the first reference voltage, and outputs a second comparison result signal at a zero-crossing detection point when the detection voltage changes from negative to positive; A first pulse generating circuit detects the rising edge of the first comparison result signal and outputs a first pulse signal; A second pulse generating circuit detects the rising edge of the second comparison result signal and outputs a second pulse signal; as well as A set-reset type flip-flop has a set terminal, a reset terminal and an output terminal, the first pulse signal is input to the set terminal, the second pulse signal is input to the reset terminal, and the comparison result signal of the comparison circuit is output from the output terminal, The control circuit calculates a reference voltage Vref for making the delay when detecting the zero value of the current of the inductor substantially zero based on the detected input voltage Vin, the detected output voltage Vout, the preset delay time Tdelay, the inductance value L of the inductor, the conversion coefficient Rshunt when converting the current detected by the first detection circuit into a voltage, the power supply voltage Vcc, and the gain G, and outputs the reference voltage to the comparison circuit using the following formula: The first pulse generating circuit includes: a first differentiating circuit that differentiates the first comparison result signal; and a first protection diode that is connected to the first differentiating circuit and does not output a negative voltage. The second pulse generating circuit comprises: a second differentiating circuit that differentiates the second comparison result signal; and a second protection diode that is connected to the second differentiating circuit and does not output a negative voltage. The first pulse generating circuit comprises: a third comparator that compares the voltage output from the first protection diode with a voltage that is half the power supply voltage, and outputs a comparison result signal as the first pulse signal; as well as The second pulse generating circuit includes a fourth comparator that compares the voltage output from the second protection diode with a voltage that is half the power supply voltage and outputs a comparison result signal as the second pulse signal.
5. The power conversion device according to claim 4, wherein: The power conversion device is a switching power supply device.
6. The power conversion device according to claim 4, wherein: The power conversion device is a DC / DC conversion device.