Threshold inverter based on bipolar field effect transistor and quantization method thereof

Abstract

The present application proposes a threshold inverter based on a bipolar field-effect transistor and a quantization method thereof, wherein the threshold inverter includes: a first homogeneous inverter to an Nth homogeneous inverter composed of bipolar field-effect transistors, wherein the first ends of the first to Nth homogeneous inverters are all connected to an input voltage, the second end of the N-1th homogeneous inverter is connected to the third end of the N-1th homogeneous inverter and outputs the output voltage of the N-1th homogeneous inverter, the second end of the N-1th homogeneous inverter is connected to a first power supply voltage, and the third end of the first homogeneous inverter is connected to a second power supply voltage. The design parameters responsible for achieving device threshold voltage matching in the present application are completely borne by the channel length parameters of the bipolar field-effect transistor, and there is no need to involve matching between transistors of different doping types. The design is simple and can be applied to occasions such as flash analog-to-digital converters (Flash ADCs).

Description

Technical Field

[0001] The present application relates to the field of semiconductor technology, and in particular to a threshold inverter based on a bipolar field effect transistor and a quantization method thereof. Background Art

[0002] Threshold Inverter Quantization (TIQ) technology plays a crucial role in low-power, fast voltage comparisons in applications such as Flash ADCs. Early Flash ADCs used a basic resistor divider network to generate symbol boundaries. A comparator then compared each digital output point with the input voltage in parallel to generate a digital code. This process constantly draws current from the resistor network to the signal ground, generating heat dissipation. Each output port also requires a comparator, making the circuit structure complex. Researchers have proposed leveraging the extremely low static power consumption and high voltage transfer gain of CMOS (Complementary Metal Oxide Semiconductor) inverters to form a TIQ array, replacing the original resistor divider network and comparators. The inverter output directly participates in subsequent decoding, eliminating the comparator and reducing circuit complexity. Furthermore, by completely eliminating the passive resistor network, leakage current to the signal ground is avoided, resulting in low power consumption. The rise of research on low-dimensional semiconductor materials has spurred research on their applications in traditional CMOS logic. These materials (including carbon nanotubes, molybdenum disulfide, and other two-dimensional materials) are generally believed to possess high carrier mobility and strong electrostatic control capabilities, representing the future direction of information processing device evolution. Therefore, some researchers are also studying the use of emerging low-dimensional semiconductor materials to realize TIQ arrays.

[0003] Whether based on traditional bulk silicon or emerging low-dimensional semiconductor materials, existing designs share similar TIQ topologies, requiring the design of a series of discrete, threshold-voltage-matched CMOS inverter arrays. However, since the threshold voltage design of CMOS inverters requires matching P-type transistors and N-type transistors, and low-dimensional semiconductor materials lack mature growth and doping processes, this device matching requirement is difficult to implement in low-dimensional materials, hindering the full potential of these materials. Summary of the Invention

[0004] The present application provides a threshold inverter based on a bipolar field-effect transistor and a quantization method thereof. The design parameters responsible for achieving device threshold voltage matching are completely borne by the channel length parameters of the bipolar field-effect transistor, and there is no need to involve matching between transistors of different doping types. The design is simple and can be applied to occasions such as flash analog-to-digital converters (Flash ADCs).

[0005] In a first aspect, the present application provides a threshold inverter based on a bipolar field-effect transistor, comprising: a first homogeneous inverter to an Nth homogeneous inverter composed of bipolar field-effect transistors, wherein the first ends of the first to Nth homogeneous inverters are all connected to an input voltage, the second end of the N-1th homogeneous inverter is connected to the third end of the Nth homogeneous inverter and outputs the output voltage of the N-1th homogeneous inverter, the second end of the Nth homogeneous inverter is connected to a first power supply voltage, and the third end of the first homogeneous inverter is connected to a second power supply voltage.

[0006] Optionally, the transition threshold voltages from the first uniform inverter to the Nth uniform inverter are controlled by the ratio of the pull-up network to the pull-down network in the uniform inverter.

[0007] Optionally, the ratio of the pull-up network to the pull-down network in the homogeneous inverter is determined by channel parameters in the bipolar field effect transistor, wherein the channel parameters include channel length or bipolar field effect transistor width.

[0008] Optionally, the device structure of the bipolar field effect transistor includes a back gate structure and a top gate structure.

[0009] Optionally, the gate-source voltage V GS When it is negative, the drain-source current I ds With the gate-source voltage V GS The gate-source voltage V GS When it is positive, the drain-source current I ds With the gate-source voltage V GS increases with the increase of the drain-source voltage V DS Increase and grow.

[0010] Optionally, different transition threshold voltages are outputted by bipolar field effect transistors with different channel lengths through the threshold inverter.

[0011] A second aspect of the present application provides a quantization method for a threshold inverter based on a bipolar field effect transistor, comprising the following steps: determining channel length parameters of a plurality of bipolar field effect transistors according to the parameters of the threshold inverter; connecting the plurality of bipolar field effect transistors having the channel length parameters in series to obtain the threshold inverter having equivalent pull-up and pull-down networks with different proportions; and outputting output waveforms with different jump threshold voltages through the threshold inverter.

[0012] Optionally, the device structure of the bipolar field effect transistor includes a back gate structure and a top gate structure.

[0013] Optionally, the gate-source voltage V GS When it is negative, the drain-source current I ds With the gate-source voltage V GS The gate-source voltage V GS When it is positive, the drain-source current I ds With the gate-source voltage V GS increases with the increase of the drain-source voltage V DS Increase and grow.

[0014] The threshold inverter based on bipolar field effect transistors and its quantization method of the present application, by connecting the first homogeneous inverter to the Nth homogeneous inverter composed of bipolar field effect transistors in series to form a threshold inverter, the number of transistors can be reduced by half, the circuit structure is simpler, and due to the series structure, the transistor matching is completely controlled by the channel length, that is, the electrode distance, so it is also easier to implement and can be applied to occasions such as flash analog-to-digital converters (Flash ADCs).

[0015] Additional aspects and advantages of the present application will be given in part in the description below, and in part will become apparent from the description below, or will be learned through practice of the present application. BRIEF DESCRIPTION OF THE DRAWINGS

[0016] The above and / or additional aspects and advantages of the present application will become apparent and easily understood from the following description of the embodiments in conjunction with the accompanying drawings, in which:

[0017] Figure 1 A schematic diagram of a threshold inverter structure based on a bipolar field effect transistor provided in accordance with an embodiment of the present application;

[0018] Figure 2 A schematic diagram of a transfer characteristic curve of a bipolar field effect transistor provided according to an embodiment of the present application;

[0019] Figure 3 A schematic diagram of the structure of a bipolar field effect transistor provided according to an embodiment of the present application;

[0020] Figure 4 A schematic diagram of another bipolar field effect transistor structure provided according to an embodiment of the present application;

[0021] Figure 5 A schematic diagram of a bipolar field effect transistor circuit symbol provided according to an embodiment of the present application;

[0022] Figure 6 A schematic diagram of a series connection structure of two bipolar field effect transistors provided according to an embodiment of the present application;

[0023] Figure 7A schematic diagram of a voltage transfer curve after two bipolar field effect transistors are connected in series according to an embodiment of the present application;

[0024] Figure 8 This is a schematic diagram of an equivalent connection of two bipolar field effect transistors connected in series according to an embodiment of the present application;

[0025] Figure 9 A schematic diagram of a series structure of four bipolar field effect transistors provided according to an embodiment of the present application;

[0026] Figure 10 A schematic diagram of simulation results of a series structure of four bipolar field effect transistors provided according to an embodiment of the present application;

[0027] Figure 11 1 is an overall structural diagram of an N-output threshold inverter based on a back-gate bipolar field-effect transistor according to an embodiment of the present application;

[0028] Figure 12 The present invention provides a flowchart of a quantization method of a threshold inverter based on a bipolar field effect transistor according to an embodiment of the present application. DETAILED DESCRIPTION

[0029] The following describes in detail embodiments of the present application, examples of which are shown in the accompanying drawings, wherein the same or similar reference numerals throughout represent the same or similar elements or elements having the same or similar functions. The embodiments described below with reference to the accompanying drawings are exemplary and are intended to be used to explain the present application, and should not be construed as limiting the present application.

[0030] Specifically, Figure 1 Schematic diagram of a threshold inverter structure based on a bipolar field effect transistor provided according to an embodiment of the present application.

[0031] like Figure 1 As shown, the threshold inverter 10 based on bipolar field effect transistors includes: a first uniform inverter 100 to an Nth uniform inverter 200 composed of bipolar field effect transistors.

[0032] The first end 1 of the first to Nth homogeneous inverters are all connected to the input voltage Vin, the second end 2 of the N-1th homogeneous inverter is connected to the third end 3 of the Nth homogeneous inverter, and outputs the output voltage VoutN-1 of the N-1th homogeneous inverter, the second end 2 of the Nth homogeneous inverter is connected to the first power supply voltage VDD, and the third end 3 of the first homogeneous inverter is connected to the second power supply voltage VSS.

[0033] It can be understood that the present application relates to a new application based on bipolar transistors (Ambipolar-Field-Effect-Transistor, AFET), which can implement threshold inverter quantization TIQ technology with a relatively simple structure and can be applied to occasions such as flash analog-to-digital converters (Flash ADCs).

[0034] Optionally, the gate-source voltage V GS When it is negative, the drain-source current I ds With the gate-source voltage V GS The gate-source voltage V GS When it is positive, the drain-source current I ds With the gate-source voltage V GS increases with the increase of the drain-source voltage V DS Increase and grow.

[0035] According to the results that have been widely verified by experiments, low-dimensional semiconductors such as carbon nanotubes or black scale, molybdenum disulfide, and tungsten diselenide can be used as channels and suitable metals as electrodes to achieve AFET characteristics. The difference between AFET and conventional field-effect transistors (FET) is that the former can be used at V GS Under the control of , both holes and electrons can conduct electricity; while the ordinary FET can only conduct electricity with one type of carrier. Figure 2 As shown, it is a typical transfer characteristic curve of AFET, which has two branches, the drain-source current I ds With the gate-source voltage V GS The right branch I ds With V GS The curve increases with the increase of V DS This is the core feature that this application relies on. Therefore, the term AFET referred to in this application does not essentially require any special restrictions on the device structure and materials. It is sufficient to achieve a typical transfer characteristic curve, such as Figure 3 and Figure 4 As shown, there are two possible AFET device structures, where Figure 3 It is a back-gate structure. Figure 4 It is a top gate structure. In the following circuit design, AFET is represented by a unified circuit symbol, such as Figure 5 shown.

[0036] Optionally, the transition threshold voltages from the first uniform inverter to the Nth uniform inverter are controlled by the ratio of the pull-up network to the pull-down network in the uniform inverter.

[0037] Optionally, the ratio of the pull-up network to the pull-down network in the homogeneous inverter is determined by channel parameters in the bipolar field effect transistor, wherein the channel parameters include the channel length or the width of the bipolar field effect transistor.

[0038] Because AFET can form a homogeneous inverter, that is, the pull-up and pull-down networks are both AFET inverters, the inverter's transition threshold voltage is controlled by the ratio of the channel lengths of the pull-up and pull-down AFETs (this ratio is referred to as the ratio Z of the pull-up and pull-down networks in this application). Figure 6 As shown, a homogeneous inverter is formed by two AFETs (referred to as AT1 and AT2) with channel lengths L1 and L2 respectively. The supply voltages are VDD and VSS respectively. The input voltage is recorded as Vin and the output voltage is recorded as Vout. The typical voltage transfer curve generated is as follows: Figure 7 As shown, the threshold voltage point of this inverter curve (i.e., the Vin voltage that causes Vout to produce a steep falling edge) is controlled by the pull-up / pull-down network ratio Z=L2 / L1 of the inverter. The smaller the ratio, the larger the threshold voltage.

[0039] Optionally, different transition threshold voltages are outputted by bipolar field effect transistors with different channel lengths through a threshold inverter.

[0040] Using the series equivalence principle, an AFET with a length of L1 and another with a length of L2 connected in series can be approximately equivalent to an AFET with a length of L1+L2. Figure 8 As shown, a deformed AFET symbol is used to represent a device whose equivalent channel length is the sum of the channel lengths of the original devices.

[0041] Therefore, when N AFETs are connected in series to form N-1 series nodes, the equivalent pull-up and pull-down networks of different proportions will be seen, so that the output waveform will show different transition threshold voltages, thus realizing a TIQ array with a series of different threshold voltages. Figure 9 The circuit diagram is shown in Figure 1. It is based on the case of N=4. The same applies to other cases where N is used. The channel lengths of the four AFETs are set to L1, L2, L 3, L4, so the equivalent pull-up and pull-down network ratios seen at the output nodes Vout1, Vout2 and Vout3 are:

[0042] Z1=(L2+L3+L4) / L1

[0043] Z2=(L3+L4) / (L1+L2)

[0044] Z3=(L4) / (L1+L2+L3)

[0045] Therefore, there is a strict monotonic relationship between Z1, Z2, and Z3: Z1>Z2>Z3.

[0046] Therefore, the threshold voltages of the three output nodes Vout1, Vout2 and Vout3 increase in sequence. The results of Cadence simulation are as follows: Figure 10 As shown in the simulation, a 0.18µm process is used. The figure demonstrates that the output node voltage can be sequentially pulled down, achieving the desired TIQ technology. The pull-down voltage interval can be adjusted by adjusting the trench length. This example only illustrates the case of three outputs; for higher-bit outputs, the circuit structure and output characteristics are identical.

[0047] The overall structure of the N-output TIQ device based on the back-gate AFET is shown in the figure below. Figure 11 As shown in the figure, the design parameters responsible for achieving device threshold voltage matching are completely borne by the channel length parameters, and there is no need to involve matching between transistors of different doping types, so it has a simple design.

[0048] Based on the above embodiment, there are other ways to realize AFET. For example, an NMOSFET and a PMOSFET connected in parallel can also be equivalent to an AFET. In addition to the channel length, the transistor width can also be used as a parameter to achieve threshold matching.

[0049] According to the threshold inverter based on bipolar field effect transistors proposed in this application, by connecting the first homogeneous inverter to the Nth homogeneous inverter composed of bipolar field effect transistors in series to form a threshold inverter, the number of transistors can be reduced by half, the circuit structure is simpler, and due to the series structure, the transistor matching is completely controlled by the channel length, that is, the electrode distance, so it is also easier to implement and can be applied to occasions such as flash analog-to-digital converters (Flash ADCs).

[0050] Next, a quantization method for a threshold inverter based on a bipolar field effect transistor according to an embodiment of the present application will be described with reference to the accompanying drawings.

[0051] Figure 12 The present invention provides a flowchart of a quantization method of a threshold inverter based on a bipolar field effect transistor according to an embodiment of the present application.

[0052] like Figure 12 As shown, the quantization method of the threshold inverter based on the bipolar field effect transistor includes the following steps:

[0053] Step S101 : determining channel length parameters of a plurality of bipolar field effect transistors according to parameters of a threshold inverter.

[0054] In step S102 , a plurality of bipolar field effect transistors having channel length parameters are connected in series to obtain a threshold inverter having equivalent pull-up and pull-down networks with different ratios.

[0055] Step S103 : outputting output waveforms with different transition threshold voltages through a threshold inverter.

[0056] Optionally, the device structure of the bipolar field effect transistor includes a back gate structure and a top gate structure.

[0057] Optionally, the gate-source voltage V GS When it is negative, the drain-source current I ds With the gate-source voltage V GS The gate-source voltage V GS When it is positive, the drain-source current I ds With the gate-source voltage V GS increases with the increase of the drain-source voltage V DS Increase and grow.

[0058] It should be noted that the above explanation of the embodiment of the threshold inverter based on bipolar field effect transistor is also applicable to the quantization method of the threshold inverter based on bipolar field effect transistor in this embodiment, which will not be repeated here.

[0059] The quantization method of the threshold inverter based on bipolar field effect transistors of the present application forms a threshold inverter by connecting the first homogeneous inverter to the Nth homogeneous inverter composed of bipolar field effect transistors in series. The number of transistors can be reduced by half, the circuit structure is simpler, and due to the series structure, the transistor matching is completely controlled by the channel length, that is, the electrode distance, so it is also easier to implement and can be applied to occasions such as flash analog-to-digital converters (Flash ADCs).

[0060] In the description of this specification, the description with reference to the terms "one embodiment", "some embodiments", "example", "specific example", or "some examples" means that the specific features, structures, materials or characteristics described in conjunction with the embodiment or example are included in at least one embodiment or example of the present application. In this specification, the schematic representations of the above terms do not necessarily refer to the same embodiment or example. Moreover, the specific features, structures, materials or characteristics described can be combined in any one or N embodiments or examples in a suitable manner. In addition, those skilled in the art can combine and combine different embodiments or examples described in this specification and features of different embodiments or examples without contradiction.

[0061] Furthermore, the terms "first" and "second" are used for descriptive purposes only and should not be understood to indicate or imply relative importance or implicitly specify the number of technical features indicated. Thus, a feature specified as "first" or "second" may explicitly or implicitly include at least one such feature. In the description of this application, "N" means at least two, for example, two, three, etc., unless otherwise specifically defined.

[0062] Any process or method description in a flowchart or otherwise described herein may be understood to represent a module, fragment or portion of code comprising one or more executable instructions for implementing the steps of a custom logical function or process, and the scope of the preferred embodiments of the present application includes alternative implementations in which functions may be performed out of the order shown or discussed, including performing functions in a substantially simultaneous manner or in reverse order depending on the functions involved, which should be understood by those skilled in the art to which the embodiments of the present application belong.

[0063] It should be understood that various parts of the present application can be implemented using hardware, software, firmware, or a combination thereof. In the above embodiment, the N steps or methods can be implemented using software or firmware stored in a memory and executed by a suitable instruction execution system. For example, if implemented using hardware, as in another embodiment, any one of the following technologies known in the art or a combination thereof can be used to implement: a discrete logic circuit having a logic gate circuit for implementing a logic function on a data signal, an application-specific integrated circuit having a suitable combination of logic gate circuits, a programmable gate array (PGA), a field programmable gate array (FPGA), etc.

[0064] Those skilled in the art will understand that all or part of the steps in the method of the above embodiment can be completed by instructing related hardware through a program, and the program can be stored in a computer-readable storage medium. When the program is executed, it includes one or a combination of the steps of the method embodiment.

Claims

1. A threshold inverter based on a bipolar field effect transistor, characterized in that: include: The first to Nth homogeneous inverters are composed of bipolar field effect transistors, wherein: The first ends of the first to Nth uniform inverters are all connected to an input voltage, the second end of the N-1th uniform inverter is connected to the third end of the Nth uniform inverter and outputs the output voltage of the N-1th uniform inverter, the second end of the Nth uniform inverter is connected to a first power supply voltage, and the third end of the first uniform inverter is connected to a second power supply voltage, where N is a natural number and is greater than or equal to 3; The transition threshold voltages of the first uniform inverter to the Nth uniform inverter are controlled by the ratio of the pull-up and pull-down networks in the uniform inverter; The ratio of the pull-up network to the pull-down network in the homogeneous inverter is determined by the channel parameters of the bipolar field effect transistor, wherein the channel parameters include the channel length or the width of the bipolar field effect transistor; The device structure of the bipolar field effect transistor includes a back gate structure and a top gate structure.

2. The threshold inverter based on bipolar field effect transistor according to claim 1, characterized in that: The gate-source voltage V in the transfer characteristic curve of the bipolar field effect transistor GS When it is negative, the drain-source current I ds With the gate-source voltage V GS The gate-source voltage V GS When it is positive, the drain-source current I ds With the gate-source voltage V GS increases with the increase of the drain-source voltage V DS Increase and grow.

3. The threshold inverter based on a bipolar field effect transistor according to any one of claims 1 to 2, characterized in that: Different transition threshold voltages are outputted by bipolar field effect transistors with different channel lengths through the threshold inverter.

4. A quantization method for a threshold inverter based on a bipolar field effect transistor, characterized in that: The following steps are involved: Determining channel length parameters of a plurality of bipolar field effect transistors according to the parameters of the threshold inverter; Connecting the plurality of bipolar field effect transistors having the channel length parameters in series to obtain the threshold inverter having equivalent pull-up and pull-down networks with different ratios; Output waveforms with different transition threshold voltages are outputted through the threshold inverter.

5. The method according to claim 4, characterized in that The device structure of the bipolar field effect transistor includes a back gate structure and a top gate structure.

6. The method according to claim 4, characterized in that The gate-source voltage V in the transfer characteristic curve of the bipolar field effect transistor GS When it is negative, the drain-source current I ds With the gate-source voltage V GS The gate-source voltage V GS When it is positive, the drain-source current I ds With the gate-source voltage V GS increases with the increase of the drain-source voltage V DS Increase and grow.

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