A single-layer P-type semiconductor phase vanadium diselenide single crystal and its salt-assisted growth method and back-gate field-effect transistor

Abstract

The present invention discloses a single-layer P-type semiconductor phase vanadium diselenide single crystal, a salt-assisted synthesis method thereof, and a back-gate field-effect transistor thereof. The growth method adopts a chemical vapor deposition method: using metal precursors vanadium pentoxide and potassium iodide as raw materials, and placing selenium powder in a tube furnace at the same time, heating and raising the temperature, and performing a chemical vapor deposition reaction in the furnace to obtain a single-layer P-type semiconductor phase vanadium diselenide single crystal. This growth method can be used to synthesize thin film materials of transition metal chalcogenides in batches, with simple preparation conditions, low cost, and good repeatability. The single-layer P-type semiconductor phase vanadium diselenide single crystal has a structure of a single layer of H-phase VSe2 and a morphology of a two-dimensional thin film with uniform thickness. The back-gate field-effect transistor is prepared using a single-layer P-type semiconductor phase vanadium diselenide single crystal as the material. Experiments have shown that the source-drain current of the device decreases as the gate voltage increases in the positive direction, proving that the carriers of the semiconductor material are dominated by holes and are P-type semiconductors.

Description

Technical Field

[0001] The present invention relates to the technical field of semiconductor materials, and in particular to a single-layer P-type semiconductor phase vanadium diselenide single crystal, a growth method thereof, and a back-gate field-effect transistor thereof. Background Art

[0002] Transition metal dichalcogenides (TMDs) are a class of layered compounds composed of transition metals (M, including metals from the fourth to eighth subgroups such as Ti, V, Mo and Re) and chalcogen elements (X=S, Se, Te). Usually, the thickness of a single layer of TMDs is about 0.6-0.7nm, consisting of three atomic layers of XMX, and the metal coordination can be trigonal prismatic (H phase) or octahedral (T phase). Different crystal structures lead to different physical and chemical properties, such as electronic structure, optical properties, magnetism and catalytic activity. Therefore, the controllable synthesis of phases is crucial to the study of physical properties and applications of materials. Among them, vanadium diselenide (VSe2) is one of the typical transition metal dichalcogenides. Due to its tetravalent vanadium ion (V 4+ ) Unpaired 3d electrons have strong electronic coupling, and VSe2 is predicted to exhibit special physical properties such as charge / spin density waves and ferromagnetism. Like most TMDs, VSe2 also contains at least two crystal configurations: H phase and T phase. The T phase is metallic, with ultra-high electrical conductivity, excellent electrocatalytic activity, room-temperature charge density waves, room-temperature magnetism, and ferromagnetism. On the contrary, the H phase is theoretically considered to be a semiconductor; at the same time, single-layer H-phase VSe2 has intrinsic valley polarization, which can exhibit interesting physical phenomena such as optical band gap dependent on circular polarization rotation and anomalous valley Hall effect. At present, single-layer T-phase VSe2 has been successfully synthesized on HOPG substrate by molecular beam epitaxy (MBE), and can also be obtained in bulk by mechanical / liquid phase exfoliation. However, single-layer H-phase VSe2 has not yet been successfully synthesized directly, so most research on H-phase VSe2 remains in the theoretical stage.

[0003] Regarding the preparation of single-layer TMDs, the existing mechanical exfoliation method and liquid-phase exfoliation method are both based on bulk TMDs single crystals. Although highly crystalline two-dimensional TMDs single crystals can be obtained by mechanical exfoliation, the lateral size of the obtained two-dimensional nanosheets is difficult to exceed the micron level, and the thickness is uneven and the yield is low. The liquid-phase exfoliation method uses ion embedding, exchange and ultrasonic technology to assist in the exfoliation of layered compounds. However, the size of the resulting nanosheets is also small and the thickness is uneven. Unnecessary defects or doping may be introduced during the exfoliation process. Although molecular beam epitaxy can control the element ratio to prepare large-area two-dimensional thin films, the growth conditions are harsh, the equipment requirements are high, and non-ideal grain boundaries and defects may exist, thereby affecting the material properties. Moreover, none of the above methods can directly obtain a single-layer H-phase VSe2. Summary of the Invention

[0004] In order to overcome the shortcomings of the prior art, one of the purposes of the present invention is to provide a salt-assisted growth method for a single-layer P-type semiconductor phase vanadium diselenide single crystal, which can directly obtain a single-layer semiconductor phase vanadium diselenide single crystal with simple preparation conditions, low cost and good repeatability; the second purpose of the present invention is to provide a single-layer P-type semiconductor phase vanadium diselenide single crystal, that is, a single-layer H-phase VSe2, which lays the foundation for the subsequent specific applications of semiconductor phase vanadium diselenide single crystal; the third purpose of the present invention is to provide a back-gate field effect transistor, which is prepared using the single-layer P-type semiconductor phase vanadium diselenide single crystal and has obvious semiconductor properties.

[0005] One of the purposes of the present invention is achieved by the following technical solution:

[0006] A salt-assisted growth method for a single-layer P-type semiconductor phase vanadium diselenide single crystal comprises the following steps:

[0007] 1) uniformly mixing a metal precursor, vanadium pentoxide, and potassium iodide to obtain a mixture;

[0008] 2) placing the mixture obtained in step 1) in a quartz boat, placing a fluorphlogopite sheet on top of the mixture, and then placing the quartz boat containing the mixture and the fluorphlogopite sheet in a tube furnace; simultaneously weighing selenium powder and placing it in another quartz boat, and then placing the quartz boat containing the selenium powder at the air inlet end of the tube furnace, so that the carrier gas entering the tube furnace first passes through the quartz boat containing the selenium powder and then passes through the quartz boat containing the mixture and the fluorphlogopite sheet;

[0009] 3) Introduce argon gas into the tube furnace to remove the residual air in the tube furnace;

[0010] 4) The carrier is introduced into a tube furnace, and then heated to carry out a chemical vapor deposition reaction in the furnace;

[0011] 5) After the reaction is completed, the tube furnace is removed to expose the substrate outside the heating zone for rapid cooling; at the same time, the hydrogen gas is turned off and the substrate is cooled to room temperature to obtain a single-layer P-type semiconductor phase vanadium diselenide single crystal.

[0012] Furthermore, in step 1), the mass ratio of the metal precursor vanadium pentoxide to the potassium iodide is 5 to 10:2.

[0013] Furthermore, in step 2), the mass ratio of the mixture of step 1) to the selenium powder is 0.3 to 0.8:1.

[0014] Furthermore, in step 2), the quartz boat containing selenium powder is placed at the air inlet end of the tube furnace and is 5 to 7 cm away from the fluorphlogopite sheet.

[0015] Furthermore, in step 4), a carrier gas of a mixture of argon and hydrogen in a volume ratio of 10:1 is introduced into the tubular furnace, the tubular furnace is adjusted to 500-700°C within 10-15 minutes, and kept warm for 10-20 minutes, and a chemical vapor deposition reaction is carried out at normal pressure.

[0016] Furthermore, in step 5), after the reaction is completed, the tube furnace is quickly removed to expose the substrate outside the heating zone for rapid cooling; at the same time, the hydrogen gas is turned off, the argon flow rate is adjusted to 200 sccm, and the substrate is cooled to room temperature.

[0017] Furthermore, the method also includes step 6), spin-coating a PMMA anisole solution with a concentration of 3 to 5% on the surface of the mica sheet of the single-layer P-type semiconductor phase vanadium diselenide single crystal in step 5), and baking it at 100 to 150°C for 5 to 10 minutes; then immersing it in deionized water, separating the PMMA and the grown VSe2 from the mica substrate; then using a target substrate to pick up the PMMA / VSe2 film and dry it; finally, removing the PMMA with acetone vapor to obtain VSe2 nanosheets.

[0018] Furthermore, the method further includes step 7), wherein the morphology and thickness of the VSe2 nanosheets are observed using an optical microscope, a scanning electron microscope, and an atomic force microscope.

[0019] The second object of the present invention is achieved by adopting the following technical solution:

[0020] A single-layer P-type semiconductor phase vanadium diselenide single crystal is prepared by the salt-assisted growth method of the single-layer P-type semiconductor phase vanadium diselenide single crystal.

[0021] The third object of the present invention is achieved by adopting the following technical solution:

[0022] A back-gate field-effect transistor is disclosed. The preparation method of the back-gate field-effect transistor comprises the following steps: transferring a VSe2 nanosheet from which PMMA has been removed onto a SiO2 / Si substrate, preparing an electrode pattern by electron beam exposure technology, and then using electron beam evaporation to deposit 10nm of titanium and 70nm of gold as electrodes to obtain the back-gate field-effect transistor; and collecting the electrical properties of the back-gate field-effect transistor by using a semiconductor analyzer and a physical property measurement system.

[0023] Compared with the prior art, the present invention has the following beneficial effects:

[0024] (1) The salt-assisted growth method of a single-layer P-type semiconductor phase vanadium diselenide single crystal of the present invention adopts a chemical vapor deposition method: metal precursors vanadium pentoxide and potassium iodide are used as raw materials, and selenium powder is placed in a tube furnace at the same time, heated and heated, and the metal precursors vanadium pentoxide, potassium iodide and selenium powder undergo a chemical vapor deposition reaction to obtain a single-layer P-type semiconductor phase vanadium diselenide single crystal, which solves the current problem that a single-layer semiconductor phase vanadium diselenide single crystal cannot be directly obtained. The thin film material of transition metal chalcogenides (TMDs) can be synthesized in batches, and the preparation conditions are simple, the cost is low, and the repeatability is good. It can lay a foundation for the subsequent specific applications of semiconductor phase vanadium diselenide single crystals.

[0025] (2) The single-layer P-type semiconductor phase vanadium diselenide single crystal of the present invention has a structure of a single-layer H-phase VSe2 and a morphology of a two-dimensional single crystal with uniform thickness.

[0026] (3) The back-gate field-effect transistor of the present invention is prepared using a single-layer P-type semiconductor phase vanadium diselenide single crystal as a raw material. Experiments have shown that the source-drain current of the device decreases as the gate voltage increases in the positive direction, proving that the carriers of the semiconductor material are dominated by holes and are P-type semiconductors. BRIEF DESCRIPTION OF THE DRAWINGS

[0027] Figure 1 is a schematic diagram of a growth device of the present invention;

[0028] Figure 2 The optical microscope image (a), scanning electron microscope image (b) and atomic force microscope image (c) of the triangular VSe2 single crystal nanosheets grown in Example 1;

[0029] Figure 3 The Raman spectra (a) and optical microscope images (b) corresponding to the triangular VSe2 single crystal nanosheets grown in Examples 1, 2, and 3 are shown.

[0030] Figure 4 Transmission electron microscope image of the H-phase VSe2 single crystal nanosheet grown in Example 1 and the corresponding selected area electron diffraction pattern (a) and comparison with the existing T-phase VSe2 (bf).

[0031] Figure 5 This is a scanning transmission electron microscope image of the H-phase VSe2 single crystal nanosheet grown in Example 1.

[0032] Figure 6 Device optical microscope image (a) and main electrical characterization (bc) of the H-phase VSe2 single crystal nanosheet prepared in Example 1. DETAILED DESCRIPTION

[0033] The present invention will be further described below in conjunction with the accompanying drawings and specific implementation methods. It should be noted that, under the premise of no conflict, the various embodiments or technical features described below can be arbitrarily combined to form new embodiments.

[0034] Example 1

[0035] A salt-assisted growth method for a single-layer P-type semiconductor phase vanadium diselenide single crystal comprises the following steps:

[0036] 1) Weigh 70 mg of the metal precursor V2O5 and KI in a mass ratio of 5:2 and place the mixture in a quartz boat;

[0037] 2) The mixture obtained in step 1) was placed in a quartz boat, a fluorphlogopite sheet was placed on top of the mixture, and the quartz boat was placed in the heating center of a tube furnace; at the same time, 100 mg of selenium powder was weighed in another quartz boat, and the quartz boat containing the selenium powder was placed at the air inlet end of the tube furnace, about 6 cm away from the fluorphlogopite sheet, as shown in FIG. Figure 1 As shown;

[0038] 3) Introduce argon at a flow rate of 200 sccm for more than 10 minutes to remove the residual air in the tube furnace;

[0039] 4) The carrier gas is adjusted to a mixed gas of argon and hydrogen with a volume ratio of 30:3 and introduced into the tubular furnace; the tubular furnace is then controlled to heat to 500°C within 12 minutes and kept at this temperature for 10 minutes, so that the material in the tubular furnace undergoes a chemical vapor deposition reaction at normal pressure.

[0040] 5) After the reaction is completed, the tube furnace is quickly removed to expose the mica substrate outside the heating zone for rapid cooling; at the same time, the hydrogen gas is turned off, the argon gas flow rate is adjusted to 200 sccm, and the substrate is cooled to room temperature to obtain a single-layer P-type semiconductor phase vanadium diselenide single crystal.

[0041] 6) To further characterize the obtained VSe2, a polymethyl methacrylate (PMMA)-assisted wet transfer method was used to transfer the sample. The specific steps are as follows: First, a 3% PMMA anisole solution was spin-coated at 2000 rpm for 60 seconds onto the surface of the mica sheet on which VSe2 was grown, and then baked at 150°C for 5 minutes. The mica sheet was then immersed in deionized water, and the water tension was used to separate the PMMA and the grown VSe2 from the mica substrate to obtain a PMMA / VSe2 film. The PMMA / VSe2 film was then removed and dried using an electron microscope copper mesh or SiO2 / Si substrate as the target substrate. Finally, the PMMA was removed with acetone vapor for the next characterization step.

[0042] 7) The present invention mainly uses an optical microscope (Leica DMLM), a scanning electron microscope (SEM, JSM-6700F) and an atomic force microscope (AFM, ICON Bruker) to observe the morphology and thickness of the synthesized VSe2 nanosheets. The Raman characterization (Raman, Renishaw RM300) involved uses a 633nm He-Ne laser as the excitation light source, and the light power is controlled below 0.25mW to reduce damage to the sample. At the same time, a 1800mm-1 grating is used to collect data. At the same time, a high-resolution transmission electron microscope (HRTEM, JEM-2100) and a spherical aberration-corrected scanning transmission electron microscope (STEM, JEM-ARM200F) are used to characterize the material structure. Its optical microscope image, scanning electron microscope image and atomic force microscope image are shown in Figure 2. Figure 2 shown.

[0043] A back-gate field-effect transistor is prepared by transferring the VSe2 nanosheets from step 6) onto a 285nm SiO2 / Si substrate, preparing an electrode pattern by electron beam exposure technology (ELPHY Plus, Raith GmbH), and then depositing 10nm titanium (Ti) and 70nm gold (Au) as electrodes by electron beam evaporation (Peva-450E, Yachtron); its electrical properties are obtained by collecting using a semiconductor analyzer (B1500A, Agilent) and a physical property measurement system (PPMS, QuantumDesign).

[0044] Example 2

[0045] The difference between this embodiment and embodiment 1 is that the heating temperature at the center of the tube furnace in embodiment 1 is increased to 550° C., and the other process parameters are exactly the same as those in embodiment 1.

[0046] Example 3

[0047] The difference between this embodiment and embodiment 1 is that the heating temperature at the center of the tube furnace in embodiment 1 is increased to 660° C., and the other process parameters are exactly the same as those in embodiment 1.

[0048] Example 4

[0049] The difference between this embodiment and embodiment 1 is that the metal precursor is not mixed with potassium iodide, potassium iodide is not introduced into the reaction, and the other process parameters are exactly the same as those in embodiment 1.

[0050] from Figure 2 The atomic force microscopy image (c) shows that the thickness of the obtained single-layer VSe2 triangular nanosheet is only about 0.6 nm, which is the thickness of three atoms of a single-layer TMDs. Figure 3The Raman spectra (a) and optical microscope images (b) corresponding to the VSe2 synthesized in Examples 1 to 3 are shown. By comparison, it can be seen that the VSe2 triangular nanosheets synthesized in the present invention have a Raman spectrum of 190 cm -1 The Raman characteristic peak of H phase VSe2 appears at 206 cm, and the Raman characteristic peak of T phase VSe2 is not found. -1 ); At the same time, in Example 1, the Raman characteristic peak (~232cm -1 ) also disappears. In Comparative Example 4, no triangular or hexagonal nanosheets were found on the mica substrate, demonstrating that the introduction of potassium iodide is crucial for the occurrence of the chemical vapor deposition reaction. Because potassium iodide can react with metal precursors to form intermediate products with lower melting points, the low diffusion rate and high mass flux in the reaction system lead to lateral growth of the material in the horizontal direction at lower temperatures instead of vertical growth, thereby obtaining a single layer of VSe2 nanosheets.

[0051] In order to further study the crystal structure of the synthesized H-phase VSe2 nanosheets, we transferred the VSe2 nanosheets to the electron microscope copper grid using the transfer technology in step 6) above for transmission characterization. Figure 4 (a) shows the transmission electron microscope image of the H-phase VSe2 single crystal nanosheet grown in Example 1. Its selected area electron diffraction pattern shows that there is only one set of six-fold symmetric diffraction spots, which proves the single crystal structure of the material and is consistent with the theoretical single crystal diffraction pattern of H-phase VSe2 ( Figure 4 (c)); the distances from its diffraction center to the (100) and (110) crystal planes are ∼3.55 and ∼6.22 1 / nm. Compared with the existing T-phase VSe2, we found that the diffraction intensities of the (100) and (110) crystal planes of the H-phase VSe2 synthesized in this invention are very close, which is consistent with the theoretical value ( Figure 4 (c and f)), while the diffraction intensity of the (100) crystal plane of the T phase is significantly weaker than that of the (110) crystal plane ( Figure 4 (e)). At the same time, the scanning transmission electron microscope image of the H-phase VSe2 single crystal nanosheets grown in Example 1 is as follows Figure 5 As shown, from the enlarged view of its double layer area ( Figure 5 (b)) The spatial occupancy of Se atoms is clearly shown to be consistent with the theoretical results ( Figure 5 (c)) is exactly the same, the interplanar spacing of its (100) plane is about 0.28nm, and the angle with the (110) plane is 60°. Its single layer magnified area ( Figure 5 (d)) shows a typical honeycomb structure of H phase, and the in-plane lattice constant a along the (110) plane is approximately (0.56 / √3), which is consistent with the theoretical value.

[0052] To further demonstrate the semiconductor electrical characteristics of the H-phase VSe2 nanosheets synthesized in the present invention, a back-gate field effect transistor (FET) was prepared based on the single-layer VSe2 single crystal nanosheets grown in Example 1. Figure 6 (a) shows the temperature-dependent resistance characteristic curve obtained from experimental measurements ( Figure 6 (b)) It can be clearly seen that the device resistance increases as the temperature decreases, which is exactly the opposite of the metal property of the existing T-phase VSe2 (resistance decreases as the temperature decreases), proving the semiconductor properties of the H-phase VSe2 material synthesized in the present invention. Figure 6 (c) shows the transfer characteristic curve of the device. Through experiments and fitting data, it can be seen that the source-drain current of the device decreases as the gate voltage increases in the positive direction, proving that the carriers of this semiconductor material are dominated by holes and it is a P-type semiconductor.

[0053] The above embodiments are only preferred embodiments of the present invention and cannot be used to limit the scope of protection of the present invention. Any non-substantial changes and replacements made by technicians in this field on the basis of the present invention fall within the scope of protection required by the present invention.

Claims

1. A salt-assisted growth method for a single-layer P-type semiconductor phase vanadium diselenide single crystal, characterized in that: The following steps are involved: 1) uniformly mixing a metal precursor vanadium pentoxide and potassium iodide to obtain a mixture; in step 1), the mass ratio of the metal precursor vanadium pentoxide to the potassium iodide is 5 to 10:2; 2) placing the mixture obtained in step 1) in a quartz boat, placing a fluorphlogopite sheet on top of the mixture, and then placing the quartz boat containing the mixture and the fluorphlogopite sheet in a tube furnace; simultaneously weighing selenium powder and placing it in another quartz boat, and then placing the quartz boat containing the selenium powder at the gas inlet end of the tube furnace, so that the carrier gas entering the tube furnace first passes through the quartz boat containing the selenium powder and then passes through the quartz boat containing the mixture and the fluorphlogopite sheet; wherein the carrier gas is a mixture of argon and hydrogen in a volume ratio of 10:1; 3) Introduce argon into the tube furnace to remove the residual air in the tube furnace; 4) Introducing a carrier gas into the tube furnace, then heating it to carry out a chemical vapor deposition reaction in the furnace; adjusting the tube furnace to 500-700°C within 10-15 minutes, and maintaining the temperature for 10-20 minutes, and carrying out a chemical vapor deposition reaction under normal pressure; 5) After the reaction is completed, the tube furnace is removed to expose the substrate outside the heating zone for rapid cooling; at the same time, the hydrogen gas is turned off and the substrate is cooled to room temperature to obtain a single-layer P-type semiconductor phase vanadium diselenide single crystal.

2. The salt-assisted growth method of a single-layer P-type semiconductor phase vanadium diselenide single crystal according to claim 1, characterized in that: In step 2), the mass ratio of the mixture of step 1) to the selenium powder is 0.3-0.8:

1.

3. The salt-assisted growth method of a single-layer P-type semiconductor phase vanadium diselenide single crystal according to claim 1, characterized in that: In step 2), the quartz boat containing selenium powder is placed at the air inlet end of the tube furnace and is 5 to 7 cm away from the fluorphlogopite sheet.

4. The salt-assisted growth method of a single-layer P-type semiconductor phase vanadium diselenide single crystal according to claim 1, wherein: In step 5), after the reaction is completed, the tube furnace is quickly removed to expose the substrate outside the heating zone for rapid cooling; at the same time, the hydrogen gas is turned off, the argon gas flow rate is adjusted to 200 sccm, and the substrate is cooled to room temperature.

5. The salt-assisted growth method of a single-layer P-type semiconductor phase vanadium diselenide single crystal according to claim 1, wherein: The method also includes step 6), spin-coating a 3-5% PMMA anisole solution on the surface of a mica sheet of a single-layer P-type semiconductor phase vanadium diselenide single crystal obtained in step 5), and baking it at 100-150°C for 5-10 minutes; then immersing it in deionized water, separating the PMMA and the grown VSe2 from the mica substrate to obtain a PMMA / VSe2 film; then using a target substrate to pick up the PMMA / VSe2 film and dry it; finally, removing the PMMA with acetone vapor to obtain a VSe2 nanosheet.

6. The salt-assisted growth method of a single-layer P-type semiconductor phase vanadium diselenide single crystal according to claim 5, characterized in that: The method further includes step 7), wherein the morphology and thickness of the VSe2 nanosheets are observed using an optical microscope, a scanning electron microscope, and an atomic force microscope.

7. A single-layer P-type semiconductor phase vanadium diselenide single crystal, characterized in that: The monolayer P-type semiconductor phase vanadium diselenide single crystal is prepared by the salt-assisted growth method of any one of claims 1 to 6.

8. A back-gate field-effect transistor, characterized in that: The preparation method of the back-gate field-effect transistor is: transferring the VSe2 nanosheet obtained by the salt-assisted growth method of the single-layer P-type semiconductor phase vanadium diselenide single crystal according to claim 5 or 6 to a SiO2 / Si substrate, preparing an electrode pattern by electron beam exposure technology, and then using electron beam evaporation to deposit titanium and gold as electrodes to obtain a back-gate field-effect transistor; the electrical properties of the back-gate field-effect transistor are collected by a semiconductor analyzer and a physical property measurement system.

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