Method for forming semiconductor structure

Abstract

A method for forming a semiconductor structure includes: providing a substrate; forming a sacrificial structure on the substrate; forming an isolation dielectric layer on the sidewall and top surfaces of the sacrificial structure; forming a first epitaxial layer on the substrate, the first epitaxial layer exposing a portion of the top and sidewall surfaces of the isolation dielectric layer, and forming a second epitaxial layer on the exposed surface of the isolation dielectric layer; performing a modification treatment on the first epitaxial layer and the second epitaxial layer to form a first sacrificial layer on the surface of the first epitaxial layer, and converting the second epitaxial layer into a second sacrificial layer; after forming the first and second sacrificial layers, performing ion implantation on the first epitaxial layer; and after the ion implantation on the first epitaxial layer, removing the first and second sacrificial layers and the isolation dielectric layer. This method for forming a semiconductor structure improves the electrical performance of the device.

Description

Technical Field

[0001] The present invention relates to the field of semiconductor technology, and in particular to a method for forming a semiconductor structure. Background Art

[0002] With the continuous development of semiconductor technology, the size of various semiconductor devices has been continuously reduced. In the current semiconductor structure, silicon germanium epitaxial layer structure is usually introduced to better improve the performance of highly integrated semiconductor devices.

[0003] However, in the current silicon germanium epitaxial process, the growth process of the silicon germanium epitaxial layer is prone to introduce defects. In addition, the ion implantation process of the silicon germanium epitaxial layer is prone to damage the surface of the silicon germanium epitaxial layer, and the effect of ion implantation still needs to be improved, thereby reducing the electrical performance of the device. Summary of the Invention

[0004] The technical problem solved by the present invention is to provide a method for forming a semiconductor structure, which reduces the defects introduced during the growth process of the silicon germanium epitaxial layer, improves the surface morphology of the silicon germanium epitaxial layer after ion implantation, and enhances the effect of ion implantation, thereby improving the electrical performance of the device.

[0005] In order to solve the above technical problems, the technical solution of the present invention provides a method for forming a semiconductor structure, including: providing a substrate; forming a sacrificial structure on the substrate; forming an isolation dielectric layer on the side wall surface and the top surface of the sacrificial structure; forming a first epitaxial layer on the substrate, the first epitaxial layer exposing a portion of the top and side wall surfaces of the isolation dielectric layer, and forming a second epitaxial layer on the exposed surface of the isolation dielectric layer; modifying the first epitaxial layer and the second epitaxial layer, forming a first sacrificial layer on the surface of the first epitaxial layer, and converting the second epitaxial layer into a second sacrificial layer; after forming the first sacrificial layer and the second sacrificial layer, performing ion implantation on the first epitaxial layer; after the ion implantation on the first epitaxial layer, removing the first sacrificial layer, the second sacrificial layer and the isolation dielectric layer.

[0006] Optionally, the substrate includes: a base, an active region and an isolation structure located in the base, and an initial epitaxial layer located on the base.

[0007] Optionally, the method for forming the semiconductor structure further includes: before forming the sacrificial structure, forming an initial oxide layer on the substrate, and the sacrificial structure is formed on the initial oxide layer.

[0008] Optionally, the material of the initial epitaxial layer includes silicon germanium.

[0009] Optionally, the method for forming the isolation dielectric layer includes: forming an initial isolation dielectric layer on the initial oxide layer and the sacrificial structure; and etching back the initial isolation dielectric layer until the surface of the initial oxide layer is exposed, thereby forming an isolation dielectric layer.

[0010] Optionally, the method of etching back the initial isolation dielectric layer includes dry etching.

[0011] Optionally, the method for forming the semiconductor structure also includes: after forming the isolation dielectric layer and before forming the first epitaxial layer, etching the sacrificial structure and the initial oxide layer on both sides of the isolation dielectric layer until the substrate surface is exposed, thereby forming an oxide layer located between the substrate and the sacrificial structure and between the substrate and the isolation dielectric layer.

[0012] Optionally, the method of etching the initial oxide layer includes wet etching.

[0013] Optionally, the material of the isolation dielectric layer includes silicon nitride.

[0014] Optionally, the material of the first epitaxial layer includes silicon germanium; the material of the second epitaxial layer includes silicon germanium.

[0015] Optionally, the process of forming the first epitaxial layer includes a selective epitaxial growth process.

[0016] Optionally, the method of modifying the first epitaxial layer and the second epitaxial layer includes oxidation treatment or nitridation treatment.

[0017] Optionally, the oxidation treatment process includes: a wet oxidation treatment process, a chemical vapor deposition oxidation process or an in-situ water vapor generation process.

[0018] Optionally, the nitridation process includes a plasma nitridation process.

[0019] Optionally, the material of the first sacrificial layer includes silicon oxide or silicon nitride, and the material of the second sacrificial layer includes silicon oxide or silicon nitride.

[0020] Optionally, the method of removing the first sacrificial layer, the second sacrificial layer and the isolation dielectric layer includes wet etching.

[0021] Optionally, after removing the first sacrificial layer, the second sacrificial layer and the isolation dielectric layer, an interlayer dielectric layer is formed on the first epitaxial layer and the sacrificial structure.

[0022] Compared with the prior art, the technical solution of the embodiment of the present invention has the following beneficial effects:

[0023] In the method for forming a semiconductor structure provided by the technical solution of the present invention, by converting the second epitaxial layer into a second sacrificial layer and removing the second sacrificial layer, the second epitaxial layer remaining on the surface of the isolation dielectric layer during the formation of the first epitaxial layer is better removed, thereby avoiding defects caused by the presence of the second epitaxial layer and improving the electrical performance of the semiconductor device. Secondly, since the first sacrificial layer is formed on the surface of the first epitaxial layer, during the process of ion implantation into the first epitaxial layer, the first sacrificial layer acts as a protective layer for the first epitaxial layer, reducing damage to the surface of the first epitaxial layer during the ion implantation process, so that after the ion implantation is completed, the first epitaxial layer still maintains a relatively complete surface morphology; at the same time, the first sacrificial layer effectively controls the depth of ion implantation, reduces the occurrence of tunneling effect, improves the effect of ion implantation, and improves the performance of the semiconductor device.

[0024] Furthermore, since the material of the first sacrificial layer includes silicon nitride or silicon oxide, the material of the second sacrificial layer includes silicon nitride or silicon oxide, and the material of the isolation dielectric layer includes silicon nitride, the process of removing the first sacrificial layer and the second sacrificial layer is similar to the process of removing the isolation dielectric layer, so that the first sacrificial layer and the second sacrificial layer can be removed at the same time as the isolation dielectric layer, simplifying the process steps. BRIEF DESCRIPTION OF THE DRAWINGS

[0025] Figures 1 to 3 It is a cross-sectional schematic diagram of the formation process of a semiconductor structure;

[0026] Figures 4 to 10 FIG. 1 is a cross-sectional schematic diagram of a semiconductor structure forming process according to an embodiment of the present invention. DETAILED DESCRIPTION

[0027] As described in the background technology, in the current silicon germanium epitaxial process, the growth process of the silicon germanium epitaxial layer is prone to introduce defects. In addition, the ion implantation process of the silicon germanium epitaxial layer is prone to damage the surface of the silicon germanium epitaxial layer, and the effect of ion implantation still needs to be improved, thereby reducing the electrical performance of the device.

[0028] Figures 1 to 3 It is a cross-sectional schematic diagram of the formation process of a semiconductor structure.

[0029] Please refer to Figure 1 , providing a substrate, the substrate comprising a base 100 and a sacrificial structure 101 located on the base; forming an isolation dielectric layer 102 on the sacrificial structure 101, the isolation dielectric layer 102 covering the sidewalls and top surface of the sacrificial structure 101.

[0030] Please refer to Figure 2A first epitaxial layer 103 is formed on the substrate 100. The first epitaxial layer 103 exposes a portion of the top and sidewall surfaces of the isolation dielectric layer 102. A second epitaxial layer 104 is formed on the exposed surface of the isolation dielectric layer 102. The material of the first epitaxial layer 103 includes silicon germanium; the material of the second epitaxial layer 104 also includes silicon germanium.

[0031] Please refer to Figure 3 After forming the first epitaxial layer 103 , ion implantation is performed on the first epitaxial layer 103 .

[0032] During the formation of the first epitaxial layer 103, part of the silicon germanium material is deposited on the surface of the isolation dielectric layer 102, thereby forming the second epitaxial layer 104. In subsequent processes, the presence of the second epitaxial layer 104 introduces additional defects into the semiconductor structure, thereby reducing the electrical performance of the device.

[0033] In addition, the process of ion implantation into the first epitaxial layer 103 is likely to damage the surface of the first epitaxial layer 103 , affecting the reliability of subsequent processes. At the same time, the depth of ion implantation is difficult to control, so the effect of ion implantation needs to be improved, resulting in poor electrical performance of the formed device.

[0034] To address the aforementioned technical issues, the present invention provides a method for forming a semiconductor structure. The method comprises modifying a first epitaxial layer and a second epitaxial layer located on a portion of the surface of the isolation dielectric layer, thereby forming a first sacrificial layer on the surface of the first epitaxial layer and converting the second epitaxial layer into a second sacrificial layer. Thus, the second epitaxial layer is removed by removing the second sacrificial layer, thereby avoiding defects caused by the presence of the second epitaxial layer. Furthermore, the presence of the first sacrificial layer reduces damage to the surface of the first epitaxial layer during the ion implantation process, enhances the effectiveness of the ion implantation, and improves the performance of the semiconductor device.

[0035] In order to make the above-mentioned objects, features and beneficial effects of the present invention more obvious and easy to understand, specific embodiments of the present invention are described in detail below with reference to the accompanying drawings.

[0036] Figures 4 to 10 FIG. 1 is a cross-sectional schematic diagram of a semiconductor structure forming process according to an embodiment of the present invention.

[0037] Please refer to Figure 4 , providing a substrate 200.

[0038] In this embodiment, the substrate 200 includes a base 201 , an active region (not shown) and an isolation structure 203 located within the base 201 , and an initial epitaxial layer 202 located on the base 201 .

[0039] The material of the substrate 201 includes silicon, silicon germanium, silicon carbide, silicon on insulator (SOI), germanium on insulator (GOI), etc. In this embodiment, the material of the substrate 201 is silicon.

[0040] The isolation structure 203 is used to isolate the active area. In this embodiment, the isolation structure 203 is made of silicon oxide.

[0041] The presence of the initial epitaxial layer 202 facilitates the subsequent better formation of the first epitaxial layer on the substrate 200. In this embodiment, the material of the initial epitaxial layer 202 includes silicon germanium. The formation process of the initial epitaxial layer 202 includes a selective epitaxial growth process.

[0042] Please refer to Figure 5 , an initial oxide layer 204 is formed on the substrate 200 ; and a sacrificial structure 205 is formed on the initial oxide layer 204 .

[0043] In this embodiment, the initial oxide layer 204 is used as an etching stop layer for the subsequently formed sacrificial structure 205 and the isolation dielectric layer. The material of the initial oxide layer 204 is silicon oxide. The method of forming the initial oxide layer 204 includes a chemical vapor deposition process.

[0044] In this embodiment, the material of the sacrificial structure 205 includes polysilicon. The pattern of the sacrificial structure 205 projected on the surface of the substrate 200 is located between the patterns of the isolation structure 203 projected on the surface of the substrate 200.

[0045] Please refer to Figure 6 An isolation dielectric layer 206 is formed on the sidewall surface and the top surface of the sacrificial structure 205 .

[0046] The isolation dielectric layer 206 serves as a protective layer on the surface of the sacrificial structure 205 , thereby avoiding unnecessary deposition on the surface of the sacrificial structure 205 during the subsequent formation of the first epitaxial layer on the surface of the substrate 200 , and reducing the impact of the formation process of the first epitaxial layer on the sacrificial structure 205 .

[0047] The method for forming the isolation dielectric layer 206 includes: forming an initial isolation dielectric layer on the initial oxide layer 204 and the sacrificial structure 205 ; and etching back the initial isolation dielectric layer until the surface of the initial oxide layer 204 is exposed, thereby forming the isolation dielectric layer 206 .

[0048] In this embodiment, the method of forming the initial isolation dielectric layer includes chemical vapor deposition.

[0049] The purpose of etching back the initial isolation dielectric layer is to remove the initial isolation dielectric layer on the surface of the initial oxide layer 204, so that the first epitaxial layer 208 can be subsequently formed on the substrate 200. The process of etching back the initial isolation dielectric layer includes dry etching.

[0050] In this embodiment, the material of the isolation dielectric layer 206 includes silicon nitride.

[0051] In this embodiment, the method for forming the semiconductor structure also includes: after forming the isolation dielectric layer 206, etching the sacrificial structure 205 and the initial oxide layer 204 on both sides of the isolation dielectric layer 206 until the surface of the substrate 200 is exposed, thereby forming an oxide layer 207 located between the substrate 200 and the sacrificial structure 205 and between the substrate 200 and the isolation dielectric layer 206.

[0052] Since the initial oxide layer 204 on both sides of the sacrificial structure 205 and the isolation dielectric layer 206 are etched and removed, the surface of the initial epitaxial layer 202 in the substrate 200 is exposed, so that an epitaxial growth process can be performed on the initial epitaxial layer 202 to form a first epitaxial layer.

[0053] In this embodiment, the method of etching the initial oxide layer 204 includes wet etching.

[0054] Please refer to Figure 7 A first epitaxial layer 208 is formed on the substrate 200 , wherein the first epitaxial layer 208 exposes a portion of the top and sidewall surfaces of the isolation dielectric layer 206 , and a second epitaxial layer 209 is formed on the exposed surface of the isolation dielectric layer 206 .

[0055] In this embodiment, the material of the first epitaxial layer 208 includes silicon germanium. The formation process of the first epitaxial layer 208 includes a selective epitaxial growth process. The material of the second epitaxial layer 209 includes silicon germanium.

[0056] While the first epitaxial layer 208 is being formed on the substrate 200, a small amount of silicon germanium is deposited on the top and sidewall surfaces of the isolation dielectric layer 206. Since the top surface of the first epitaxial layer 208 is lower than the top surface of the isolation dielectric layer 206 after its formation, the top and sidewall surfaces of the isolation dielectric layer 206 exposed by the first epitaxial layer 208 are covered by the small amount of silicon germanium, thereby forming a second epitaxial layer 209 located on a portion of the surface of the isolation dielectric layer 206.

[0057] Because the materials of the isolation dielectric layer 206 and the second epitaxial layer 209 are different, and the removal processes for the isolation dielectric layer 206 and the second epitaxial layer 209 are different, the second epitaxial layer 209 cannot be completely removed during the subsequent removal of the isolation dielectric layer 206. The presence of the second epitaxial layer 209 introduces additional defects into the semiconductor structure, thereby reducing the electrical performance of the device and affecting the process window for subsequent device manufacturing.

[0058] Please refer to Figure 8 , the first epitaxial layer 208 and the second epitaxial layer 209 are modified to form a first sacrificial layer 210 on the surface of the first epitaxial layer 208 , and the second epitaxial layer 209 is converted into a second sacrificial layer 211 .

[0059] By converting the second epitaxial layer 209 into a second sacrificial layer 211 that is easier to remove and removing the second sacrificial layer 211, it helps to more thoroughly remove the second epitaxial layer 209 remaining on the surface of the isolation dielectric layer 206, thereby avoiding defects caused by the presence of the second epitaxial layer 209 and improving the electrical performance of the semiconductor device and the process window of device manufacturing.

[0060] In addition, since a first sacrificial layer 210 is formed on the surface of the first epitaxial layer 208, during the subsequent ion implantation process of the first epitaxial layer 208, the first sacrificial layer 210 serves as a protective layer for the first epitaxial layer 208, thereby reducing damage to the surface of the first epitaxial layer 208 during the ion implantation process, so that after the ion implantation is completed, the first epitaxial layer 208 still maintains a relatively complete surface morphology; at the same time, since the crystal arrangement of the first sacrificial layer 210 is more uniform, the uniformity of the ion implantation is improved, the depth of the ion implantation is effectively controlled, the generation of the tunnel effect is reduced, and the performance of the semiconductor device is improved.

[0061] Specifically, in this embodiment, the modification method for the first epitaxial layer 208 and the second epitaxial layer 209 includes oxidation or nitridation. The material of the first sacrificial layer 210 includes silicon oxide or silicon nitride, and the material of the second sacrificial layer 211 includes silicon oxide or silicon nitride.

[0062] Since the isolation dielectric layer 206 is made of silicon nitride, when the first sacrificial layer 210 and the second sacrificial layer 211 are made of silicon nitride, the first sacrificial layer 210 and the second sacrificial layer 211 can be removed simultaneously with the subsequent removal of the isolation dielectric layer 206, thereby simplifying the process steps. Furthermore, when the first sacrificial layer 210 and the second sacrificial layer 211 are made of silicon oxide, since the process for removing silicon oxide is similar to the process for removing silicon nitride, the first sacrificial layer 210 and the second sacrificial layer 211 can also be removed simultaneously with the removal of the isolation dielectric layer 206, thereby simplifying the process steps.

[0063] In this embodiment, the oxidation treatment process includes: a wet oxidation treatment process, a chemical vapor deposition oxidation process, or an in-situ water vapor generation process. The nitridation treatment process includes a plasma nitridation treatment process.

[0064] Please refer to Figure 9 After forming the first sacrificial layer 210 and the second sacrificial layer 211 , ion implantation is performed on the first epitaxial layer 208 .

[0065] In this embodiment, the ion implantation is used to adjust the electrical properties of the first epitaxial layer 208 so as to better connect with the subsequent Bi-CMOS process.

[0066] During the ion implantation process, the presence of the first sacrificial layer 210 improves the uniformity of the ion implantation, reduces the occurrence of tunneling effects, and effectively controls the depth of the ion implantation within the first epitaxial layer 208, thereby improving the ion implantation effect. Furthermore, the first sacrificial layer 210 acts as a protective layer for the first epitaxial layer 208, reducing damage to the surface of the first epitaxial layer 208 during the ion implantation process. After the subsequent removal of the first sacrificial layer 210, the surface of the first epitaxial layer 208 has a more complete surface morphology, thereby facilitating an increase in the process window for subsequent device fabrication and improving the performance of the semiconductor device.

[0067] In this embodiment, the ions used in the ion implantation include boron ions or arsenic ions.

[0068] Please refer to Figure 10 After ion implantation is performed on the first epitaxial layer 208 , the first sacrificial layer 210 , the second sacrificial layer 211 and the isolation dielectric layer 206 are removed.

[0069] By removing the second sacrificial layer 211, the second epitaxial layer 209 remaining on the surface of the isolation dielectric layer 206 during the formation of the first epitaxial layer 208 is more thoroughly removed, thereby avoiding defects caused by the presence of the second epitaxial layer 209 and improving the electrical performance of the semiconductor device.

[0070] By removing the first sacrificial layer 210, the surface of the first epitaxial layer 208 with a perfect surface morphology is exposed, thereby facilitating subsequent processes on the surface of the first epitaxial layer 208. Due to the good surface morphology of the first epitaxial layer 208, the process window for subsequent device fabrication is increased, thereby improving the performance of the semiconductor device.

[0071] Therefore, by removing the first sacrificial layer 210, the second sacrificial layer 211 and the isolation dielectric layer 206, the sacrificial structure 205 with intact surface morphology and the first epitaxial layer 208 are exposed, while reducing the defects introduced during the formation of the aforementioned semiconductor structure, thereby improving the uniformity of the structure subsequently formed on the surface of the sacrificial structure 205 and the first epitaxial layer 208, thereby improving the performance of the device.

[0072] In this embodiment, since the processes for removing the isolation dielectric layer 206, the first sacrificial layer 210 and the second sacrificial layer 211 are the same or similar, the first sacrificial layer 210 and the second sacrificial layer 211 can be removed at the same time as the isolation dielectric layer 206, thereby simplifying the process steps and improving process reliability.

[0073] In this embodiment, the method of removing the first sacrificial layer 210 , the second sacrificial layer 211 and the isolation dielectric layer 206 includes wet etching.

[0074] In this embodiment, the method for forming the semiconductor structure further includes: forming an interlayer dielectric layer on the first epitaxial layer 208 and the sacrificial structure 205 after removing the first sacrificial layer 210 , the second sacrificial layer 211 and the isolation dielectric layer 206 .

[0075] The method for forming the semiconductor structure described in this embodiment can be applied to the preparation process of heterojunction bipolar transistor (HBT) devices.

[0076] Although the present invention is disclosed as above, the present invention is not limited thereto. Any person skilled in the art can make various changes and modifications without departing from the spirit and scope of the present invention. Therefore, the scope of protection of the present invention should be based on the scope defined by the claims.

Claims

1. A method for forming a semiconductor structure, characterized in that: include: providing a substrate; forming a sacrificial structure on a substrate; forming an isolation dielectric layer on the sidewall surface and the top surface of the sacrificial structure, wherein the material of the isolation dielectric layer includes silicon nitride; forming a first epitaxial layer on the substrate, wherein the first epitaxial layer exposes a portion of the top and sidewall surfaces of the isolation dielectric layer, and forming a second epitaxial layer on the exposed surface of the isolation dielectric layer; Performing a modification treatment on the first epitaxial layer and the second epitaxial layer to form a first sacrificial layer on the surface of the first epitaxial layer and converting the second epitaxial layer into a second sacrificial layer, wherein the method of performing the modification treatment on the first epitaxial layer and the second epitaxial layer includes oxidation treatment or nitridation treatment; After forming the first sacrificial layer and the second sacrificial layer, performing ion implantation on the first epitaxial layer; After ion implantation is performed on the first epitaxial layer, the first sacrificial layer, the second sacrificial layer and the isolation dielectric layer are removed.

2. The method for forming a semiconductor structure according to claim 1, wherein: The substrate includes a base, an active region and an isolation structure located in the base, and an initial epitaxial layer located on the base.

3. The method for forming a semiconductor structure according to claim 1, wherein: Before forming the sacrificial structure, the method further includes: forming an initial oxide layer on the substrate, and forming the sacrificial structure on the initial oxide layer.

4. The method for forming a semiconductor structure according to claim 2, wherein: The material of the initial epitaxial layer includes silicon germanium.

5. The method for forming a semiconductor structure according to claim 3, wherein: The method for forming the isolation dielectric layer comprises: forming an initial isolation dielectric layer on the initial oxide layer and the sacrificial structure; and etching back the initial isolation dielectric layer until the surface of the initial oxide layer is exposed, thereby forming an isolation dielectric layer.

6. The method for forming a semiconductor structure according to claim 5, wherein: The method of etching back the initial isolation dielectric layer includes dry etching.

7. The method for forming a semiconductor structure according to claim 3, wherein: After forming the isolation dielectric layer and before forming the first epitaxial layer, the method further includes: etching the sacrificial structure and the initial oxide layer on both sides of the isolation dielectric layer until the substrate surface is exposed, thereby forming an oxide layer located between the substrate and the sacrificial structure and between the substrate and the isolation dielectric layer.

8. The method for forming a semiconductor structure according to claim 7, wherein: The method of etching the initial oxide layer includes wet etching.

9. The method for forming a semiconductor structure according to claim 1, wherein: The material of the first epitaxial layer includes silicon germanium; the material of the second epitaxial layer includes silicon germanium.

10. The method for forming a semiconductor structure according to claim 1, wherein: The formation process of the first epitaxial layer includes a selective epitaxial growth process.

11. The method for forming a semiconductor structure according to claim 1, wherein: The oxidation treatment process includes: a wet oxidation treatment process, a chemical vapor deposition oxidation process or an in-situ water vapor generation process.

12. The method for forming a semiconductor structure according to claim 1, wherein: The nitridation process includes a plasma nitridation process.

13. The method for forming a semiconductor structure according to claim 1, wherein: The material of the first sacrificial layer includes silicon oxide or silicon nitride, and the material of the second sacrificial layer includes silicon oxide or silicon nitride.

14. The method for forming a semiconductor structure according to claim 1, wherein: The method of removing the first sacrificial layer, the second sacrificial layer and the isolation dielectric layer includes wet etching.

15. The method for forming a semiconductor structure according to claim 1, wherein: After removing the first sacrificial layer, the second sacrificial layer and the isolation dielectric layer, an interlayer dielectric layer is formed on the first epitaxial layer and the sacrificial structure.

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