Semiconductor device, method for manufacturing semiconductor device, and power conversion device

Abstract

Provided are a semiconductor device capable of being miniaturized and a method for manufacturing the semiconductor device. An internal lead (3e) having a chip pad (3a, 3b) on which a semiconductor element (1a, 1b) is mounted has a stepped shape, and a portion of the surface of the internal lead (3e) is exposed from a packaging resin (5) when viewed from above. An external lead (3f) connected to the internal lead (3e) has a first bent portion (3g) on ​​the side of the packaging resin (5) in a manner extending toward the upper surface of the chip pad (3a), thereby obtaining a miniaturized semiconductor device.

Description

Technical Field

[0001] The present invention relates to a semiconductor device having a power semiconductor element mounted thereon, a method for manufacturing the semiconductor device, and a power conversion device. Background Art

[0002] In conventional semiconductor devices, the leads protrude from the side of the resin portion formed by the package, and are bent at a substantially right angle at a bending position near the resin portion by bending. (For example, see Patent Document 1)

[0003] In recent years, since semiconductor devices are mounted on a control substrate together with various electronic components, miniaturization of semiconductor devices is required. Therefore, miniaturization of semiconductor devices is achieved by making the rising portion of the lead terminal protrude downward from the lower surface of the packaging resin. (For example, refer to Patent Document 2)

[0004] Patent Document 1: Japanese Patent Application Laid-Open No. 62-229865 (Item 2, lower right column, line 5 - Item 3, upper left column, line 6, Figure 1 to Figure 5 )

[0005] Patent Document 2: Japanese Patent Application Laid-Open No. 10-223825 (Paragraphs 0030, 0032-0033, 0036, Fig. 9 , Fig.11 )

[0006] However, for such semiconductor devices, miniaturization of the semiconductor device can be achieved by making the leads protrude vertically from the packaging resin of the semiconductor device, but in the packaging process of transfer molding, it is necessary to prepare a new mold with a slit for inserting the leads. In addition, the arrangement positions of the leads often differ depending on the specifications of the semiconductor device, so it is necessary to prepare a mold corresponding to each semiconductor device. Summary of the invention

[0007] The present invention has been made to solve the above-mentioned problems, and an object of the present invention is to provide a semiconductor device that can be miniaturized.

[0008] Another object of the present invention is to provide a method for manufacturing a semiconductor device that can be miniaturized by changing the shape of leads.

[0009] The semiconductor device according to the present invention comprises: a semiconductor element; an internal lead having a die pad on the upper surface of which the semiconductor element is mounted; a packaging resin that packages the semiconductor element and the internal lead; and an external lead that is electrically connected to the semiconductor element and the internal lead and protrudes from mutually opposite side surfaces of the packaging resin. The internal lead has a stepped shape, and a part of the surface of the internal lead is exposed from the packaging resin when viewed from above, and the external lead has a first bent portion on the side surface of the packaging resin in a manner extending in the direction of the upper surface of the die pad.

[0010] In addition, the manufacturing method of the semiconductor device involved in the present invention comprises: a component preparation step, preparing a lead frame with a step shape, the lead frame including internal leads, connecting rods, a frame frame and external leads, the internal leads having a chip pad; a chip bonding step, mounting the semiconductor element on the chip pad; a wiring connection step, wiring and connecting the semiconductor element and the internal leads through metal wires; a packaging step, packaging the semiconductor element, the metal wires, and the internal leads through a packaging resin so that the internal leads have an exposed surface in which a part of the internal leads is exposed when viewed from above; a connecting rod cutting step, cutting and removing the connecting rods; a plating step, plating the exposed surfaces of the external leads and the internal leads exposed from the packaging resin and the frame frame; a frame cutting step, cutting and removing the frame frame; and a lead forming step, bending the external leads at the opposite sides of the packaging resin.

[0011] Effects of the Invention

[0012] According to the semiconductor device of the present invention, it is possible to obtain a semiconductor device that can be easily miniaturized by the bent shape of the outer leads, and it is possible to reduce the layout area of ​​the semiconductor device mounted on the control substrate.

[0013] In addition, according to the method for manufacturing a semiconductor device according to the present invention, a semiconductor device that can be easily miniaturized by the bent shape of the outer leads can be obtained, and a semiconductor device that can reduce the layout area of ​​the semiconductor device mounted on a control substrate can be obtained. BRIEF DESCRIPTION OF THE DRAWINGS

[0014] Figure 1 It is a top view showing the semiconductor device according to the first embodiment.

[0015] Figure 2 is a cross-sectional view showing the semiconductor device according to the first embodiment.

[0016] Figure 3 This is a flowchart showing a method for manufacturing a semiconductor device according to the first embodiment.

[0017] Figure 4This is a plan view showing a state after the component preparation step of preparing a lead frame in the method for manufacturing the semiconductor device according to the first embodiment.

[0018] Figure 5 This is a cross-sectional view showing a state after a component preparation step of preparing a lead frame in the method for manufacturing the semiconductor device according to the first embodiment.

[0019] Figure 6 This is a plan view showing a state after a die bonding step of mounting a semiconductor element in the method for manufacturing the semiconductor device according to the first embodiment.

[0020] Figure 7 This is a plan view showing a state after a wiring connection step of performing wiring connection with a metal wire in the method for manufacturing the semiconductor device according to the first embodiment.

[0021] Figure 8 This is a cross-sectional view showing a state after a wiring connection step of performing wiring connection with a metal wire in the method for manufacturing the semiconductor device according to the first embodiment.

[0022] Fig. 9 It is a cross-sectional view showing a sealing step of sealing with resin in the method for manufacturing the semiconductor device according to the first embodiment.

[0023] Fig.10 This is a plan view showing a state after a sealing step of sealing with resin in the method for manufacturing the semiconductor device according to the first embodiment.

[0024] Fig.11 This is a cross-sectional view showing a state after a sealing step of sealing with resin in the method for manufacturing the semiconductor device according to the first embodiment.

[0025] Fig.12 This is a plan view showing a state after a tie bar cutting step of cutting the tie bars in the method for manufacturing the semiconductor device according to the first embodiment.

[0026] Fig.13 This is a plan view showing a state after a frame cutting step of cutting the frame frame in the method for manufacturing the semiconductor device according to the first embodiment.

[0027] Fig.14 This is a cross-sectional view showing a state of a lead forming step of bending an outer lead in the method for manufacturing a semiconductor device according to the first embodiment.

[0028] Fig.15 This is a cross-sectional view showing a semiconductor device in which the semiconductor element according to the first embodiment is an RC-IGBT.

[0029] Fig.16This is a cross-sectional view showing a semiconductor device provided with a thermally conductive material according to the first embodiment.

[0030] Fig.17 It is a top view showing the semiconductor device according to the second embodiment.

[0031] Fig.18 It is a cross-sectional view showing a semiconductor device according to the second embodiment.

[0032] Fig.19 It is a plan view showing a modification of the semiconductor device according to the second embodiment.

[0033] Fig. 20 This is a cross-sectional view showing a modification of the semiconductor device according to the second embodiment.

[0034] Fig.21 It is a cross-sectional view showing a semiconductor device according to the third embodiment.

[0035] Fig. 22 It is a plan view showing a state after a component preparation step of preparing a lead frame in the method for manufacturing a semiconductor device according to the third embodiment.

[0036] Fig.23 It is a cross-sectional view showing a state after a sealing step of sealing with resin in a method for manufacturing a semiconductor device according to the third embodiment.

[0037] Fig.24 It is a block diagram showing the structure of a power conversion system including a power conversion device according to a fourth embodiment. DETAILED DESCRIPTION

[0038] Implementation method 1.

[0039] The structure of the semiconductor device according to the first embodiment will be described. Figure 1 is a top view showing a semiconductor device according to Embodiment 1, Figure 2 yes Figure 1 Section view at line AA in the figure.

[0040] like Figure 1 and Figure 2 As shown, the semiconductor device 202 includes a semiconductor element 1a, a semiconductor element 1b, a bonding material 2, an inner lead 3e, an outer lead 3f, a metal wire 4a, a metal wire 4b, a packaging resin 5, and an insulating heat sink 6. The inner lead 3e has a die pad 3a.

[0041] The semiconductor element 1a is a power semiconductor element, for example, an IGBT (Insulated Gate Bipolar Transistor), a MOSFET (Metal Oxide Semiconductor Field Effect Transistor), or a FWD (Free Wheeling Diode) formed of silicon (Si). The length of one side of the semiconductor element 1a is 3 mm to 13 mm when viewed from above.

[0042] The semiconductor element 1a is mounted on the upper surface of the die pad 3a via the bonding material 2. Figure 2 In the embodiment, two semiconductor elements 1 a are mounted on the upper surface of the die pad 3 a via the bonding material 2 , but the present invention is not limited thereto, and a required number of semiconductor elements 1 a can be mounted according to the specifications of the semiconductor device 202 .

[0043] The upper surface of the die pad 3a is the surface on the side where the semiconductor element 1a is mounted. Figure 2 The top direction is indicated on the paper.

[0044] The semiconductor element 1 b is a control IC (Integrated Circuit) for controlling the semiconductor element 1 a. The semiconductor element 1 b is mounted on the upper surface of the die pad 3 b via the bonding material 2 .

[0045] The upper surface of the die pad 3b is the surface on the side where the semiconductor element 1b is mounted. Figure 2 The top direction is indicated on the paper.

[0046] The bonding material 2 bonds the lower surface of the semiconductor element 1a to the upper surface of the die pad 3a, and bonds the lower surface of the semiconductor element 1b to the upper surface of the die pad 3b. The bonding material 2 is made of solder containing tin (Sn).

[0047] In addition, the bonding material 2 may also be a sintered material containing any of silver (Ag) or copper (Cu), or an adhesive capable of dissipating heat generated by the semiconductor element 1a. When a sintered material is used as the bonding material 2, it has excellent heat resistance, and can suppress the deepening of cracks caused by the thermal stress and thermal strain generated by the linear expansion coefficient of the semiconductor element 1a and the chip pad 3a, so that a bonding material 2 with high reliability and long life can be obtained.

[0048] like Figure 4As shown in the figure, the inner lead 3e having the die pad 3a and the die pad 3b, the connecting rod 3c, the frame 3d, and the outer lead 3f are connected in an integral manner as a single lead frame 3. Therefore, the inner lead 3e having the die pad 3a and the die pad 3b, the connecting rod 3c, the frame 3d, and the outer lead 3f are made of the same material and have the same thickness.

[0049] The material of the lead frame 3 having the inner lead 3e, the connecting rod 3c, the frame frame 3d, and the outer lead 3f is formed using copper (Cu), but is not limited thereto, and any material having heat dissipation in addition to the necessary conductivity may be used. The inner lead 3e has the die pad 3a and the die pad 3b. For example, an alloy containing either copper (Cu) or aluminum (Al) or a laminated composite material may also be used.

[0050] The lead frame 3 including the inner lead 3e, the tie bar 3c, the frame frame 3d, and the outer lead 3f has a thickness of 0.3 to 0.8 mm. The inner lead 3e includes the die pad 3a and the die pad 3b.

[0051] In order to improve the bonding property with the bonding material 2, a silver (Ag) plating layer may be provided on the upper surface of the die pad 3a and the die pad 3b. Alternatively, a gold (Au) plating layer or a tin (Sn) plating layer may be provided. The thickness of the plating layer is 0.001 to 0.002 mm.

[0052] In addition, in order to improve the adhesion with the encapsulation resin 5, micro concavo-convexities may be provided on the surface of at least a portion of the inner lead 3e. In addition, by performing primer treatment, the adhesion between the inner lead 3e and the encapsulation resin 5 can be improved, so that insulation can be ensured.

[0053] The inner lead 3e is located inside the sealing resin 5 and has a step shape. The inner lead 3e has a die pad 3a as a mounting portion for the semiconductor element 1a and a die pad 3b as a mounting portion for the semiconductor element 1b.

[0054] In addition, Figure 2 On the paper, the chip pad 3a and the chip pad 3b are at the same step position, but this is not limited to this. That is, the step positions of the chip pad 3a and the chip pad 3b can also be different. In addition, Figure 1 and Figure 2 As shown, in a plan view, a portion of the inner lead 3e is located from the upper surface ( Figure 2 The upper side of the paper surface) is exposed.

[0055] The external lead 3f is electrically connected to the internal lead 3e and is also connected in structure, and they are connected. The external lead 3f protrudes from the mutually opposite side surfaces of the encapsulation resin 5. Moreover, the external lead 3f passes through the first bent portion 3g provided on the side surface of the encapsulation resin 5, and extends toward the upper surface of the die pad 3a in a manner along the side surface of the encapsulation resin 5.

[0056] That is, the outer lead 3f is connected to the inner lead 3e and connected, as shown in FIG. Figure 2 As shown, they protrude from the side surfaces of the sealing resin 5 that face each other, are bent at the side surfaces of the sealing resin 5, and extend toward the upper surface of the die pad 3a.

[0057] The metal wires 4a and 4b are made of any metal including aluminum (Al), copper (Cu), silver (Ag) or gold (Au). The metal wires 4a and 4b are bonded by pressurization and ultrasonic vibration to electrically connect the semiconductor element 1a, the semiconductor element 1b and the inner lead 3e.

[0058] The material of the metal wire 4a and the metal wire 4b, the diameter of the metal wire 4a and the metal wire 4b, and the number of the metal wire 4a and the metal wire 4b correspond to the required current capacity. For example, since the metal wire 4a requires a large current capacity, the diameter of the metal wire 4a is 0.1 to 0.5 mm. On the other hand, since the semiconductor element 1b is a control IC, not only is the current capacity small, but the bonding area for wiring the metal wire 4b is also small. Therefore, the diameter of the metal wire 4b is 0.02 to 0.08 mm.

[0059] The sealing resin 5 is made of a thermosetting epoxy resin, but is not limited thereto, and any thermosetting resin having a desired elastic modulus and adhesion may be used. The sealing resin 5 is sealed by transfer molding.

[0060] The insulating heat sink 6 is a plate-shaped component with insulating and heat dissipating properties. The insulating heat sink 6 is tightly bonded to the lower surface of the die pad 3a, that is, the surface of the die pad 3a opposite to the bonding material 2, and dissipates heat generated by the semiconductor element 1a through the die pad 3a.

[0061] The insulating heat dissipation plate 6 has a two-layer structure consisting of an insulating layer 6a and a metal layer 6b, and the lower surface of the metal layer 6b, that is, the surface of the metal layer 6b opposite to the insulating layer 6a, is exposed from the packaging resin 5. The thermal conductivity of the insulating heat dissipation plate 6 is 2 to 18 W / (m·K), and the thickness is 0.1 to 0.2 mm. The insulating layer 6a is composed of, for example, an epoxy resin filled with a filler, and the filler includes any of aluminum oxide (Al2O3), aluminum nitride (AlN), silicon nitride (Si3N4), silicon dioxide (SiO2) or boron nitride (BN).

[0062] The metal layer 6 b is a metal having excellent thermal conductivity, including copper (Cu) or (Al).

[0063] In addition, depending on the use conditions of the semiconductor device 202, if the operating temperature of the semiconductor element 1a exceeds the rated value, the performance of the semiconductor element 1a is reduced, and in the worst case, thermal runaway may occur and damage may occur. Therefore, the insulating heat sink 6 is sometimes required to have high heat dissipation performance, and the thickness of the metal layer 6b may be set to 1 to 3 mm to improve the heat dissipation performance.

[0064] Although not shown in the figure, a cooler can be mounted via heat dissipation grease on the lower surface of the insulating heat dissipation plate 6, that is, the surface of the insulating heat dissipation plate 6 opposite to the chip pad 3a. The cooler is made of a metal having excellent thermal conductivity including aluminum (Al), and has a plurality of heat dissipation fins.

[0065] Thus, in the semiconductor device 202, the semiconductor element 1a is mounted on the upper surface of the die pad 3a via the bonding material 2, and the semiconductor element 1b is mounted on the upper surface of the die pad 3b via the bonding material 2. The metal wires 4a and 4b electrically connect the semiconductor element 1a, the semiconductor element 1b and the internal lead 3e. The insulating heat sink 6 is tightly bonded to the lower surface of the die pad 3a to dissipate the heat generated by the semiconductor element 1a.

[0066] The semiconductor element 1 a , the semiconductor element 1 b , the die pad 3 a , the die pad 3 b , and the inner lead 3 e are sealed by the sealing resin 5 , but a part of the inner lead 3 e is exposed from the sealing resin 5 .

[0067] That is, Figure 2 As shown, at the upper surface of the encapsulation resin 5, Figure 2 A portion of each inner lead 3e disposed on the left and right sides of the paper is exposed in parallel with the upper surface of the encapsulation resin 5. The outer lead 3f connected to the inner lead 3e protrudes from the opposite sides of the encapsulation resin 5, and a first bent portion 3g is provided on the side of the encapsulation resin 5, bent at a substantially right angle, and extends toward the upper surface of the chip pad 3a.

[0068] The length of one side of the semiconductor device 202 in a plan view is 15 mm to 130 mm.

[0069] In order to bend the outer lead 3f by a lead forming die (not shown), it is necessary to fix the semiconductor device 202. Usually, the outer lead 3f protruding from the side surface of the encapsulating resin 5 is fixed by a clamping tool (not shown) and bent by a lead forming die (not shown). Therefore, the first bent portion 3g cannot be provided on the side surface of the encapsulating resin 5.

[0070] In addition, when it is desired to provide the first bent portion 3g on the side of the encapsulating resin 5, there is only one method of fixing the encapsulating resin 5. When the encapsulating resin 5 is fixed and bent by a lead forming die (not shown), since the encapsulating resin 5 is made of resin, a large stress may be generated in the encapsulating resin 5, causing cracks.

[0071] However, in the semiconductor device 202 , as described above, a part of the surface of the inner lead 3 e connected to and coupled to the outer lead 3 f is exposed from the sealing resin 5 .

[0072] Therefore, when the outer lead 3f is bent by a lead forming die (not shown), the outer lead 3f is bent. Fig.14 As shown, since the fixing tool 10 can be fixed by contacting the inner lead 3 e exposed from the sealing resin 5 , the outer lead 3 f can be bent at the side surface of the sealing resin 5 .

[0073] Therefore, the outer lead 3f can be bent so as to extend toward the upper surface of the die pad 3a while providing the first bent portion 3g on the side surface of the sealing resin 5 without causing cracks in the sealing resin 5.

[0074] In addition, if Figure 2 As shown in FIG. 1 , by providing the first bent portion 3 g on the side surface of the sealing resin 5 , the distance L1 between the external leads 3 f extending from the side surfaces of the sealing resin 5 facing each other can be shortened.

[0075] In this way, a part of the surface of the inner lead 3e is exposed from the sealing resin 5, and the outer leads 3f are respectively protruded from the side surfaces of the sealing resin 5 that are opposite to each other, and the first bent portion 3g is provided to extend, thereby shortening the distance L1 between the outer leads 3f. Therefore, the semiconductor device 202 having the outer leads 3f can be miniaturized. In addition, the arrangement area for mounting the semiconductor device 202 on the control substrate can be reduced.

[0076] Furthermore, since the external leads 3f protrude from the mutually opposing side surfaces of the encapsulating resin 5, it is not necessary to prepare a new mold 7 provided with slits as shown in Patent Document 2 in the encapsulating process. Since the existing mold 7 used in the past can be used for encapsulation, the increase in the frequency of replacement of the mold 7 and the burden of management and maintenance of the mold 7 caused by the new mold 7 can be suppressed, so that a semiconductor device 202 with excellent productivity can be obtained.

[0077] Next, a method for manufacturing a semiconductor device will be described.

[0078] Figure 3 A flowchart related to a method for manufacturing a semiconductor device is shown.

[0079] The component preparation step ( S1 ) in the method for manufacturing a semiconductor device will be described. Figure 4 1 is a top view showing the state after the component preparation step of preparing the lead frame. Figure 5 yes Figure 4 Cross-sectional view at line BB in .

[0080] like Figure 4 and Figure 5 As shown in FIG. 1 , a single lead frame 3 having an inner lead 3e having a die pad 3a and a die pad 3b, a tie bar 3c, a frame frame 3d, and an outer lead 3f is prepared (S1).

[0081] The connecting rod 3c connects the plurality of external leads 3f in a direction perpendicular to the external leads 3f. The frame 3d is the peripheral portion of the lead frame 3 and connects the plurality of external leads 3f and the connecting rod 3c. Figure 5 As shown, the inner lead 3e has a stepped shape. The stepped shape of the inner lead 3e is formed by punching.

[0082] As the semiconductor device 202, Figure 4 Although the lead frame 3 shown is one, the lead frame 3 can have a plurality of semiconductor devices 202. Therefore, in the packaging step (S4) described later, a plurality of semiconductor devices 202 can be obtained by packaging them collectively and simultaneously, which is excellent in productivity.

[0083] The die bonding step ( S2 ) in the method for manufacturing a semiconductor device will be described. Figure 6 It is a plan view showing a state after a die bonding process in which the semiconductor element 1 a and the semiconductor element 1 b are mounted.

[0084] The semiconductor element 1a is mounted on the upper surface of the die pad 3a via the bonding material 2. Similarly, the semiconductor element 1b is mounted on the upper surface of the die pad 3b via the bonding material 2. The bonding material 2 may be in a paste or sheet form. A plurality of semiconductor elements 1a and semiconductor elements 1b may be bonded simultaneously and collectively by reflow soldering.

[0085] The wiring connection step ( S3 ) in the method for manufacturing a semiconductor device will be described. Figure 7 4 is a top view showing the state after the wiring connection step of connecting the wires by the metal wires 4a and 4b. Figure 8 yes Figure 7 Cross-sectional view at line CC in .

[0086] The metal wire 4a is used to connect the semiconductor element 1a and the inner lead 3e, and the metal wire 4b is used to connect the semiconductor element 1b, the semiconductor element 1a and the inner lead 3e. The connection method is to ultrasonically bond the metal wire 4a and the metal wire 4b by applying ultrasonic vibration while applying pressure using an ultrasonic tool (not shown).

[0087] In addition, the direction of ultrasonic vibration can be 1 direction or 2 directions. In addition, as required, the lead frame 3 is heated while ultrasonic bonding is performed in an inert environment formed by nitrogen (N2), thereby obtaining a wiring connection with high bonding strength and high reliability.

[0088] The packaging step ( S4 ) in the method for manufacturing a semiconductor device will be described. Fig. 9 It is a cross-sectional view showing the encapsulation step (S4) of encapsulating with resin.

[0089] The packaging method is transfer molding using a mold. The mold 7 is composed of a pair of upper molds 7a and lower molds 7b, and a heater (not shown) is embedded in the upper mold 7a and the lower mold 7b. The upper mold 7a and the lower mold 7b are heated by the heater (not shown). The lead frame 3 and the insulating heat sink 6 after the wiring connection process (S3) are arranged in the internal space of the mold 7 composed of the upper mold 7a and the lower mold 7b, and the thermosetting resin is injected into the internal space of the mold 7 from the resin injection port, that is, the gate (not shown) provided between the upper mold 7a and the lower mold 7b.

[0090] After the resin is injected, post-curing by heating is performed to completely cure the sealing resin 5, and the sealing step (S4) is completed.

[0091] Fig.10 is a top view showing the state after the encapsulation step of encapsulating with resin, Fig.11 yes Fig.10 The inner lead 3e is encapsulated by a thermosetting resin and is located inside the encapsulating resin 5. Fig.10 and Fig.11 As shown in FIG. 1 , the sealing is performed so that a part of the surface of the inner lead 3 e is exposed from the upper surface of the sealing resin 5 in a plan view.

[0092] Furthermore, the insulating heat dissipation plate 6 is transfer molded in the packaging step ( S4 ), and can be closely bonded to the lower surface of the die pad 3 a by the heat from the mold 7 whose temperature has been raised, so that the productivity is very excellent.

[0093] The tie bar cutting step ( S5 ) and the plating step ( S6 ) in the method for manufacturing a semiconductor device will be described. Fig.12 It is a top view showing the state after the connecting rod cutting step in which the connecting rod is cut.

[0094] The tie bar 3c is cut and removed by shearing with a tie bar cutting die (not shown). Then, the outer lead 3f, the inner lead 3e, and the frame 3d exposed from the package resin 5 are plated in a plating step (S6). The plating material is tin (Sn) or an alloy containing tin (Sn).

[0095] The frame cutting step ( S7 ) in the method for manufacturing a semiconductor device will be described. Fig.13 1 is a plan view showing a state after a frame cutting step in which the frame frame 3d is cut. The frame frame 3d is cut and removed by shearing with a frame cutting die (not shown).

[0096] The lead forming step ( S8 ) in the method for manufacturing a semiconductor device will be described. Fig.14 It is a cross-sectional view showing a state of the lead forming step (S8) in which the outer lead 3f is bent.

[0097] The fixing tool 10 is brought into contact with and fixed to the inner lead 3e which is connected to the outer lead 3f and exposed from the sealing resin 5. The outer lead 3f is passed through a lead forming die (not shown) and is Fig.14 The load is applied in the direction of the arrow W shown. Thus, the first bent portion 3g is provided on the side of the encapsulating resin 5, and the external lead 3f protruding from the side of the encapsulating resin 5 is bent and extended along the side of the encapsulating resin 5 toward the upper surface of the die pad 3a.

[0098] As a result, the outer lead 3 f can be bent at a substantially right angle at the side surface of the sealing resin 5 by the first bent portion 3 g without causing cracks in the sealing resin 5 .

[0099] The outer lead 3f may be bent by roller bending or cam bending.

[0100] In addition, even if the configuration position of the external lead 3f is different depending on the specification of the semiconductor device 202, only the configuration and shape of the internal lead 3e and the external lead 3f are different, so the same mold 7 can be used for packaging. In addition, since the lead forming mold (not shown) can be easily adjusted, the first bent portion 3g can be provided on the side of the packaging resin 5 so as to extend toward the upper surface of the die pad 3a and be bent.

[0101] In this way, according to the method for manufacturing a semiconductor device, a part of the surface of the inner lead 3e is exposed from the encapsulation resin 5, and the outer leads 3f are respectively protruded from the mutually opposite side surfaces of the encapsulation resin 5, and the first bent portions 3g are provided to extend, thereby shortening the distance L1 between the outer leads 3f. Therefore, the semiconductor device 202 having the outer leads 3f can be miniaturized. In addition, the arrangement area for mounting the semiconductor device 202 on the control substrate can be reduced.

[0102] Furthermore, since the external lead 3f protrudes from the side of the encapsulation resin 5, in the encapsulation step (S4), it is not necessary to prepare a new mold 7 provided with a slit as shown in Patent Document 2. Since the existing mold 7 used in the past can be used for encapsulation, the increase in the frequency of replacement of the mold 7 and the burden of management and maintenance of the mold 7 caused by the new mold 7 can be suppressed, so as a manufacturing method of a semiconductor device, the productivity is excellent.

[0103] In the first embodiment, the semiconductor element 1a is mounted on the upper surface of the die pad 3a via the bonding material 2, and the semiconductor element 1b is mounted on the upper surface of the die pad 3b via the bonding material 2. The metal wires 4a and 4b electrically connect the semiconductor element 1a, the semiconductor element 1b, and the internal lead 3e. The insulating heat sink 6 is closely bonded to the lower surface of the die pad 3a to dissipate the heat generated by the semiconductor element 1a.

[0104] The semiconductor element 1 a , the semiconductor element 1 b , the die pad 3 a , the die pad 3 b , and the inner lead 3 e are sealed by the sealing resin 5 , but a part of the surface of the inner lead 3 e is exposed from the sealing resin 5 .

[0105] Moreover, the outer lead 3f connected to the inner lead 3e protrudes from the opposite sides of the packaging resin 5, and a first bent portion 3g is provided on the side of the packaging resin 5, bent at a substantially right angle, and extends toward the upper surface of the chip pad 3a.

[0106] By adopting the above-described structure, it is possible to obtain a semiconductor device 202 that can be easily miniaturized. In addition, it is possible to reduce the layout area of ​​the semiconductor device 202 mounted on the control substrate.

[0107] Compared with the semiconductor device disclosed in Patent Document 1, the semiconductor device 202 can be reduced by 8 to 20%.

[0108] Furthermore, there is no need to prepare a new mold 7 provided with slits as disclosed in Patent Document 2, and packaging can be performed using the existing mold 7 that has been used in the past, so that the productivity is excellent.

[0109] In addition, if Figure 2 As shown, a portion of the internal lead 3e is exposed from the upper surface of the packaging resin 5 when viewed from above, and the external lead 3f protrudes from the opposite sides of the packaging resin 5, so that a sufficient insulation distance can be ensured as the distance L2 from the surface between the metal layer 6b of the insulating heat sink 6 and the cooler (not shown) installed on the insulating heat sink 6 to the first bent portion 3g.

[0110] Furthermore, the semiconductor element 1 a may be a RC-IGBT (Reverse Conducting Insulated Gate Bipolar Transistor) in which an IGBT and a freewheeling diode are formed into one. Fig.15 1 is a cross-sectional view showing a semiconductor device 202a in which the semiconductor element 1a is an RC-IGBT.

[0111] Since a pair of IGBTs and FWD can be replaced with one RC-IGBT, the area of ​​the die pad 3a required for mounting the semiconductor element 1a can be greatly reduced. Therefore, the size of the encapsulation resin 5 is also reduced, so that the semiconductor device 202a can be miniaturized. In addition, the configuration area of ​​the semiconductor device 202a mounted on the control substrate can be reduced.

[0112] Alternatively, the semiconductor element 1 a may include a so-called wide-gap semiconductor formed of a material such as silicon carbide (SiC), gallium nitride (GaN), or diamond and having a larger band gap than silicon (Si).

[0113] When a wide bandgap semiconductor element is used, power loss can be reduced compared to silicon (Si), and high temperature operation can be performed, so the size of the semiconductor element 1a can be reduced. That is, since the area of ​​the die pad 3a can be reduced, the size of the encapsulation resin 5 can also be reduced, and the miniaturization of the semiconductor device 202 can be achieved. In addition, the configuration area of ​​the semiconductor device 202 mounted on the control substrate can be reduced.

[0114] In addition, the thermally conductive material 8 may be provided on the lower side of the insulating and radiating plate 6 , that is, on the surface of the insulating and radiating plate 6 opposite to the die pad 3 a . Fig.16 It is a cross-sectional view showing a semiconductor device 202 b provided with a thermally conductive material 8 .

[0115] The thermally conductive material 8 is a plate-shaped TIM (Thermal Interface Material). It can effectively dissipate the heat generated by the semiconductor element 1a from the insulating heat sink 6 to the cooler (not shown) mounted on the insulating heat sink 6. The thermally conductive material 8 may be, for example, a graphite sheet. Since the semiconductor element 1a and the semiconductor device 202b are accompanied by a large temperature change, in the case of ordinary heat dissipation grease, it may sometimes deteriorate due to the pumping phenomenon and the thermal resistance becomes larger.

[0116] However, in the case of TIM, since it softens and undergoes phase change due to temperature, it can cope with large temperature changes of the semiconductor device 202b and maintain stable thermal resistance. Thus, the semiconductor device 202b can maintain desired electrical characteristics.

[0117] The thickness of the heat conductive material 8 is 0.03 to 0.2 mm. In addition, the heat conductive material 8 can be made highly heat conductive by mixing a metal filler.

[0118] In addition, in production, Fig.16 As shown, the heat conductive material 8 is provided not only on the lower side of the insulating heat dissipation plate 6 but also on the entire surface in contact with the cooler (not shown) including the lower surface of the sealing resin 5 .

[0119] If the concern about the increase of thermal resistance at the contact surface between the semiconductor device 202b and the cooler (not shown) can be eliminated and sufficient heat dissipation can be ensured, the semiconductor device 202b can be miniaturized. In addition, the arrangement area of ​​the semiconductor device 202b mounted on the control substrate can be reduced.

[0120] Implementation method 2.

[0121] Fig.17 is a top view showing a semiconductor device 202c according to Embodiment 2. Fig.18 yes Fig.17 In addition, most of the structures of the semiconductor device and the method for manufacturing the semiconductor device in this embodiment are common to those in Embodiment 1. Therefore, the differences from the semiconductor device and the method for manufacturing the semiconductor device in Embodiment 1 are described, and the same or corresponding structures are marked with the same reference numerals and their descriptions are omitted. The difference from Embodiment 1 is the following structure, that is, Figure 17-18As shown in FIG. 1 , the outer lead 3 f is provided with a second bent portion 3 h in addition to the first bent portion 3 g , and the outer lead 3 f is arranged parallel to the exposed surface of the inner lead 3 e exposed from the sealing resin 5 .

[0122] like Fig.17 and Fig.18 As shown in FIG. 1 , the inner lead 3e has an exposed surface where a part of the inner lead 3e is exposed from the upper surface of the encapsulation resin 5. The outer lead 3f protrudes from the side surfaces of the encapsulation resin 5 that are opposite to each other. The first bent portion 3g is provided on the side surface of the encapsulation resin 5 so that the outer lead 3f is arranged in parallel with the exposed surface of the inner lead 3e. Furthermore, the second bent portion 3h is provided on the outer lead 3f arranged in parallel with the exposed surface of the inner lead 3e so as to extend toward the upper surface of the die pad 3a.

[0123] The outer lead 3f is bent at multiple locations. In the lead forming step of bending the outer lead 3f, the second bent portion 3h is formed by a lead forming die (not shown). Thereafter, the first bent portion 3g is formed on the side surface of the encapsulating resin 5 in a manner parallel to the exposed surface of the inner lead 3e by a lead forming die (not shown).

[0124] In this way, the external leads 3f protrude from the opposite sides of the packaging resin 5, and a first bent portion 3g is provided on the side of the packaging resin 5. The external leads 3f are arranged parallel to the exposed surface of the internal leads 3e exposed from the packaging resin 5, and extend toward the upper surface of the chip pad 3a.

[0125] Thus, the distance L3 between the outer leads 3f extending toward the upper surface of the die pad 3a can be made shorter than the distance L1 in the first embodiment.

[0126] In the second embodiment, the external lead 3f connected to the internal lead 3e protrudes from the side surfaces of the encapsulation resin 5 that are opposite to each other, and the first bent portion 3g is provided on the side surface of the encapsulation resin 5, and the external lead 3f is arranged parallel to the exposed surface of a part of the internal lead 3e exposed from the upper surface of the encapsulation resin 5. In addition, the second bent portion 3h is provided on the external lead 3f arranged parallel to the exposed surface of the internal lead 3e, and extends toward the upper surface of the die pad 3a.

[0127] By adopting the above-described structure, it is possible to obtain a semiconductor device 202c that can be easily miniaturized. In addition, it is possible to reduce the layout area of ​​the semiconductor device 202c mounted on the control substrate.

[0128] Furthermore, there is no need to prepare a new mold 7 provided with slits as disclosed in Patent Document 2, and packaging can be performed using the existing mold 7 that has been used in the past, so that the productivity is excellent.

[0129] In addition, if Fig.18 As shown, a portion of the internal lead 3e is exposed from the upper surface of the packaging resin 5 when viewed from above, and the external lead 3f protrudes from the side surfaces of the packaging resin 5 opposite to each other, so that a sufficient insulation distance can be ensured as the distance L2 from the surface between the metal layer 6b of the insulating heat sink 6 and the cooler (not shown) installed on the insulating heat sink 6 to the first bent portion 3g.

[0130] In addition, if Fig.19 and Fig. 20 As shown in FIG. 1 , the second bent portion 3h may not be provided in the external lead 3f. Fig.19 FIG. 2 is a top view showing a semiconductor device 202d without the second bent portion 3h. Fig. 20 yes Fig.19 Cross-sectional view at line FF in FIG.

[0131] The external lead 3f can be surface mounted on the control substrate instead of being inserted into a through hole of the control substrate. Thus, heat dissipation from the external lead 3f to the control substrate is improved, and a large current can flow.

[0132] Implementation method 3.

[0133] Fig.21 2 is a cross-sectional view showing a semiconductor device 202e according to Embodiment 3. In addition, most of the structures of the semiconductor device and the method for manufacturing the semiconductor device in this embodiment are common to those in Embodiment 1. Therefore, the differences from the semiconductor device and the method for manufacturing the semiconductor device in Embodiment 1 are described, and the same or corresponding structures are marked with the same reference numerals and their descriptions are omitted. The difference from Embodiment 1 is the following structure, that is, Fig.21 As shown in FIG. 1 , a groove 9 is provided in the first bent portion 3g of the external lead 3f.

[0134] Fig. 22 2 is a top view showing the state after the component preparation step of the lead frame 3 of the semiconductor device 202e. Fig. 22 As shown, a groove 9 having a depth of about 20% of the thickness of the lead frame 3 is formed by press working on the surface of the first bent portion 3g on which compressive stress is applied during bending. Since a plurality of grooves 9 can be easily formed by press working, excellent productivity is achieved.

[0135] Fig.23 2 is a cross-sectional view showing a state after the encapsulation process of encapsulating the semiconductor device 202e with resin. Fig.23 As shown, since the groove 9 is provided on the surface on the side where the compressive stress is generated during bending, the outer lead 3f can be easily bent with high accuracy in the lead forming step (S8), and the productivity is excellent.

[0136] Furthermore, when the semiconductor device 202e is mounted on a control substrate, positional deviation of the outer leads 3f can be suppressed by high-precision bending, thereby facilitating mounting.

[0137] In embodiment 3, the external lead 3f connected to the internal lead 3e also protrudes from the opposite sides of the packaging resin 5, and the first bent portion 3g having a groove 9 is provided on the side of the packaging resin 5 on the side where the bending compressive stress is generated, and is bent at a substantially right angle and extends toward the upper surface of the chip pad 3a.

[0138] By adopting the above-described structure, it is possible to obtain a semiconductor device 202e that can be easily miniaturized. In addition, the arrangement area of ​​the semiconductor device 202e mounted on the control substrate can be reduced. Furthermore, the semiconductor device 202e can be easily positioned and mounted on the control substrate.

[0139] Furthermore, there is no need to prepare a new mold 7 provided with slits as disclosed in Patent Document 2, and packaging can be performed using the existing mold 7 that has been used in the past, so that the productivity is excellent.

[0140] In addition, if Fig.21 As shown, a portion of the internal lead 3e is exposed from the upper surface of the packaging resin 5 when viewed from above, and the external lead 3f protrudes from the side surfaces of the packaging resin 5 opposite to each other, so that a sufficient insulation distance can be ensured as the distance L2 from the surface between the metal layer 6b of the insulating heat sink 6 and the cooler (not shown) installed on the insulating heat sink 6 to the first bent portion 3g.

[0141] Implementation method 4.

[0142] This embodiment applies the semiconductor device 202 according to the above-mentioned Embodiment 1 to a power conversion device. The present invention is not limited to a specific power conversion device, but the case where the present invention is applied to a three-phase inverter will be described below as Embodiment 4.

[0143] Fig.24 It is a block diagram showing the configuration of a power conversion system to which the power conversion device according to the fourth embodiment is applied.

[0144] Fig.24The power conversion system shown is composed of a power supply 100, a power conversion device 200, and a load 300. The power supply 100 is a DC power supply, and supplies DC power to the power conversion device 200. The power supply 100 can be composed of various power supplies, for example, it can be composed of a DC system, a solar cell, a storage battery, or a rectifier circuit or an AC / DC converter connected to an AC system. In addition, the power supply 100 can also be composed of a DC / DC converter that converts the DC power output from the DC system into a predetermined power.

[0145] The power conversion device 200 is a three-phase inverter connected between the power source 100 and the load 300, converts the DC power supplied or input from the power source 100 into AC power, and supplies the AC power to the load 300. Fig.24 As shown, the power conversion device 200 includes: a main conversion circuit 201 that converts DC power into AC power and outputs it; and a control circuit 203 that outputs a control signal for controlling the main conversion circuit 201 to the main conversion circuit 201 .

[0146] Load 300 is a three-phase motor driven by AC power supplied from power converter 200. Load 300 is not limited to a specific use, and is a motor mounted on various electrical devices, for example, a motor for hybrid vehicles, electric vehicles, railway vehicles, elevators, and air conditioners.

[0147] The details of the power conversion device 200 are described below. The main conversion circuit 201 has a switching element and a freewheeling diode (not shown), and converts the DC power supplied from the power supply 100 into AC power by turning the switching element on and off, and supplies it to the load 300. The specific circuit structure of the main conversion circuit 201 is various, but the main conversion circuit 201 involved in this embodiment is a 2-level three-phase full-bridge circuit, which can be composed of 6 switching elements and 6 freewheeling diodes connected in anti-parallel to each switching element. Each switching element and each freewheeling diode of the main conversion circuit 201 is composed of a semiconductor device corresponding to any of the above-mentioned embodiments 1 to 3. In addition, the case where it is composed of the semiconductor device 202 involved in embodiment 1 is described here. The 6 switching elements are connected in series two by two to form upper and lower bridge arms, and each upper and lower bridge arm constitutes each phase (U phase, V phase, W phase) of the full-bridge circuit. Moreover, the output terminals of each upper and lower bridge arm, that is, the three output terminals of the main conversion circuit 201, are connected to the load 300.

[0148] In addition, the main conversion circuit 201 has a driving circuit (not shown) for driving each switching element, but the driving circuit can also be built into the semiconductor device 202, or can also be a structure having a driving circuit separate from the semiconductor device 202. The driving circuit generates a driving signal for driving the switching element of the main conversion circuit 201, and supplies it to the control electrode of the switching element of the main conversion circuit 201. Specifically, according to the control signal from the control circuit 203 described later, the driving signal for turning the switching element into the on state and the driving signal for turning the switching element into the off state are output to the control electrode of each switching element. When the switching element is maintained in the on state, the driving signal is a voltage signal (on signal) greater than or equal to the threshold voltage of the switching element, and when the switching element is maintained in the off state, the driving signal is a voltage signal (off signal) less than or equal to the threshold voltage of the switching element.

[0149] The control circuit 203 controls the switching elements of the main conversion circuit 201 to supply the desired power to the load 300. Specifically, the time (on time) at which each switching element of the main conversion circuit 201 should be in the on state is calculated based on the power to be supplied to the load 300. For example, the main conversion circuit 201 can be controlled by PWM control that modulates the on time of the switching element corresponding to the voltage to be output. In addition, a control instruction (control signal) is output to a drive circuit of the main conversion circuit 201 so that an on signal is output to the switching element that should be in the on state and an off signal is output to the switching element that should be in the off state at each moment. The drive circuit outputs the on signal or the off signal as a drive signal to the control electrode of each switching element according to the control signal.

[0150] In the power conversion device according to the present embodiment, since the semiconductor device 202 according to the first embodiment is used as a switching element and a freewheeling diode of the main conversion circuit 201, it is possible to improve reliability.

[0151] In this embodiment, an example of applying the present invention to a 2-level three-phase inverter is described, but the present invention is not limited thereto and can be applied to various power conversion devices. In this embodiment, a 2-level power conversion device is used, but a 3-level or multi-level power conversion device may also be used, and the present invention may also be applied to a single-phase inverter when power is supplied to a single-phase load. In addition, when power is supplied to a DC load, the present invention may also be applied to a DC / DC converter or an AC / DC converter.

[0152] In addition, the power conversion device to which the present invention is applied is not limited to the case where the above-mentioned load is an electric motor. For example, it can also be used as a power supply device for an electric discharge machine, a laser processing machine, an induction heating cooker, and a contactless power supply system, and can also be used as a power conditioner for a solar power generation system and a power storage system.

[0153] In addition, the present invention can freely combine the various embodiments, and can appropriately modify or omit the various embodiments.

[0154] Description of the label

[0155] 1a, 1b Semiconductor components

[0156] 3 Lead frame

[0157] 3a, 3b Chip pads

[0158] 3c Connecting rod

[0159] 3d frame box

[0160] 3e Internal lead

[0161] 3f External lead

[0162] 3g 1st bend

[0163] 3h 2nd bend

[0164] 4a, 4b Metal conductors

[0165] 5. Encapsulation resin

[0166] 6 Insulation heat sink

[0167] 8 Thermally conductive materials

[0168] 9 slots

[0169] 200 Power conversion device

[0170] 201 Main conversion circuit

[0171] 202, 202a, 202b, 202c, 202d, 202e semiconductor device

[0172] 203 Control Circuit

Claims

1. A semiconductor device comprising: Semiconductor components; an inner lead having a die pad for mounting the semiconductor element on an upper surface; a sealing resin that seals the semiconductor element and the inner leads; and external leads electrically connected to the semiconductor element and the internal leads, projecting from mutually opposing side surfaces of the encapsulating resin, The inner lead has a stepped shape, and a portion of the inner lead is exposed from the encapsulating resin when viewed from above. The outer lead has a first bent portion on the side surface of the encapsulating resin so as to extend toward the upper surface of the die pad. The inner lead and the outer lead have the same thickness and are integrally connected, The inner lead and the outer lead connected integrally have: In a first group, the external lead protrudes from one of the mutually opposing side surfaces of the encapsulating resin; and In the second group, the external lead protrudes from the other side, The die pads included in the inner leads of the first group and the die pads included in the inner leads of the second group are located in the same plane.

2. The semiconductor device according to claim 1, wherein The first bent portion of the outer lead has a groove on a surface on a side where a compressive stress is generated by bending.

3. The semiconductor device according to claim 1 or 2, wherein: An insulating heat dissipation plate is provided on the lower surface of the die pad on which the semiconductor element is mounted and is exposed from the sealing resin.

4. The semiconductor device according to claim 3, wherein: A plate-shaped heat conductive material is provided on a surface of the insulating heat dissipation plate that is exposed from the sealing resin.

5. The semiconductor device according to claim 1 or 2, wherein: The semiconductor element is an RC-IGBT.

6. The semiconductor device according to claim 1 or 2, wherein: The semiconductor element is formed of a wide bandgap semiconductor.

7. A power conversion device, comprising: A main conversion circuit comprising the semiconductor device according to any one of claims 1 to 6, wherein the main conversion circuit converts input power and outputs the converted power; and A control circuit outputs a control signal for controlling the main conversion circuit to the main conversion circuit.

8. A semiconductor device comprising: Semiconductor components; an inner lead having a die pad for mounting the semiconductor element on an upper surface; a sealing resin that seals the semiconductor element and the inner leads; and external leads electrically connected to the semiconductor element and the internal leads, projecting from mutually opposing side surfaces of the encapsulating resin, The inner lead has a stepped shape, and the inner lead has an exposed surface in which a part of the surface of the inner lead is exposed from the encapsulating resin in a plan view. The outer lead has a first bent portion on the side surface of the encapsulating resin, and the outer lead is arranged parallel to the exposed surface of the inner lead exposed from the encapsulating resin. The inner lead and the outer lead have the same thickness and are integrally connected, The inner lead and the outer lead connected integrally have: In a first group, the external lead protrudes from one of the mutually opposing side surfaces of the encapsulating resin; and In the second group, the external lead protrudes from the other side, The die pads included in the inner leads of the first group and the die pads included in the inner leads of the second group are located in the same plane.

9. The semiconductor device according to claim 8, wherein: The outer lead has a second bent portion so as to extend toward the upper surface of the die pad.

10. The semiconductor device according to claim 8 or 9, wherein: The first bent portion of the outer lead has a groove on a surface on a side where a compressive stress is generated by bending.

11. The semiconductor device according to claim 8 or 9, wherein: An insulating heat dissipation plate is provided on the lower surface of the die pad on which the semiconductor element is mounted and is exposed from the sealing resin.

12. The semiconductor device according to claim 11, wherein A plate-shaped heat conductive material is provided on a surface of the insulating heat dissipation plate that is exposed from the sealing resin.

13. The semiconductor device according to claim 8 or 9, wherein: The semiconductor element is an RC-IGBT.

14. The semiconductor device according to claim 8 or 9, wherein: The semiconductor element is formed of a wide bandgap semiconductor.

15. A power conversion device, comprising: A main conversion circuit comprising the semiconductor device according to any one of claims 8 to 14, the main conversion circuit converting input power and outputting the converted power; and A control circuit outputs a control signal for controlling the main conversion circuit to the main conversion circuit.

16. A method for manufacturing a semiconductor device, comprising: A component preparation step of preparing a lead frame having a stepped shape, the lead frame comprising an inner lead, a connecting rod, a frame frame and an outer lead, the inner lead having a chip pad; A chip bonding step of mounting a semiconductor element on the chip pad; A wiring connection step of connecting the semiconductor element and the internal lead by metal wires; A packaging step of packaging the semiconductor element, the metal wire, and the inner lead with a packaging resin so that the inner lead has an exposed surface in which a portion of the inner lead is exposed when viewed from above; A connecting rod cutting step, cutting and removing the connecting rod; a plating step of plating the outer leads, the exposed surfaces of the inner leads exposed from the encapsulation resin, and the frame; A frame cutting process, cutting and removing the frame; as well as a lead forming step of bending the outer leads at the sides of the encapsulating resin facing each other, After the connecting rod cutting process, the inner lead and the outer lead also have the same thickness and are connected integrally. The inner lead and the outer lead connected integrally have: In a first group, the external lead protrudes from one of the mutually opposing side surfaces of the encapsulating resin; and In the second group, the external lead protrudes from the other side, The component preparation step includes a step of preparing the lead frame having the step shape in which the die pads of the inner leads of the first group and the die pads of the inner leads of the second group are located in the same plane.

17. The method for manufacturing a semiconductor device according to claim 16, wherein: The lead forming step includes bending the outer lead at a plurality of locations.

18. The method for manufacturing a semiconductor device according to claim 16 or 17, wherein: The component preparation step includes preparing the lead frame having grooves provided in the outer leads.

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