NMOS switch driving circuit and electronic equipment

Abstract

The present invention provides a driving circuit and electronic device for an NMOS switch, comprising: a charge pump, a switching power supply module, and a clamping indication module; the clamping indication module is used to: when the difference between the target voltage and the input voltage is greater than a specified voltage value, maintain the difference at the specified voltage value by clamping the target voltage, and instruct the switching power supply module to output a first power supply voltage to the charge pump; when the difference is less than the specified voltage value, instruct the switching power supply module to output a second power supply voltage to the charge pump; the second power supply voltage is greater than the first power supply voltage; the charge pump is used to: based on the received current power supply voltage, boost the input voltage to obtain the target voltage; if the current power supply voltage is the second power supply voltage, the difference between the target voltage and the input voltage is not less than the specified voltage value.

Description

Technical Field

[0001] The present invention relates to the field of circuits, and in particular to a driving circuit and electronic equipment of an NMOS switch. Background Art

[0002] When a voltage signal is transmitted through an NMOS switch, in order to turn on the NMOS switch, a voltage higher than the source voltage of the NMOS switch needs to be added to the gate of the NMOS switch to turn on the NMOS switch. At this time, the chip circuit needs to generate a suitable boost, which can usually be generated by a charge pump.

[0003] In the existing related technology, when the output impedance of the charge pump is relatively large, the target voltage output by the charge pump will be pulled down, so that the target voltage output by the charge pump will be easily pulled down a lot when the load becomes heavier, and cannot meet the driving requirements (for example, it cannot reach the gate-source driving voltage, which can be understood as a voltage sufficient to drive the NMOS switch).

[0004] In view of this, if the target voltage of the charge pump is designed to be high in advance, not only will the charge pump circuit consume more power, but also the charge pump target voltage may exceed the maximum gate-source withstand voltage of the NMOS switch when the load is light. Summary of the invention

[0005] The present invention provides a driving circuit and electronic equipment of an NMOS switch to solve the problem of difficulty in balancing power consumption and gate driving requirements of the NMOS switch.

[0006] The present invention provides a driving circuit for an NMOS switch, comprising: a charge pump, a switching power supply module, and a clamping indication module;

[0007] The switching power supply module is connected to the first input end of the charge pump, and the second input end of the charge pump is used to access the input voltage of the source of the NMOS switch; the clamping indication module is respectively connected to the output end of the charge pump and the switching power supply module, and the clamping indication module is also connected to the input voltage, and the output end of the charge pump is directly or indirectly connected to the gate of the NMOS switch;

[0008] The clamp indication module is used for:

[0009] When the difference between the target voltage and the input voltage is greater than a specified voltage value, the difference is maintained at the specified voltage value by clamping the target voltage, and the switching power supply module is instructed to output a first power supply voltage to the charge pump;

[0010] When the difference is less than the specified voltage value, instructing the switching power supply module to output a second power supply voltage to the charge pump; the second power supply voltage is greater than the first power supply voltage;

[0011] The charge pump is used to:

[0012] Based on the received current supply voltage, the input voltage is boosted to obtain the target voltage; wherein the current supply voltage is the first supply voltage or the second supply voltage; if the current supply voltage is the second supply voltage, then the difference between the target voltage and the input voltage is not less than the specified voltage value.

[0013] Optionally, the clamp indication module includes a first PMOS tube, a voltage stabilizing device and an indication feedback unit;

[0014] The gate of the first PMOS tube is connected to the input voltage, the source of the first PMOS tube is connected to the output end of the charge pump via the voltage regulator, the drain of the first PMOS tube is grounded via the indication feedback unit, and the control end of the indication feedback unit is connected to the switching power supply module;

[0015] The voltage stabilizing device can reversely break down when the difference is greater than the specified voltage value;

[0016] When the voltage stabilizing device breaks down in reverse, the indication feedback unit instructs the switching power supply module to output the first power supply voltage;

[0017] When the voltage stabilizing device is not reversely broken down, the indication feedback unit instructs the switching power supply module to output the second power supply voltage.

[0018] Optionally, the indication feedback unit includes a first NMOS tube, a gate of the first NMOS tube is connected to the switching power supply module, and a drain of the first PMOS tube is grounded via the first NMOS tube;

[0019] When the voltage stabilizing device reversely breaks down, the current of the first NMOS tube is a first current, and the first NMOS tube instructs the switching power supply module to output the first supply voltage by coupling the first current to the switching power supply module;

[0020] When the voltage stabilizing device is not reversely broken down, the current of the first NMOS tube is the second current, and the first NMOS tube couples the second current to the switching power supply module to instruct the switching power supply module to output the second power supply voltage;

[0021] Optionally, the voltage stabilizing device includes a Zener diode.

[0022] Optionally, the switching power supply module includes a switching unit and a voltage reduction unit;

[0023] The input end of the step-down unit is connected to a voltage source, the output end of the step-down unit is connected to a switching unit, and the switching unit is also respectively connected to the voltage source, the first input end of the charge pump, and the clamp indication module;

[0024] The step-down unit is used for:

[0025] Stepping down the voltage of the voltage source to obtain a stepped-down voltage, and transmitting the stepped-down voltage to the switching unit;

[0026] The switching unit is used for:

[0027] When the difference is greater than the specified voltage value, under the instruction of the clamp indication module, outputting the first supply voltage based on the stepped-down voltage;

[0028] When the difference is less than the specified voltage value, under the instruction of the clamp indication module, the second supply voltage is output based on the voltage of the voltage source.

[0029] Optionally, the switching unit includes a second PMOS tube, an indication receiving unit, a current source and a power supply unit;

[0030] The gate of the second PMOS tube is connected to the output end of the step-down unit, the source of the second PMOS tube is connected to the voltage source via the current source, the drain of the second PMOS tube is grounded via the indication receiving unit, the control end of the power supply unit is connected to the source of the second PMOS tube, and the power supply unit is connected between the voltage source and the first input end of the charge pump;

[0031] The instruction receiving unit is used for:

[0032] When the difference is less than the specified voltage value, under the instruction of the clamp indication module, the second PMOS tube is turned on so that the voltage at the control end of the power supply unit is the sum of the stepped-down voltage and the turn-on gate-source voltage of the second PMOS tube, and the power supply unit outputs the first supply voltage to the charge pump;

[0033] When the difference is greater than the specified voltage value, under the instruction of the clamp indication module, the power supply unit is pulled up to the voltage source, and the power supply unit outputs the second power supply voltage to the charge pump.

[0034] Optionally, the indication receiving unit includes a second NMOS tube, the gate of the second NMOS tube is connected to the clamp indication module, and the second NMOS tube is connected between the drain of the second PMOS tube and ground; the second NMOS tube is indicated by the clamp indication module by coupling current from the clamp indication module.

[0035] Optionally, the power supply unit includes a third NMOS transistor connected between the voltage source and the second input terminal of the charge pump.

[0036] Optionally, the buck unit is an LDO.

[0037] According to a second aspect of the present invention, there is provided an electronic device, comprising: the driving circuit involved in the first aspect and its optional solutions, and an NMOS switch driven by the driving circuit.

[0038] In the driving circuit and electronic device of the NMOS switch provided by the present invention, by switching the power supply module and the clamping indication module, the target voltage can be clamped when the target voltage is large (that is, when the difference is greater than the specified voltage value), and at the same time, a lower power supply voltage (that is, the first power supply voltage) can be provided for the charge pump, so that the power consumption is kept in a lower range while meeting the driving requirements of the NMOS switch; in addition, by switching the power supply module and the clamping indication module, the present invention can also provide a higher power supply voltage (that is, the second power supply voltage) to the charge pump in time when the target voltage is small (that is, when the difference is less than the specified voltage value), for example, when it is pulled down due to a heavy load, so as to meet the driving requirements of the NMOS switch. BRIEF DESCRIPTION OF THE DRAWINGS

[0039] In order to more clearly illustrate the embodiments of the present invention or the technical solutions in the prior art, the drawings required for use in the embodiments or the description of the prior art will be briefly introduced below. Obviously, the drawings described below are only some embodiments of the present invention. For ordinary technicians in this field, other drawings can be obtained based on these drawings without paying creative labor.

[0040] Figure 1 FIG. 1 is a schematic diagram of a driving circuit of an NMOS switch in an embodiment of the present invention. Figure 1 ;

[0041] Figure 2 FIG. 1 is a schematic diagram of a driving circuit of an NMOS switch in an embodiment of the present invention. Figure 2 ;

[0042] Figure 3 FIG. 4 is a circuit diagram of a driving circuit of an NMOS switch in an embodiment of the present invention.

[0043] Description of reference numerals:

[0044] 100-charge pump;

[0045] 200-Switch the power supply module;

[0046] 210- step-down unit;

[0047] 220-switching unit;

[0048] 221-current source;

[0049] 222-instruction receiving unit;

[0050] 223- Power Supply Department;

[0051] 300-Clamp indication module;

[0052] 310-voltage stabilizing device;

[0053] 320-indication feedback unit;

[0054] P1-first PMOS tube;

[0055] P2- the second PMOS tube;

[0056] Z1-Zener diode;

[0057] N1-first NMOS tube;

[0058] N2- the second NMOS tube;

[0059] N3- the third NMOS tube. DETAILED DESCRIPTION

[0060] The following will be combined with the drawings in the embodiments of the present invention to clearly and completely describe the technical solutions in the embodiments of the present invention. Obviously, the described embodiments are only part of the embodiments of the present invention, not all of the embodiments. Based on the embodiments of the present invention, all other embodiments obtained by ordinary technicians in this field without creative work are within the scope of protection of the present invention.

[0061] In the description of the specification of the present invention, it is necessary to understand that the orientation or position relationship indicated by the terms "upper part", "lower part", "upper end", "lower end", "lower surface", "upper surface", etc. is based on the orientation or position relationship shown in the drawings, and is only for the convenience of describing the present invention and simplifying the description, rather than indicating or implying that the device or element referred to must have a specific orientation, be constructed and operated in a specific orientation, and therefore cannot be understood as a limitation on the present invention.

[0062] In the description of the present specification, the terms "first" and "second" are used for descriptive purposes only and are not to be understood as indicating or implying relative importance or implicitly indicating the number of the indicated technical features. Therefore, the features defined as "first" and "second" may explicitly or implicitly include one or more of the features.

[0063] In the description of the present invention, "plurality" means a plurality, such as two, three, four, etc., unless otherwise clearly and specifically defined.

[0064] In the description of the present invention, unless otherwise clearly specified and limited, the term "connection" and other terms should be understood in a broad sense, for example, it can be a fixed connection, a detachable connection, or an integral connection; it can be a mechanical connection, an electrical connection, or mutual communication; it can be directly connected or indirectly connected through an intermediate medium, it can be the internal connection of two elements or the interaction relationship between two elements. For ordinary technicians in this field, the specific meanings of the above terms in the present invention can be understood according to specific circumstances.

[0065] The technical solution of the present invention is described in detail with specific embodiments below. The following specific embodiments can be combined with each other, and the same or similar concepts or processes may not be described in detail in some embodiments.

[0066] Please refer to Figure 1 The driving circuit of the NMOS switch includes: a charge pump 100, a switching power supply module 200, and a clamp indication module 300.

[0067] The switching power supply module 200 is connected to the first input terminal of the charge pump 100, and the second input terminal of the charge pump 100 is used to access the input voltage VIN of the source of the NMOS switch; the input voltage VIN can be understood as the voltage of the voltage signal to be transmitted through the NMOS switch;

[0068] The clamp indication module 300 is respectively connected to the output end of the charge pump 100 and the switching power supply module 200. The clamp indication module 300 is also connected to the input voltage. The output end of the charge pump 100 is directly or indirectly connected to the gate of the NMOS switch (not shown) to output the target voltage VCP.

[0069] The charge pump 100 and the NMOS switch may be directly connected to achieve direct driving, and the charge pump 100 may drive the NMOS switch via other devices.

[0070] The clamp indication module 300 is used for:

[0071] When the difference between the target voltage VCP and the input voltage VIN is greater than a specified voltage value (e.g., 5.5V), the target voltage VCP is clamped to maintain the difference at the specified voltage value, and the switching power supply module 200 is instructed to output the first power supply voltage to the charge pump 100;

[0072] When the difference is less than the specified voltage value (for example, 5.5V), instructing the switching power supply module 200 to output a second power supply voltage to the charge pump 100;

[0073] The second power supply voltage is greater than the first power supply voltage, and thus the target voltage and the power supply voltage can be adaptively changed, thereby helping to reduce the power consumption of the charge pump 100 .

[0074] The difference between the target voltage VCP and the input voltage VIN, that is, the value of (VCP-VIN), can be understood as the gate-source voltage of the NMOS switch;

[0075] When the difference is large enough (for example, when it reaches the gate-source driving voltage of the NMOS switch), the NMOS switch can be driven to turn on. The gate-source driving voltage can be understood as a voltage difference that is sufficient to drive the NMOS switch to turn on.

[0076] The clamping indication module 300 and the switching power supply module 200 may be any circuit modules capable of realizing the above functions.

[0077] The charge pump 100 is used for:

[0078] Based on the received current power supply voltage VO, the input voltage VIN is boosted to obtain the target voltage VCP; wherein the current power supply voltage is the first power supply voltage or the second power supply voltage; if the current power supply voltage is the second power supply voltage, then the difference between the target voltage and the input voltage is not less than the specified voltage value.

[0079] The charge pump can also be characterized as: Charge Pump; any circuit in the art that can realize the above charge pump function can be used as an optional solution.

[0080] In one example, the voltage boost achieved by the charge pump satisfies: VCP = VIN + n*VO;

[0081] Where n is the voltage boost factor, which can be determined based on the specific circuit of the charge pump. The voltage difference n*VO between VCP and VIN is used as the gate-source voltage of the NMOS switch. It can be seen that the charge pump achieves a voltage boost of n times the input voltage VO based on the input voltage VIN, where n can be a positive integer greater than or equal to 1.

[0082] It can be seen that in the above scheme, by switching the power supply module and the clamp indication module, the target voltage can be clamped when the target voltage is large (that is, when the difference is greater than the specified voltage value), and at the same time, a lower power supply voltage (that is, the first power supply voltage) can be provided for the charge pump to keep the power consumption within a lower range while meeting the NMOS switch driving requirements; in addition, the present invention can also provide a higher power supply voltage (that is, the second power supply voltage) for the charge pump in time when the target voltage is small (that is, when the difference is less than the specified voltage value, for example, when it is pulled down due to a heavy load) by switching the power supply module and the clamp indication module to meet the driving requirements of the NMOS switch.

[0083] In one implementation, please refer to Figure 2 The clamp indication module 300 includes a first PMOS tube P1 , a voltage stabilizing device 310 and an indication feedback unit 320 .

[0084] The gate of the first PMOS transistor P1 is connected to the input voltage VIN, the source of the first PMOS transistor P1 is connected to the output end of the charge pump 100 via the voltage regulator 310, the drain of the first PMOS transistor P1 is grounded via the indication feedback unit 320, and the control end of the indication feedback unit 320 is connected to the switching power supply module 200 (for example, the indication receiving unit 222 of the switching unit in the switching power supply module 200);

[0085] The voltage stabilizing device can reversely break down when the difference is greater than the specified voltage value; the voltage stabilizing device 310 can be implemented by a Zener diode, or by other devices or combinations of devices with similar functions.

[0086] Among them, the reverse breakdown condition of the voltage stabilizing device may be, for example: the reverse voltage of the voltage stabilizing device 310 is greater than or equal to the reverse breakdown voltage of the voltage stabilizing device, that is, the source voltage Vs_P1 of the first PMOS tube P1 is smaller than the target voltage VCP, and (VCP-Vs_P1) is greater than or equal to the reverse breakdown voltage of the voltage stabilizing device 310. Specifically, when the first PMOS tube P1 is turned on, the voltage difference between the source voltage Vs_P1 and the input voltage VIN is the turn-on gate-source voltage when the first PMOS tube P1 is turned on, which is a fixed value (for example, about 1V). Furthermore, after reverse breakdown, the target voltage VCP can be clamped at the sum of the input voltage VIN, the turn-on gate-source voltage when the first PMOS tube P1 is turned on, and the reverse breakdown voltage of the voltage stabilizing device 310.

[0087] When the voltage stabilizing device 310 breaks down in reverse, the first PMOS transistor P1 is turned on, and the current corresponding to the first PMOS transistor P1 and the indication feedback unit 320 may be the first current. The indication feedback unit 320 may instruct the switching power supply module 200 to output the first power supply voltage.

[0088] When the voltage stabilizing device 310 is not reversely broken down, the first PMOS tube P1 is not turned on, and accordingly, the current of the indication feedback unit 320 can be a second current (for example, a current close to 0), and the indication feedback unit 320 can instruct the switching power supply module to output the second supply voltage.

[0089] In one example, Figure 3 For example, the indication feedback unit 320 includes a first NMOS tube N1, the gate of the first NMOS tube N1 is connected to the switching power supply module 200 (specifically, it can be connected to the second transistor N2 therein), and the drain of the first PMOS tube is grounded through the first NMOS tube;

[0090] When the voltage stabilizing device 310 breaks down in reverse, the current of the first NMOS tube is a first current, and the first NMOS tube couples the first current to the switching power supply module to instruct the switching power supply module to output the first power supply voltage;

[0091] When the voltage stabilizing device is not reversely broken down, the current of the first NMOS tube is the second current, and the first NMOS tube couples the second current to the switching power supply module to instruct the switching power supply module to output the second power supply voltage;

[0092] If the first NMOS tube N1 and the second NMOS tube N2 are used to implement indication feedback and reception, the corresponding current can be formed by coupling the size ratio between the first NMOS tube N1 and the second NMOS tube N2; for example, when the first NMOS tube N1 and the second NMOS tube N2 are of the same size, when the current of the first NMOS tube N1 is the first current, the current of the second NMOS tube N2 is also the first current, when the current of the first NMOS tube N1 is the second current, the current of the second NMOS tube N2 is also the second current, and for another example, when the first NMOS tube N1 and the second NMOS tube N2 are of different sizes, when the current of the first NMOS tube N1 is the first current, the current of the second NMOS tube N2 is also the third current proportional to the first current, and when the current of the first NMOS tube N1 is the second current, the current of the second NMOS tube N2 is the fourth current proportional to the second current.

[0093] In other examples, the indication feedback unit 320 may also be implemented by a resistor (or other device), and further, a first current acting on the resistor (or other device) may form a certain first feedback voltage, and a second current acting on the resistor (or other device) may form a second feedback voltage. By feeding back the two feedback voltages to the switching power supply module 200, indication of the switching power supply module 200 may also be achieved.

[0094] As long as different electrical parameters can be fed back (or formed) in the switching power supply module 200 when the first current and the second current are generated, thereby being identified as two different indications, it can be used as an optional solution of the embodiment of the present invention.

[0095] Through the above scheme, the situation where the difference is greater than the specified voltage value and is thus clamped, and the situation where the difference is less than the specified voltage value can be fed back to the switching power supply module in a timely manner, thereby realizing timely switching of the power supply voltage received by the charge pump and effectively ensuring the satisfaction of low power consumption and driving requirements.

[0096] In one implementation, please refer to Figure 2 The switching power supply module 200 includes a switching unit 220 and a voltage reduction unit 210 .

[0097] The input end of the step-down unit 210 is connected to a voltage source, the output end of the step-down unit 210 is connected to a switching unit 220, and the switching unit 220 is also respectively connected to the voltage source, the first input end of the charge pump, and the clamp indication module;

[0098] The voltage reduction unit 210 is used for:

[0099] Stepping down the voltage VDD of the voltage source to obtain a stepped-down voltage VREG, and transmitting the stepped-down voltage VREG to the switching unit 220;

[0100] The buck unit 210 can be implemented, for example, by an LDO, where the LDO can be understood as a low voltage dropout linear regulator. In other examples, other linear voltage regulator output circuits can also be used, and it can also be implemented by a voltage converter, a voltage divider device, etc.

[0101] The switching unit 220 is used for:

[0102] When the difference is greater than the specified voltage value, under the instruction of the clamp indication module 300, the first supply voltage is output based on the stepped-down voltage VREG;

[0103] When the difference is less than the specified voltage value, under the instruction of the clamp indication module, the second supply voltage is output based on the voltage VDD of the voltage source.

[0104] Based on the above circuit, the output of two different power supply voltages (ie, the first power supply voltage and the second power supply voltage) can be achieved.

[0105] In one implementation, the switching unit 220 includes a second PMOS transistor P1 , an indication receiving unit 222 , a current source 221 , and a power supply unit 223 .

[0106] The gate of the second PMOS transistor P2 is connected to the output end of the buck unit 210, the source of the second PMOS transistor P2 is connected to the voltage source via the current source 221, and the drain of the second PMOS transistor P2 is grounded via the indication receiving unit 222;

[0107] The control end of the power supply unit 223 is connected to the source of the second PMOS transistor P2, and the power supply unit 223 is connected between the voltage source and the first input end of the charge pump 100. Figure 3 Taking the example shown, the power supply unit 223 may include a third NMOS tube N3 connected between the voltage source and the second input terminal of the charge pump. In other examples, the power supply unit 223 may also be a combination of transistors, and may also be implemented by a combination of transistors and other devices.

[0108] The instruction receiving unit 222 is used for:

[0109] When the difference is less than the specified voltage value, under the instruction of the clamp indication module 300, by turning on the second PMOS tube P2, the voltage at the control end of the power supply unit 223 is made to be the sum of the stepped-down voltage and the turn-on gate-source voltage of the second PMOS tube P2 (i.e., the gate-source voltage when the second PMOS tube is turned on), and the power supply unit 223 outputs the first supply voltage to the charge pump 100;

[0110] When the difference is greater than the specified voltage value, under the instruction of the clamp indication module 300, the power supply unit 223 is pulled up to the voltage source, and the power supply unit 223 outputs the second power supply voltage to the charge pump. The second power supply voltage can be the same as or close to the voltage VDD of the voltage source.

[0111] In one example, the indication receiving unit 222 includes a second NMOS transistor N2, the gate of the second NMOS transistor N2 is connected to the clamp indication module 300, and the second NMOS transistor N2 is connected between the drain of the second PMOS transistor P2 and the ground; the second NMOS transistor N2 is indicated by the clamp indication module by coupling current from the clamp indication module 300, for example, coupling to the first current to form a first current or a third current in the second NMOS transistor N2, and for example, coupling to the second current to form a second current or a fourth current in the second NMOS transistor N2.

[0112] In other examples, if the indication feedback unit 320 adopts a feedback resistor, the indication receiving unit 222 can also be implemented by a switching switch, the first end of the switching switch is connected to the second PMOS tube P2, the second end is grounded via the first line, and the third end is grounded via the second line. The functions of the first line and the second line can be understood by referring to the two currents formed by the second NMOS tube N2.

[0113] The following will be combined Figure 3 The working process of the circuit in the specific example of the present invention is described in detail:

[0114] The input voltage VIN is the voltage signal to pass through the NMOS switch. After the boost pump 100 boosts the supply voltage VO by n times based on the input voltage VIN, the target voltage VCP can be output, which can be understood as: VCP=VIN+n*VO. At this time, the voltage difference n*VO between the target voltage VCP and the input voltage VIN can be used as the gate-source voltage of the NMOS switch. When it reaches the gate-source driving voltage of the NMOS switch, the NMOS switch can be driven on. If the value of n*VO is set to a reasonable value, the on-resistance of the NMOS switch driven on can be made small enough, and the related circuits of the NMOS switch will not be broken down and damaged.

[0115] Generally speaking, the voltage VDD of the voltage source has a range of variation. For example, in the actual application scenario of portable electronic products, the voltage VDD of the voltage source can meet the following conditions: 2.7V≤VDD≤5.5V. The voltage VDD of the voltage source generates a stepped-down voltage VREG (for example, VREG=2.0V, in other examples, other voltage values ​​can also be set) through LDO (i.e., step-down unit), which can be connected to the gate of the second PMOS tube P2. The source of the second PMOS tube P2 is connected to the gate of the third NMOS tube N3 (i.e., the control end of the power supply unit). When the second PMOS tube P2 is turned on, the source voltage of the second PMOS tube P2, i.e., the gate voltage Vg_N3 of the third NMOS tube N3, is specifically the stepped-down voltage V REG is the sum of the source-gate voltage of the second PMOS tube P2 when it is turned on (the source-gate voltage of the second PMOS tube P2 when it is turned on is generally about 0.7V. For the convenience of description, it can be assumed that the gate-source voltage of the second PMOS tube P2 when it is turned on is at least 0.7V). The gate voltage Vg_N3 of the third NMOS tube is at least about 2.7V at this time. Then the source voltage of the third NMOS tube N3 (that is, the current power supply voltage VO) is the gate voltage Vg_N3 of the third NMOS tube minus the gate-source voltage of the third NMOS tube N3 when it is turned on.

[0116] In order to achieve the best performance, the third NMOS tube N3 may use an intrinsic NMOS tube (also referred to as a NativeNMOS tube). In some examples, a common enhanced NMOS tube may also be used. If an intrinsic NMOS tube is used, the gate-source voltage difference of the intrinsic NMOS tube is close to zero, that is, at this time, VO=Vg_N3;

[0117] For the sake of convenience in description, assume that VO = 2.7V at this time. The current supply voltage VO is boosted by n times with the input voltage VIN as the voltage reference through the charge pump 100, and the charge pump output voltage VCP = VIN + n * VO can be obtained. In some examples, n can be taken as 2 here, that is, 2 * VO = 5.4V.

[0118] Therefore, the gate-source voltage of the NMOS switch can be 5.4V, and this voltage is a relatively reasonable value in the NMOS switches of the commonly used 5V process at present. Considering that the on-resistance of the NMOS switch should be minimized and the device should be safe and reliable, the regulated voltage of the Zener diode Z1 (i.e., the voltage regulator device) can be selected to be about 4.4V (similar functional devices or device combinations can also be used for the voltage regulator device). At this time, the on-source-gate voltage of the first PMOS transistor P1 is about 1V. Therefore, when VCP - VIN is greater than 5.4V, the Zener diode Z1 will be reversely broken down. Let the current flowing through the first NMOS transistor N1 be I1. If the first NMOS transistor N1 and the second NMOS transistor N2 have the same size, the mirror current relationship of NMOS transistors with the same specifications can be realized. At this time, the current I1 of the first NMOS transistor N1 is the same as the current I2 of the second NMOS transistor N2, that is: I2 = I1; the current I0 of the current source 221 can be configured as: make the current I2 greater than the current I0 of the current source, so that the second PMOS transistor P2 starts to be turned on. At this time, the on-source-gate voltage of the second PMOS transistor P2 is about 0.7V, that is, the gate voltage Vg_N3 of the third NMOS transistor is about VREG + 0.7V = 2.7V, then VO = 2.7V, and VCP - VIN = 5.4V can be obtained; it can be seen that through this feedback loop: when VCP - VIN > 5.4V, VCP - VIN will be pulled back to 5.4V. If the target voltage VCP is pulled down by the load (such as being pulled down by the gate load of the NMOS switch) resulting in VCP - VIN < 5.4V, the Zener diode Z1 will not be reversely broken down. At this time, the current I1 flowing through the first NMOS transistor N1 is close to zero, that is, the current I2 of the second NMOS transistor N2 obtained by mirroring is also close to zero, I2 < I0, then the gate voltage Vg_N3 of the third NMOS transistor N3 will be pulled to the voltage VDD of the voltage source by the current source I0. If the intrinsic NMOS transistor is selected as the third NMOS transistor N3 here, so, at this time VO = VDD, and VDD ≥ 2.7V, and then VCP - VIN >= 5.4V, and it will be clamped at this time.

[0119] It can be seen from the above analysis that no matter how the load of the target voltage VCP changes, causing the target voltage VCP to increase or decrease, VCP - VIN will be pulled to be stable at about 5.4V. At this time, this 5.4V can be understood as a specified voltage value.

[0120] An embodiment of the present invention further provides an electronic device, comprising the above-mentioned driving circuit and an NMOS switch, wherein the NMOS switch can be driven by the driving circuit.

[0121] In the description of this specification, the description with reference to the terms "an implementation", "an example", "a specific implementation process", "an example", etc. means that the specific features, structures, materials or characteristics described in conjunction with the embodiment or example are included in at least one embodiment or example of the present invention. In this specification, the schematic representation of the above terms does not necessarily refer to the same embodiment or example. Moreover, the specific features, structures, materials or characteristics described can be combined in any one or more embodiments or examples in a suitable manner.

[0122] Finally, it should be noted that the above embodiments are only used to illustrate the technical solutions of the present invention, rather than to limit it. Although the present invention has been described in detail with reference to the aforementioned embodiments, those skilled in the art should understand that they can still modify the technical solutions described in the aforementioned embodiments, or replace some or all of the technical features therein with equivalents. However, these modifications or replacements do not cause the essence of the corresponding technical solutions to deviate from the scope of the technical solutions of the embodiments of the present invention.

Claims

1. A driving circuit for an NMOS switch, characterized in that: include: Charge pump, switching power supply module, clamp indication module; The switching power supply module is connected to the first input end of the charge pump, and the second input end of the charge pump is used to access the input voltage of the source of the NMOS switch; the clamping indication module is respectively connected to the output end of the charge pump and the switching power supply module, and the clamping indication module is also connected to the input voltage, and the output end of the charge pump is directly or indirectly connected to the gate of the NMOS switch to output the target voltage; The clamp indication module is used for: When the difference between the target voltage and the input voltage is greater than a specified voltage value, the difference is maintained at the specified voltage value by clamping the target voltage, and the switching power supply module is instructed to output a first power supply voltage to the charge pump; When the difference is less than the specified voltage value, instructing the switching power supply module to output a second power supply voltage to the charge pump; the second power supply voltage is greater than the first power supply voltage; The charge pump is used to: Based on the received current power supply voltage, boost the input voltage to obtain the target voltage; wherein the current power supply voltage is the first power supply voltage or the second power supply voltage; If the current supply voltage is the second supply voltage, the difference between the target voltage and the input voltage is not less than the specified voltage value; The clamp indication module includes a first PMOS tube, a voltage stabilizing device and an indication feedback unit; The gate of the first PMOS tube is connected to the input voltage, the source of the first PMOS tube is connected to the output end of the charge pump via the voltage regulator, the drain of the first PMOS tube is grounded via the indication feedback unit, and the control end of the indication feedback unit is connected to the switching power supply module; The voltage stabilizing device can reversely break down when the difference is greater than the specified voltage value; When the voltage stabilizing device breaks down in reverse, the indication feedback unit instructs the switching power supply module to output the first power supply voltage; When the voltage stabilizing device is not reversely broken down, the indication feedback unit instructs the switching power supply module to output the second power supply voltage.

2. The driving circuit according to claim 1, characterized in that: The indication feedback unit comprises a first NMOS tube, the gate of the first NMOS tube is connected to the switching power supply module, and the drain of the first PMOS tube is grounded via the first NMOS tube; When the voltage stabilizing device reversely breaks down, the current of the first NMOS tube is a first current, and the first NMOS tube instructs the switching power supply module to output the first supply voltage by coupling the first current to the switching power supply module; When the voltage stabilizing device is not reversely broken down, the current of the first NMOS tube is the second current, and the first NMOS tube instructs the switching power supply module to output the second supply voltage by coupling the second current to the switching power supply module.

3. The driving circuit according to claim 1, characterized in that: The voltage stabilizing device includes a Zener diode.

4. The driving circuit according to any one of claims 1 to 3, characterized in that: The switching power supply module includes a switching unit and a voltage reduction unit; The input end of the step-down unit is connected to a voltage source, the output end of the step-down unit is connected to a switching unit, and the switching unit is also respectively connected to the voltage source, the first input end of the charge pump, and the clamp indication module; The step-down unit is used for: Stepping down the voltage of the voltage source to obtain a stepped-down voltage, and transmitting the stepped-down voltage to the switching unit; The switching unit is used for: When the difference is greater than the specified voltage value, under the instruction of the clamp indication module, outputting the first supply voltage based on the stepped-down voltage; When the difference is less than the specified voltage value, under the instruction of the clamp indication module, the second supply voltage is output based on the voltage of the voltage source.

5. The driving circuit according to claim 4, characterized in that: The switching unit includes a second PMOS tube, an indication receiving unit, a current source and a power supply unit; The gate of the second PMOS tube is connected to the output end of the step-down unit, the source of the second PMOS tube is connected to the voltage source via the current source, the drain of the second PMOS tube is grounded via the indication receiving unit, the control end of the power supply unit is connected to the source of the second PMOS tube, and the power supply unit is connected between the voltage source and the first input end of the charge pump; The instruction receiving unit is used for: When the difference is less than the specified voltage value, under the instruction of the clamp indication module, the second PMOS tube is turned on so that the voltage at the control end of the power supply unit is the sum of the stepped-down voltage and the turn-on gate-source voltage of the second PMOS tube, and the power supply unit outputs the first supply voltage to the charge pump; When the difference is greater than the specified voltage value, under the instruction of the clamp indication module, the power supply unit is pulled up to the voltage source, and the power supply unit outputs the second power supply voltage to the charge pump.

6. The driving circuit according to claim 5, characterized in that: The indication receiving unit includes a second NMOS tube, the gate of the second NMOS tube is connected to the clamp indication module, and the second NMOS tube is connected between the drain of the second PMOS tube and the ground; the second NMOS tube is indicated by the clamp indication module by coupling current from the clamp indication module.

7. The driving circuit according to claim 5, characterized in that: The power supply unit includes a third NMOS transistor connected between the voltage source and the second input terminal of the charge pump.

8. The driving circuit according to claim 4, characterized in that: The voltage-down unit is an LDO.

9. An electronic device, characterized in that: include: The driving circuit according to any one of claims 1 to 8, and an NMOS switch driven by the driving circuit.

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