A low temperature amplifier circuit

Abstract

The present invention provides a low-temperature amplifier circuit, which includes a two-stage amplifier circuit, a comparator, a trim circuit, etc. The two-stage amplifier circuit is used to amplify a small signal voltage of tens of mV in two stages; the comparator amplifies and shapes the amplified voltage to obtain a working voltage that is the same as that of a traditional CMOS circuit. The low-temperature amplifier circuit of the present invention can effectively and reliably transmit the output in a low-temperature environment.

Description

Technical Field

[0001] The present invention relates to a low-temperature integrated circuit technology, in particular to a low-temperature amplifier circuit. Background Art

[0002] Compared with semiconductor integrated circuit supercomputers, superconducting computers have the advantages of lower power consumption and faster speed, and are one of the powerful candidates for future supercomputers. Superconducting logic has been widely developed and experimentally proven, however, superconducting memory technology is not mature, and large-capacity and ultra-high-speed cryogenic memory technology has become one of the key bottlenecks restricting the development of superconducting computers. The method of providing high-density RAM for low-temperature superconducting computers is to use traditional CMOS-based memory and SFQ-to-CMOS interface. However, there is a voltage amplitude mismatch between the voltage required for the normal operation of the CAM circuit (e.g., 1.2V) and the tens of millivolts (e.g., 20mVpp to 40mV) of the superconducting SFQ interface circuit, which leads to the inability to effectively transmit data in the superconducting computer. Summary of the invention

[0003] In view of the above-mentioned shortcomings of the prior art, an object of the present invention is to provide a low-temperature amplifier circuit for solving the problem of voltage amplitude mismatch between the low-temperature superconducting circuit and the CMOS circuit in the prior art.

[0004] To achieve the above-mentioned purpose and other related purposes, the present invention provides a low-temperature amplifier circuit, wherein the input end of the low-temperature amplifier circuit is used to connect to a low-temperature superconducting circuit, and the output end of the low-temperature amplifier circuit is used to connect to a memory based on a CMOS circuit, so as to match the voltage amplitude of the output voltage of the low-temperature superconducting circuit with the voltage amplitude of the working voltage of the CMOS circuit in the memory; the low-temperature amplifier circuit comprises:

[0005] A two-stage amplifier circuit, wherein a signal input end thereof is connected to an output end of a superconducting interface circuit, and is used to obtain an output voltage of the superconducting interface circuit; and a reference input end thereof is connected to a first reference voltage; and the two-stage amplifier circuit successively performs a first amplification and a second amplification on a voltage difference between the output voltage and the first reference voltage to obtain an amplified voltage;

[0006] A comparator, wherein the non-inverting input terminal is connected to the output terminal of the two-stage amplifier circuit, the inverting input terminal is connected to the second reference voltage, and the output terminal is used to connect to the memory; the second reference voltage corresponds to the first reference voltage; the comparator processes the voltage difference between the amplified voltage and the second reference voltage to obtain a matching voltage, and the matching voltage can reach the operating voltage of the CMOS circuit.

[0007] Preferably, the two-stage amplification circuit comprises a first differential amplifier, a first current mirror and a first common-source amplifier;

[0008] The first differential amplifier is connected to the output voltage and the first reference voltage; and is used to perform a first amplification on the output voltage and the first reference voltage to obtain a first current and a second current;

[0009] The first current mirror input is connected to the differential amplifier, and the first current mirror output is connected to the first common-source amplifier; the first current mirror is used to process the first current and the second current to obtain a first intermediate amplified voltage;

[0010] The first common-source amplifier amplifies the first intermediate amplified voltage for a second time to obtain the amplified voltage.

[0011] Preferably, the two-stage amplification circuit also includes a compensation module; one end of the compensation module is connected to the input end of the first common-source amplifier, and the other end is connected to the output end of the first common-source amplifier; and is used to perform frequency compensation on the first common-source amplifier.

[0012] Preferably, the comparator comprises a second differential amplifier, a second current mirror and a second common-source amplifier;

[0013] The second differential amplifier is connected to the amplified voltage and the second reference voltage; and is used to amplify the amplified voltage and the second reference voltage for the first time to obtain a third current and a fourth current;

[0014] The second current mirror input is connected to the second differential amplifier, and the second current mirror output is connected to the second common-source amplifier; the second current mirror is used for performing mirror processing on the third current and the fourth current to obtain a second intermediate amplified voltage;

[0015] The second common-source amplifier obtains the matching voltage after performing a second amplification on the second intermediate amplified voltage.

[0016] Preferably, the low-temperature amplification circuit further comprises a negative feedback circuit, and the negative feedback circuit comprises a first resistor and a second resistor;

[0017] One end of the first resistor is connected to the output end of the superconducting interface circuit; the other end of the first resistor is connected to the signal input end of the two-stage amplifier circuit;

[0018] One end of the second resistor is connected to the signal input end of the two-stage amplifier circuit, and the other end of the second resistor is connected to the output end of the two-stage amplifier circuit.

[0019] Preferably, the low-temperature amplifier circuit further includes a reference base circuit; the output end of the reference base circuit is connected to the reference input end of the two-stage amplifier circuit for providing the first reference voltage.

[0020] Preferably, the reference circuit includes a first decoder and a first voltage regulating circuit;

[0021] The first decoder is used to control the gating of a reference switch in the first voltage regulating circuit;

[0022] The first voltage regulating circuit outputs the first reference voltage through an enabled reference switch.

[0023] Preferably, the low-temperature amplification circuit further includes a comparison reference circuit; the output end of the comparison reference circuit is connected to the reference input end of the comparator to provide the second reference voltage.

[0024] Preferably, the comparison reference circuit includes a second decoder and a second voltage regulator;

[0025] The second decoder is used to control the selection of the comparison switch in the second voltage regulating circuit;

[0026] The second voltage regulating circuit outputs the second reference voltage through the enabled comparison switch.

[0027] As described above, a low-temperature amplifier circuit of the present invention has the following beneficial effects:

[0028] The present invention proposes a low-temperature amplifier circuit, which is connected between a low-temperature superconducting circuit and a CMOS circuit in a low-temperature superconducting computer. The output voltage (low voltage) of the low-temperature superconducting circuit is firstly amplified by a two-stage amplifier circuit to obtain an amplified voltage signal after preliminary amplification, and then the preliminary amplified voltage signal is further amplified and compared by a comparator to obtain a matching voltage that can reach the working voltage of the CMOS circuit, thereby meeting the data transmission between the low-temperature superconducting circuit and the SARM and meeting the requirements for normal operation of the superconducting computer system. BRIEF DESCRIPTION OF THE DRAWINGS

[0029] Figure 1 Shown is a schematic diagram of the principle of the low-temperature amplifier circuit of the present invention.

[0030] Figure 2 Shown is a schematic diagram of the circuit structure of the low-temperature amplifier circuit of the present invention.

[0031] Figure 3 Shown is a circuit structure schematic diagram of a two-stage amplifier circuit in an embodiment of the present invention.

[0032] Figure 4 Shown is a schematic diagram of the circuit structure of a comparator in an embodiment of the present invention.

[0033] Figure 5 Shown is a circuit structure schematic diagram of a reference benchmark circuit in an embodiment of the present invention.

[0034] Figure 6 Shown is a circuit structure schematic diagram of a comparison reference circuit in an embodiment of the present invention. DETAILED DESCRIPTION

[0035] The following describes the embodiments of the present invention through specific examples, and those skilled in the art can easily understand other advantages and effects of the present invention from the contents disclosed in this specification. The present invention can also be implemented or applied through other different specific embodiments, and the details in this specification can also be modified or changed in various ways based on different viewpoints and applications without departing from the spirit of the present invention.

[0036] See also Figure 1-6 It should be noted that the illustrations provided in this embodiment are only used to illustrate the basic concept of the present invention in a schematic manner, and the drawings only show components related to the present invention rather than being drawn according to the number, shape and size of components in actual implementation. In actual implementation, the type, quantity and proportion of each component may be changed arbitrarily, and the component layout may also be more complicated.

[0037] It should be noted that all circuit components in the present invention adopt low-temperature models and use low-temperature parameters to ensure that the low-temperature amplifier circuit can work normally under extremely low temperature (4.2K) conditions. Figure 1 FIG. 1 is a schematic diagram showing the principle of the low-temperature amplifier circuit of the present invention. Figure 2 The circuit structure diagram of the low-temperature amplifier circuit of the present invention is shown in FIG. The present invention first amplifies the output voltage of the superconducting interface circuit twice through a two-stage amplifier circuit to obtain an amplified voltage, and then shapes the amplified voltage through a comparator to obtain a matching voltage, thereby realizing that the output voltage of the superconducting interface circuit stably transmits signals to a memory based on a CMOS circuit. Based on the above technical concept, the present invention is described in detail through the following embodiments.

[0038] A low-temperature amplifier circuit, wherein the input end of the low-temperature amplifier circuit is used to connect to a low-temperature superconducting circuit, and the output end of the low-temperature amplifier circuit is used to connect to a memory based on a CMOS circuit, so as to match the voltage amplitude of the output voltage of the low-temperature superconducting circuit with the voltage amplitude of the working voltage of the CMOS circuit in the memory; the low-temperature amplifier circuit comprises:

[0039] A two-stage amplifier circuit, wherein a signal input end thereof is connected to a superconducting interface circuit for obtaining an output voltage of the superconducting interface circuit; and a reference input end thereof is connected to a first reference voltage; the two-stage amplifier circuit amplifies and outputs a voltage difference between the output voltage and the first reference voltage for a first time and a second time successively to obtain an amplified voltage;

[0040] A comparator, whose signal input end is connected to the output end of the two-stage amplifier circuit, whose reference end is connected to the second reference voltage, and whose output end is used to connect to the memory; the comparator amplifies and compares the voltage difference between the amplified voltage signal and the second reference voltage to obtain a matching voltage, and the matching voltage can reach the operating voltage of the CMOS circuit.

[0041] A low-temperature amplifier circuit proposed in the present invention is connected between a low-temperature superconducting circuit and a CMOS circuit in a low-temperature superconducting computer. The output voltage (low voltage) of the low-temperature superconducting circuit is firstly amplified by a two-stage amplifier circuit to obtain an amplified voltage signal after preliminary amplification. The signal is then further amplified and shaped by a comparator. The matching voltage that can reach the working voltage of the CMOS circuit is obtained through comparison processing, thereby realizing the signal amplification interconnection and data transmission function between the low-temperature superconducting circuit and a CMOS-based memory, meeting the requirements for the normal operation of the superconducting computer system. All circuit devices adopt a low-temperature model, and the low-temperature parameters in the low-temperature model are called to ensure that the low-temperature amplifier circuit operates normally under extremely low temperature (4.2K) conditions.

[0042] In an embodiment of the present invention, the two-stage amplifier circuit includes a first differential amplifier, a first current mirror and a first common-source amplifier;

[0043] The first differential amplifier is connected to the output voltage and the first reference voltage; and is used to perform a first amplification on the output voltage and the first reference voltage to obtain a first current and a second current;

[0044] The first current mirror input is connected to the differential amplifier, and the first current mirror output is connected to the first common-source amplifier; the first current mirror is used to process the first current and the second current to obtain a first intermediate amplified voltage;

[0045] The first common-source amplifier amplifies the first intermediate amplified voltage for a second time to obtain the amplified voltage.

[0046] like Figure 3The circuit structure diagram of the two-stage amplifier circuit shown in the figure, the first differential amplifier includes a first PMOS tube P1 and a second PMOS tube P2, the gate of the first PMOS tube P1 is a reference input terminal, connected to the first reference voltage; the gate of the second PMOS tube P2 is a signal input terminal, connected to the output voltage of the superconducting interface circuit, and the first reference voltage and the output voltage form a differential input signal pair of the first differential amplifier; the source of the first PMOS tube P1 and the source of the second PMOS tube P2 are both connected to the first bias module; under the action of the bias voltage provided by the first bias module, the first differential amplifier performs a first amplification on the output voltage and the first reference voltage, and outputs a first current OUT1 through the drain of the first PMOS tube P1 and outputs a second current OUT2 through the drain of the second PMOS tube P2 in a fully differential form.

[0047] The first differential amplifier mainly adopts PMOS tube, which can realize ultra-low temperature low-voltage amplification and amplify the timing millivolt (20mVpp to 40mV) signal. The differential amplifier circuit has low temperature applicability and low noise. In addition, since the size of the PMOS tube amplifier is larger than that of the NMOS tube, the matching of the low-temperature amplifier circuit can be better.

[0048] The first current mirror in the embodiment of the present invention includes a first NMOS tube N1, a second NMOS tube N2, a third NMOS tube N3 and a fourth NMOS tube N4; the source of the first NMOS tube N1 is connected to the drain of the second NMOS tube N2, and is connected to the drain of the second PMOS tube P2; the drain of the third NMOS tube N3 is connected to the source of the fourth NMOS tube N4, and is connected to the drain of the first PMOS tube P1; the gate of the first NMOS tube N1 is connected to the gate of the fourth NMOS tube N4, and is connected to the second bias module; the drain of the first NMOS tube N1 and the drain of the fourth NMOS tube N4 are connected to the first bias module; the gate of the second NMOS tube N2 and the gate of the third NMOS tube N4 are connected to the first bias module; the source of the second NMOS tube N2 and the source of the third NMOS tube N4 are connected to AVSS.

[0049] The first current mirror of the present invention is connected to the second current OUT2 through the common connection end of the source of the first NMOS tube N1 and the drain of the second NMOS tube N2, and the common connection end of the drain of the third NMOS tube N3 and the source of the fourth NMOS tube N4 is connected to the first intermediate amplifier OUT1. The first current mirror performs current mirror conversion processing on the first current OUT1 and the second current OUT2, and outputs an intermediate amplifier voltage.

[0050] After the first amplification by the first differential amplifier, the voltage of tens of millivolts cannot be further amplified due to insufficient gain, so a second amplification is required. Therefore, the first common source amplifier included in the two-stage amplifier circuit of the present invention is configured as a PMOS tube CS1, whose gate is connected to the source of the fourth NMOS tube N4, whose drain is connected to the first bias module, and whose source is connected to AVSS; the drain of the first common source amplifier is the output end of the two-stage amplifier circuit. The first common source amplifier of the present invention performs a second amplification on the first intermediate amplified voltage it receives, so as to obtain the amplified voltage VOP through the drain output of the first common source amplifier.

[0051] The two-stage amplifier of the present invention forms a two-stage amplifier circuit under the action of the first differential amplifier performing the first amplification and the first common-source amplifier performing the second amplification, and meets the gain amplification requirement.

[0052] The two-stage amplifier circuit in the embodiment of the present invention further includes a compensation module, one end of which is connected to the input end of the first common-source amplifier, and the other end is connected to the output end of the first common-source amplifier; and is used to perform frequency compensation on the first common-source amplifier. The compensation module specifically includes a resistor RS and a capacitor C, and forms a closed-loop feedback through frequency compensation, thereby improving the stability of the amplified voltage output.

[0053] In an embodiment of the present invention, a bias module for providing a bias voltage to each component includes a first bias module and a second bias module;

[0054] The first bias module includes a fourth PMOS tube P4, a fifth PMOS tube P5, a sixth PMOS tube P6, a seventh PMOS tube P7 and an eighth PMOS tube P8 which are sequentially connected in series, and the source of the fourth PMOS tube P4, the source of the fifth PMOS tube P5, the source of the sixth PMOS tube P6, the source of the seventh PMOS tube P7 and the source of the eighth PMOS tube P8 are all connected to the power supply AVDD; the gate of the fourth PMOS tube P4, the gate of the fifth PMOS tube P5, the gate of the sixth PMOS tube P6, the gate of the seventh PMOS tube P7 and the gate of the eighth PMOS tube P8 are connected to form a common gate terminal, and the common gate terminal is connected to the control voltage Vbias.

[0055] Specifically, the drain of the fourth PMOS tube P4 is connected to the source of the first PMOS tube P1 and the source of the second PMOS tube P2; the drain of the fifth PMOS tube P5 is connected to the drain of the first NMOS tube N1, the gate of the second NMOS tube N2 and the gate of the third NMOS tube N4; the drain of the sixth PMOS tube P6 is connected to the drain of the fourth NMOS tube N4 and the gate of the first common-source amplifier CS1; the drain of the seventh PMOS tube P7 is connected to the drain of the first common-source amplifier CS1.

[0056] In order to improve the stability of the output bias voltage, the first bias module further includes a third PMOS tube P3, the gate of the third PMOS tube P3 is connected to the common gate terminal of the first bias module, and the source and drain of the third PMOS tube P3 are both connected to the power supply AVDD. The third PMOS tube P3 can decouple the fluctuation on AVDD, thereby improving the stability of the output bias voltage of the first bias module.

[0057] One end of the second bias module is connected to the first bias module, and the other end is connected to AVSS; the second bias module specifically includes a fifth NMOS tube N5, a sixth NMOS tube N6, a seventh NMOS tube N7 and an eighth NMOS tube N8, and the gate of the fifth NMOS tube N5, the gate of the sixth NMOS tube N6, the gate of the seventh NMOS tube N7 and the gate of the eighth NMOS tube N8 are all connected to the drain of the eighth PMOS tube P8 of the first bias module; the drain of the fifth NMOS tube N5 is connected to the drain of the eighth PMOS tube P8, and the bias voltage is output to the first current mirror through the drain of the fifth NMOS tube N5; the source of the fifth NMOS tube N5 is connected to the drain of the sixth NMOS tube N6, the source of the sixth NMOS tube N6 is connected to the drain of the seventh NMOS tube N7, the source of the seventh NMOS tube N7 is connected to the drain of the eighth NMOS tube N8, and the source of the eighth NMOS tube N8 is connected to AVSS.

[0058] The comparator of the present invention includes a second differential amplifier, a second current mirror and a second common source amplifier; Figure 4 , which is a schematic diagram of the structure of a comparator in an embodiment of the present invention;

[0059] The second differential amplifier is connected to the amplified voltage and the second reference voltage; and is used to amplify the amplified voltage and the second reference voltage for the first time to obtain a third current and a fourth current;

[0060] The second current mirror input is connected to the second differential amplifier, and the second current mirror output is connected to the second common-source amplifier; the second current mirror is used to process the third current and the fourth current to obtain a second intermediate amplified voltage;

[0061] The second common-source amplifier obtains the matching voltage after performing a second amplification on the second intermediate amplified voltage.

[0062] The comparator in the embodiment of the present invention is similar to the two-stage amplifier circuit, and the components are not introduced in detail. The difference is that there is no compensation module and it is an open-loop structure.

[0063] The comparator of the present invention amplifies and shapes the amplified voltage, specifically further amplifies the amplified voltage (eg, 1.2V), and converts the analog signal into a digital signal to output a matching voltage for controlling the read and write operations of a memory based on a CMOS circuit.

[0064] Taking into account signal interference, the low-temperature amplifier circuit in the embodiment of the present invention further includes a negative feedback circuit, and the negative feedback circuit includes a first resistor R1 and a second resistor R2;

[0065] One end of the first resistor R1 is connected to the output end of the superconducting interface circuit; the other end of the first resistor R1 is connected to the signal input end of the two-stage amplifier circuit;

[0066] One end of the second resistor R2 is connected to the signal input end of the two-stage amplifier circuit, and the other end is connected to the output end of the two-stage amplifier circuit.

[0067] The invention acts in a negative feedback circuit, making the two-stage amplifier circuit more stable, and its amplification factor is V out =[(R2+R1) / R1]*V in ; Among them, V in is the output voltage of the superconducting interface circuit.

[0068] The low temperature amplifier circuit in the embodiment of the present invention further includes a reference reference circuit, the output end of the reference reference circuit is connected to the reference input end of the two-stage amplifier circuit, and is used to provide the first reference voltage. Specifically, the reference reference circuit includes a first decoder and a first trim circuit; the first decoder is used to control the selection of a reference switch in the first trim circuit; the first trim circuit outputs the first reference voltage through the selected reference switch.

[0069] More specifically, Figure 5 FIG. 1 is a schematic diagram of the circuit structure of a reference reference circuit in an embodiment of the present invention; the first decoder of the reference reference circuit is a 3-8 decoder; the first voltage regulating circuit of the reference reference circuit includes a reference power supply branch, a reference voltage dividing branch and a reference switch group;

[0070] The first end of the reference power supply branch is connected to the power supply AVDD, the second end of the reference power supply branch is connected to AVSS, the reference power supply branch is connected in series with a plurality of power supply resistors, and a PMOS tube is connected to the resistor at the first end of the reference power supply branch to improve the stability of the power supply AVDD; at the second end of the reference power supply branch, two groups of parallel power supply resistors are formed and connected in series in the reference power supply branch, and the two ends of the output of the two groups of parallel power supply resistors are connected to the two ends of the reference voltage dividing branch; a plurality of voltage dividing resistors are connected in series on the reference voltage dividing branch, wherein some of the two voltage dividing resistors are reference voltage dividing points, and under the action of the first decoder, a certain reference switch in the reference switch group is selected and closed, and the output of the first reference voltage can be adjusted, wherein the number of reference switches in the reference switch group corresponds to the number of comparison voltage dividing points.

[0071] The present invention adjusts the amplitude of the first reference voltage outputted by the two-stage amplifier circuit through a reference reference circuit, controls the selection of different reference switches in the first voltage regulating circuit through a first decoder, outputs different first reference voltage amplitudes, and inputs the first reference voltage to the reference input terminal of the two-stage amplifier circuit.

[0072] The low temperature amplifier circuit in the embodiment of the present invention further includes a comparison reference circuit; the output end of the comparison reference circuit is connected to the reference input end of the comparator, and is used to provide the second reference voltage. Specifically, the comparison reference circuit includes a second decoder and a second trim voltage; the second decoder is used to control the selection of the comparison switch in the second trim circuit; the second trim circuit outputs the second reference voltage through the selected comparison switch.

[0073] More specifically, Figure 6 FIG. 1 is a schematic diagram of the circuit structure of the comparison reference circuit in the embodiment of the present invention; the second decoder of the comparison reference circuit is a 3-8 decoder, and the second voltage regulating circuit of the comparison reference circuit includes a comparison power supply branch, a comparison voltage dividing branch and a comparison switch group;

[0074] The first end of the comparison power supply branch is connected to the power supply AVDD, the second end of the comparison power supply branch is connected to AVSS, the comparison power supply branch is connected in series with a plurality of comparison resistors, and a PMOS tube is connected to the resistor at the first end of the comparison power supply branch to improve the stability of the power supply AVDD; at the second end of the comparison power supply branch, a plurality of groups of parallel comparison resistors are formed and connected in series in the comparison power supply branch, and the two ends of the output between the parallel comparison resistors are connected to the two ends of the comparison voltage dividing branch; a plurality of voltage dividing resistors are connected in series on the comparison voltage dividing branch, wherein some two voltage dividing resistors are comparison voltage dividing points, and under the action of the second decoder, a certain comparison switch in the comparison switch group is selected to be closed, and the output of the second reference voltage can be adjusted, wherein the number of comparison switches in the comparison switch group corresponds to the number of comparison voltage dividing points.

[0075] The present invention adjusts the amplitude of the second reference voltage of the output comparator through a comparison reference circuit, controls the selection of different comparison switches in the second voltage regulation circuit through a second decoder, outputs different second reference voltage amplitudes, and inputs the second reference voltage to the reference input terminal of the comparator.

[0076] It should be noted that the number of resistors and the series-parallel relationship in the reference base circuit and the comparison base circuit are set according to actual application needs, and the present invention does not limit this, as long as the requirements of the first reference voltage and the second reference voltage are met.

[0077] In summary, the present invention mainly solves the problem of signal amplitude matching between superconducting circuits and CMOS circuits. The low-temperature amplifier circuit can work at an ultra-low temperature of 4.2K, and can amplify the output voltage signal of the SFQ interface circuit of several tens of millivolts (such as 20mVpp to 40mV) to the voltage required for the normal operation of the CMOS circuit (such as 1.2V), thereby meeting the data transmission between the superconducting circuit and the SRAM and meeting the design requirements of the superconducting computer system. Therefore, the present invention effectively overcomes various shortcomings in the prior art and has a high industrial utilization value.

[0078] The above embodiments are merely illustrative of the principles and effects of the present invention, and are not intended to limit the present invention. Anyone familiar with the art may modify or alter the above embodiments without departing from the spirit and scope of the present invention. Therefore, all equivalent modifications or alterations made by a person of ordinary skill in the art without departing from the spirit and technical concept disclosed by the present invention shall still be covered by the claims of the present invention.

Claims

1. A low-temperature amplifier circuit, wherein the input end of the low-temperature amplifier circuit is used to connect to a low-temperature superconducting circuit, and the output end of the low-temperature amplifier circuit is used to connect to a memory based on a CMOS circuit, so as to match the voltage amplitude of the output voltage of the low-temperature superconducting circuit with the voltage amplitude of the working voltage of the CMOS circuit in the memory; characterized in that: The low temperature amplification circuit comprises: A two-stage amplifier circuit, wherein a signal input end thereof is connected to an output end of a superconducting interface circuit, and is used to obtain an output voltage of the superconducting interface circuit; and a reference input end thereof is connected to a first reference voltage; and the two-stage amplifier circuit successively performs a first amplification and a second amplification on a voltage difference between the output voltage and the first reference voltage to obtain an amplified voltage; A comparator, whose non-phase input terminal is connected to the output terminal of the two-stage amplifier circuit, whose inverting input terminal is connected to the second reference voltage, and whose output terminal is used to connect to the memory; the comparator processes the voltage difference between the amplified voltage and the second reference voltage to obtain a matching voltage, and the matching voltage can reach the operating voltage of the CMOS circuit.

2. The low temperature amplifier circuit according to claim 1, characterized in that: The two-stage amplifier circuit includes a first differential amplifier, a first current mirror and a first common-source amplifier; The first differential amplifier is connected to the output voltage and the first reference voltage; and is used to perform a first amplification on the output voltage and the first reference voltage to obtain a first current and a second current; The first current mirror input is connected to the differential amplifier, and the first current mirror output is connected to the first common-source amplifier; The first current mirror is used to process the first current and the second current to obtain a first intermediate amplified voltage; The first common-source amplifier amplifies the first intermediate amplified voltage for a second time to obtain the amplified voltage.

3. The low temperature amplifier circuit according to claim 2, characterized in that: The two-stage amplification circuit also includes a compensation module; one end of the compensation module is connected to the input end of the first common-source amplifier, and the other end is connected to the output end of the first common-source amplifier; and is used to perform frequency compensation on the first common-source amplifier.

4. The low temperature amplifier circuit according to claim 1, characterized in that: The comparator includes a second differential amplifier, a second current mirror and a second common-source amplifier; The second differential amplifier is connected to the amplified voltage and the second reference voltage; and is used to amplify the amplified voltage and the second reference voltage for the first time to obtain a third current and a fourth current; The second current mirror input is connected to the second differential amplifier, and the second current mirror output is connected to the second common-source amplifier; the second current mirror is used to process the third current and the fourth current to obtain a second intermediate amplified voltage; The second common-source amplifier obtains the matching voltage after performing a second amplification on the second intermediate amplified voltage.

5. The low temperature amplifier circuit according to claim 1, characterized in that: The low temperature amplification circuit further includes a negative feedback circuit, and the negative feedback circuit includes a first resistor and a second resistor; One end of the first resistor is connected to the output end of the superconducting interface circuit; the other end of the first resistor is connected to the signal input end of the two-stage amplifier circuit; One end of the second resistor is connected to the signal input end of the two-stage amplifier circuit, and the other end of the second resistor is connected to the output end of the two-stage amplifier circuit.

6. The low temperature amplifier circuit according to claim 1, characterized in that: The low-temperature amplifier circuit also includes a reference base circuit; the output end of the reference base circuit is connected to the reference input end of the two-stage amplifier circuit to provide the first reference voltage.

7. The low temperature amplifier circuit according to claim 6, characterized in that: The reference circuit includes a first decoder and a first voltage regulator circuit; The first decoder is used to control the gating of the reference switch in the first voltage regulating circuit; The first voltage regulating circuit outputs the first reference voltage through an enabled reference switch.

8. The low temperature amplifier circuit according to claim 1, characterized in that: The low-temperature amplifier circuit also includes a comparison reference circuit; the output end of the comparison reference circuit is connected to the reference input end of the comparator to provide the second reference voltage.

9. The low temperature amplifier circuit according to claim 8, characterized in that: The comparison reference circuit includes a second decoder and a second voltage regulator; The second decoder is used to control the selection of the comparison switch in the second voltage regulating circuit; The second voltage regulating circuit outputs the second reference voltage through the enabled comparison switch.

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