Semiconductor device plastic packaging material selection method, device, terminal equipment and storage medium

Abstract

The present application provides a method, device, terminal device and storage medium for selecting a plastic encapsulation material for semiconductor devices. The method includes selecting a target plastic encapsulation material that matches both the material information of the passivation layer and the packaging form according to the material information of the passivation layer and the packaging form; wherein the target plastic encapsulation material can make the leakage current of the semiconductor device to be packaged after being packaged by the target plastic encapsulation material in a high-temperature reverse bias test less than a first preset threshold value and the leakage current change value of the semiconductor device to be packaged within a preset time range in the high-temperature reverse bias test less than a second preset threshold value. Starting from the packaging level, the method selects a plastic encapsulation material that matches the passivation layer material and the packaging form of the device for packaging, so as to achieve the purpose of reducing the leakage of semiconductor devices and improving their reliability and stability.

Description

Technical Field

[0001] The present application relates to the field of semiconductor technology, and in particular to a method, device, terminal equipment and storage medium for selecting plastic packaging materials for semiconductor devices. Background Art

[0002] Power semiconductor devices are the core of circuit control and power conversion in electronic devices. They are mainly used to change the voltage, frequency and current conversion in electronic devices, such as discrete devices such as insulated gate bipolar transistor (IGBT), fast recovery diode (FRD), metal oxide semiconductor field effect transistor (MOSFET), etc. They are widely used in home appliances represented by variable frequency air conditioners, washing machines, refrigerators, rail transportation, new energy and other fields. Due to the use characteristics and application environment of power semiconductor devices, the reliability of power semiconductor devices must be guaranteed and improved to ensure the reliable operation of the entire power conversion device. Among them, the leakage current is an important indicator for judging the reliability of power semiconductor devices. The greater the reverse bias and the higher the temperature, the greater the leakage current. The leakage current continues to increase, the device loss increases, and the device stability is reduced. Therefore, it is necessary to control the leakage current of the device within a certain range and stabilize it. High Temperature Reverse Bias (HTRB) is the main experimental method for monitoring leakage current. Specifically, under the junction temperature condition of semiconductor devices, 80% of the maximum reverse bias voltage is applied to monitor the leakage of devices under the action of electrical and thermal stress. The leakage current of the device is not only strongly related to the chip structure design and the specific production process of the wafer, but also has a great influence on the leakage current by the plastic packaging material used in the package. Summary of the invention

[0003] In response to the above problems, the present application provides a method, device, terminal equipment and storage medium for selecting plastic packaging materials for semiconductor devices, which solves the technical problem in the prior art that the plastic packaging materials used in semiconductor device packaging have a significant impact on leakage current.

[0004] In a first aspect, the present application provides a method for selecting a plastic packaging material for a semiconductor device, the method comprising:

[0005] Obtaining rated operating information of the semiconductor device to be packaged and material information of its passivation layer;

[0006] Determining a packaging form of the semiconductor device to be packaged according to rated operating information of the semiconductor device to be packaged;

[0007] According to the material information of the passivation layer and the packaging form, a target molding material that matches both the material information of the passivation layer and the packaging form is selected; wherein the target molding material is capable of causing the leakage current of the semiconductor device to be packaged after being packaged by the target molding material to be less than a first preset threshold in a high-temperature reverse bias test and the leakage current change value of the semiconductor device to be packaged within a preset time range in the high-temperature reverse bias test to be less than a second preset threshold.

[0008] According to an embodiment of the present application, preferably, in the above-mentioned method for selecting a plastic encapsulation material for a semiconductor device, selecting a target plastic encapsulation material that matches both the material information of the passivation layer and the packaging form according to the material information of the passivation layer and the packaging form comprises the following steps:

[0009] According to the packaging form, selecting a plastic packaging material matching the packaging form as an alternative plastic packaging material;

[0010] When the material of the passivation layer is polyimide, according to the material information of the passivation layer, a molding material having an impure ion concentration less than a third preset threshold and a thermal conductivity greater than a fourth preset threshold is selected from the candidate molding materials as a target molding material;

[0011] When the material of the passivation layer includes silicon nitride, any one of the candidate molding materials is selected as the target molding material according to the material information of the passivation layer.

[0012] According to an embodiment of the present application, preferably, in the above-mentioned method for selecting a molding compound for a semiconductor device, the rated operating information includes a rated operating voltage and a rated operating current.

[0013] According to an embodiment of the present application, preferably, in the above-mentioned method for selecting a plastic packaging material for a semiconductor device, the packaging form includes full-encapsulation packaging or half-encapsulation packaging.

[0014] According to an embodiment of the present application, preferably, in the above-mentioned method for selecting a plastic packaging material for a semiconductor device, the first preset threshold is 100 μA.

[0015] According to an embodiment of the present application, preferably, in the above-mentioned method for selecting a molding compound for a semiconductor device, the third preset threshold is 5 ppm.

[0016] According to an embodiment of the present application, preferably, in the above-mentioned method for selecting a molding compound for a semiconductor device, the fourth preset threshold is 2.0 W / m*K.

[0017] In a second aspect, the present application provides a device for selecting a plastic packaging material for a semiconductor device, the device comprising:

[0018] An information acquisition module, used to acquire rated operating information of the semiconductor device to be packaged and material information of its passivation layer;

[0019] A packaging form determining module, used to determine the packaging form of the semiconductor device to be packaged according to the rated working information of the semiconductor device to be packaged;

[0020] A molding compound selection module is used to select a target molding compound that matches the material information of the passivation layer and the packaging form according to the material information of the passivation layer and the packaging form; wherein the target molding compound can make the leakage current of the semiconductor device to be packaged after being packaged by the target molding compound in a high-temperature reverse bias test less than a first preset threshold value and the leakage current change value of the semiconductor device to be packaged within a preset time range in the high-temperature reverse bias test is less than a second preset threshold value.

[0021] In a third aspect, the present application provides a terminal device, including a memory and a processor, wherein the memory stores a computer program, and when the computer program is executed by the processor, the method for selecting a plastic encapsulation material for a semiconductor device as described in any one of the first aspects is executed.

[0022] In a fourth aspect, the present application provides a storage medium, which stores a computer program that can be executed by one or more processors and can be used to implement the method for selecting a molding compound for a semiconductor device as described in any one of the first aspects.

[0023] Compared with the prior art, one or more embodiments of the above scheme may have the following advantages or beneficial effects:

[0024] The present application provides a method, device, terminal equipment and storage medium for selecting plastic encapsulation materials for semiconductor devices. The method includes obtaining the rated working information of the semiconductor device to be packaged and the material information of its passivation layer; determining the packaging form of the semiconductor device to be packaged according to the rated working information of the semiconductor device to be packaged; selecting a target plastic encapsulation material that matches both the material information of the passivation layer and the packaging form according to the material information of the passivation layer and the packaging form; wherein the target plastic encapsulation material can make the leakage current of the semiconductor device to be packaged after being packaged by the target plastic encapsulation material in a high-temperature reverse bias test less than a first preset threshold value and the leakage current change value of the semiconductor device to be packaged within a preset time range in the high-temperature reverse bias test less than a second preset threshold value. Starting from the packaging level, the method selects a plastic encapsulation material that matches the passivation layer material and the packaging form of the device for packaging, so as to achieve the purpose of reducing the leakage of semiconductor devices and improve their reliability and stability. Without changing the chip (device) design and tape-out process, solving the problem from the perspective of chip (device) back-end packaging can not only avoid the extension of the R&D cycle due to chip (device) design changes, but also reduce the leakage of semiconductor devices by simply changing the plastic packaging material. The chip (device) design does not need to be revised, thereby greatly shortening the R&D cycle and reducing product costs. BRIEF DESCRIPTION OF THE DRAWINGS

[0025] The present application will be described in more detail below based on embodiments and with reference to the accompanying drawings:

[0026] Figure 1 A schematic diagram of a process for selecting a plastic packaging material for a semiconductor device provided in an embodiment of the present application;

[0027] Figure 2 A schematic diagram of leakage current variation in a high-temperature reverse bias test of semiconductor devices with different passivation layer materials provided in an embodiment of the present application after being packaged with corresponding plastic packaging materials;

[0028] Figure 3 A schematic flow chart of another method for selecting a plastic packaging material for a semiconductor device provided in an embodiment of the present application;

[0029] Figure 4 A connection block diagram of a semiconductor device plastic packaging material selection device provided in an embodiment of the present application;

[0030] In the drawings, the same reference numerals are used for the same components, and the drawings are not drawn to scale. DETAILED DESCRIPTION

[0031] The following will describe the implementation methods of the present application in detail with reference to the accompanying drawings and embodiments, so that the implementation process of how the present application applies technical means to solve technical problems and achieve corresponding technical effects can be fully understood and implemented accordingly. The embodiments of the present application and the various features in the embodiments can be combined with each other without conflict, and the technical solutions formed are all within the scope of protection of the present application.

[0032] Embodiment 1

[0033] See also Figure 1 This embodiment provides a method for selecting a semiconductor device plastic packaging material, comprising:

[0034] Step S101: obtaining rated operating information of the semiconductor device to be packaged and material information of its passivation layer.

[0035] The semiconductor device to be packaged may be a MOSFET, an IGBT, or a FRD.

[0036] The rated operating information includes a rated operating voltage and a rated operating current. The passivation layer material of the semiconductor device to be packaged includes polyimide and / or silicon nitride. That is, the passivation layer of the semiconductor device to be packaged has the following three types:

[0037] (1) The passivation layer is a layer of silicon nitride (SiN x , single-layer passivation structure);

[0038] (2) The passivation layer is a layer of polyimide (Polymide, PI, single-layer passivation structure);

[0039] (3) The passivation layer is a layer of silicon nitride covered with a layer of polyimide (SiN x +PI).

[0040] Among them, SiN x +PI's double-layer structure can ensure product stability and high yield.

[0041] The material information of the passivation layer can be obtained based on the process data of the wafer factory.

[0042] Step S102: Determine the packaging form of the semiconductor device to be packaged according to the rated operating information of the semiconductor device to be packaged.

[0043] The packaging forms include full package or half package, and package size, such as TO-220 (size model) half package / full package, TO-3P (size model) half package / full package.

[0044] The choice of packaging form mainly depends on the rated working current, voltage and external use environment of the semiconductor device to be packaged. For example, in a high voltage and high current environment, such as 1200V / 75A, a large packaging form needs to be selected because the chip is large due to high voltage and high current, and the required bonding wire is also large. The large size also makes it easier to dissipate heat. If the specification is 600V / 40A, a smaller packaging form is selected. After the packaging form is determined, the type of plastic packaging material to be used is determined.

[0045] No matter what size the package is, only plastic encapsulation materials of the corresponding size can be used. For example, TO-3P can only use TO-3P size specifications. Otherwise, production lines of other specifications cannot be used at all.

[0046] Step S103: According to the material information of the passivation layer and the packaging form, select a target molding material that matches both the material information of the passivation layer and the packaging form; wherein the target molding material can make the leakage current of the semiconductor device to be packaged after being packaged by the target molding material in a high-temperature reverse bias test less than a first preset threshold value and the leakage current change value of the semiconductor device to be packaged within a preset time range in the high-temperature reverse bias test is less than a second preset threshold value.

[0047] Step S103 includes the following steps:

[0048] S103a: According to the packaging form, selecting a plastic packaging material matching the packaging form as an alternative plastic packaging material;

[0049] S103b: When the material of the passivation layer is polyimide, according to the material information of the passivation layer, selecting a molding material having an impure ion concentration less than a third preset threshold and a thermal conductivity greater than a fourth preset threshold from the candidate molding materials as a target molding material;

[0050] S103c: When the material of the passivation layer includes silicon nitride, selecting any one of the candidate molding materials as the target molding material according to the material information of the passivation layer.

[0051] The first preset threshold is 100 μA, the third preset threshold is 5 ppm, and the fourth preset threshold is 2.0 W / m*K.

[0052] The plastic encapsulation materials to be selected are all the plastic encapsulation materials that can be provided currently. It is known which packaging forms of devices these plastic encapsulation materials are suitable for, and each plastic encapsulation material will have a technical specification, i.e., a datasheet, which will contain a series of parameter indicators (including spiral flow length, gel time, melt viscosity, glass transition temperature, linear expansion coefficient, density, bending strength, bending modulus, flammability, volume resistivity and other parameters). Impure ion concentration and thermal conductivity are two of the parameters, i.e., the impure ion concentration and thermal conductivity of each plastic encapsulation material are known.

[0053] First, according to the packaging form, a molding material matching the packaging form is selected from the molding materials to be selected as a candidate molding material, and then according to the material information of the passivation layer, a target molding material is selected from the candidate molding materials.

[0054] That is, when the passivation layer is a single-layer PI structure, a plastic material having an impure ion concentration less than the third preset threshold and a thermal conductivity greater than the fourth preset threshold is selected from the candidate plastic materials as the target plastic material. x Structure or SiN x +PI double-layer structure), any one of the candidate plastic encapsulation materials is selected as the target plastic encapsulation material, that is, the target plastic encapsulation material only needs to correspond to the packaging form.

[0055] The HTRB test is essentially to monitor the leakage of the device. The PN junction has unidirectional conductivity. When it is reverse cutoff, it is not completely cutoff. Instead, when it is subjected to reverse voltage, a small current will flow from the cathode to the anode. Therefore, it is hoped that the leakage is as small as possible. This leakage is caused by the movement of electrons / holes or impure ions.

[0056] Due to the characteristics of PI materials, it is more sensitive to plastic molding compounds. Different PIs, whether for the same plastic molding compound or for different plastic molding compounds, have different leakage results. For example, Figure 2 As shown, when the single-layer PI1 is matched with plastic encapsulation material A, the corresponding leakage current in the HTRB test fluctuates. Although it tends to be stable after 150h, it has an overall increase, indicating that the single-layer PI1 is not matched with plastic encapsulation material A; when the single-layer PI1 is matched with plastic encapsulation material B, the leakage current is stable without growth and has been maintained at 10-20μA, indicating that the single-layer PI1 is more matched with plastic encapsulation material B; when the single-layer PI2 is matched with plastic encapsulation material A, the corresponding leakage current in the HTRB test diverges and continues to increase, indicating that the single-layer PI2 is not matched with plastic encapsulation material A; when the single-layer PI2 is matched with plastic encapsulation material C, the leakage current is concentrated and stable, indicating that the single-layer PI2 is more matched with plastic encapsulation material C.

[0057] Therefore, the passivation structure of the single-layer PI needs to select a plastic encapsulation material according to the conditions corresponding to the packaging form and that the impure ion concentration is less than the third preset threshold and the thermal conductivity is greater than the fourth preset threshold.

[0058] For device leakage improvement, two parameters of the plastic compound (impurity ion concentration and thermal conductivity) are the most critical:

[0059] (1) The concentration of impure ions in the plastic packaging material (mainly chloride ions and sodium ions) has a greater impact on leakage current. The lower the concentration, the smaller the leakage current. It is best to be less than 5ppm (that is, the third preset threshold is 5ppm);

[0060] (2) For high-current, high-power device products, heat accumulation can cause device damage, which is mainly determined by the thermal conductivity of the plastic packaging material. The larger the thermal conductivity, the better the device's heat dissipation. It is best to be greater than 2.0W / m*K (that is, the fourth preset threshold is 2.0W / m*K).

[0061] Since SiN x Good density, strong hydrophobicity, and very strong blocking ability for mobile ions. Therefore, this passivation structure is not sensitive to the choice of plastic encapsulation materials and can be consistent with the plastic encapsulation materials used by the packaging factory. There is no need to modify the plastic encapsulation material formula or purchase it separately. There are more choices, larger packaging windows, and lower production costs. x or SiN x +PI double-layer structure, more optional plastic packaging materials, large packaging window. Figure 2 As shown in the figure, although the molding compound A does not match the single-layer PI1 and the single-layer PI2, the molding compound A with the single-layer SiN x or SiN x +PI2 double-layer structure, the leakage is small and stable, indicating that the plastic encapsulation material A and the single-layer SiN x or SiN x +PI2 double-layer structure is relatively matched, it can be seen that the single-layer SiN x or SiN x The +PI double-layer structure is not sensitive to the choice of plastic encapsulation materials. There are many options for plastic encapsulation materials, which can be consistent with the plastic encapsulation materials used by the packaging factory and match the packaging form.

[0062] According to this method, during the product development stage, without changing the chip structure design and wafer tape-out process conditions, the device leakage current can be improved by selecting the plastic encapsulation material. In addition to matching the packaging form, the target plastic encapsulation material also needs to match the material information of the wafer passivation layer. Once the plastic encapsulation material is finalized, it is assigned to the packaging factory and is not allowed to be changed at will to ensure that the finished package meets the device leakage requirements.

[0063] Since the packaging forms are different but the sizes are the same, the sizes of the plastic encapsulation material cakes used during packaging will be different. According to the characteristics of the plastic encapsulation mold, the formula will also be different. For semi-encapsulated products, since the heat sink is exposed to the outside, there is no strict requirement for the thermal conductivity, but for fully encapsulated products, there is another layer of plastic encapsulation material outside the heat sink, which requires a relatively high thermal conductivity. That is, the same plastic encapsulation material, applied to half-encapsulation or full-encapsulation, has a very different effect, because half-encapsulation and full-encapsulation are two different packaging forms, and the plastic encapsulation materials used must be different, because the plastic encapsulation molds are different and the heat dissipation is different, resulting in the size and formula of the plastic encapsulation material cakes. The pure ion concentration and thermal conductivity correspond to the formula of the plastic encapsulation material, and the formula of the plastic encapsulation material for half-encapsulation and full-encapsulation is different. Therefore, in this embodiment, when the passivation layer is a single-layer PI, it is necessary to select the corresponding one in combination with the packaging form, the impure ion concentration and the thermal conductivity.

[0064] In practical applications, if the existing plastic encapsulation material cannot meet the leakage current requirement of HTRB, the formula of the plastic encapsulation material can be further adjusted to further reduce the concentration of impure ions and further increase the thermal conductivity until the leakage current requirement of HTRB is met.

[0065] See also Figure 3 This embodiment also provides another flow chart of the method for selecting a semiconductor device plastic packaging material.

[0066] This embodiment provides a method for selecting plastic encapsulation materials for semiconductor devices, which obtains the rated working information of the semiconductor device to be packaged and the material information of its passivation layer; determines the packaging form of the semiconductor device to be packaged according to the rated working information of the semiconductor device to be packaged; selects a target plastic encapsulation material that matches both the material information of the passivation layer and the packaging form according to the material information of the passivation layer and the packaging form; wherein the target plastic encapsulation material can make the leakage current of the semiconductor device to be packaged after being packaged by the target plastic encapsulation material in a high-temperature reverse bias test less than a first preset threshold value and the leakage current change value of the semiconductor device to be packaged within a preset time range in the high-temperature reverse bias test less than a second preset threshold value. Starting from the packaging level, this method selects a plastic encapsulation material that matches the passivation layer material and the packaging form of the device for packaging, so as to achieve the purpose of reducing the leakage of semiconductor devices and improve their reliability and stability. Without changing the chip (device) design and tape-out process, solving the problem from the perspective of chip (device) back-end packaging can not only avoid the extension of the R&D cycle due to chip (device) design changes, but also reduce the leakage of semiconductor devices by simply changing the plastic packaging material. The chip (device) design does not need to be revised, thereby greatly shortening the R&D cycle and reducing product costs.

[0067] Embodiment 2

[0068] See also Figure 4 This embodiment provides a semiconductor device molding compound selection device 100, including: an information acquisition module 101, a packaging form determination module 102 and a molding compound selection module 103.

[0069] The information acquisition module 101 is used to acquire the rated working information of the semiconductor device to be packaged and the material information of its passivation layer;

[0070] A packaging form determining module 102, configured to determine the packaging form of the semiconductor device to be packaged according to the rated working information of the semiconductor device to be packaged;

[0071] The molding compound selection module 103 selects a target molding compound that matches both the material information of the passivation layer and the packaging form according to the material information of the passivation layer and the packaging form; wherein the target molding compound can make the leakage current of the semiconductor device to be packaged after being packaged by the target molding compound in a high-temperature reverse bias test less than a first preset threshold value and the leakage current change value of the semiconductor device to be packaged within a preset time range in the high-temperature reverse bias test less than a second preset threshold value.

[0072] The information acquisition module 101 acquires the rated working information of the semiconductor device to be packaged and the material information of its passivation layer; the packaging form determination module 102 determines the packaging form of the semiconductor device to be packaged according to the rated working information of the semiconductor device to be packaged; the molding compound selection module 103 selects a target molding compound that matches the material information of the passivation layer and the packaging form according to the material information of the passivation layer and the packaging form; wherein the target molding compound can make the leakage current of the semiconductor device to be packaged after being packaged by the target molding compound in a high-temperature reverse bias test less than a first preset threshold value and the leakage current change value of the semiconductor device to be packaged within a preset time range in the high-temperature reverse bias test less than a second preset threshold value.

[0073] The specific implementation process of the above method steps can be found in Example 1, and this embodiment will not be repeated here.

[0074] Embodiment 3

[0075] This embodiment provides a terminal device, which may be a mobile phone, a computer or a tablet computer, etc., including a memory and a processor, wherein a computer program is stored in the memory, and when the computer program is executed by the processor, the method for selecting a semiconductor device plastic packaging material as described in Embodiment 1 is implemented. It can be understood that the terminal device may also include an input / output (I / O) interface and a communication component.

[0076] The processor is used to execute all or part of the steps in the method for selecting a semiconductor device molding compound in Embodiment 1. The memory is used to store various types of data, which may include instructions of any application or method in the terminal device, and data related to the application.

[0077] The processor can be an application specific integrated circuit (ASIC), a digital signal processor (DSP), a digital signal processing device (DSPD), a programmable logic device (PLD), a field programmable gate array (FPGA), a controller, a microcontroller, a microprocessor or other electronic components, and is used to execute the semiconductor device plastic packaging material selection method in the above-mentioned embodiment 1.

[0078] The memory can be implemented by any type of volatile or non-volatile storage device or a combination thereof, such as static random access memory (SRAM), electrically erasable programmable read-only memory (EEPROM), erasable programmable read-only memory (EPROM), programmable read-only memory (PROM), read-only memory (ROM), magnetic storage, flash memory, magnetic disk or optical disk.

[0079] Embodiment 4

[0080] This embodiment provides a computer-readable storage medium, such as a flash memory, a hard disk, a multimedia card, a card-type memory (for example, an SD or DX memory, etc.), a random access memory (RAM), a static random access memory (SRAM), a read-only memory (ROM), an electrically erasable programmable read-only memory (EEPROM), a programmable read-only memory (PROM), a magnetic memory, a disk, an optical disk, a server, an App application store, etc., on which a computer program is stored. When the computer program is executed by a processor, the following method steps can be implemented:

[0081] Step S101: obtaining rated operating information of the semiconductor device to be packaged and material information of its passivation layer;

[0082] Step S102: determining a packaging form of the semiconductor device to be packaged according to rated operating information of the semiconductor device to be packaged;

[0083] Step S103: According to the material information of the passivation layer and the packaging form, select a target molding material that matches both the material information of the passivation layer and the packaging form; wherein the target molding material can make the leakage current of the semiconductor device to be packaged after being packaged by the target molding material in a high-temperature reverse bias test less than a first preset threshold value and the leakage current change value of the semiconductor device to be packaged within a preset time range in the high-temperature reverse bias test is less than a second preset threshold value.

[0084] The specific implementation process of the above method steps can be found in Example 1, and this embodiment will not be repeated here.

[0085] In summary, the present application provides a method, device, terminal equipment and storage medium for selecting plastic encapsulation materials for semiconductor devices, the method comprising obtaining the rated working information of the semiconductor device to be packaged and the material information of its passivation layer; determining the packaging form of the semiconductor device to be packaged according to the rated working information of the semiconductor device to be packaged; selecting a target plastic encapsulation material that matches both the material information of the passivation layer and the packaging form according to the material information of the passivation layer and the packaging form; wherein the target plastic encapsulation material can make the leakage current of the semiconductor device to be packaged after being packaged by the target plastic encapsulation material in a high temperature reverse bias test less than a first preset threshold value and the leakage current change value of the semiconductor device to be packaged within a preset time range in the high temperature reverse bias test less than a second preset threshold value. Starting from the packaging level, the method selects a plastic encapsulation material that matches the passivation layer material and the packaging form of the device for packaging, so as to achieve the purpose of reducing the leakage of semiconductor devices and improve their reliability and stability. Without changing the chip (device) design and tape-out process, solving the problem from the perspective of chip (device) back-end packaging can not only avoid the extension of the R&D cycle due to chip (device) design changes, but also reduce the leakage of semiconductor devices by simply changing the plastic packaging material. The chip (device) design does not need to be revised, thereby greatly shortening the R&D cycle and reducing product costs.

[0086] In the several embodiments provided in the present application, it should be understood that the disclosed method can also be implemented in other ways. The method embodiments described above are merely illustrative.

[0087] It should be noted that, in this article, the terms "include", "comprises" or any other variations thereof are intended to cover non-exclusive inclusion, so that a process, method, article or device including a series of elements includes not only those elements, but also other elements not explicitly listed, or also includes elements inherent to such process, method, article or device. In the absence of further restrictions, an element defined by the sentence "comprises a ..." does not exclude the existence of other identical elements in the process, method, article or device including the element.

[0088] Although the implementation methods disclosed in this application are as above, the contents described are only implementation methods adopted for facilitating the understanding of this application, and are not intended to limit this application. Any technician in the technical field to which this application belongs can make any modifications and changes in the form and details of implementation without departing from the spirit and scope disclosed in this application, but the scope of patent protection of this application shall still be based on the scope defined in the attached claims.

Claims

1. A method for selecting a semiconductor device plastic packaging material, characterized in that: The method comprises: Obtaining rated operating information of the semiconductor device to be packaged and material information of its passivation layer; Determining a packaging form of the semiconductor device to be packaged according to rated operating information of the semiconductor device to be packaged; According to the material information of the passivation layer and the packaging form, a target molding compound that matches both the material information of the passivation layer and the packaging form is selected; wherein the target molding compound can make the leakage current of the semiconductor device to be packaged after being packaged by the target molding compound in a high-temperature reverse bias test less than a first preset threshold value and the leakage current change value of the semiconductor device to be packaged within a preset time range in the high-temperature reverse bias test less than a second preset threshold value; The step of selecting a target molding material that matches both the material information of the passivation layer and the packaging form according to the material information of the passivation layer and the packaging form comprises the following steps: According to the packaging form, selecting a plastic packaging material matching the packaging form as an alternative plastic packaging material; When the material of the passivation layer is polyimide, according to the material information of the passivation layer, a molding material having an impure ion concentration less than a third preset threshold and a thermal conductivity greater than a fourth preset threshold is selected from the candidate molding materials as a target molding material; When the material of the passivation layer includes silicon nitride, any one of the candidate molding materials is selected as the target molding material according to the material information of the passivation layer.

2. The method according to claim 1, characterized in that The rated operating information includes a rated operating voltage and a rated operating current.

3. The method according to claim 1, characterized in that The packaging form includes full package packaging or half package packaging.

4. The method according to claim 1, characterized in that: The first preset threshold is 100 μA.

5. The method according to claim 1, characterized in that The third preset threshold is 5 ppm.

6. The method according to claim 1, characterized in that The fourth preset threshold is 2.0 W / m*K.

7. A device for selecting plastic packaging materials for semiconductor devices, characterized in that: include: An information acquisition module, used to acquire rated operating information of the semiconductor device to be packaged and material information of its passivation layer; A packaging form determining module, used to determine the packaging form of the semiconductor device to be packaged according to the rated working information of the semiconductor device to be packaged; A molding compound selection module, for selecting a target molding compound that matches both the material information of the passivation layer and the packaging form according to the material information of the passivation layer and the packaging form; wherein the target molding compound can make the leakage current of the semiconductor device to be packaged after being packaged by the target molding compound in a high-temperature reverse bias test less than a first preset threshold value and the leakage current change value of the semiconductor device to be packaged within a preset time range in the high-temperature reverse bias test less than a second preset threshold value; The step of selecting a target molding material that matches both the material information of the passivation layer and the packaging form according to the material information of the passivation layer and the packaging form comprises the following steps: According to the packaging form, selecting a plastic packaging material matching the packaging form as an alternative plastic packaging material; When the material of the passivation layer is polyimide, according to the material information of the passivation layer, a molding material having an impure ion concentration less than a third preset threshold and a thermal conductivity greater than a fourth preset threshold is selected from the candidate molding materials as a target molding material; When the material of the passivation layer includes silicon nitride, any one of the candidate molding materials is selected as the target molding material according to the material information of the passivation layer.

8. A terminal device, characterized in that: The method comprises a memory and a processor, wherein a computer program is stored in the memory, and when the computer program is executed by the processor, the method for selecting a plastic encapsulation material for a semiconductor device as claimed in any one of claims 1 to 6 is executed.

9. A storage medium, characterized in that: The computer program stored in the storage medium can be executed by one or more processors and can be used to implement the method for selecting a molding compound for a semiconductor device as claimed in any one of claims 1 to 6.

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