A method for manufacturing a light-emitting chip, the light-emitting chip, and a light-emitting device

Abstract

The present invention relates to a method for manufacturing a light-emitting chip, a light-emitting chip, and a light-emitting device. The method for manufacturing a light-emitting chip includes: providing an epitaxial wafer, the epitaxial wafer including a substrate and an epitaxial layer, and a stepped structure being formed on the epitaxial layer; depositing an insulating layer on the epitaxial wafer; patterning the insulating layer to make the regions corresponding to the first electrode and the second electrode of the light-emitting chip have electrode setting surfaces with the same height, and forming a conductive channel, and one end of the first conductive channel far from the substrate being located within the electrode setting surface corresponding to the first electrode; depositing and forming the first electrode and the second electrode in the regions corresponding to the first electrode and the second electrode. This method for manufacturing a light-emitting chip enables the epitaxial wafer to meet the condition of simultaneously depositing and forming the first electrode and the second electrode without affecting transfer and use, which is beneficial to simplifying the electrode manufacturing process of the light-emitting chip and reducing the cost of metal materials.

Description

Technical Field

[0001] The present invention relates to the field of chip manufacturing, and particularly to a method for manufacturing a light-emitting chip, a light-emitting chip, and a light-emitting device. Background Art

[0002] Micro LED (Micro Light Emitting Diode) display technology refers to a display technology that uses self-luminous micron-scale LEDs (Light Emitting Diodes) as light-emitting pixel units and assembles them onto a driving panel to form a high-density LED array. Due to the characteristics of small size, high integration, and self-luminance of Micro LED chips, it has greater advantages than LCD (Liquid Crystal Display) and OLED (Organic Light Emitting Diode) in terms of brightness, resolution, contrast, energy consumption, service life, response speed, and thermal stability in display.

[0003] For example, in the manufacturing process of some light-emitting chips such as traditional Micro LED manufacturing, the electrodes can only be manufactured separately, with many processes and high costs.

[0004] Therefore, how to reduce the manufacturing cost of the electrodes of the light-emitting chip is an urgent problem to be solved. Summary of the Invention

[0005] In view of the deficiencies of the above-mentioned related technologies, the purpose of the present application is to provide a method for manufacturing a light-emitting chip, a light-emitting chip, and a light-emitting device, aiming to solve the problem that the two electrodes of the light-emitting chip can only be manufactured separately, with many processes and high costs.

[0006] A method for manufacturing a light-emitting chip includes:

[0007] Providing an epitaxial wafer, the epitaxial wafer including a substrate and an epitaxial layer provided on one side of the substrate, the epitaxial layer sequentially including a first semiconductor layer, an active layer, and a second semiconductor layer away from the substrate, and a step structure is formed on the epitaxial layer to expose a partial area of the first semiconductor layer for setting a first electrode of the light-emitting chip;

[0008] Depositing an insulating layer on the epitaxial wafer, the thickness of the insulating layer being not less than the distance from the plane where the bottom of the step structure is located to the plane of the epitaxial layer farthest from the substrate, and after the insulating layer is deposited, a recessed area is formed corresponding to the step structure;

[0009] Pattern the insulating layer such that the regions corresponding to the first electrode and the second electrode of the light-emitting chip have electrode setting surfaces of equal height, and at least a first conductive channel corresponding to the first electrode is further formed. The cross-sectional area of the first conductive channel is smaller than that of the recessed region. One end of the first conductive channel close to the substrate exposes the first semiconductor layer, and the other end of the first conductive channel away from the substrate is located within the electrode setting surface corresponding to the first electrode.

[0010] Deposit and form the first electrode and the second electrode in the regions corresponding to the first electrode and the second electrode.

[0011] In the above light-emitting chip manufacturing method, by shaping the relatively thick insulating layer, the significant height difference of the electrodes caused by the step structure of the epitaxial layer is eliminated, enabling the epitaxial wafer to meet the condition of simultaneously depositing and forming the first electrode and the second electrode without affecting transfer and use. Thus, the first electrode and the second electrode can be simultaneously deposited and formed, which obviously helps to simplify the electrode manufacturing process of the light-emitting chip, reduce the process steps, and improve the yield of the electrode manufacturing of the light-emitting chip. On the other hand, in each deposition process, metal is consumed. Reducing the number of depositions also reduces the consumption of metal materials. It can be seen that simultaneously depositing and manufacturing the first electrode and the second electrode in actual application is also conducive to reducing the cost of metal materials.

[0012] Optionally, depositing and forming the first electrode and the second electrode in the regions corresponding to the first electrode and the second electrode includes:

[0013] Simultaneously deposit and form the first electrode and the second electrode.

[0014] By simultaneously depositing the first electrode and the second electrode, the two electrodes have the same thickness and height, which simplifies the electrode manufacturing process of the light-emitting chip, reduces the process steps, improves the yield of the electrode manufacturing of the light-emitting chip, and reduces the cost of the metal materials required for manufacturing the electrodes.

[0015] Based on the same inventive concept, the present application also provides a light-emitting chip, which is made by the above light-emitting chip manufacturing method, and the first electrode and the second electrode of the light-emitting chip have the same thickness.

[0016] Manufactured by the above light-emitting chip manufacturing method, its first electrode and second electrode have electrode setting surfaces of equal height, and the first electrode and the second electrode have the same thickness. Therefore, the first electrode and the second electrode of this light-emitting chip can be simultaneously deposited and formed, which is conducive to simplifying its electrode manufacturing process, reducing the process steps, and improving the yield of electrode manufacturing. On the other hand, it is also conducive to reducing the cost of metal materials.

[0017] Based on the same inventive concept, the present application also provides a light-emitting device, which includes a circuit substrate and a light-emitting chip. The light-emitting chip is the above-mentioned light-emitting chip, and the light-emitting chip is bonded to the die bonding area of the circuit substrate.

[0018] The electrode manufacturing process of the light-emitting chip used in the above light-emitting device is simple, the electrode quality is good, and the cost of the metal material required for manufacturing the electrode is low. Description of the Drawings

[0019] Figure 1 It is a schematic flow chart of the method for manufacturing a light-emitting chip provided by an embodiment of the present invention;

[0020] Figure 2 It is a schematic structural diagram of an epitaxial wafer provided by an embodiment of the present invention;

[0021] Figure 3 It is a schematic flow chart of the manufacturing process of the epitaxial wafer provided by an embodiment of the present invention;

[0022] Figure 4 It is a schematic diagram of the manufacturing process of the epitaxial wafer provided by an embodiment of the present invention Figure 1 ;

[0023] Figure 5 It is a schematic diagram of the manufacturing process of the epitaxial wafer provided by an embodiment of the present invention Figure 2 ;

[0024] Figure 6 It is a schematic structural diagram of the epitaxial wafer with an insulating layer deposited provided by an embodiment of the present invention;

[0025] Figure 7 It is a schematic flow chart of the patterned insulating layer provided by an embodiment of the present invention;

[0026] Figure 8 It is a schematic flow chart of depositing and forming an electrode provided by an embodiment of the present invention;

[0027] Figure 9 It is a schematic structural diagram of the patterned insulating layer of Example 1 provided by an embodiment of the present invention;

[0028] Figure 10 It is a schematic structural diagram of the patterned photoresist layer of Example 1 provided by an embodiment of the present invention;

[0029] Figure 11 It is a schematic structural diagram of the photomask of Example 1 provided by an embodiment of the present invention;

[0030] Figure 12 It is a schematic structural diagram of depositing an electrode in Example 1 provided by an embodiment of the present invention;

[0031] Figure 13Schematic diagram of the patterned structure of the insulating layer in Example 2 provided by the embodiment of the present invention;

[0032] Figure 14 Schematic diagram of the patterned structure of the photoresist layer in Example 2 provided by the embodiment of the present invention;

[0033] Figure 15 Schematic diagram of the structure of the photomask in Example 2 provided by the embodiment of the present invention;

[0034] Figure 16 Schematic diagram of the structure of the deposited electrode in Example 2 provided by the embodiment of the present invention;

[0035] Figure 17 Schematic diagram of the patterned structure of the insulating layer in Example 3 provided by the embodiment of the present invention;

[0036] Figure 18 Schematic diagram of the patterned structure of the photoresist layer in Example 3 provided by the embodiment of the present invention;

[0037] Figure 19 Schematic diagram of the structure of the photomask in Example 3 provided by the embodiment of the present invention;

[0038] Figure 20 Schematic diagram of the structure of the deposited electrode in Example 3 provided by the embodiment of the present invention;

[0039] Figure 21 Schematic diagram of the structure of the light-emitting device provided by the embodiment of the present invention;

[0040] Explanation of reference numerals:

[0041] 1 - Substrate; 21 - First semiconductor layer; 22 - Active layer; 23 - Second semiconductor layer; 24 - Step structure; 25 - Transparent conductive layer; 26 - Scoring channel; 27 - Insulating layer; 271 - Recessed area; 281 - First electrode pattern; 282 - Second electrode pattern; 291 - First conductive channel; 292 - Second conductive channel; 31 - Pattern complementary to the recessed area on the photoresist layer; 32 - Pattern corresponding to the conductive channel on the photoresist layer; 33 - Pattern corresponding to the electrode pattern on the photoresist layer; 41 - First region; 42 - Second region; 43 - Third region; 44 - Fourth region; 5 - Sacrificial layer; 6 - Electrode material; 7 - Circuit board; 8 - Light-emitting chip; A - First electrode setting surface; B - Second electrode setting surface. Detailed implementation manners

[0042] To facilitate the understanding of the present application, the present application will be described more comprehensively below with reference to the relevant drawings. The preferred embodiments of the present application are shown in the drawings. However, the present application can be implemented in many different forms and is not limited to the embodiments described herein. On the contrary, these embodiments are provided to make the disclosure of the present application more thorough and comprehensive.

[0043] Unless otherwise defined, all technical and scientific terms used herein have the same meaning as commonly understood by those of ordinary skill in the technical field to which this application belongs. The terms used in the specification of this application herein are only for the purpose of describing specific embodiments and are not intended to limit this application.

[0044] In the related art, the two electrodes of a light-emitting chip can only be fabricated separately, with many processes and high costs.

[0045] Based on this, the present application hopes to provide a solution that can solve the above technical problems, and its detailed content will be elaborated in the subsequent embodiments.

[0046] Embodiment

[0047] This embodiment provides a method for manufacturing a light-emitting chip, as Figure 1 shown, including:

[0048] S101. Provide an epitaxial wafer;

[0049] The epitaxial wafer in this embodiment is the epitaxial wafer of a light-emitting chip. The light-emitting chip includes but is not limited to an LED chip, and the LED chip may specifically include but is not limited to a Micro-LED chip, a Mini-LED chip, etc.

[0050] As Figure 2 shown, the epitaxial wafer provided in this embodiment includes a substrate 1 and an epitaxial layer at a time. The epitaxial layer sequentially includes a first semiconductor layer 21, an active layer 22, and a second semiconductor layer 23 away from the substrate. A step structure 24 is formed on the epitaxial layer. The step structure 24 is formed by removing other layers in a certain part of the first semiconductor layer 21 in the direction away from the substrate 1. The bottom of the step structure 24 exposes this part of the first semiconductor layer 21, and this part of the first semiconductor layer 21 is used to set the first electrode. In practical applications, the first semiconductor layer in the area of the step structure may also be reduced by a certain thickness.

[0051] The substrate may be a semiconductor material including but not limited to sapphire, silicon carbide, silicon, gallium arsenide, or other materials capable of growing an epitaxial layer for a light-emitting chip, and this embodiment does not limit this. In practical applications, the epitaxial material included in the epitaxial wafer is divided into multiple mutually independent epitaxial layer structures. After subsequent fabrication is completed for each epitaxial layer, the epitaxial wafer is cleaved to separate these independent epitaxial layers and fabricated into individual light-emitting chips.

[0052] In this embodiment, the first electrode is the electrode corresponding to the first semiconductor layer, and the second electrode is the electrode corresponding to the second semiconductor layer. The contact position of the first electrode with the epitaxial layer is closer to the first semiconductor layer, and the contact position of the second electrode with the epitaxial layer is closer to the second semiconductor layer. The first electrode and the second electrode may be in direct contact with the first semiconductor layer or the second semiconductor layer, or in contact with other conductive layer structures. For example, optionally, the epitaxial layer further includes a transparent conductive layer disposed on the side of the second semiconductor layer away from the substrate, and the second electrode is actually in direct contact with this transparent conductive layer. In this embodiment, the material and shape of the electrodes are not limited either. For example, the material of the electrodes may include at least one of Cr, Ni, Al, Ti, Au, Pt, W, Pb, Rh, Sn, Cu, Ag.

[0053] It should be noted that in some practical applications, the insulating layer on the surface of the light-emitting chip is also regarded as part of the epitaxial layer, and the epitaxial layer referred to in this embodiment does not include the insulating layer. Of course, in some examples, the epitaxial layer may further include other structures such as a reflective layer, a current blocking layer, etc.

[0054] According to different actual light-emitting chips, the specific components included in each layer of these epitaxial layers may vary. In one example, the first semiconductor layer may be an N-type semiconductor layer, such as a gallium nitride layer doped with a pentavalent element, the second semiconductor layer may be a P-type semiconductor layer, such as a gallium nitride layer doped with a trivalent element, and the active layer may include a quantum well layer and may also include other structures.

[0055] As a more specific example, this embodiment also briefly describes the fabrication process of the above-mentioned epitaxial wafer, as Figure 3 shown, including:

[0056] S1011. Deposit the first semiconductor layer, the active layer, and the second semiconductor layer on the substrate in sequence;

[0057] S1012. Etch a step structure on the epitaxial wafer;

[0058] As Figure 4As shown, the depth of the step structure 24 can be equal to the sum of the thicknesses of the active layer 22 and the second semiconductor layer 23. Multiple step structures 24 are etched on the epitaxial wafer at certain intervals. Exemplarily, photoresist can be first used for exposure and development to form a corresponding pattern, and then a dry etching process is used with the photoresist as a mask to fabricate the step structure. When the main component of the epitaxial layer is gallium nitride, the etching gas can include but is not limited to BCl3 and Cl2.

[0059] S1013. Fabricate a transparent conductive layer;

[0060] The material of the transparent conductive layer includes but is not limited to indium tin oxide (referred to as ITO for short). Optionally, the thickness of the transparent conductive layer can be 200 Å - 2000 Å. Exemplarily, a layer of indium tin oxide can be sputtered on the epitaxial wafer, photoresist is set and corresponding patterns are formed by photolithography, and the indium tin oxide material other than the transparent conductive layer is removed by wet etching.

[0061] S1014. Fabricate scribe lines on the epitaxial wafer;

[0062] As Figure 5 shown, after the transparent conductive layer 25 is fabricated, the epitaxial layer is etched to the substrate 1, and the etched area to the substrate 1 is the scribe line 26, so that multiple independent epitaxial layer regions are segmented on the epitaxial wafer, and each epitaxial layer region can be fabricated into an independent light-emitting chip. After all the light-emitting chips are fabricated, the epitaxial wafer can be cut and cleaved along the position of the scribe line, so that each light-emitting chip is separated into an independent individual. Exemplarily, similar to the etching of the step structure, photoresist can be first used for exposure and development to form a corresponding pattern, and then a dry etching process is used with the photoresist as a mask to fabricate the scribe line. When the main component of the epitaxial layer is gallium nitride, the etching gas can include but is not limited to BCl3 and Cl2.

[0063] So far, an exemplary epitaxial wafer fabrication is completed, and subsequent steps can be continued. Of course, it can be understood that the execution order of the above steps can be changed in some cases, or the required epitaxial wafer can be obtained by any other means.

[0064] S102. Deposit an insulating layer on the epitaxial wafer with a thickness not less than the distance from the plane where the bottom of the step structure is located to the plane of the epitaxial layer farthest from the substrate;

[0065] The insulating layer (also known as the PV layer, protective layer, passivation layer, etc.) uses insulating materials to ensure the stability of the light-emitting chip through the stability of its chemical and physical properties, realizing the functions of protecting the light-emitting chip and forming insulation. The insulating layer in this embodiment can be made of materials including but not limited to silicon nitride, silicon oxide, etc.

[0066] The formation methods of the insulating layer include, but are not limited to, physical or chemical deposition methods such as CVD (Chemical Vapor Deposition) film formation.

[0067] As Figure 6 shown, since the insulating layer 27 is deposited with the material of the insulating layer 27 having substantially the same thickness at each position during the deposition process, a recessed area 271 is formed in the insulating layer 27 corresponding to the step structure 24 (other areas such as the height unevenness of the insulating layer caused by the transparent conductive layer are ignored in the illustration of this embodiment). In this embodiment, the deposition thickness of the insulating layer 27 is not less than the distance from the plane where the bottom of the step structure 24 is located to the plane of the epitaxial layer farthest from the substrate 1. Even at the bottom of the recessed area 271 of the insulating layer 27, the distance from the substrate 1 is not less than the plane of the epitaxial layer farthest from the substrate 1. Generally speaking, that is to say, the bottom of the recessed area of the insulating layer is flush with or higher than the epitaxial layer (taking the illustrated direction as the height direction). It should be noted that since the depth of the step structure 24 is at least not less than the sum of the thicknesses of the active layer 22 and the second semiconductor layer 23, the thickness of the insulating layer 27 provided in this embodiment is significantly greater than the thickness usually set for the traditional insulating layer 27. Therefore, in some implementation processes, this embodiment can fabricate a light-emitting chip with better reliability.

[0068] In practical applications, the specific thickness of the deposited insulating layer can be flexibly determined according to various factors such as the size of the light-emitting chip to be fabricated and the depth of the step structure. Exemplarily, the deposition thickness of the insulating layer is 1.5 μm - 5 μm, for example, specifically it can be 1.7 μm, 2 μm, 2.5 μm, 3 μm, 3.5 μm, 4 μm, 4.5 μm, etc. For example, for a better insulation effect, it can be selected to make the bottom of the recessed area of the insulating layer higher than the epitaxial layer by a certain distance, such as 0.4 μm, 0.5 μm, 0.6 μm, 1 μm, etc. As a specific example, the sum of the thicknesses of the second semiconductor layer and the active layer is 1 μm - 1.5 μm, and the thickness of the deposited insulating layer can be 2 μm. In some examples, other structures such as a transparent conductive layer are further provided on the side of the second semiconductor layer away from the substrate, and its thickness can be between 200 Å and 1500 Å. During the implementation process, the thicknesses of these structures can also be considered.

[0069] S103. Pattern the insulating layer;

[0070] Pattern the insulating layer specifically includes, but is not limited to, making the areas corresponding to the first electrode and the second electrode of the light-emitting chip have electrode setting surfaces with the same height, and at least forming a first conductive channel corresponding to the first electrode. The cross-sectional area of the first conductive channel is smaller than that of the recessed area. One end of the first conductive channel close to the substrate exposes the first semiconductor layer, and the other end of the first conductive channel away from the substrate is located within the electrode setting surface corresponding to the first electrode.

[0071] The first conductive channel is used to enable the electrode material to contact the first semiconductor layer through the insulating layer, so as to achieve a conductive connection between the electrode and the first semiconductor layer.

[0072] It should be noted that the electrode setting surface referred to in this embodiment includes the first electrode and the second electrode, including the area on the epitaxial wafer for setting the electrodes.

[0073] In some embodiments, referring to Figure 7 , the method of patterning the insulating layer includes:

[0074] S1031. A photoresist layer is provided on the insulating layer;

[0075] The method of providing the photoresist layer includes but is not limited to coating. In some examples, in order to facilitate subsequent patterning of the insulating layer, the thickness of the provided photoresist layer is not less than the thickness of the insulating layer.

[0076] S1032. Pattern the photoresist layer;

[0077] The photoresist layer forms a pattern complementary to the concave region at the position corresponding to the concave region, forms a pattern corresponding to the conductive channel at the position corresponding to the conductive channel, and the remaining regions of the photoresist layer corresponding to the first electrode and the second electrode are in the same plane.

[0078] It should be noted that in some implementation processes, the insulating layer further includes a second conductive channel in the region corresponding to the second electrode. When there is a second conductive channel, the photoresist layer further forms a pattern corresponding to the second conductive channel, that is, the above-mentioned conductive channel includes the first conductive channel, or includes the first conductive channel and the second conductive channel.

[0079] Exemplarily, the patterning of the photoresist layer includes but is not limited to operations such as exposure and development. Among them, when exposing the photoresist layer, the photoresist layer is selectively irradiated according to the pattern to be formed, for example, the photoresist layer is selectively exposed through a photomask. In some examples, multiple different photomasks can be selected to perform multiple exposures on different regions to perform different degrees of exposure on different regions. The light-transmitting regions of different photomasks correspond to different exposure regions. For example, the exposure time and exposure intensity of different regions are controlled differently. In other examples, a single photomask can be used, and by forming light-transmitting regions with different light transmittances on the photomask, different exposure effects can be produced on different regions with a single exposure.

[0080] After completion of exposure, the areas in the photoresist layer that do not have anti-corrosion properties are removed by the developer. In practical applications, the photoresist layer can be a positive photoresist or a negative photoresist, and the corresponding exposure strategy can be adopted according to the specific material of the selected photoresist layer.

[0081] S1033. Etch the insulating layer based on the photoresist layer;

[0082] It can be understood that before etching the insulating layer, a corresponding pattern has been formed in the photoresist layer. At this time, the photoresist layer is equivalent to an etching mask. Etch based on the photoresist layer to transfer the pattern of the photoresist layer onto the insulating layer.

[0083] Exemplarily, a dry etching method can be used. As a specific example, when the insulating layer is silicon oxide, CF4, O2, and Ar can be used as etching gases for dry etching.

[0084] S1034. Remove the remaining part of the photoresist layer;

[0085] For example, the remaining part of the photoresist layer can be removed by a corresponding cleaning agent, such as an organic solvent, or by any other method for removing the photoresist layer.

[0086] The above steps S1031, S1032, S1033, and S1034 can also be executed multiple times, as long as the final patterned result is the required one.

[0087] S104. Deposit and form the first electrode and the second electrode in the areas corresponding to the first electrode and the second electrode.

[0088] The methods for depositing the first electrode and the second electrode include but are not limited to processes such as evaporation. For example, the epitaxial wafer is placed in an evaporation machine, and at least one material for forming the electrode is sequentially evaporated onto the epitaxial wafer.

[0089] In the traditional process of manufacturing a light-emitting chip, finally when forming the electrodes, due to significant differences in structure and specifications between the first electrode and the second electrode, it is only possible to fabricate the first electrode and the second electrode through at least two electrode formation processes respectively. If the first electrode and the second electrode are formed simultaneously, it will result in uneven heights between the two, making it difficult to transfer or use.

[0090] Such as Figure 8 , in some embodiments, step S104 specifically includes:

[0091] S1041. Set a sacrificial layer on the epitaxial wafer. The sacrificial layer covers the insulating layer and the epitaxial layer, and remove the sacrificial layer corresponding to the first electrode and the second electrode;

[0092] The sacrificial layer can also be a positive photoresist or a negative photoresist. This sacrificial layer also serves as a kind of mask.

[0093] S1042. Deposit an electrode material with a predetermined thickness on the epitaxial wafer;

[0094] The electrode material will be deposited on the sacrificial layer and on the regions of the epitaxial wafer corresponding to the first electrode and the second electrode. The thickness of the deposited electrode material is determined according to the actual situation. In this embodiment, optionally, when ensuring that the electrodes can be used normally, the predetermined thickness can specifically be 1 micron - 3 microns.

[0095] S1043. After the electrode material is deposited, remove the remaining sacrificial layer;

[0096] After the sacrificial layer is removed, the electrode material deposited on the sacrificial layer is also removed, and the electrode material in the regions corresponding to the first electrode and the second electrode remains. These deposited electrode materials constitute the first electrode and the second electrode.

[0097] To better illustrate the method for manufacturing a light-emitting chip in this embodiment, the following will be further described in conjunction with the accompanying drawings and some specific examples.

[0098] In one implementation manner, a first electrode setting surface is formed in the region of the insulating layer corresponding to the first electrode, a second electrode setting surface having the same height as the first electrode setting surface and a second conductive channel corresponding to the second electrode are formed in the region of the insulating layer corresponding to the second electrode. One end of the second conductive channel close to the substrate exposes the second semiconductor layer, and the other end of the second conductive channel away from the substrate is located in the electrode setting surface corresponding to the second electrode.

[0099] Example 1:

[0100] As Figure 9 shown, in one example, forming a first electrode setting surface in the region of the insulating layer corresponding to the first electrode and forming a second electrode setting surface having the same height as the first electrode setting surface in the region of the insulating layer corresponding to the second electrode includes: partially removing the insulating layer 27 in the regions corresponding to the first electrode and the second electrode to respectively form a first electrode pattern 281 and a second electrode pattern 282 with the same depth. One sides of the first electrode pattern 281 and the second electrode pattern 282 close to the substrate 1 are the first electrode setting surface A and the second electrode setting surface B respectively. The first electrode pattern and the second electrode pattern are actually patterns respectively matching the shapes of the first electrode and the second electrode. In this example, when depositing the first electrode and the second electrode, growth mainly starts from the insulating layer, and the first electrode and the second electrode are respectively electrically connected to the corresponding layer structures on the epitaxial layer through their corresponding first conductive channel 291 and second conductive channel 292.

[0101] In this example, during the process of patterning the insulating layer, making the remaining regions of the photoresist layer corresponding to the first electrode and the second electrode lie in the same plane includes: making the thickness of the photoresist layer on the regions not corresponding to the first electrode and the second electrode greater than the thickness of the photoresist layer on the regions of the first electrode and the second electrode. After the insulating layer is patterned, the regions corresponding to the first electrode and the second electrode are lower than other regions. After the electrodes are formed, at least a part of the sides of the electrodes are also protected by the insulating layer.

[0102] In this example, as Figure 10 shown, when patterning the insulating layer, the photoresist layer 3 forms a pattern 31 complementary to the recessed region 24 at the position corresponding to the recessed region 24, and forms patterns 32 corresponding to the first conductive channel and the second conductive channel respectively at the positions corresponding to the first conductive channel and the second conductive channel. At the same time, a pattern 33 corresponding to the first electrode pattern and the second electrode pattern is also formed.

[0103] In this example, as Figure 11 shown, during the process of patterning the photoresist layer, a photomask including a plurality of light-transmitting regions with different degrees of light transmission can be used. Among them, the position of the first region 41 corresponds to the regions of the first conductive channel and the second conductive channel; the position of the second region 42 corresponds to the recessed region of the insulating layer; the position of the third region 43 corresponds to the regions of the insulating layer corresponding to the first electrode and the second electrode; the position of the fourth region 44 corresponds to the other regions of the insulating layer except the above-mentioned first region 41, second region 42, and third region 43. Among them, the degrees of light transmission of the different regions from high to low are in turn: the first region 41, the third region 43, the second region 42, and the fourth region 44. Exemplarily, the first region 41 can be completely light-transmitting, the third region 43 transmits 2 / 3 - 3 / 4 of the light, the second region 42 transmits 1 / 4 - 1 / 3 of the light, and the fourth region 44 can be completely light-impermeable. The photoresist layer is exposed and developed using the photomask. In this embodiment, the "first", "second", etc. in the "first region", "second region", etc. are only used to indicate the distinction of the regions corresponding to different positions. In subsequent examples, the parts corresponding to the same region on the photomask are also expressed in the form of "first region", "second region".

[0104] In this example, referring to Figure 12 shown, during the process of depositing the electrodes, the sacrificial layer 5 on the first electrode pattern and the second electrode pattern is removed, and the electrode material 6 is deposited into the regions of the first electrode pattern and the second electrode pattern. The thickness of the deposited electrode material 6 is usually greater than the depth of the first electrode pattern and the second electrode pattern, so that the end faces of the electrodes are higher than the insulating layer, ensuring the normal use of the electrodes.

[0105] Example Two:

[0106] As shown Figure 13 in the figure, forming a first electrode setting surface in the region where the insulating layer corresponds to the first electrode, and forming a second electrode setting surface at the same height as the first electrode setting surface in the region where the insulating layer corresponds to the second electrode includes: making the surface of the insulating layer 27 away from the substrate 1 all in the same plane. It can be understood that, compared with the previous example, the side surfaces of the electrodes of the light-emitting chip finally fabricated in this example are not covered by the insulating layer, but the patterning in this example is relatively simple and the patterning process is easier to control.

[0107] In this example, during the patterning of the insulating layer, corresponding patterns are formed at the positions of the photoresist layer corresponding to the first conductive channel 291 and the second conductive channel 292, and a pattern complementary to the concave region is formed at the position corresponding to the concave region, and the remaining regions remain in the same plane.

[0108] In this example, as Figure 14 shown in the figure, when patterning the insulating layer, the photoresist layer 3 forms a pattern 31 complementary to the concave region 24 at the position corresponding to the concave region 24 and patterns 32 corresponding to the first conductive channel and the second conductive channel respectively at the positions corresponding to the first conductive channel and the second conductive channel, and the photoresist layer 3 in the remaining regions remains in the same plane. In this example, as Figure 15 shown in the figure, during the patterning process of the photoresist layer, the position of the first region 41 in the photomask corresponds to the first conductive channel; the position of the second region 42 is the concave region of the insulating layer; the position of the fourth region 44 corresponds to the other regions of the insulating layer except the above-mentioned first region 41 and second region 42; among them, the light transmittance of each different region from high to low is: the first region 41, the fourth region 44, the second region 42. The photoresist layer is exposed and developed using the photomask.

[0109] In this example, referring to Figure 16 the figure, during the deposition of the electrodes, the sacrificial layer 5 above the regions corresponding to the first electrode and the second electrode is removed.

[0110] Example Three:

[0111] As Figure 17As shown, in one example, the side of the second semiconductor layer away from the substrate includes a transparent conductive layer 25. Making the regions corresponding to the first electrode and the second electrode of the light-emitting chip have electrode setting surfaces at the same height includes: forming a first electrode setting surface in the region of the insulating layer 27 corresponding to the first electrode, and completely removing the region of the insulating layer 27 corresponding to the second electrode. Similar to the first example above, the insulating layer forms a first electrode pattern 281 and a second electrode pattern 282 with the same depth in the regions corresponding to the first electrode and the second electrode, but the bottom of the second electrode pattern 282 is the transparent conductive layer 25. In this example, the second electrode can be directly deposited on the transparent conductive layer 25 to form an electrical connection without forming a second conductive channel.

[0112] In this example, as Figure 18 shown, when patterning the insulating layer, the photoresist layer 3 forms a pattern 31 complementary to the recessed region 24 at the position corresponding to the recessed region 24, and patterns 32 corresponding to the first conductive channel and the second conductive channel are formed at the positions corresponding to the first conductive channel and the second conductive channel. At the same time, a pattern 33 corresponding to the first electrode pattern and the second electrode pattern is also formed.

[0113] In this example, as Figure 19 shown, during the process of patterning the photoresist layer, the photomask includes a first region 41, a second region 424, a third region 43, and a fourth region 44. Among them, the position of the first region 41 corresponds to the regions of the first conductive channel and the second conductive channel; the position of the second region 42 is the recessed region of the insulating layer; the position of the third region 43 is the region of the insulating layer corresponding to the first electrode and the second electrode; the position of the fourth region 44 corresponds to the other regions of the insulating layer except the first region 41, the second region 42, and the third region 43; among them, the light transmittance of each different region from high to low is: the first region 41, the third region 43, the second region 42, the fourth region 44. Exemplarily, the first region 41 can be completely transparent, the third region 43 transmits 2 / 3 - 3 / 4 of the light, the second region 42 transmits 1 / 4 - 1 / 3 of the light, and the fourth region 44 can be completely opaque. The photoresist layer is exposed and developed using the photomask.

[0114] In this example, referring to Figure 20 shown, similar to the previous example, during the deposition of the electrode material 6, the sacrificial layer 5 on the first electrode pattern and the second electrode pattern is removed.

[0115] It should be noted that, compared with the traditional manufacturing process of light-emitting chips, in this embodiment, a relatively thick insulating layer is set when forming the insulating layer, which facilitates patterning the insulating layer, so that the regions corresponding to the first electrode and the second electrode on the epitaxial wafer have electrode setting surfaces with the same height. In some implementation processes, the first electrode and the second electrode can be deposited simultaneously. It can be understood that during the simultaneous deposition process, the first electrode and the second electrode can grow at the same speed. That is, the thicknesses of the first electrode and the second electrode are always the same. And since the first electrode and the second electrode have electrode setting surfaces with the same height, it is ensured that when depositing the first electrode and the second electrode, most of the end faces on the side away from the substrate of these two electrodes can be in the same plane. And in this embodiment, the conductive channel is set to be relatively small, so that the overall end face of the electrode is relatively flat, and there are only depressions in the area of the conductive channel, which generally will not have a significant impact on the transfer or use of the electrode.

[0116] It can be seen that in the manufacturing method of the light-emitting chip of this embodiment, by shaping the relatively thick insulating layer, the significant height difference of the electrodes caused by the step structure of the epitaxial layer is eliminated, so that the epitaxial wafer meets the condition of simultaneously depositing and forming the first electrode and the second electrode without affecting the transfer and use. And being able to simultaneously deposit and form the first electrode and the second electrode obviously helps to simplify the electrode manufacturing process of the light-emitting chip and thus reduces the process steps and can also improve the yield of the electrode manufacturing of the light-emitting chip. On the other hand, in each deposition process, metal is consumed. Reducing the number of depositions also reduces the consumption of metal materials. It can be seen that enabling the first electrode and the second electrode to be simultaneously deposited and manufactured in practical applications is also beneficial to reducing the cost of metal materials.

[0117] Another alternative embodiment of the present invention:

[0118] This embodiment provides a light-emitting chip, which is made by the light-emitting chip manufacturing method of the above embodiment, and the thicknesses of the first electrode and the second electrode of the light-emitting chip are the same.

[0119] Since the light-emitting chip is made by the light-emitting chip manufacturing method of the above embodiment, its first electrode and second electrode have electrode setting surfaces with the same height, and the thicknesses of the first electrode and the second electrode are the same. Therefore, the first electrode and the second electrode of the light-emitting chip can be simultaneously deposited and formed, which is beneficial to simplifying its electrode manufacturing process and thus reducing the process steps and can also improve the yield of electrode manufacturing. On the other hand, it is also beneficial to reducing the cost of metal materials.

[0120] This embodiment also provides a light-emitting device, such as Figure 21As shown, the light-emitting device includes a circuit board 7 and a light-emitting chip 100. The light-emitting chip 100 is the above-mentioned light-emitting chip, and this light-emitting chip 100 is bonded to the die bonding area of the circuit board 7. The light-emitting chip 100 may include multiple chips and be arranged according to a predetermined layout, for example, form an array arrangement. The light-emitting device may be a display device such as a display panel, or a lighting device such as an LED light board, or other electronic devices capable of emitting light.

[0121] The electrode manufacturing process of the light-emitting chip used in this light-emitting device is simple, the electrode quality is good, and the cost of the metal material required for manufacturing the electrode is low.

[0122] It should be understood that the application of the present invention is not limited to the above examples. For those of ordinary skill in the art, improvements or transformations can be made according to the above description, and all such improvements and transformations should fall within the protection scope of the appended claims of the present invention.

Claims

1. A method for manufacturing a light-emitting chip, characterized in that, Including: Providing an epitaxial wafer, the epitaxial wafer including a substrate and an epitaxial layer disposed on one side of the substrate. The epitaxial layer sequentially away from the substrate includes a first semiconductor layer, an active layer, and a second semiconductor layer. A step structure is formed in the epitaxial layer to expose a partial area of the first semiconductor layer for setting a first electrode of a light-emitting chip; Depositing an insulating layer on the epitaxial wafer, the thickness of the insulating layer being not less than the distance from the plane where the bottom of the step structure is located to the plane of the epitaxial layer farthest from the substrate. After the insulating layer is deposited, a recessed area is formed corresponding to the step structure; Patterning the insulating layer so that the areas corresponding to the first electrode and the second electrode of the light-emitting chip have electrode setting surfaces of the same height, and at least a first conductive channel corresponding to the first electrode is further formed. The cross-sectional area of the first conductive channel is smaller than that of the recessed area. One end of the first conductive channel close to the substrate exposes the first semiconductor layer, and the other end of the first conductive channel away from the substrate is located within the electrode setting surface corresponding to the first electrode; Wherein, the specific steps of patterning the insulating layer include: Forming a photoresist layer on the insulating layer; Patterning the photoresist layer by using a photomask with multiple light-transmitting areas having different light-transmitting degrees; Using the patterned photoresist layer as a new photomask to pattern the insulating layer, and first electrode patterns and second electrode patterns with the same depth will be formed on the insulating layer; Depositing and forming the first electrode and the second electrode at positions corresponding to the first electrode pattern and the second electrode pattern. The first electrode and the second electrode are synchronously formed in the same process, and the sides of the first electrode and the second electrode away from the epitaxial wafer are in the same plane.

2. The method for manufacturing a light-emitting chip according to claim 1, characterized in that, The patterning of the insulating layer includes: Setting a photoresist layer on the insulating layer; Patterning the photoresist layer so that the photoresist layer forms a pattern complementary to the recessed area at the position corresponding to the recessed area, forms a pattern corresponding to the conductive channel at the position corresponding to the conductive channel, and the remaining areas of the photoresist layer corresponding to the first electrode and the second electrode are in the same plane; Etching the insulating layer based on the photoresist layer; Removing the remaining part of the photoresist layer.

3. The method for manufacturing a light-emitting chip according to claim 2, characterized in that, The step of making the areas corresponding to the first electrode and the second electrode of the light-emitting chip have electrode setting surfaces of the same height includes: Making the area of the insulating layer corresponding to the first electrode form a first electrode setting surface, the area of the insulating layer corresponding to the second electrode form a second electrode setting surface having the same height as the first electrode setting surface and a second conductive channel corresponding to the second electrode. One end of the second conductive channel close to the substrate exposes the second semiconductor layer, and the other end of the second conductive channel away from the substrate is located within the electrode setting surface corresponding to the second electrode.

4. The method for manufacturing a light-emitting chip according to claim 3, characterized in that, Forming a first electrode setting surface on the region of the insulating layer corresponding to the first electrode, and forming a second electrode setting surface on the region of the insulating layer corresponding to the second electrode, which is at the same height as the first electrode setting surface, includes: Partially removing the insulating layer in the regions corresponding to the first electrode and the second electrode to respectively form a first electrode pattern and a second electrode pattern with the same depth, and the sides of the first electrode pattern and the second electrode pattern close to the substrate are the electrode setting surfaces.

5. The method for manufacturing a light-emitting chip according to claim 4, characterized in that, Making the remaining regions of the photoresist layer corresponding to the first electrode and the second electrode be in the same plane includes: Making the thickness of the photoresist layer in the region not corresponding to the first electrode and the second electrode be greater than the thickness of the photoresist layer in the regions of the first electrode and the second electrode.

6. The method for manufacturing a light-emitting chip according to claim 2, characterized in that, Patterning the insulating layer includes: Forming the first electrode setting surface on the region of the insulating layer corresponding to the first electrode, and completely removing the region of the insulating layer corresponding to the second electrode to expose the surface of the epitaxial layer farthest from the substrate as the second electrode contact surface.

7. The method for manufacturing a light-emitting chip according to any one of claims 1-6, characterized in that, Depositing and forming the first electrode and the second electrode in the regions corresponding to the first electrode and the second electrode includes: Simultaneously depositing and forming the first electrode and the second electrode.

8. The method for manufacturing a light-emitting chip according to claim 7, characterized in that, The simultaneously depositing and forming the first electrode and the second electrode includes: Setting a sacrificial layer on the epitaxial wafer, the sacrificial layer covering the insulating layer and the epitaxial layer, and removing the sacrificial layer corresponding to the first electrode and the second electrode; Depositing a predetermined thickness of electrode material on the epitaxial wafer; After the deposition of the electrode material is completed, removing the remaining sacrificial layer.

9. A light-emitting chip, characterized in that, The light-emitting chip is made by the light-emitting chip manufacturing method according to any one of claims 1-8, and the first electrode and the second electrode of the light-emitting chip have the same thickness.

10. A light-emitting device, characterized in that, The light-emitting device includes a circuit board and a light-emitting chip, the light-emitting chip is the light-emitting chip according to claim 9, and the light-emitting chip is bonded to the die bonding area of the circuit board.

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