Power semiconductor device and method of manufacturing a power semiconductor device

Abstract

A power semiconductor device (1) is described, comprising: - a power semiconductor element (2) disposed within a housing (4), wherein a heat sink (6) is exposed on a first surface (5) of the housing (4); - a wiring substrate (10) having a first main surface (12) and a second main surface (14), the wiring substrate accommodating the housing (4) having the power semiconductor element (2), wherein a cooling region (16) having increased thermal conductivity is disposed on the second main surface (14); wherein the housing (4) is disposed on the wiring substrate (10) such that the heat sink (6) is connected to the cooling region (16) via a solder layer (2), wherein a number of spacers (28) disposed between the heat sink (6) and the cooling region (16) are embedded in the solder layer (20). A method for manufacturing the power semiconductor device is also described.

Description

Technical Field

[0001] The present invention relates to a power semiconductor device having power semiconductor elements arranged inside a housing, and a method for manufacturing the power semiconductor device. Background Technology

[0002] Power semiconductor devices, such as MOSFETs, are housed in a case, typically a plastic case, with a cooling surface exposed on the outside of the case, for example, made of copper. A range of different case designs exist, such as D2PAK, DPAK, TO220, etc. These devices are partly configured as surface-mount devices and partly as insert-mount devices. They typically have at least two connection leads that extend outward from the plastic case and can be connected to terminals on a wiring substrate.

[0003] Power semiconductor devices with such power semiconductor elements generate a significant amount of heat during operation, making effective heat dissipation a particular challenge. This heat is typically dissipated through a wiring substrate on which the housinged power semiconductor element is disposed. For this purpose, the wiring substrate may have, for example, thermal vias (through-holes). Such power semiconductor devices are known from JP 2018-120991 A.

[0004] DE 11 2016 005 508 T5 also discloses heat dissipation via vias that can be completely or partially filled with solder. According to one embodiment, a solder resist applied around the vias prevents solder from flowing into them, wherein power semiconductor elements are placed on the solder resist.

[0005] In some newer applications, such as charging equipment used in electric vehicles, power loss is very high, making cooling particularly important. In such applications, hot holes cannot be used, partly due to electrical insulation regulations. Summary of the Invention

[0006] Therefore, the objective of this invention is to describe a power semiconductor device that can dissipate heat output by a power semiconductor element particularly effectively. Furthermore, a method for manufacturing such a power semiconductor device should be described.

[0007] This task is addressed by the subject matter of the independent claims. Advantageous implementations and extensions are the subject matter of the dependent claims.

[0008] According to one aspect of the invention, a power semiconductor device is described, having at least one power semiconductor element disposed within a housing, wherein a heat sink is exposed on a first surface of the housing. The housing is, in particular, a plastic housing. The heat sink is, in particular, made of metal. The housing may, for example, be substantially cuboid in shape.

[0009] The power semiconductor device further includes a wiring substrate having a first main surface and a second main surface. The wiring substrate can be, in particular, a PCB substrate, i.e., a printed circuit board. In this case, the power semiconductor device is especially a printed circuit board device. A cooling region with increased thermal conductivity is disposed on the second main surface. For example, the cooling region is formed by a copper layer of the printed circuit board disposed on the second main surface of the wiring substrate.

[0010] The housing is disposed on the wiring substrate such that the heat sink is connected to the cooling region via a solder layer. A number of spacers are embedded in the solder layer between the heat sink and the cooling region. Advantageously, the spacers are formed, in particular, of a material with good electrical and thermal conductivity.

[0011] The spacer holder can be, in particular, an SMD adhesive patch, i.e., a collection of SMD adhesives applied in dots. SMD adhesive should be understood herein as an adhesive used to secure surface mount devices. Such adhesives, for example, can be epoxy-based conductive adhesives, which are known in principle to those skilled in the art and will not be explained in detail here. The SMD adhesive patches can be applied directly to the material of the cooling area or to a solder resist applied to the cooling area.

[0012] The advantage of this power semiconductor device is that by using a spacer, a greater distance can be made between the housing and the wiring substrate, allowing for the application of a thicker solder layer between them. This dramatically increases the amount of solder, thereby dramatically increasing the mass of the thermally conductive material on the wiring substrate. This mass can, in particular, become one and a half times or even more than two times. In this way, heat is dissipated from the power semiconductor element and released into the environment particularly efficiently.

[0013] In addition, the large amount of thermally conductive material in thermal contact with the heat sink acts as a buffer to absorb short-term power peaks in the power semiconductor device, which cause short-term temperature rises.

[0014] A housing containing semiconductor elements is arranged on the second main surface of a wiring substrate, such that the heat sink is fully arranged on the cooling region and connected to the cooling region via a solder layer.

[0015] Additionally, the thickness of the cooling zone can be increased. Typically, in standard printed circuit board technology, a maximum of 70 micrometers of copper can be used per layer, with some reaching as high as 105 micrometers or even 201 micrometers. This maximum thickness can be fully utilized in the cooling zone to maximize thermal conductivity.

[0016] According to one embodiment, the material forming the cooling region, particularly copper or a copper alloy, is embedded in a matrix made of a plastic material of the wiring substrate, and thus the surface of the cooling region is coplanar with the remaining surface of the wiring substrate. Alternatively, the cooling region may also be located on the surface of the wiring substrate.

[0017] According to one embodiment, a power semiconductor element disposed in a housing is configured for plug-in mounting. In this embodiment, the power semiconductor element has connection pins protruding from the housing and configured to insert into vias in the wiring substrate. The connection pins are then soldered there. In this embodiment, a large amount of solder material can be introduced between the heat sink and the cooling region of the wiring substrate using the vias of the wiring substrate. According to one embodiment, the wiring substrate therefore has a number of vias in the cooling region through which the solder material is introduced between the heat sink and the cooling region of the wiring substrate. For such a wiring substrate, spacers are applied between the vias such that the spacers do not cover the vias.

[0018] The advantage of this implementation is that a large amount of solder can be pumped to the underside of the housing using THT (through-hole technology) soldering. This allows for the achievement of a high-thickness solder layer, which is difficult to achieve with printed solder layers.

[0019] According to an alternative embodiment, the power semiconductor elements disposed in the housing are configured to be surface-mountable. In this embodiment, connection pins also extend from the housing, but these connection pins are provided for soldering to contact connection surfaces on the wiring substrate rather than for insertion into through-holes.

[0020] In this embodiment, through-holes can still be provided to bring solder material under the housing. However, alternatively, the housing with power semiconductor elements can be connected to the cooling area by means of wire bonding or wire bonding tabs after being secured by spacers. Therefore, in this embodiment, the solder layer is introduced into the gap between the housing and the cooling area by inserting wire bonding tabs, rather than by stamping or pumping. This embodiment also allows for a relatively thick solder layer and thus a large thermal conductivity.

[0021] According to one embodiment, the heat sink has an area 'a' on the first surface and the cooling region has an area 'A' on the second main surface, where a < A. In particular, a < 0.75A or even a < 0.5A can be used. The advantage of this embodiment is that the amount of thermally conductive material is increased through the large cooling region. Furthermore, due to the large cooling region, particularly good heat dissipation is achieved, as the cooling region protrudes laterally beyond the housing containing the power semiconductor elements. This thus improves the heat output to the environment.

[0022] According to one aspect of the invention, a method for manufacturing the described power semiconductor device is described, the method comprising providing a power semiconductor element disposed within a housing, wherein a heat sink is exposed on a first surface of the housing. Furthermore, a wiring substrate having a first main surface and a second main surface is provided, wherein a cooling region having increased thermal conductivity is disposed on the second main surface.

[0023] In the mounting region of the cooling zone, a number of spacers are applied to the wiring substrate, and a housing containing a power semiconductor element is placed on the spacers in the mounting region. Solder material is introduced into the gap between the heat sink and the cooling zone.

[0024] The area designated for housing a power semiconductor element is called the mounting area. Therefore, the mounting area corresponds in shape and extent to the first surface of the housing to be mounted.

[0025] Through-hole technology can be used to introduce solder material by means of through-holes arranged in the wiring substrate. Alternatively, this can be accomplished by introducing solder wires into the gap between the heat sink and the cooling area.

[0026] For example, the adhesive points of SMD adhesives can be used as spacers.

[0027] This method has the advantage of allowing a particularly large amount of solder to be applied to the cooling area. Therefore, solder layer thicknesses that are impossible or difficult to achieve with standard printing methods can be obtained. In this way, a particularly large amount of thermally conductive material comes into contact with the heat sink. Attached Figure Description

[0028] Embodiments of the present invention are described below based on schematic diagrams.

[0029] Figure 1 A power semiconductor device according to an embodiment of the present invention is schematically illustrated in cross-section, and

[0030] Figure 2 A top-down view schematically illustrates the following based on Figure 1 Power semiconductor devices. Detailed Implementation

[0031] according to Figure 1 The power semiconductor device 1 has a power semiconductor element 2, connection pins 24 extending outward from a plastic housing 4, and a heat sink 6 exposed on a first surface 5 of the housing 4. The power semiconductor element 2 is... Figure 1 Only the plastic housing 4 is shown. The power semiconductor element 2 also has at least one power semiconductor chip, such as a MOSFET, which is thermally connected to the heat sink 6 and, if necessary, electrically connected. Electrical contact is made with the power semiconductor element 2 via connection pin 24 and, if necessary, via the heat sink 6.

[0032] The illustrated embodiment is an insertable power semiconductor device 2. However, alternatively, it can also be a surface-mountable power semiconductor device.

[0033] The power semiconductor device 1 also includes a wiring substrate 10, which, in the illustrated embodiment, is configured as a PCB substrate and has a first main surface 12 and a second main surface 14 opposite to the first main surface 12. The wiring substrate 10 essentially has a substrate made of plastic in which contact connection surfaces 18 for connecting pins 24, conductor tracks (not shown), and a cooling region 16 made of copper are embedded. The cooling region 16 is exposed on the second main surface 14 of the wiring substrate 10 and is configured to accommodate the power semiconductor element 2 and to make thermal contact (and, if necessary, electrical contact) with the heat sink 6.

[0034] The wiring substrate 10 has a number of through holes 25 and 26. In this case, the through holes 25 are provided in the region of the contact connection surface 18 as electrical vias for the connection pins 24 to pass through. The through holes 26 in the cooling region 16 are designed as thermal vias and, among other things, for heat dissipation.

[0035] A solder layer 20 for electrical and mechanical connections between the power semiconductor element 2 and the wiring substrate 10 is applied to both the cooling region 16 and the contact connection surface 8. The power semiconductor element 2, particularly the heat sink 6, is electrically and thermally connected to the cooling region 16 via the solder layer 20. The connection pin 24 is electrically and thermally connected to the contact connection surface 18 via the solder layer 20.

[0036] The solder layer 20 has a high thickness d. Therefore, the solder layer 20 is not printed onto the wiring substrate 10 as is usually the case. Instead, the housing 4 with the power semiconductor element 2 is first placed on and fixed there onto the cooling region 16 by means of spacer holders 28, which in the illustrated embodiment are SMD bonding points. Then, the housing 4 or the heat sink 6 exposed on its first surface 5 is soldered to the cooling region 16 by means of through-hole technology. In this case, solder material for the solder layer 20 is introduced from the first main surface 12 through through-holes 26 into the gap between the heat sink 6 and the wiring substrate 10. At the same time, the solder layer 20 can also be applied to the contact connection surface 18 through through-holes 25. However, since the solder layer 20 does not need to have a particularly large thickness, it can also be printed in a standard method.

[0037] The amount of solder and the pressure applied to bring the solder into the gap are controlled such that the solder layer 20 substantially fills the entire gap between the heat sink 6 and the wiring substrate 10. The via 26 can also be filled with solder material, or the via 26 can be left unfilled or filled with another material that preferably has good thermal conductivity.

[0038] Figure 2 A top view shows the power semiconductor device 1. In this view, it can be seen that the cooling region 16 has a larger cooling capacity than the housing 4 or... Figure 2 The heat sink 6, which is not visible in the middle, has a significantly larger surface extension. In the illustrated embodiment, the area A of the cooling region 16 is more than twice the area a of the heat sink 6 exposed on the first surface 5 of the housing 4.

[0039] from Figure 2 As can be seen, the cooling area 16 therefore protrudes significantly beyond the housing 4 on the side. Figure 2 In the embodiment shown, the cooling area 16 protrudes beyond the housing 4 on all sides.

[0040] The copper material of the heat dissipation area 16 and the solder material of the solder layer 20 form an increased thermal mass, which can both buffer the short-term temperature rise caused by power peak and achieve good heat dissipation due to its large spatial extension.

Claims

1. A power semiconductor device (1), having - A power semiconductor element (2) arranged within a housing (4), wherein a heat sink (6) is exposed on a first surface (5) of the housing (4); - A wiring substrate (10) having a first main surface (12) and a second main surface (14), the wiring substrate accommodating a housing (4) having the power semiconductor element (2), wherein a cooling region (16) with increased thermal conductivity is arranged on the second main surface (14); The housing (4) is disposed on the wiring substrate (10) such that the heat sink (6) is connected to the cooling region (16) via a solder layer (20), wherein a number of spacers (28) disposed between the heat sink (6) and the cooling region (16) are embedded in the solder layer (20), wherein the spacers (28) are made of surface mount device (SMD) adhesive, wherein the SMD adhesive includes an epoxy-based conductive adhesive.

2. The power semiconductor device (1) according to claim 1, wherein, The power semiconductor element (2) arranged in the housing (4) is configured to be insertable.

3. The power semiconductor device (1) according to any one of the preceding claims, wherein, The wiring substrate (10) has a certain number of through holes (26) through which solder material is introduced between the heat sink (6) and the cooling area (16) of the wiring substrate (10).

4. The power semiconductor device (1) according to claim 1, wherein, The power semiconductor element (2) arranged in the housing (4) is configured to be surface mounted.

5. The power semiconductor device (1) according to any one of claims 1 to 2, wherein, The housing (4) having the power semiconductor element (2) is electrically connected to the cooling region (16) by means of the spacer (28) and by means of the solder layer (20).

6. The power semiconductor device (1) according to any one of claims 1 to 2, wherein, The heat sink (6) has an area a on the first surface (5), and the cooling area (16) has an area A on the second main surface (14), wherein a <A。 7. A method for manufacturing a power semiconductor device (1) according to any one of the preceding claims, the method comprising the following steps: - Provides a power semiconductor element (2) disposed within a housing (4), wherein a heat sink (6) is exposed on a first surface (5) of the housing (4); - Provide a wiring substrate (10) having a first main surface (12) and a second main surface (14), wherein a cooling region (16) with increased thermal conductivity is arranged on the second main surface (14). - A number of spacers (28) are applied to the wiring substrate (10) in the mounting area of ​​the cooling area (16), and a housing (4) having the power semiconductor element (2) is placed on the spacers (28) in the mounting area, wherein the spacers (28) are made of surface mount device SMD adhesive, wherein the SMD adhesive includes an epoxy-based conductive adhesive. -Then solder material is introduced into the gap between the heat sink (6) and the cooling area (16).

8. The method according to claim 7, wherein, Solder material is introduced by means of through holes (26) arranged in the wiring substrate (10).

9. The method according to claim 7, wherein, Solder material is introduced by introducing wire bonding sheets.

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