Voltage regulating device and mode switching detection circuit thereof

Abstract

The present invention provides a voltage regulating device and a mode switching detection circuit thereof. The mode switching detection circuit is used to reset the soft start circuit of the voltage regulating device. The mode switching detection circuit includes a mode switching signal detector, a reset signal generator and a reset state detector. The mode switching signal detector receives the mode switching signal and generates a setting signal according to the transition edge of the mode switching signal. The reset signal generator is coupled to the mode switching signal detector and generates a reset start signal according to the setting signal, wherein the reset start signal drives the soft start circuit to perform a reset action. The reset state detector compares the output voltage of the soft start circuit with a reference voltage to generate a clear signal. The reset signal generator clears the reset start signal according to the clear signal.

Description

Technical Field

[0001] The present invention relates to a voltage regulating device and a mode switching detection circuit thereof, and in particular to a voltage regulating device and a mode switching detection circuit thereof which can reduce surge current generated during voltage mode switching. Background Art

[0002] Low-dropout voltage conversion devices have been widely used in electronic products. In today's technology, low-dropout voltage conversion devices not only provide an adjustable output voltage that is lower than the operating power supply, but also need to have the ability to switch voltages. In the known technical field, low-dropout voltage conversion devices are commonly capable of switching the output voltage between 1.8 volts and 3.3 volts. In actual work, when the output voltage is instantly switched from 1.8 volts to 3.3 volts (or from 3.3 volts to 1.8 volts), a surge current with a large amplitude will be generated. The above-mentioned surge current may cause electromagnetic interference and affect the normal operation of the electronic device. Or, when the amplitude of the surge current is too large, it may also cause damage to the circuit components in the electronic device. Summary of the invention

[0003] The present invention is directed to a voltage regulating device and a mode switching detection circuit thereof, which can reduce the surge current generated in the voltage switching mode.

[0004] According to an embodiment of the present invention, a mode switching detection circuit is used to reset a soft start circuit of a voltage adjustment device. The mode switching detection circuit includes a mode switching signal detector, a reset signal generator, and a reset state detector. The mode switching signal detector receives the mode switching signal and generates a setting signal according to a transition edge of the mode switching signal. The reset signal generator is coupled to the mode switching signal detector and generates a reset start signal according to the setting signal, wherein the reset start signal drives the soft start circuit to perform a reset action. The reset state detector compares the output voltage of the soft start circuit with a reference voltage to generate a clear signal. The reset signal generator clears the reset start signal according to the clear signal.

[0005] According to an embodiment of the present invention, a voltage adjustment device includes a soft start circuit, an amplifier, and a mode switching detection circuit as described above. The amplifier has a negative input terminal to receive a feedback signal. The amplifier has a positive input terminal to couple to an output terminal of the soft start circuit. The amplifier generates a driving voltage. The power transistor receives an operating power supply and generates an adjusted output voltage based on the operating power supply and the driving voltage. The mode switching detection circuit is coupled to the output terminal of the soft start circuit.

[0006] According to the above, the voltage regulator of the present invention can reset and restart the soft start circuit when performing the voltage mode switching operation, and can effectively reduce the surge current generated by the change of the output voltage. BRIEF DESCRIPTION OF THE DRAWINGS

[0007] The accompanying drawings are included to provide a further understanding of the present invention and are incorporated in and constitute a part of this specification. The drawings illustrate embodiments of the present invention and together with the description serve to explain the principles of the present invention.

[0008] Figure 1 A schematic diagram of a mode switching detection circuit according to an embodiment of the present invention is shown;

[0009] Figure 2 A schematic diagram of a mode switching detection circuit according to another embodiment of the present invention is shown;

[0010] Figure 3 A schematic diagram of a voltage regulating device according to an embodiment of the present invention is shown;

[0011] Figure 4 A schematic diagram of a soft start circuit in a voltage regulating device according to an embodiment of the present invention is shown.

[0012] Description of Figure Numbers

[0013] 100, 200, 310: mode switching detection circuit;

[0014] 101, 201, 320, 400: soft start circuit;

[0015] 110, 210: mode switching signal detector;

[0016] 120, 220: reset signal generator;

[0017] 130, 230: reset status detector;

[0018] 211: Delay device;

[0019] 300: voltage regulating device;

[0020] 330: voltage setting circuit;

[0021] 340: Feedback circuit;

[0022] C1: capacitor;

[0023] CLK: clock terminal;

[0024] CMP1: comparator;

[0025] D: data terminal;

[0026] DFF1: D-type flip-flop;

[0027] DM: delay mode switching signal;

[0028] DRV: driving voltage;

[0029] I1: current;

[0030] INV1, INV2: inverter;

[0031] IS1: current source;

[0032] MD1: transistor;

[0033] MODE: mode switching signal;

[0034] NE1: negative input terminal;

[0035] Q: output terminal;

[0036] OP: amplifier;

[0037] OR1: OR gate;

[0038] PD_OUT: reset start signal;

[0039] PDB_out: reverse reset start signal;

[0040] PE1, PE2: positive input terminals;

[0041] PM1: power transistor;

[0042] RESET: clear signal;

[0043] RST: reset terminal;

[0044] SET: set signal;

[0045] SO: signal;

[0046] VBG: reference voltage;

[0047] VDD, VPP: operating power supply;

[0048] VFB: feedback voltage;

[0049] VIP_PRE, VOUT: output voltage;

[0050] VSS: reference ground terminal;

[0051] XOR1: Exclusive OR gate. DETAILED DESCRIPTION

[0052] Reference will now be made in detail to exemplary embodiments of the present invention, examples of which are illustrated in the accompanying drawings. Whenever possible, the same reference numerals are used in the drawings and the description to refer to the same or like parts.

[0053] Please refer to Figure 1 , Figure 1A schematic diagram of a mode switching detection circuit according to an embodiment of the present invention is shown. The mode switching detection circuit is applied in a voltage regulating device, and when the voltage regulating device performs a voltage switching mode, the soft start circuit in the voltage regulating device is reset to reduce the inrush current generated by the change in the output voltage of the voltage regulating device. The mode switching detection circuit 100 includes a mode switching signal detector 110, a reset signal generator 120, and a reset state detector 130. The mode switching signal detector 110 receives a mode switching signal MODE. The mode switching signal detector 110 generates a setting signal SET according to a transition edge of the mode switching signal MODE. When the voltage regulating device performs a voltage switching mode, the mode switching signal MODE can be switched from a first logic value to a second logic value, or from a second logic value to a first logic value, wherein the first logic value is complementary to the second logic value. The mode switching signal detector 110 is used to detect whether the mode switching signal MODE generates a change in logic value, and generates a setting signal SET according to a transition edge of the mode switching signal MODE generating a change in logic value.

[0054] The reset signal generator 120 is coupled to the mode switching signal detector 110 . The reset signal generator 120 receives the setting signal SET and generates a reset start signal PD_OUT according to the setting signal SET. The reset start signal PD_OUT is used to reset the soft start circuit 101 and restart the soft start circuit 101 .

[0055] In the present embodiment, the reset start signal PD_OUT may be transmitted to the reset state detector 130. The reset state detector 130 is coupled to the soft start circuit 101 to compare the output voltage VIP_PRE generated by the soft start circuit 101 with the default reference voltage VBG. The reset state detector 130 generates a clear signal RESET through the comparison result between the output voltage VIP_PRE of the soft start circuit 101 and the default reference voltage VBG. The clear signal RESET is transmitted to the reset state detector 130 to clear the setting signal SET generated by the reset state detector 130.

[0056] In addition, in this embodiment, a discharge path may be provided in the reset state detector 130, and the output voltage VIP_PRE of the soft start circuit 101 may be discharged according to the reset start signal PD_OUT, and used to pull down the output voltage VIP_PRE of the soft start circuit 101. By pulling down the output voltage VIP_PRE of the soft start circuit 101, the soft start circuit 101 may be reset and restarted. In this way, in the voltage switching mode of the voltage regulator, the inrush current generated by the voltage regulator may be reduced by restarting the soft start circuit 101.

[0057] In this embodiment, the soft start circuit 101 can perform a soft start action by gradually pulling up the generated output voltage VIP_PRE. In a voltage regulator in the form of a low dropout (LDO), the output voltage VIP_PRE can be provided to the positive input terminal of an amplifier disposed therein. In addition, by adjusting the pull-up rate of the output voltage VIP_PRE, the soft start rate of the voltage regulator can be controlled.

[0058] In the embodiment of the present invention, when the soft start action performed by the soft start circuit 101 starts, the output voltage VIP_PRE of the soft start circuit 101 can be 0 volts. During the soft start process, the soft start circuit 101 can gradually increase the output voltage VIP_PRE, and when the output voltage VIP_PRE increases to be equal to the operating power supply, the soft start action ends. In addition, in the present embodiment, a discharge path can be provided in the reset state detector 130 to pull down the output voltage VIP_PRE of the soft start circuit 101 when the corresponding mode switching signal MODE changes state. In this way, the soft start action performed by the soft start circuit 101 can be performed again, and the surge current that may be generated by the voltage adjustment device when the output voltage is switched can be reduced.

[0059] Please refer to the following Figure 2 , Figure 2 A schematic diagram of a mode switching detection circuit according to another embodiment of the present invention is shown. The mode switching detection circuit 200 is coupled to the soft start circuit 201. The mode switching detection circuit 200 includes a mode switching signal detector 210, a reset signal generator 220, and a reset state detector 230. The mode switching signal detector 210 is used to delay the received mode switching signal MODE to generate a delayed mode switching signal DM. The mode switching signal detector 210 also compares the phase difference between the delayed mode switching signal DM and the mode switching signal MODE to generate a setting signal SET.

[0060] In detail, the mode switching signal detector 210 includes a delayer 211 and an exclusive OR gate XOR1. The delayer 211 receives the mode switching signal MODE, and generates a delayed mode switching signal DM by delaying the mode switching signal MODE. The two input ends of the exclusive OR gate XOR1 receive the mode switching signal MODE and the delayed mode switching signal DM respectively. The exclusive OR gate XOR1 can compare the phase difference between the mode switching signal MODE and the delayed mode switching signal DM, and generate a setting signal SET with a pulse according to the phase difference between the mode switching signal MODE and the delayed mode switching signal DM. The pulse of the setting signal SET corresponds to the position of the transition edge of the mode switching signal MODE. In addition, the length of the delay time provided by the delayer 211 is substantially the same as the width of the pulse on the setting signal SET.

[0061] On the other hand, the reset signal generator 220 includes a D-type flip-flop DFF1, an OR gate OR1, and inverters INV1 and INV2. The D-type flip-flop DFF1 has a clock terminal CLK, a data terminal D, an output terminal Q, and a reset terminal RST. The data terminal D of the D-type flip-flop DFF1 receives an operating power supply VDD; the clock terminal CLK of the D-type flip-flop DFF1 receives a setting signal SET; the reset terminal of the D-type flip-flop DFF1 is coupled to the reset state detector 230; the output terminal Q of the D-type flip-flop DFF1 generates a signal SO, wherein the reset start signal PD_out can be generated according to the signal SO.

[0062] When the mode switching signal detector 210 detects a transition edge of the mode switching signal MODE, the mode switching signal detector 210 generates a setting signal SET having a pulse. The D-type flip-flop DFF1 makes the signal SO at the output end become a logic value 1 according to the operating power supply VDD according to the pulse of the setting signal SET. Accordingly, the reset signal generator 220 can generate a reset start signal PD_out with a logic value 1.

[0063] On the other hand, the OR gate OR1 receives the signals SO and PD. In this embodiment, the signal PD is used to control the soft start circuit 201 to perform a soft start action when the operating power of the voltage regulating device is restarted. In this embodiment, when either of the signals SO and PD is a logic value 1, a reset start signal PD_out with a logic value 1 can be generated.

[0064] Inverters INV1 and INV2 generate the reverse reset start signal PDB_out and the reset start signal PD_out respectively according to the output of the OR gate OR1. Inverters INV1 and INV2 are used as buffers. The fanout capability of the reset start signal PD_out can be increased by inverter INV2.

[0065] Incidentally, the signal SO at the output terminal Q of the D-type flip-flop DFF1, when set to a logic value of 1, can only be cleared by a clear signal RESET at a reset terminal RST of the D-type flip-flop DFF1. In this embodiment, when the clear signal RESET is a logic value of 1, the signal S at the output terminal Q of the D-type flip-flop DFF1 can be cleared to a logic value of 0.

[0066] The reset state detector 230 includes a comparator CMP1 and a discharge switch constructed by a transistor MD1. In the present embodiment, the positive input terminal of the comparator CMP1 receives the reference voltage VBG, and the negative input terminal of the comparator CMP1 receives the output voltage VIP_PRE of the soft start circuit 201. The comparator CMP1 generates a clear signal RESET based on the comparison of the output voltage VIP_PRE and the reference voltage VBG. In the present embodiment, when the reference voltage VBG is greater than the output voltage VIP_PRE, the comparator CMP1 can generate a clear signal RESET with a logic value of 1; on the contrary, when the reference voltage VBG is less than the output voltage VIP_PRE, the comparator CMP1 can generate a clear signal RESET with a logic value of 0.

[0067] The transistor MD1 is turned on or off according to the reset start signal PD_out. When the transistor MD1 is turned on (the reset start signal PD_out is a logic value 1), the output end of the soft start circuit 201 can perform a discharge action through the transistor MD1, and the output voltage VIP_PRE is pulled down. The soft start circuit 201 is reset. At the same time, the comparator CMP1 can compare that the output voltage VIP_PRE is lower than the reference voltage VBG, and generate a clear signal RESET with a logic value of 0. In this way, the logic value of the reset start signal PD_out can be cleared to a logic value of 0, and the transistor MD1 is turned off, so that the action of pulling down the output voltage VIP_PRE is stopped.

[0068] After the output voltage VIP_PRE of the soft start circuit 201 is pulled down to be lower than the reference voltage VBG, the soft start circuit 201 can re-execute the soft start action. During the soft start action, the output voltage VIP_PRE of the soft start circuit 201 is gradually pulled up to an operating power supply.

[0069] Incidentally, in the present embodiment, the reference voltage VBG can be provided by a band gap voltage generator, and of course can also be provided by any other form of voltage generator. The voltage value of the reference voltage VBG can be determined based on the voltage value to which the output voltage VIP_PRE needs to be pulled down in order to restart the action of the soft start circuit 201. In addition, the comparator CMP1 can be a hysteresis comparator, which can reduce the possibility of generating an erroneous comparison result when the output voltage VIP_PRE is close to the reference voltage VBG.

[0070] Please refer to the following Figure 3 , Figure 3 A schematic diagram of a voltage regulating device according to an embodiment of the present invention is shown. The voltage regulating device 300 includes a mode switching detection circuit 310, a soft start circuit 320, an amplifier OP, a voltage setting circuit 330, a power transistor PM1, and a feedback circuit 340. The mode switching detection circuit 310 receives a mode switching signal MODE and a reference voltage VBG. The mode switching detection circuit 310 is also coupled to the output end of the soft start circuit 320.

[0071] The amplifier OP has two positive input terminals PE1 and PE2 to receive the output voltage VIP_PRE of the soft start circuit 320 and the reference voltage VREF respectively. The amplifier OP also has a negative input terminal NE1 to receive the feedback voltage VFB. The output terminal of the amplifier OP generates a driving voltage DRV. In addition, the voltage setting circuit 330 is coupled to the output terminal of the amplifier OP. The control terminal of the power transistor PM1 is coupled to the output terminal of the amplifier OP to receive the driving voltage DRV, the first terminal of the power transistor PM1 receives the operating power supply VPP, and the second terminal of the power transistor PM1 is coupled to the feedback circuit 340 and generates an output voltage VOUT. The feedback circuit 340 is also coupled to the reference ground terminal VSS to divide the output voltage VOUT to generate the feedback voltage VFB.

[0072] In the operation details, the mode switching detection circuit 310 is used to provide a discharge path to discharge the output end of the soft start circuit 320 when the mode switching signal MODE changes state, and pulls down the output voltage VIP_PRE of the soft start circuit 320 to a sufficiently low voltage value, so that the soft start circuit 320 is reset. In this way, the soft start circuit 320 can be restarted and the surge current generated by the voltage adjustment device 300 during the voltage switching operation can be reduced. Among them, when the output voltage VOUT of the voltage adjustment device 300 switches between the first voltage and the second voltage, the mode switching signal MODE can change state, and the above-mentioned first voltage and second voltage can be 3.3 volts and 1.8 volts respectively. Of course, the first voltage and the second voltage can also be other voltage values, without specific restrictions.

[0073] In this embodiment, the mode switching signal MODE may be input from an external electronic device and used to control the voltage regulating device 300 to perform a voltage switching operation.

[0074] The operation details of the mode switching detection circuit 310 have been fully described in the aforementioned embodiments and will not be elaborated here.

[0075] It should be noted that the voltage regulating device 300 of the embodiment of the present invention can operate in a voltage bypass mode. In the voltage bypass mode, the voltage regulating device 300 can output an output voltage VOUT substantially equal to the operating power supply VPP. At this time, the voltage setting circuit 330 can pull down the voltage value of the driving voltage DRV according to the current I1 provided by the output terminal of the amplifier OP. Since the power transistor PM1 is a P-type transistor, the on-resistance of the power transistor PM1 can be reduced according to the pulled-down driving voltage DRV, and the output voltage VOUT can be substantially equal to the operating power supply VPP.

[0076] Incidentally, in the normal mode of the non-voltage pass-through mode, the voltage setting circuit 330 does not work. At this time, the voltage adjustment device 300 can be a low dropout (LDO) voltage adjustment device.

[0077] Please refer to Figure 4 , Figure 4 The schematic diagram of the soft start circuit in the voltage adjustment device of the embodiment of the present invention is shown. The soft start circuit 400 includes a current source IS1 and a capacitor C1. The current source IS1 and the capacitor C1 are connected in series between the operating power supply VPP and the reference ground terminal VSS. The end point where the current source IS1 and the capacitor C1 are coupled to each other is the output end of the soft start circuit 400, which is used to generate the output voltage VIP_PRE. In this embodiment, with the Figure 3 In the embodiment of the present invention, when the output voltage VOUT of the voltage adjustment device 300 is stabilized at the first voltage, the output voltage VIP_PRE generated by the soft start circuit 400 can be equal to the operating power supply VPP. When the voltage switching action of the voltage adjustment device 300 occurs, the mode switching signal MODE changes state. At this time, the mode switching detection circuit 310 can provide a discharge path to discharge the capacitor C1 according to the change of the mode switching signal MODE. In this way, the output voltage VIP_PRE of the soft start circuit 400 can drop to be equal to or lower than the reference voltage VFB, and the soft start circuit 400 is reset. Then, the mode switching detection circuit 310 cuts off the above-mentioned discharge path and restarts the soft start circuit 400.

[0078] Through the soft start action performed by the soft start circuit 400, the surge current that may be generated in the voltage switching action performed by the voltage regulator 300 can be effectively reduced. In this way, the voltage regulator 300 and the system to which it belongs can avoid being affected by the surge current, causing malfunction or even burning, and can effectively maintain the overall performance of the system.

[0079] According to the above, in the embodiment of the present invention, a mode switching detection circuit is provided in the voltage regulating device so as to reset and restart the soft start circuit in the voltage switching mode, thereby reducing the inrush current generated by the voltage switching action.

[0080] Finally, it should be noted that the above embodiments are only used to illustrate the technical solutions of the present invention, rather than to limit it. Although the present invention has been described in detail with reference to the aforementioned embodiments, those skilled in the art should understand that they can still modify the technical solutions described in the aforementioned embodiments, or replace some or all of the technical features therein with equivalents. However, these modifications or replacements do not cause the essence of the corresponding technical solutions to deviate from the scope of the technical solutions of the embodiments of the present invention.

Claims

1. A mode switching detection circuit for resetting a soft start circuit of a voltage regulating device, comprising: A mode switching signal detector receives a mode switching signal and generates a setting signal according to a transition edge of the mode switching signal; A reset signal generator, coupled to the mode switching signal detector, generates a reset start signal according to the setting signal, wherein the reset start signal drives the soft start circuit to perform a reset action; as well as A reset state detector compares the output voltage of the soft start circuit with a reference voltage to generate a clear signal, The reset signal generator clears the reset start signal according to the clear signal. The reset signal generator makes the reset start signal a first logic value according to the setting signal, and the reset signal generator includes: A D-type flip-flop has a data terminal receiving a first voltage of the first logic value, a clock terminal of the D-type flip-flop receiving the setting signal, and an output terminal of the D-type flip-flop generating the reset start signal.

2. The mode switching detection circuit according to claim 1, wherein the mode switching signal detector delays the mode switching signal to generate a delayed mode switching signal, and the mode switching signal detector compares the delayed mode switching signal with the mode switching signal to generate the setting signal.

3. The mode switching detection circuit according to claim 2, wherein the mode switching signal detector comprises: a delayer, used for delaying the mode switching signal to generate a delayed mode switching signal; as well as The exclusive OR gate receives the delay mode switching signal and the mode switching signal to generate the setting signal.

4. The mode switching detection circuit according to claim 1, wherein the reset state detector generates the clear signal when the output voltage of the soft start circuit is less than the reference voltage, and the clear terminal of the D-type flip-flop receives the clear signal to make the reset start signal a second logic value, wherein the first logic value is opposite to the second logic value.

5. The mode switching detection circuit according to claim 4, wherein the reset state detector comprises: A comparator has a positive input terminal for receiving the reference voltage, and a negative input terminal for receiving the output voltage of the soft start circuit. The output terminal of the comparator generates the clear signal.

6. The mode switching detection circuit according to claim 4, wherein the reset state detector further comprises: The discharge switch is coupled between the output terminal of the soft start circuit and a reference ground terminal, and enables the output terminal of the soft start circuit to perform a discharge action according to the reset start signal.

7. A voltage regulating device, comprising: Soft start circuit; an amplifier having a negative input terminal for receiving a feedback signal, the amplifier having a positive input terminal for coupling to an output terminal of the soft start circuit, and the amplifier generating a driving voltage; A power transistor receives an operating power supply and generates an adjusted output voltage based on the operating power supply and the driving voltage; as well as The mode switching detection circuit according to claim 1, coupled to the output terminal of the soft start circuit.

8. The voltage regulating device according to claim 7, wherein the soft start circuit comprises: A current source, in a startup time interval, provides a charging current based on an operating power source; as well as A capacitor is coupled to the output end of the soft start circuit with the current source, and the capacitor is used to receive the charging current to generate an output voltage. The soft start circuit enters the start time interval according to the reset start signal.

9. The voltage regulating device according to claim 7, further comprising: The voltage setting circuit sets the driving voltage according to the pull-up current provided by the amplifier in the voltage passing mode.

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