A method for manufacturing a semiconductor device

Abstract

The present invention provides a method for manufacturing a semiconductor device, including: bonding the front side of a wafer to a carrier plate; thinning the back side of the wafer to a preset thickness and then completing the back-side device process; transferring the wafer to a carrier tray, at least partially sealing the peripheral gap between the wafer and the carrier tray with a first polyimide, debonding the carrier plate from the wafer, and removing the carrier plate; removing the first polyimide and completing ion activation; at least partially sealing the peripheral gap between the wafer and the carrier tray with a second polyimide to post-fix the wafer within the carrier tray; and completing the device process on the front side of the wafer. This method bonds the wafer to the carrier plate to complete the back-side device process of the wafer, transfers it to the carrier tray to complete high-temperature ion activation, and then uses the second polyimide to seal and fix the wafer to perform the preparation of the device process on the front side of the wafer, avoiding high-temperature damage caused by high-temperature tempering. Moreover, during different stages of wafer preparation, fixing and supporting are performed using a carrier plate, a carrier tray, etc., improving the convenience of wafer processing and preparation.

Description

Technical Field

[0001] The present invention relates to the field of semiconductor technology, and in particular, to a method for manufacturing a semiconductor device. Background Art

[0002] During the wafer processing and manufacturing process, a high-temperature ion tempering and activation process on the wafer surface is involved. Due to the high temperature of the high-temperature tempering, the carrier plate, the adhesive layer, the release layer, the polyimide layer, etc. cannot withstand the high temperature. Therefore, it is impossible to directly perform the high-temperature ion tempering process on the wafer bonded to the carrier plate. In addition, both the front and back sides of the wafer are involved in the processing of surface components, and fixed support is required during the processing. How to reasonably design the wafer manufacturing process affects the manufacturing efficiency and processing quality of the wafer. Summary of the Invention

[0003] The technical problem to be solved by the present invention is how to avoid the influence caused by the high-temperature ion tempering process during the wafer manufacturing process and improve the manufacturing efficiency and quality of the wafer. The present invention proposes a method for manufacturing a semiconductor device.

[0004] The method for manufacturing a semiconductor device according to an embodiment of the present invention includes:

[0005] Bond the front side of the wafer to a carrier plate;

[0006] After thinning the back side of the wafer to a preset thickness, complete the back-side component process;

[0007] Transfer the wafer to a carrier tray, at least partially seal the peripheral gap between the wafer and the carrier tray with a first polyimide, debond the carrier plate from the wafer, and remove the carrier plate;

[0008] Remove the first polyimide and complete the ion activation;

[0009] At least partially seal the peripheral gap between the wafer and the carrier tray with a second polyimide to fix the wafer in the carrier tray;

[0010] Complete the component process on the front side of the wafer.

[0011] The method for manufacturing a semiconductor device according to an embodiment of the present invention, by bonding the front side of the wafer to a carrier plate to complete the thinning of the back side of the wafer and the back-side component process, then transferring the wafer to a carrier tray to complete the high-temperature ion activation, after completing the ion activation, using a second polyimide to seal and fix the wafer to perform the preparation of the front-side component process of the wafer. During the entire manufacturing process, the damage to the polyimide, the carrier plate, the release layer, and the adhesive layer caused by the high-temperature tempering is avoided, and during different stages of wafer manufacturing, the carrier plate, the carrier tray, etc. are used for fixed support, improving the convenience of wafer processing and manufacturing.

[0012] According to some embodiments of the present invention, at least part of the peripheral gap between the wafer and the carrier is sealed with a first polyimide, including:

[0013] Placing the wafer in the groove of the carrier;

[0014] Sealing at least part of the gap between the outer periphery of the wafer and the inner peripheral wall of the groove with a first polyimide.

[0015] In some embodiments of the present invention, the ion activation specifically includes:

[0016] Performing ion implantation on the wafer;

[0017] Performing heat treatment on the wafer after ion implantation is completed.

[0018] According to some embodiments of the present invention, the ions include phosphorus ions and hydrogen ions, and the heat treatment includes: tempering the wafer through a furnace tube, and the temperature of the tempering is 400°C to 800°C.

[0019] In some embodiments of the present invention, before bonding the front side of the wafer to the carrier plate, the preparation method further includes:

[0020] Preparing a release layer and an adhesion layer on the surface of the wafer and / or the carrier plate.

[0021] According to some embodiments of the present invention, after transferring the wafer to the carrier and debonding the carrier plate from the wafer, the method further includes:

[0022] Removing the release layer or the adhesion layer on the surface of the wafer.

[0023] In some embodiments of the present invention, the device process on the front side of the wafer includes:

[0024] Preparing a polyimide layer with a preset pattern on the front side of the wafer, and preparing a preset arranged interlayer dielectric (ILD);

[0025] Preparing a metal block on the front side of the interlayer dielectric;

[0026] Plating a metal layer on the front side of the metal block.

[0027] According to some embodiments of the present invention, at least part of the hollowed-out area of the polyimide layer corresponds to the position of the scribe line.

[0028] In some embodiments of the present invention, the metal layer is at least one metal selected from nickel, palladium, and gold or a composite metal layer composed of multiple metals. Description of the Drawings

[0029] Figure 1Flow chart of a method for manufacturing a semiconductor device according to an embodiment of the present invention;

[0030] Figure 2 Schematic diagram of a wafer bonded to a carrier according to an embodiment of the present invention;

[0031] Figure 3 Schematic diagram of a wafer after back thinning and completion of backside device processes according to an embodiment of the present invention;

[0032] Figure 4 Schematic diagram of a wafer transferred to a first carrier wafer according to an embodiment of the present invention;

[0033] Figure 5 Schematic diagram of a wafer encapsulated with a first polyimide according to an embodiment of the present invention;

[0034] Figure 6 Schematic diagram after the carrier is debonded and removed according to an embodiment of the present invention;

[0035] Figure 7 Schematic diagram after removing the adhesive layer and the first polyimide according to an embodiment of the present invention;

[0036] Figure 8 Schematic diagram of a wafer encapsulated with a second polyimide according to an embodiment of the present invention;

[0037] Figure 9 Schematic diagram of a wafer after completion of front-side device processes according to an embodiment of the present invention;

[0038] Figure 10 is Figure 9 An enlarged view of the partial structure of part A circled in

[0039] Reference numerals:

[0040] Wafer 10, front side 110, back side 120, polyimide layer 101, interlayer dielectric 102, metal block 103, metal layer 104, scribe line S1,

[0041] Carrier 20,

[0042] Carrier tray 310,

[0043] First polyimide 410, second polyimide 420,

[0044] Release layer 50, adhesive layer 60. Detailed description of the invention

[0045] To further elaborate on the technical means and effects adopted by the present invention to achieve the predetermined purpose, the present invention will be described in detail below with reference to the accompanying drawings and preferred embodiments.

[0046] In the present invention, the description of the method flow in the specification and the steps of the flowchart in the accompanying drawings of the present invention specification do not necessarily have to be strictly executed according to the step numbers. The method steps can be changed in the execution order. Moreover, certain steps can be omitted, multiple steps can be combined into one step for execution, and / or one step can be decomposed into multiple steps for execution.

[0047] As Figure 1 shown, a method for manufacturing a semiconductor device according to an embodiment of the present invention includes:

[0048] S100, as Figure 2 shown, bonding the front surface 110 of the wafer 10 to the carrier plate 20;

[0049] S200, as Figure 3 shown, thinning the back surface 120 of the wafer 10 to a preset thickness and then completing the back surface 120 component process;

[0050] S300, as Figure 4 shown, transferring the wafer 10 to the carrier tray 310. As Figure 5 shown, at least partially sealing the peripheral gap between the wafer 10 and the carrier tray 310 with a first polyimide 410. As Figure 6 shown, debonding the carrier plate 20 from the wafer 10 and removing the carrier plate 20;

[0051] It should be noted that the first polyimide 410 can be used to seal some of the peripheral gaps between the wafer 10 and the carrier tray 310, thereby improving the sealing efficiency of the wafer 10; or the first polyimide 410 can be used to seal all of the peripheral gaps between the wafer 10 and the carrier tray 310. Thus, the sealing efficiency of the wafer 10 can be improved.

[0052] S400, as Figure 7 shown, removing the first polyimide 410 and completing ion activation;

[0053] S500, as Figure 8 shown, at least partially sealing the peripheral gap between the wafer 10 and the carrier tray 310 with a second polyimide 420 to fixedly hold the wafer 10 in the carrier tray 310;

[0054] S600, as Figure 9 and Figure 10 shown, completing the component process of the front surface 110 of the wafer 10.

[0055] A method for manufacturing a semiconductor device according to an embodiment of the present invention completes the thinning of the back surface 120 of the wafer 10 and the back surface element process by bonding the front surface 110 of the wafer 10 to the carrier plate 20. Then, the wafer 10 is transferred to the carrier tray 310 to complete high-temperature ion activation. After the ion activation is completed, the wafer 10 is sealed and fixed by the second polyimide 420 to prepare the front surface 110 element process of the wafer 10. During the entire manufacturing process, damage to the polyimide, the carrier plate 20, the release layer 50, and the adhesive layer 60 caused by high-temperature tempering is avoided. Moreover, during different stages of the wafer 10 manufacturing, the carrier plate 20, the carrier tray 310, etc. are used for fixing and supporting, improving the convenience of the wafer 10 processing and manufacturing.

[0056] According to some embodiments of the present invention, as Figure 5 shown, at least part of the peripheral gap between the wafer 10 and the carrier tray 310 is sealed by the first polyimide 410, including:

[0057] S310, placing the wafer 10 in the groove of the carrier tray 310;

[0058] S320, sealing at least part of the gap between the outer peripheral edge of the wafer 10 and the inner peripheral wall of the groove by the first polyimide 410.

[0059] In some embodiments of the present invention, the ion activation specifically includes:

[0060] S410, performing ion implantation on the wafer 10;

[0061] S420, performing heat treatment on the wafer 10 after the ion implantation is completed.

[0062] According to some embodiments of the present invention, the ions include phosphorus ions and hydrogen ions, and the heat treatment includes: tempering the wafer 10 through a furnace tube, and the tempering temperature is 400°C to 800°C.

[0063] In some embodiments of the present invention, in combination with Figure 1 shown, before bonding the front surface 110 of the wafer 10 to the carrier plate 20, the manufacturing method further includes:

[0064] S10, preparing a release layer 50 and an adhesive layer 60 on the surface of the wafer 10 and / or the carrier plate 20.

[0065] It should be noted that the release layer 50 or the adhesive layer 60 can be prepared on the surface of the wafer 10, or the release layer 50 or the adhesive layer 60 can be prepared on the surface of the carrier plate 20. The wafer 10 is bonded to the carrier plate 20 through the adhesive layer 60 and the release layer 50.

[0066] According to some embodiments of the present invention, as Figures 6 - 7 shown, after transferring the wafer 10 to the carrier tray 310 and debonding the carrier plate 20 from the wafer 10, the method further includes:

[0067] Remove the release layer 50 or the adhesive layer 60 on the surface of the wafer 10.

[0068] In some embodiments of the present invention, as Figure 9 shown, the device process on the front surface 110 of the wafer 10 includes:

[0069] S610, prepare a polyimide layer 101 with a preset pattern on the front surface 110 of the wafer 10, and prepare a preset arranged interlayer dielectric 102 (ILD);

[0070] S620, prepare metal blocks 103 on the front surface 110 of the interlayer dielectric 102;

[0071] S630, electroplate a metal layer 104 on the front surface 110 of the metal blocks 103.

[0072] According to some embodiments of the present invention, at least part of the hollowed-out area of the polyimide layer 101 corresponds to the position of the dicing street S1. Thus, the wafer 10 can be diced along the position of the dicing street S1, improving the convenience and efficiency of dicing the wafer 10.

[0073] In some embodiments of the present invention, the metal layer 104 is a composite metal layer 104 composed of at least one metal or multiple metals among nickel, palladium, and gold.

[0074] The following describes in detail the method for manufacturing a semiconductor device according to the present invention with a specific embodiment with reference to the accompanying drawings. It should be understood that the following description is only an exemplary description and should not be construed as a specific limitation of the present invention.

[0075] As Figure 1 shown, the method for manufacturing a semiconductor device includes:

[0076] S100, as Figure 2 shown, bond the front surface 110 of the wafer 10 to the carrier plate 20;

[0077] Before bonding the wafer 10 to the carrier plate 20, a bonding layer 60 and a release layer 50 are provided between the wafer 10 and the carrier plate 20 to bond the wafer 10 to the carrier plate 20. It should be noted that the release layer 50 or the adhesive layer 60 can be prepared on the surface of the wafer 10, or the release layer 50 or the adhesive layer 60 can be prepared on the surface of the carrier plate 20. The wafer 10 is bonded to the carrier plate 20 through the adhesive layer 60 and the release layer 50.

[0078] S200, as Figure 3 shown, after thinning the back surface 120 of the wafer 10 to a preset thickness, complete the device process on the back surface 120;

[0079] The device process on the back surface 120 includes: ion implantation, etc.

[0080] S300, as shown in Figure 4 Figure [not shown], transfer the wafer 10 to the carrier 310, at least partially seal the peripheral gap between the wafer 10 and the carrier 310 with the first polyimide 410, debond the carrier 20 from the wafer 10, and remove the carrier 20;

[0081] At least partially sealing the peripheral gap between the wafer 10 and the carrier 310 with the first polyimide 410 includes:

[0082] S310, place the wafer 10 in the groove of the carrier 310;

[0083] S320, seal at least part of the gap between the outer peripheral edge of the wafer 10 and the inner peripheral wall of the groove with the first polyimide 410.

[0084] As shown in Figures 6 - 7 Figure [not shown], after transferring the wafer 10 to the carrier 310 and debonding the carrier 20 from the wafer 10, the method further includes:

[0085] Removing the release layer 50 or the adhesive layer 60 on the surface of the wafer 10.

[0086] S400, remove the first polyimide 410 and complete the ion activation.

[0087] The ion activation specifically includes:

[0088] S410, perform ion implantation on the wafer 10, and the ions include phosphorus ions and hydrogen ions;

[0089] S420, perform heat treatment on the wafer 10 after ion implantation, and the heat treatment includes: tempering the wafer 10 through a furnace tube, and the tempering temperature is 400°C to 800°C

[0090] S500, as shown in Figure 8 Figure [not shown], at least partially seal the peripheral gap between the wafer 10 and the carrier 310 with the second polyimide 420 to fix the wafer 10 in the carrier 310;

[0091] S600, complete the device process on the front side 110 of the wafer 10.

[0092] As shown in Figure 9 Figure [not shown], the device process on the front side 110 of the wafer 10 includes:

[0093] S610, prepare a polyimide layer 101 with a preset pattern on the front side 110 of the wafer 10, and prepare a preset arranged interlayer dielectric 102 (ILD);

[0094] At least a partially hollowed-out area of the polyimide layer 101 corresponds to the position of the scribe line S1. Thus, the wafer 10 can be cut along the position of the scribe line S1, improving the convenience and cutting efficiency of wafer 10 cutting.

[0095] S620, prepare a metal block 103 on the front surface 110 of the interlayer dielectric 102;

[0096] S630, electroplate a metal layer 104 on the front surface 110 of the metal block 103. The metal layer 104 is a composite metal layer 104 composed of at least one metal or multiple metals among nickel, palladium, and gold.

[0097] In summary, in the method for manufacturing a semiconductor device according to the present invention, the back surface 120 of the wafer 10 is thinned and the back surface 120 component process is completed by bonding the front surface 110 of the wafer 10 to the carrier plate 20. Then, the wafer 10 is transferred to the carrier tray 310 to complete high-temperature ion activation. After the ion activation is completed, the second polyimide 420 is used to seal and fix the wafer 10 to prepare the front surface 110 component process of the wafer 10. During the entire manufacturing process, damage to the polyimide, the carrier plate 20, the release layer 50, and the adhesive layer 60 caused by high-temperature tempering is avoided. Moreover, at different stages of wafer 10 manufacturing, the carrier plate 20, the carrier tray 310, etc. are used for fixing and supporting, improving the convenience of wafer 10 processing and manufacturing.

[0098] Through the description of the specific embodiments, it should be possible to understand more deeply and specifically the technical means and effects adopted by the present invention to achieve the predetermined purpose. However, the accompanying drawings are only provided for reference and illustration, and are not used to limit the present invention.

Claims

1. A method for manufacturing a semiconductor device, characterized in that, Including: Bonding the front side of the wafer to the carrier plate; After thinning the back side of the wafer to a preset thickness, completing the back-side component process; Transferring the wafer to the first carrier, sealing at least part of the peripheral gap between the wafer and the first carrier with a first polyimide, debonding the carrier plate from the wafer, and removing the carrier plate; Removing the first polyimide and completing ion activation; Sealing at least part of the peripheral gap between the wafer and the first carrier with a second polyimide to post-fix the wafer in the first carrier; Completing the component process on the front side of the wafer; The ion activation specifically includes: performing ion implantation on the wafer; Performing heat treatment on the wafer after ion implantation.

2. The method for manufacturing a semiconductor device according to claim 1, characterized in that, Sealing at least part of the peripheral gap between the wafer and the first carrier with a first polyimide, including: Placing the wafer in the groove of the first carrier; Sealing at least part of the gap between the outer periphery of the wafer and the inner peripheral wall of the groove with a first polyimide.

3. The method for manufacturing a semiconductor device according to claim 1, characterized in that, The ions include phosphorus ions and hydrogen ions, and the heat treatment includes: tempering the wafer through a furnace tube, and the temperature of the tempering is 400°C to 800°C.

4. The method for manufacturing a semiconductor device according to claim 1, characterized in that, Before bonding the front side of the wafer to the carrier plate, the preparation method further includes: Preparing a release layer and an adhesive layer on the surface of the wafer and / or the carrier plate.

5. The method for manufacturing a semiconductor device according to claim 1, characterized in that, After transferring the wafer to the first carrier and debonding the carrier plate from the wafer, the method further includes: Removing the release layer or the adhesive layer on the surface of the wafer.

6. The method for manufacturing a semiconductor device according to claim 1, characterized in that, The component process on the front side of the wafer includes: Preparing a polyimide layer with a preset pattern on the front side of the wafer and preparing a preset arranged interlayer dielectric; Preparing metal blocks on the front side of the interlayer dielectric; Plating a metal layer on the front side of the metal blocks.

7. The method for manufacturing a semiconductor device according to claim 6, characterized in that, At least part of the hollowed-out area of the polyimide layer corresponds to the position of the scribe lane.

8. The method for manufacturing a semiconductor device according to claim 6, characterized in that, The metal layer is at least one metal selected from nickel, palladium, and gold or a composite metal layer composed of multiple metals.

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