A low-power trench IGBT with silicon carbide and silicon heterojunction

By designing silicon carbide and silicon heterojunction low-power trench IGBT, taking advantage of the high breakdown voltage characteristics of silicon carbide material and the high injection efficiency of silicon material, combined with heterojunction interface defects to accelerate carrier recombination, we solve the problem of IGBT The problem of slow device switching speed and high loss is achieved, and ultra-low turn-on and turn-off losses are achieved.

CN114530488BActive Publication Date: 2025-01-24ZORRUN SEMICON
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Patent Information

Application Number
CN202210156675.X
Authority / Receiving Office
CN · China
Patent Type
Patents(China)
Current Assignee / Owner
Filing Date
2022-02-21
Publication Date
2025-01-24
Estimated Expiration
2042-02-21

AI Technical Summary

Technical Problem

The slow switching speed of IGBT devices leads to additional switching losses, especially the shutdown losses caused by tailing currents, which are one of the main sources of IGBT device losses.

Method used

Design a silicon carbide and silicon heterojunction low-power trench IGBT. Its collector structure consists of a multi-layer structure, including P+ collector, N+ buffer layer B, N+ buffer layer A, N drift region and surface structure. The high breakdown voltage characteristics of silicon carbide material and the high injection efficiency of silicon material are utilized, combined with heterojunction interface defects to accelerate carrier recombination.

Benefits of technology

The ultra -low ditage and turning loss of the IGBT device are implemented, and the switching speed and efficiency are improved.

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Abstract

The present invention relates to a silicon carbide and silicon heterojunction low-power trench IGBT, which includes a collector structure; the collector structure is a multilayer structure, which is sequentially composed of a P+ collector, an N+ buffer layer B located above the P+ collector, an N+ buffer layer A located on the N+ buffer layer B, an N drift region located on the N+ buffer layer A, and a surface structure located above the N drift region from the bottom layer to the top layer; the P+ collector and the N+ buffer layer B are both made of silicon material, and the N+ buffer layer A, the N drift region, and the surface structure are all made of silicon carbide material. It is designed that the part above the N+ buffer layer A is made of silicon carbide material, and the part below the N+ buffer layer B is made of silicon material, so that the drift region part utilizes the high breakdown voltage characteristics of silicon carbide, the collector part utilizes the high injection efficiency of silicon material, and the buffer layer utilizes the heterojunction interface defects to accelerate carrier recombination, so that the IGBT has ultra-low turn-on and turn-off losses.
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Description

Technical Field

[0001] The present invention relates to an IGBT (Insulated Gate Bipolar Transistor), and in particular to a low-power trench IGBT of a silicon carbide and silicon heterojunction. Background Art

[0002] In recent years, with the continuous development of power electronic systems, higher requirements have been placed on the power devices in the system. Insulated gate bipolar transistors (IGBTs) have become one of the mainstream power switching devices in the medium and high power range due to their advantages such as easy gate drive, high input impedance, high current density, and low saturation voltage drop.

[0003] However, as a bipolar device, its switching speed is slower than that of a unipolar device, which results in additional switching losses, especially the turn-off losses caused by the tail current, which is one of the main sources of losses in IGBT devices. Summary of the invention

[0004] To solve the above problems, the present invention relates to a silicon carbide and silicon heterojunction low power consumption trench IGBT.

[0005] The technical solution of the present invention:

[0006] A silicon carbide and silicon heterojunction low-power trench IGBT, comprising a collector structure; the collector structure is a multi-layer structure, which comprises, from the bottom layer to the top layer, a P+ collector, an N+ buffer layer B located above the P+ collector, an N+ buffer layer A located on the N+ buffer layer B, an N drift region located on the N+ buffer layer A, and a surface structure located above the N drift region;

[0007] The P+ collector and the N+ buffer layer B are both made of silicon (Si) material, and the N+ buffer layer A, the N drift region, and the surface structure are all made of silicon carbide (SiC) material.

[0008] The surface structure includes a P base region, a plurality of trench gates are arranged in the P base region, a plurality of N+ emitter regions and P+ emitter regions are arranged on the P base region, and each group of two N+ emitter regions and one P+ emitter region are located between adjacent trench gates, wherein the N+ emitter region is close to the trench gate, and the P+ emitter region is close to the N+ emitter region and is located between the two N+ emitter regions;

[0009] The surface structure also includes a top emitter disposed above the trench gate, the N+ emitter region, and the P+ emitter region.

[0010] The P+ emitter region is deeply diffused, and its depth is less than that of the P base region.

[0011] The trench gate extends into the N drift region for a certain distance.

[0012] The advantages of the present invention are reasonable design and ingenious conception. The part above the N+ buffer layer A is designed to be made of silicon carbide material, and the part of the N+ buffer layer B and below is made of silicon material. In this way, the drift region part utilizes the high breakdown voltage characteristics of silicon carbide, the collector part utilizes the high injection efficiency of silicon material, and the buffer layer utilizes the heterojunction interface defects to accelerate carrier recombination, so that the IGBT has ultra-low turn-on and turn-off losses. BRIEF DESCRIPTION OF THE DRAWINGS

[0013] Figure 1 It is a schematic diagram of the collector structure.

[0014] In the figure, there are P+ collector 9, N+ buffer layer B 8, N+ buffer layer A 7, N drift region 6, surface structure 5, P base region 51, trench gate 52, N+ emitter region 53, P+ emitter region 54, and emitter 55. DETAILED DESCRIPTION

[0015] As shown in the figure, a silicon carbide and silicon heterojunction low-power trench IGBT includes a collector structure; the collector structure is a multi-layer structure, which is, from the bottom to the top, a P+ collector 9, an N+ buffer layer B8 located above the P+ collector 9, an N+ buffer layer A7 located on the N+ buffer layer B8, an N drift region 6 located on the N+ buffer layer A7, and a surface structure 5 located above the N drift region 6; the P+ collector 9 and the N+ buffer layer B8 are all made of silicon material, and the N+ buffer layer A7, the N drift region 6, and the surface structure 5 are all made of silicon carbide material.

[0016] The surface structure 5 includes a P base region 51, in which a plurality of trench gates 52 are arranged, and a plurality of N+ emitter regions 53 and P+ emitter regions 54 are arranged on the P base region 51, wherein two N+ emitter regions 53 and one P+ emitter region 54 form a group and are located between adjacent trench gates 52, wherein the N+ emitter region 53 is close to the trench gates 52, and the P+ emitter region 54 is close to the N+ emitter region 53 and is located between the two N+ emitter regions 53; the surface structure 5 also includes a top emitter 55 arranged above the trench gates 52, the N+ emitter region 53, and the P+ emitter region 54; the P+ emitter region 54 is deeply diffused, and its depth is less than that of the P base region 51; the trench gates 52 extend into a section of the N drift region 6.

[0017] The technical elements described in this specification or drawings are technically useful alone or in various combinations, and are not limited to the combinations described in the claims at the time of application. In addition, the technology exemplified in this specification or drawings achieves multiple purposes at the same time, and achieving one of the purposes itself has technical usefulness.

Claims

1. A silicon carbide and silicon heterojunction low power consumption trench IGBT, comprising a collector structure; characterized in that: The collector structure is a multi-layer structure, which includes, from the bottom layer to the top layer, a P+ collector, an N+ buffer layer B located above the P+ collector, an N+ buffer layer A located on the N+ buffer layer B, an N drift region located on the N+ buffer layer A, and a surface structure located above the N drift region; The P+ collector and N+ buffer layer B are made of silicon material, and the N+ buffer layer A, N drift region and surface structure are made of silicon carbide material; The surface structure includes a P base region, a plurality of trench gates are arranged in the P base region, a plurality of N+ emitter regions and P+ emitter regions are arranged on the P base region, and each group of two N+ emitter regions and one P+ emitter region are located between adjacent trench gates, wherein the N+ emitter region is close to the trench gate, and the P+ emitter region is close to the N+ emitter region and is located between the two N+ emitter regions; The surface structure also includes a top emitter disposed above the trench gate, the N+ emitter region, and the P+ emitter region; The P+ emitter region is deeply diffused, and its depth is less than that of the P base region; The trench gate extends into the N drift region for a certain distance.

Citation Information

Patent Citations

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