Light emitting diode and fabrication method
By employing a combination of ITO thin film and multilayer metal thin film in GaAs-based light-emitting diodes, the interfacial bonding force is enhanced by utilizing the intermetallic fusion capability, thus solving the bonding problem between oxide bonding layer and sapphire and achieving a highly efficient chip bonding effect.
Patent Information
- Authority / Receiving Office
- CN · China
- Patent Type
- Patents(China)
- Current Assignee / Owner
- Filing Date
- 2022-01-26
- Publication Date
- 2026-03-24
AI Technical Summary
In traditional GaAs-based light-emitting diodes, it is difficult to form a bond between the oxide bonding layer and sapphire, and the bonding force is weak after bonding, resulting in voids and cracks at the contact surface, making it difficult to achieve efficient bonding.
A strong bond is formed between the epitaxial layer and the sapphire substrate using an ITO thin film and a metal thin film containing two different metal layers, and the interfacial bonding is enhanced by utilizing the intermetallic fusion capability.
It effectively solves the bonding problem between oxide bonding layer and sapphire, improves the reliability and bonding strength of bonding, and increases the chip bonding yield.
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Figure CN114551665B_ABST
Abstract
Description
TECHNICAL FIELD
[0001] The present application relates to the technical field of LED, in particular to a light emitting diode and a manufacturing method. BACKGROUND
[0002] Light emitting diode (LED) is a kind of semiconductor electronic component that can emit light, which attracts more and more researchers due to its small size, high brightness and low energy consumption.
[0003] The traditional GaAs-based light emitting diode usually contains a bonding layer for bonding with a transparent substrate sapphire, and the current mainstream bonding layer materials are oxides such as silicon oxide, silicon nitride and aluminum oxide. When the above oxides are used as bonding layer materials to bond with the transparent substrate sapphire, it is difficult to obtain an ideal pyramid shape due to the uncontrollable roughening morphology of the P-GaP window layer in the GaAs-based light emitting diode during the LED chip manufacturing process, which leads to a large number of voids on the contact surface between the oxide and the P-GaP window layer. After subsequent high-temperature and high-pressure chip processing, cracks and gaps are prone to occur on the contact surface between the oxide and the P-GaP window layer.
[0004] In addition, it is difficult to obtain an oxide surface with high uniformity, low roughness, cleanliness and no damage by using CMP polishing, which will lead to a large number of un-bonded voids on the contact surface when the oxide is bonded with the transparent substrate sapphire, and the sapphire bonding delamination and even the bonding failure are prone to occur. SUMMARY
[0005] Therefore, the present application aims to provide a light emitting diode and a manufacturing method, which can solve the problems of difficult bonding between the oxide bonding layer and the sapphire and weak bonding force after bonding in the prior art.
[0006] According to one of the embodiments of the present application, a light emitting diode is provided, which comprises an epitaxial layer substrate, an epitaxial layer, a thin film layer and a sapphire substrate, the epitaxial layer is epitaxially grown on the epitaxial layer substrate, the thin film layer is deposited on the epitaxial layer, and the sapphire substrate is attached to the thin film layer, wherein the thin film layer comprises an ITO thin film and a metal thin film, the ITO thin film is deposited on the epitaxial layer, the metal thin film comprises at least two different metal layers, the metal layers are sequentially deposited on the ITO thin film, and the metal layer of the same metal material away from the ITO thin film is attached to one side of the sapphire substrate, and the side of the sapphire substrate attached with the metal layer is attached to the metal thin film.
[0007] Preferably, the epitaxial layer substrate is a GaAs substrate, and the epitaxial layer comprises a Buffer layer, a GaInP cutoff layer, an N-GaAS layer, an N-AlInP layer, an MQW layer, a P-AlInP layer, and a P-GaP light window layer, wherein the Buffer layer, the GaInP cutoff layer, the N-GaAS layer, the N-AlInP layer, the MQW layer, the P-AlInP layer, and the P-GaP light window layer are epitaxially grown on the GaAs substrate in sequence.
[0008] Preferably, the thickness of the ITO thin film is determined by the wavelength of the GaAs-based Flip-Chip chip, and the calculation formula of the thickness is as follows:
[0009] d = m (1 / 4n)
[0010] wherein d is the target thickness of the ITO thin film, m is the antireflection coefficient, λ is the wavelength of the GaAs-based Flip-Chip chip, and n is the refractive index of the ITO thin film.
[0011] Preferably, the thickness of the metal thin film is not more than 15 nm.
[0012] According to the method for manufacturing a light-emitting diode in one of the embodiments of the present application, the method for manufacturing a light-emitting diode comprises the following steps.
[0013] providing an epitaxial layer substrate required for growth;
[0014] growing an epitaxial layer on the epitaxial layer substrate;
[0015] depositing a thin film layer on the epitaxial layer;
[0016] evaporating a metal layer on a sapphire substrate;
[0017] attaching the side of the sapphire substrate with the metal layer to the thin film layer;
[0018] wherein the thin film layer comprises an ITO thin film and a metal thin film, the ITO thin film is deposited on the epitaxial layer, the metal thin film comprises at least two different metal layers, the metal layers are deposited on the ITO thin film in sequence, the sapphire substrate is attached with the metal layer of the same metal material at the end of the metal thin film away from the ITO thin film, and the side of the sapphire substrate attached with the metal layer is attached to the metal thin film.
[0019] Preferably, the method for manufacturing a light-emitting diode further comprises the following steps.
[0020] The epitaxial layer substrate is a GaAs substrate, and the epitaxial layer includes a buffer layer, a GaInP cutoff layer, an N-GaAS layer, an N-AlInP layer, an MQW layer, a P-AlInP layer, and a P-GaP optical window layer, wherein the buffer layer, the GaInP cutoff layer, the N-GaAS layer, the N-AlInP layer, the MQW layer, the P-AlInP layer, and the P-GaP optical window layer are epitaxially grown sequentially on the GaAs substrate.
[0021] Preferably, after the step of attaching the side of the sapphire substrate with the metal layer to the thin film layer, the method further includes:
[0022] Remove the GaAs substrate, the buffer layer, and the GaInP cutoff layer to expose the N-GaAs layer;
[0023] Etching is performed from the N-GaAS layer to the P-GaP optical window layer;
[0024] A P-electrode is fabricated on the P-GaP optical window layer, and an N-electrode is fabricated on the N-GaAS layer, with ohmic contacts formed respectively.
[0025] Overall deposition of passivation protective layer;
[0026] Holes are etched into the passivation protective layer on the P electrode and the N electrode;
[0027] The holes above the P electrode and the N electrode are filled with solder pad electrodes.
[0028] Preferably, the ITO film is a mixture of In2O3 and SnO2, wherein In2O3 constitutes 95% of the ITO film composition and SnO2 constitutes 5% of the ITO film composition.
[0029] Preferably, the step of depositing the thin film layer on the epitaxial layer specifically includes:
[0030] The ITO thin film is deposited by evaporation using EB electron beam evaporation. The evaporation conditions are: evaporation temperature of 250℃-350℃, vacuum degree of 1E-6-8E-6 Torr, and evaporation rate of 0.35A / s-1A / s.
[0031] Preferably, the step of depositing the thin film layer on the epitaxial layer further includes:
[0032] The metal thin film is deposited by evaporation using EB electron beam evaporation. The evaporation conditions are cold evaporation, vacuum 1E-4-1E-3Pa, and evaporation rate 0.5A / s-2A / s.
[0033] Compared with existing technologies: By sequentially forming an epitaxial layer, an ITO thin film, a metal thin film, and a sapphire substrate on an epitaxial substrate, wherein the thin film layer includes an ITO thin film and a metal thin film, the ITO thin film is deposited on the epitaxial layer, the metal thin film includes at least two different metal layers, the metal layer is sequentially deposited on the ITO thin film, and a metal layer of the same metal material is attached to the sapphire substrate at the end of the metal thin film away from the ITO thin film. Finally, the side of the sapphire substrate with the attached metal layer is attached to the metal thin film. Due to the strong intermetallic fusion ability and the strong bonding force at the interface after fusion, the problem of difficulty in forming a bond between the oxide bonding layer and the sapphire and the weak bonding force after bonding are effectively solved. Attached Figure Description
[0034] Figure 1 This is a schematic diagram of the structure of the light-emitting diode in Embodiment 1 of the present invention;
[0035] Figure 2 This is a flowchart of the method for manufacturing a light-emitting diode in Embodiment 2 of the present invention;
[0036] Figure 3 This is a flowchart of the method for manufacturing a light-emitting diode according to Embodiment 3 of the present invention;
[0037] Figure 4 This is a schematic diagram of the structure of the light-emitting diode proposed in Embodiment 3 of the present invention.
[0038] The following detailed description, in conjunction with the accompanying drawings, will further illustrate the present invention. Detailed Implementation
[0039] To facilitate understanding of the present invention, a more complete description will be given below with reference to the accompanying drawings. Several embodiments of the invention are illustrated in the drawings. However, the invention can be implemented in many different forms and is not limited to the embodiments described herein. Rather, these embodiments are provided so that this disclosure will be thorough and complete.
[0040] It should be noted that when a component is said to be "fixed to" another component, it can be directly on the other component or there may be an intervening component. When a component is said to be "connected to" another component, it can be directly connected to the other component or there may be an intervening component. The terms "vertical," "horizontal," "left," "right," and similar expressions used in this document are for illustrative purposes only.
[0041] Unless otherwise defined, all technical and scientific terms used herein have the same meaning as commonly understood by one of ordinary skill in the art to which this invention pertains. The terminology used herein in the specification of this invention is for the purpose of describing particular embodiments only and is not intended to be limiting of the invention. The term "and / or" as used herein includes any and all combinations of one or more of the associated listed items.
[0042] Example 1
[0043] Please see Figure 1 The diagram shown is a schematic diagram of the structure of a light-emitting diode in Embodiment 1 of the present invention, including an epitaxial substrate, an epitaxial layer epitaxially grown on the epitaxial substrate, a thin film layer deposited on the epitaxial layer, and a sapphire substrate bonded to the thin film layer.
[0044] In this embodiment, the epitaxial layer substrate is GaAs substrate 1, and the epitaxial layer includes a buffer layer 2, a GaInP cutoff layer 3, an N-GaAS layer 4, an N-AlInP layer 5, an MQW layer 6, a P-AlInP layer 7, and a P-GaP optical window layer 8. The buffer layer 1, the GaInP cutoff layer 2, the N-GaAS layer 3, the N-AlInP layer 4, the MQW layer 5, the P-AlInP layer 6, and the P-GaP optical window layer 7 are epitaxially grown sequentially on the GaAs substrate 1.
[0045] Specifically, the thin film layer includes an ITO thin film 9 and a metal thin film. The ITO thin film 9 is a mixture of In₂O₃ and SnO₂. It should be noted that the thickness of the ITO thin film is determined by the wavelength of the GaAs-based Flip-Chip chip, and the formula for calculating the thickness is as follows:
[0046] d = m(1λ / 4n)
[0047] Where d is the target thickness of the ITO film 9, m is the anti-reflection coefficient, and it can be understood that when m is an odd number, such as 1, 3, 5, etc., the anti-reflection effect can be achieved. The specific value of m can be set according to the required thickness of the ITO film 9, λ is the wavelength of the GaAs-based Flip-Chip chip, and n is the refractive index of the ITO film 9.
[0048] In this embodiment, the metal thin film includes a Ni layer 10, a Cu layer 11, and an Ag layer 12. An ITO thin film 9 is deposited on the epitaxial layer. The Ni layer 10, Cu layer 11, and Ag layer 12 are sequentially deposited between the ITO thin film 9 and the sapphire substrate 13. The sapphire substrate 13 is attached to the Ag layer 12. It can be understood that the cumulative thickness of each of the Ni layer 10, Cu layer 11, and Ag layer 12 does not exceed 15 nm.
[0049] By way of example and not limitation, in some preferred embodiments of this embodiment, alternative combinations of metal materials in the metal thin film in the thin film layer are Ni, Cu and Au, Al, Cu and Au, Al, Cu and Ag, Ni and Au, Al and Ag. It is understood that when the metal layer in the metal thin film that is far from the ITO thin film 9 is an Au layer, an Au metal layer should also be attached to one side of the sapphire substrate 13.
[0050] Example 2
[0051] Please see Figure 2 The diagram illustrates a method for fabricating a light-emitting diode (LED) according to Embodiment 2 of the present invention. This method is used to prepare the LED described in Embodiment 1 above. The method specifically includes steps S01 to S05, wherein:
[0052] Step S01: Provide an epitaxial substrate required for growth.
[0053] In this embodiment, the epitaxial layer substrate is a GaAs substrate.
[0054] Step S02: An epitaxial layer is grown on the epitaxial substrate.
[0055] The epitaxial layer includes a buffer layer, a GaInP cutoff layer, an N-GaAS layer, an N-AlInP layer, an MQW layer, a P-AlInP layer, and a P-GaP optical window layer. It should be noted that the buffer layer, GaInP cutoff layer, N-GaAS layer, N-AlInP layer, MQW layer, P-AlInP layer, and P-GaP optical window layer are epitaxially grown sequentially on a GaAs substrate.
[0056] Step S03: Deposit the thin film layer onto the epitaxial layer.
[0057] Specifically, the thin film layer includes an ITO thin film and a metal thin film. The ITO thin film is a mixture of In2O3 and SnO2. It should be noted that In2O3 accounts for 95% of the ITO thin film composition, and SnO2 accounts for 5% of the ITO thin film composition. The method for depositing the ITO thin film on the P-GaP optical window layer is evaporation. Currently, ITO evaporation methods include EB electron beam evaporation, sputtering magnetron sputtering, and RPD reactive plasma deposition. In this embodiment, EB electron beam evaporation is used. The transmittance of the evaporated ITO thin film is greater than 99%. The evaporation temperature is 250℃-350℃, the vacuum degree is 1E-6-8E-6 Torr, and the evaporation rate is 0.35A / s-1A / s.
[0058] In this embodiment, the metal thin film includes Ni, Cu, and Ag, which are sequentially deposited on the ITO thin film. It should be noted that the method for depositing the metal thin film on the ITO thin film is vapor deposition. In this embodiment, EB electron beam evaporation is used. The conditions of this method are cold evaporation, vacuum 1E-4-1E-3Pa, evaporation rate 0.5A / s-2A / s, and one-time evaporation. The film layer cannot be exposed to the atmosphere before the evaporation is completed. Using EB electron beam evaporation can obtain a metal thin film with a relatively smooth surface.
[0059] It is understandable that Ni, Cu and Ag can be vapor-deposited to different thicknesses, and the sum of the thicknesses of the three metals does not exceed 15nm. This is because as the thickness of the metal increases, the roughness increases, and its light absorption coefficient will increase accordingly, resulting in a significant decrease in transmittance.
[0060] By way of example and not limitation, in some preferred embodiments of this embodiment, Ni accounts for 8% to 10% of the metal film composition, for example, 8%, 9%, 10%; Cu accounts for 18% to 20% of the metal film composition, for example, 18%, 9%, 20%; and Ag accounts for 70% to 74% of the metal film composition, for example, 70%, 70%, 72%, 73%, 74%.
[0061] Step S04: Deposit a metal layer on the sapphire substrate by vapor deposition.
[0062] Specifically, before the sapphire substrate is bonded to the metal thin film layer, a metal layer of the same metal material as the end of the metal thin film away from the ITO film needs to be deposited on the sapphire substrate to facilitate fusion. In this embodiment, Ni, Cu and Ag are deposited sequentially on the ITO film. It can be understood that an Ag layer needs to be deposited on the sapphire substrate. This deposition method adopts EB electron beam evaporation, which is cold evaporation. After the Ag layer deposited on the sapphire substrate is fused with the Ag layer in the metal thin film, the total thickness of the three metal layers of Ni, Cu and Ag does not exceed 15nm, and Ag accounts for 70% to 74% of the metal thin film composition.
[0063] Step S05: Attach the side of the sapphire substrate with the metal layer to the thin film layer.
[0064] In this embodiment, the epitaxial layer with Ni / Cu / Ag deposited and the sapphire substrate with Ag deposited are bonded together by high temperature and high pressure. Since the bonding force of the interface between the metals is greater than the bonding force between silicon dioxide and sapphire, it is easier to obtain a high-yield bonding effect.
[0065] In summary, the light-emitting diode and its fabrication method in this embodiment of the invention sequentially form an epitaxial layer, an ITO thin film, a metal thin film, and a sapphire substrate on an epitaxial substrate. The thin film layers include an ITO thin film and a metal thin film. The ITO thin film is deposited on the epitaxial layer, and the metal thin film includes at least two different metal layers. The metal layers are sequentially deposited on the ITO thin film, and a metal layer of the same metal material is attached to the sapphire substrate at the end furthest from the ITO thin film. Finally, the side of the sapphire substrate with the attached metal layer is bonded to the metal thin film. Due to the strong intermetallic fusion capability and the strong bonding force at the interface after fusion, the problem of difficulty in forming a bond between the oxide bonding layer and the sapphire, as well as the weak bonding force after bonding, is effectively solved.
[0066] Example 3
[0067] Please see Figure 3 and Figure 4 , Figure 3 The figure shown is a method for manufacturing a light-emitting diode according to Embodiment 3 of the present invention. Figure 4 The diagram shown is a schematic diagram of a light-emitting diode according to Embodiment 3 of the present invention. The method is used to prepare the light-emitting diode in Embodiment 1 above. The method specifically includes steps S10 to S20.
[0068] Step S10: Provide an epitaxial substrate required for growth.
[0069] Step S11: An epitaxial layer is grown on the epitaxial substrate.
[0070] Step S12: Deposit the thin film layer onto the epitaxial layer.
[0071] Step S13: Deposit a metal layer on the sapphire substrate by vapor deposition.
[0072] Step S14: Attach the side of the sapphire substrate with the metal layer to the thin film layer.
[0073] Step S15: Remove the GaAs substrate, the buffer layer, and the GaInP cutoff layer to expose the N-GaAS layer.
[0074] In this process, the GaAs substrate, buffer layer, and GaInP cutoff layer are removed by a wet solution to expose the N-GaAs layer 4.
[0075] Step S16: Etch from the N-GaAS layer to the P-GaP optical window layer.
[0076] Specifically, starting from the N-GaAS layer 4, the epitaxial layer is etched to the P-GaP optical window layer 8 under the MQW layer 6 through pattern lithography and ICP etching.
[0077] Step S17: A P electrode is fabricated on the P-GaP optical window layer, an N electrode is fabricated on the N-GaAS layer, and ohmic contacts are formed respectively.
[0078] It should be noted that after the P electrode is fabricated on the P-GaP optical window layer 8, it needs to be annealed to form an ohmic contact. Then, the N electrode is fabricated on the N-GaAS layer 4 and annealed in the same way to form an ohmic contact.
[0079] Step S18: Deposit the overall passivation protective layer.
[0080] Specifically, a passivation protective layer needs to be deposited on the entire surface before proceeding to the next process. As an example, and not a limitation, in some preferred embodiments of this example, the material of the passivation protective layer may be silicon dioxide, silicon nitride, or a thin film of silicon oxide and titanium oxide interleaved growth.
[0081] Step S19: Etch holes in the passivation protective layer on the P electrode and the N electrode.
[0082] In this embodiment, holes are etched into the passivation layer on the P and N electrodes by pattern photolithography and ICP etching.
[0083] Step S20: Fill the hole above the P electrode and the N electrode with a solder pad electrode.
[0084] Specifically, through pattern photolithography and vapor deposition, pad electrodes are filled into the passivation layer holes above the P and N electrodes. These pad electrodes are used to connect to an external power source.
[0085] Example 4
[0086] In this embodiment, an epitaxial layer is grown on a GaAs substrate, and an ITO thin film is deposited by EB electron beam evaporation. The ITO film deposition conditions are: chamber temperature set at 270°C, deposition rate of 0.4 Å / s, vacuum degree of 4E-6 Torr, and cold evaporation. After the ITO film deposition is completed, metal films are deposited on the ITO film, sequentially depositing Ni, Cu, and Ag layers. The Ni deposition rate is 0.5 Å / s with a thickness of 13.5 Å, the Cu deposition rate is 1 Å / s with a thickness of 28.5 Å, and the Ag deposition rate is 1 Å / s with a thickness of 54 Å. After the metal film deposition is completed, an Ag layer is deposited on a sapphire substrate by EB electron beam evaporation, with a cold evaporation. The Ag deposition rate is 1 Å / s with a thickness of 54 Å. The final chip bonding yield reaches 98%.
[0087] Example 5
[0088] In this embodiment, an epitaxial layer is grown on a GaAs substrate, and an ITO thin film is deposited by EB electron beam evaporation. The ITO film deposition conditions are: chamber temperature set at 300°C, deposition rate of 0.8 A / s, vacuum degree of 4E-6 Torr, and cold evaporation. After the ITO film deposition is completed, metal films are deposited on the ITO film, sequentially depositing Ni, Cu, and Ag layers. The Ni deposition rate is 0.5 A / s with a thickness of 11.7 Å, the Cu deposition rate is 1 A / s with a thickness of 24.7 Å, and the Ag deposition rate is 1 A / s with a thickness of 41.8 Å. After the metal film deposition is completed, an Ag layer is deposited on a sapphire substrate by EB electron beam evaporation, with cold evaporation. The Ag deposition rate is 1 A / s with a thickness of 41.8 Å. The final chip bonding yield reaches 97%.
[0089] The embodiments described above are merely illustrative of several implementations of the present invention, and while the descriptions are specific and detailed, they should not be construed as limiting the scope of the present invention. It should be noted that those skilled in the art can make various modifications and improvements without departing from the concept of the present invention, and these modifications and improvements all fall within the scope of protection of the present invention. Therefore, the scope of protection of this patent should be determined by the appended claims.
Claims
1. A light-emitting diode, characterized in that, The device includes an epitaxial substrate, an epitaxial layer, a thin film layer, and a sapphire substrate. The epitaxial layer is epitaxially grown on the epitaxial substrate. The thin film layer is deposited on the epitaxial layer. The sapphire substrate is attached to the thin film layer. The thin film layer includes an ITO thin film and a metal thin film. The ITO thin film is deposited on the epitaxial layer. The metal thin film includes at least two different metal layers. The metal layers are sequentially deposited on the ITO thin film. The sapphire substrate has a metal layer of the same metal material attached to one end of the metal thin film, away from the ITO thin film. The side of the sapphire substrate with the attached metal layer is attached to the metal thin film. The ITO film is a mixture of In2O3 and SnO2, wherein In2O3 constitutes 95% of the ITO film composition and SnO2 constitutes 5% of the ITO film composition. The metal thin film includes Ni, Cu and Ag, wherein Ni, Cu and Ag are sequentially deposited on an ITO thin film, Ni accounts for 8% to 10% of the metal thin film composition, Cu accounts for 18% to 20% of the metal thin film composition, Ag accounts for 70% to 74% of the metal thin film composition, and the thickness of the metal thin film does not exceed 15 nm. An Ag layer is deposited on a sapphire substrate using an EB electron beam evaporation method for cold evaporation. In addition, the Ni / Cu / Ag epitaxial layer and the Ag-deposited sapphire substrate are bonded together using a high temperature and high pressure method.
2. The light-emitting diode according to claim 1, characterized in that, The epitaxial layer substrate is a GaAs substrate, and the epitaxial layer includes a buffer layer, a GaInP cutoff layer, an N-GaAS layer, an N-AlInP layer, an MQW layer, a P-AlInP layer, and a P-GaP optical window layer, wherein the buffer layer, the GaInP cutoff layer, the N-GaAS layer, the N-AlInP layer, the MQW layer, the P-AlInP layer, and the P-GaP optical window layer are epitaxially grown sequentially on the GaAs substrate.
3. The light-emitting diode according to claim 1, characterized in that, The thickness of the ITO thin film is determined by the wavelength of the GaAs-based Flip-Chip chip, and the formula for calculating the thickness is as follows: Where d is the target thickness of the ITO thin film, m is the anti-reflection coefficient, λ is the wavelength of the GaAs-based Flip-Chip chip, and n is the refractive index of the ITO thin film.
4. A method for manufacturing a light-emitting diode, characterized in that, A method for manufacturing a light-emitting diode according to any one of claims 1-3, comprising: Provide an epitaxial substrate required for growth; An epitaxial layer is grown on the epitaxial substrate; A thin film layer is deposited on the epitaxial layer; A metal layer is deposited on a sapphire substrate; The side of the sapphire substrate with the metal layer is attached to the thin film layer; The thin film layer includes an ITO thin film and a metal thin film. The ITO thin film is deposited on the epitaxial layer. The metal thin film includes at least two different metal layers. The metal layers are sequentially deposited on the ITO thin film. The metal layer of the metal thin film, which is of the same metal material at the end away from the ITO thin film, is attached to the sapphire substrate. The side of the sapphire substrate with the attached metal layer is attached to the metal thin film.
5. The method for manufacturing a light-emitting diode according to claim 4, characterized in that, The method for manufacturing the light-emitting diode also includes: The epitaxial layer substrate is a GaAs substrate, and the epitaxial layer includes a buffer layer, a GaInP cutoff layer, an N-GaAS layer, an N-AlInP layer, an MQW layer, a P-AlInP layer, and a P-GaP optical window layer, wherein the buffer layer, the GaInP cutoff layer, the N-GaAS layer, the N-AlInP layer, the MQW layer, the P-AlInP layer, and the P-GaP optical window layer are epitaxially grown sequentially on the GaAs substrate.
6. The method for manufacturing a light-emitting diode according to claim 5, characterized in that, Following the step of attaching the side of the sapphire substrate with the metal layer to the thin film layer, the method further includes: Remove the GaAs substrate, the buffer layer, and the GaInP cutoff layer to expose the N-GaAs layer; Etching is performed from the N-GaAS layer to the P-GaP optical window layer; A P-electrode is fabricated on the P-GaP optical window layer, and an N-electrode is fabricated on the N-GaAS layer, with ohmic contacts formed respectively. Overall deposition of passivation protective layer; Holes are etched into the passivation protective layer on the P electrode and the N electrode; The holes above the P electrode and the N electrode are filled with solder pad electrodes.
7. The method for manufacturing a light-emitting diode according to claim 6, characterized in that, The ITO film is a mixture of In2O3 and SnO2, wherein In2O3 accounts for 95% of the ITO film composition and SnO2 accounts for 5% of the ITO film composition.
8. The method for manufacturing a light-emitting diode according to claim 7, characterized in that, The step of depositing the thin film layer on the epitaxial layer specifically includes: The ITO thin film is deposited by evaporation using EB electron beam evaporation. The evaporation conditions are: evaporation temperature of 250℃-350℃, vacuum degree of 1E-6-8E-6Torr, and evaporation rate of 0.35 A / s-1A / s.
9. The method for manufacturing a light-emitting diode according to claim 8, characterized in that, The step of depositing the thin film layer on the epitaxial layer further includes: The metal thin film is deposited by evaporation using EB electron beam evaporation under the following conditions: cold evaporation, vacuum 1E-4-1E-3 Pa, and evaporation rate 0.5A / s-2A / s.
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